An information reading and writing method, an electronic device, a distributed system, and a program product
By creating a storage area in virtual memory and enabling host kernel capture of virtual CPU data, the method enhances data exchange and resource management between host and guest machines, addressing scheduling challenges and improving task efficiency.
Patent Information
- Application Number
- CN202210255744.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-15
- Publication Date
- 2025-07-15
- Estimated Expiration
- 2042-03-15
AI Technical Summary
How to realize data interaction between the host and the virtual machine, especially when the virtual CPU is running, resource scheduling and allocation.
When the virtual machine is initialized, a storage area is created in the virtual memory through the virtual machine kernel program and a write instruction to the virtual register is sent to the virtual register. The electronic device kernel program captures the instruction to read and write information to realize data interaction between the virtual machine and the electronic device.
It improves resource allocation and scheduling efficiency between virtual machines and electronic devices, avoids virtual machine operating system crashes, and optimizes task execution speed and resource utilization.
Smart Images

Figure CN114691297B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of this specification relate to the technical field of virtual machines, and in particular, to a method for reading and writing information, an electronic device, a distributed system, and a program product. Background Art
[0002] Cloud computing has become the core technical framework of the modern information technology industry, and more and more future information technology applications will be deployed on the cloud. The core technology of cloud computing is virtualization. Virtualization is a resource management technology that can abstract, transform, and divide and combine various physical resources of a computer, such as a processor (CPU), memory, disk space, network adapter, etc., into one or more computer configuration environments. By using virtualization technology, a virtual machine (Virtual Machine) with the functions of a complete hardware system can be simulated in a computer through software. A virtual machine is also called a guest machine. Correspondingly, a computer running one or more virtual machines is called a host machine. During the operation of the guest machine, the host machine needs to constantly schedule and plan physical resources. The operating conditions of the virtual CPU of the guest machine play an important reference role in the scheduling and planning of physical resources. At the same time, the guest machine also needs to schedule and allocate virtual resources, and the operating conditions of the physical CPU also play an important reference role in the scheduling and allocation of virtual resources. How to achieve data interaction between the host machine and the virtual machine is a technical problem that urgently needs to be solved in this field. Summary of the Invention
[0003] The embodiments of this specification provide a method for reading and writing information, an electronic device, a distributed system, and a program product, which can enable the host machine to obtain information of the virtual CPU.
[0004] According to a first aspect of the embodiments of this specification, there is provided a method for reading and writing information, which is applied to an electronic device that runs a virtual machine. The method includes:
[0005] When the virtual machine is initialized, the virtual machine kernel program creates a storage area for storing information in the virtual memory of the virtual machine, and sends a write instruction of the address of the storage area to the virtual register; wherein, during the operation of the virtual machine, the virtual machine kernel program reads and writes information in the storage area;
[0006] The electronic device kernel program captures the write instruction, obtains the address of the storage area from the write instruction, and reads and writes information in the storage area based on the address.
[0007] In some examples, the information stored in the storage area includes:
[0008] The virtual CPU information written by the virtual machine kernel program for the electronic device kernel program to read; and / or
[0009] The physical CPU information written by the electronic device kernel program for the virtual machine kernel program to read.
[0010] In some examples, the electronic device includes at least one physical CPU, and the virtual CPU of the virtual machine is mapped to and runs on a first physical CPU among the at least one physical CPU; the method further includes:
[0011] During the running of the virtual machine, if it is determined that the running of the virtual CPU needs to be paused, the electronic device kernel program pauses the virtual CPU mapped to the first physical CPU, so that the virtual CPU pauses running.
[0012] In some examples, the virtual CPU information includes the current working state of the virtual CPU; the working state includes kernel mode and user mode; the step of, if it is determined that the running of the virtual CPU needs to be paused, the electronic device kernel program pauses the virtual CPU mapped to the first physical CPU includes:
[0013] If it is determined that a task initiated by the electronic device needs to be executed, the electronic device kernel program determines the target physical CPU corresponding to the virtual CPU with the current working state being user mode, and pauses the virtual CPU mapped to the target physical CPU, so that the target physical CPU executes the task initiated by the electronic device.
[0014] In some examples, the electronic device includes at least two physical CPUs, and the physical CPU information includes the information of the first physical CPU; the method further includes:
[0015] If the running of the virtual CPU needs to be resumed, the electronic device kernel program reads the information of the first physical CPU recorded in the storage area before the virtual CPU is paused, and remaps the virtual CPU to the first physical CPU.
[0016] In some examples, the at least two physical CPUs share a last-level cache; the last-level cache includes a plurality of cache sub-regions; the physical CPU information further includes the region information of the cache sub-region allocated to the first physical CPU; the method further includes:
[0017] The electronic device kernel program allocates the cache sub-region matching the region information to the first physical CPU.
[0018] In some examples, the virtual machine includes at least two of the virtual CPUs, and one of the virtual CPUs corresponds to one storage area for storing virtual CPU information; the physical CPU information includes load information of the physical CPU that maps the virtual CPU, so that the virtual machine allocates tasks to the at least two virtual CPUs according to the load information.
[0019] In some examples, the address of the storage area is a physical address in the virtual machine; the reading and writing of information in the storage area based on the address includes:
[0020] Converting the physical address in the virtual machine into a virtual address in the electronic device;
[0021] Based on the virtual address in the electronic device, reading and writing information in the storage area.
[0022] According to a second aspect of the embodiments of the present specification, an information reading and writing method is applied to an electronic device, and the virtual machine running on the electronic device executes the following steps:
[0023] When the virtual machine is initialized, the virtual machine kernel program creates a storage area for storing information in the virtual memory of the virtual machine and sends a write instruction of the address of the storage area to the virtual register; so that the electronic device kernel program captures the write instruction, obtains the address of the storage area from the write instruction, and reads and writes information in the storage area based on the address.
[0024] During the running of the virtual machine, the virtual machine kernel program reads and writes information in the storage area.
[0025] According to a third aspect of the embodiments of the present specification, an electronic device is provided, which runs a virtual machine, and the electronic device includes:
[0026] A physical CPU;
[0027] A memory for storing processor-executable instructions;
[0028] Wherein, when the physical CPU calls the executable instructions, the operations of any of the methods in the first aspect are implemented.
[0029] According to a fourth aspect of the embodiments of the present specification, a distributed system is provided, and the distributed system includes at least one electronic device as described in the second aspect above.
[0030] According to a fifth aspect of the embodiments of the present specification, a computer program product is provided, which includes a computer program, and when the computer program is executed by a processor, the steps of any of the methods in the first aspect are implemented.
[0031] According to a sixth aspect of the embodiments of the present specification, there is provided a computer-readable storage medium, on which a number of computer instructions are stored, and when the computer instructions are executed, the method described in any one of the first aspects above is executed.
[0032] The technical solutions provided by the embodiments of the present specification may include the following beneficial effects:
[0033] An information reading and writing method, an electronic device, a distributed system, and a program product provided by the embodiments of the present specification are applied to an electronic device running a virtual machine. In the virtual machine initialization stage, the virtual machine kernel program creates a storage area in the allocated virtual memory to store information, and then sends a write instruction of the address of the storage area to the virtual register. During the operation of the virtual machine, the virtual machine kernel program can read and write in the storage area. At the same time, the electronic device kernel program can capture the write instruction, so as to obtain the address of the storage area from the write instruction. Based on the address of the storage area, information can be read and written in the storage area. Through the above method, the virtual machine and the electronic device can use the storage area to perform data interaction, so as to make resource allocation and scheduling based on the interaction data.
[0034] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the embodiments of the present specification. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] The drawings herein are incorporated into the specification and constitute a part of the embodiments of the present specification, showing embodiments that conform to the embodiments of the present specification, and are used together with the specification to explain the principles of the embodiments of the present specification.
[0036] Figure 1 is a flowchart of an information reading and writing method shown according to an embodiment of the present specification.
[0037] Figure 2 is a flowchart of an information reading and writing method shown according to another embodiment of the present specification.
[0038] Figure 3 is a flowchart of an information reading and writing method shown according to another embodiment of the present specification.
[0039] Figure 4 is a flowchart of an information reading and writing method shown according to another embodiment of the present specification.
[0040] Figure 5 is a schematic diagram of a CPU circuit board shown according to an embodiment of the present specification.
[0041] Figure 6It is a flowchart of an information reading and writing method shown in accordance with another embodiment of this specification.
[0042] Figure 7 It is a flowchart of an information reading and writing method shown in accordance with another embodiment of this specification.
[0043] Figure 8 It is a hardware structure diagram of an electronic device shown in accordance with an embodiment of this specification.
[0044] Figure 9 It is a schematic diagram of a distributed system shown in accordance with an embodiment of this specification. Detailed implementation manners
[0045] Here, the exemplary embodiments will be described in detail, and the examples are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementation manners described in the following exemplary embodiments do not represent all implementation manners consistent with the embodiments of this specification. On the contrary, they are merely examples of devices and methods consistent with some aspects of the embodiments of this specification as detailed in the appended claims.
[0046] The terms used in the embodiments of this specification are only for the purpose of describing specific embodiments and are not intended to limit the embodiments of this specification. The singular forms "a", "the", and "said" used in the embodiments of this specification and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.
[0047] It should be understood that although the terms first, second, third, etc. may be used in the embodiments of this specification to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the embodiments of this specification, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "when" or "while" or "in response to determining".
[0048] Cloud computing has become the core technology framework of the modern information technology industry, and more and more information technology applications will be deployed in the cloud in the future. The core technology of cloud computing is virtualization. Virtualization is a resource management technology that can abstract, transform, and divide and combine various physical resources of a computer, such as the central processing unit (CPU), memory, disk space, network adapter, etc., into one or more computer configuration environments. Using virtualization technology, a virtual machine (Virtual Machine) with the functions of a complete hardware system can be simulated in a computer through software. A virtual machine is also called a guest machine. Correspondingly, a computer running one or more virtual machines is called a host machine.
[0049] In a virtualized environment, from the perspective of the virtual machine, a virtual central processing unit (VCPU) is used to execute calculations. However, in fact, it is the physical CPU of the physical host where the virtual machine is located, that is, the physical CPU of the host machine, that executes the specific calculation function. That is to say, the VCPU is mapped to the physical CPU for operation. At the same time, with the development of technology, multi-core processors that can process tasks simultaneously have emerged. A multi-core processor refers to a CPU circuit board integrated with more than two complete computing engines (cores), that is, integrated with more than two physical CPUs. In the embodiments of this specification, for an electronic device including a multi-core processor, the physical CPU refers to the core in the multi-core processor.
[0050] During the operation of the virtual machine, the host machine needs to constantly schedule and plan the physical resources. The operation of the virtual CPU of the virtual machine has an important reference role in the scheduling and planning of the physical resources. At the same time, the guest machine also needs to schedule and allocate virtual resources, and the operation of the physical CPU also has an important reference role in the scheduling and allocation of virtual resources. How to realize data interaction between the host machine and the virtual machine is a technical problem that urgently needs to be solved in this field. For this reason, the embodiments of this specification propose an information reading and writing method, which is applied to an electronic device, where the electronic device runs a virtual machine. It can be understood that an electronic device running a virtual machine is also the host machine described above. The above method includes as Figure 1 the steps described below:
[0051] Step 110: When the virtual machine is initialized, the virtual machine kernel program creates a storage area for storing information in the virtual memory of the virtual machine and sends a write instruction of the address of the storage area to the virtual register; wherein, during the operation of the virtual machine, the virtual machine kernel program reads and writes information in the storage area;
[0052] Step 120: The kernel program of the electronic device captures the write instruction, obtains the address of the storage area from the write instruction, and reads and writes information in the storage area based on the address.
[0053] One or more virtual machines can be established and run in the electronic device through virtualization software. For example, the virtualization software can include QEMU (Quick Emulator), Virtual PC, etc. QEMU can cooperate with the Kernel-based Virtual Machine (KVM) to complete the virtualization work of the electronic device. As Figure 2 shown, the electronic device can start a virtual CPU thread. For example, the virtualization software QEMU can be used to start the virtual CPU thread through the system call of input / output control (ioctl). Subsequently, the virtual machine enters the virtual CPU initialization stage.
[0054] In the initialization stage of the virtual machine, the electronic device can allocate physical resources to the virtual machine. For example, map the virtual CPU of the virtual machine to the physical CPU for operation, and divide some storage addresses in the physical memory of the electronic device to the virtual machine as virtual memory, etc. Since the virtual machine has the complete hardware system function and also has an operating system, a kernel program can run in the virtual machine, which is called the virtual machine kernel program. And the kernel program running on the electronic device itself, that is, the host, can be called the electronic device kernel program.
[0055] As Figure 2 shown, after the virtual CPU of the virtual machine starts to initialize, the virtual machine kernel program can create a storage area in the virtual memory and then send a write instruction carrying the storage area address to the virtual register. The electronic device kernel program can capture this write instruction and obtain the address of the storage area from the write instruction. After the above process is completed, the virtual CPU of the virtual machine completes the initialization.
[0056] In some embodiments, the information stored in the storage area can include one or both of the following:
[0057] Virtual CPU information written by the virtual machine kernel program, which is used to provide for the electronic device kernel program to read;
[0058] Physical CPU information written by the electronic device kernel program, which is used to provide for the virtual machine kernel program to read.
[0059] In some embodiments, the above physical CPU may be a physical CPU based on the X86 architecture, and the virtual register of the virtual machine may be a Model Specific Register (MSR). MSR is a series of registers in the X86 architecture processor for controlling the CPU, function switches, debugging, tracking program execution, monitoring CPU performance, and other aspects.
[0060] In some embodiments, the virtual register may not have a corresponding physical register. Specifically, if the electronic device includes physical registers 0-7, then when allocating physical resources to the virtual machine, physical register 8 may be allocated to the virtual machine, so that the virtual machine includes virtual register 8. From the perspective of the virtual machine, the virtual machine believes that virtual register 8 is available, but does not know that virtual register 8 does not have a corresponding physical register. Thus, after the virtual machine creates the above storage area, it will still send a write instruction to virtual register 8. When the physical CPU corresponding to the virtual CPU executes this write instruction, since virtual register 8 does not have a corresponding physical register, the write instruction will not be executed. Thus, after the write instruction sent by the virtual machine kernel program to the virtual register is captured by the electronic device kernel program, the write instruction will not be executed. That is, the write instruction actually serves as a means to transfer the storage area address from the virtual machine to the electronic device in this embodiment, rather than being used to write the storage area address in the physical register.
[0061] In some embodiments, the data type of the virtual CPU information may be a structure, and this virtual CPU information may be referred to as a Virtual CPU Scheduler info (VSI).
[0062] An information reading and writing method provided in the embodiments of this specification establishes and runs a virtual machine in a host through virtualization software. In the initialization stage of the virtual machine, the virtual machine kernel program creates a storage area in the allocated virtual memory to store information. Among them, if the virtual machine includes multiple virtual CPUs, a storage area can be created for each virtual CPU to store the corresponding information. After creating the virtual area, a write instruction for the address of the storage area is sent to the virtual register. During the operation of the virtual machine, the virtual machine kernel program can read and write information in this storage area. At the same time, the electronic device kernel program can capture this write instruction, so that the address of this storage area can be obtained from the write instruction. Based on the address of the storage area, information can also be read and written in this storage area. Through the above method, the virtual machine and the electronic device can use this storage area for data interaction, so that both the virtual machine and the electronic device can make resource allocation and scheduling based on the interactive data.
[0063] An electronic device may include at least one physical CPU. In this way, the virtual CPU of a virtual machine can be mapped to and run on the first physical CPU among at least one physical CPUs. In some embodiments, the virtual CPU can be mapped to and run on the first physical CPU in an exclusive CPU binding manner. That is, the first physical CPU does not execute tasks of other virtual CPUs.
[0064] In some other embodiments, the virtual CPU can be mapped to and run on the first physical CPU in a shared CPU binding manner. That is, the first physical CPU can execute tasks of different virtual CPUs at different time periods to improve the resource utilization rate of the physical CPU.
[0065] In the shared CPU binding manner, since the first physical CPU can execute tasks of different virtual CPUs, in some embodiments, during the operation of the virtual machine, it may be necessary to pause the operation of the currently mapped virtual CPU because the shared first physical CPU needs to switch to execute tasks of other virtual CPUs. Then, in an information reading and writing method provided in this embodiment, it may further include the step: during the operation of the virtual machine, if it is determined that the operation of the virtual CPU needs to be paused, the kernel program of the electronic device pauses the mapping of the virtual CPU to the first physical CPU so that the virtual CPU pauses running.
[0066] As an example, a virtual machine may include multiple virtual CPUs, and some of the multiple virtual CPUs included in the same virtual machine can share the first physical CPU. In this way, it may be that when the first physical CPU needs to execute tasks of other virtual CPUs of the virtual machine, the operation of the currently mapped virtual CPU is paused.
[0067] As an example, an electronic device may run multiple virtual machines, and each virtual machine may include at least one virtual CPU. The virtual CPUs of different virtual machines can share the first physical CPU. In this way, it may be that when the first physical CPU needs to execute tasks of the virtual CPUs of other virtual machines, the operation of the currently mapped virtual CPU is paused. It can be understood that if a virtual machine only includes one virtual CPU, then pausing the operation of the virtual CPU means pausing the operation of the virtual machine.
[0068] In some scenarios, if an electronic device initiates a task to be executed, and virtual CPUs are mapped to all physical CPUs included in the electronic device for operation, then the electronic device can preempt a physical CPU to execute the above-mentioned task to be executed. Preempting a physical CPU means pausing the virtual CPU running on the physical CPU and using the physical CPU to execute the above-mentioned task to be executed. However, the working state of a CPU can be divided into user mode and kernel mode. When the CPU is running in kernel mode, the tasks that the CPU may run are often related to the operating system, and these tasks are usually relatively important. For example, the task holds a lock or holds a critical resource. If the virtual CPU in kernel mode is paused, it may affect the performance of the tasks executed on other virtual CPUs under the same virtual machine.
[0069] To avoid the virtual CPU in kernel mode from being paused by the electronic device, in some embodiments, the virtual CPU information written by the above-mentioned virtual machine kernel program may include the current working state of the virtual CPU. Among them, as Figure 3 shown, during the operation of the virtual machine, when the virtual CPU is running in user mode, the virtual CPU can set the working state of the virtual CPU to user mode in the above-mentioned storage area; when the virtual CPU is running in kernel mode, the virtual CPU can set the working state of the virtual CPU to kernel mode in the above-mentioned storage area. Then, when it is necessary to pause the operation of the virtual CPU, the electronic device kernel program can read the working state of the virtual CPU from the corresponding physical memory through the storage address of the storage area. If the virtual CPU is in user mode, the operation of the virtual CPU can be paused.
[0070] As an example, in the above scenario, when the electronic device initiates a task to be executed, and virtual CPUs are mapped to the physical CPUs included in the electronic device for operation, then the electronic device kernel program can execute the steps as Figure 4 shown:
[0071] Step 410: When executing the task initiated by the electronic device, read the working state of the virtual CPU recorded in the storage area;
[0072] Step 420: Determine the target physical CPU corresponding to the virtual CPU with the working state of user mode;
[0073] Step 430: Pause the virtual CPU mapped to the target physical CPU, and use the target physical CPU to execute the task initiated by the electronic device.
[0074] The electronic device kernel program determines the target physical CPU corresponding to the virtual CPU with the current working state of user mode, and pauses the virtual CPU mapped to the target physical CPU, so that the target physical CPU executes the task initiated by the electronic device.
[0075] For example, if an electronic device includes multiple physical CPUs, and each of the multiple physical CPUs is mapped with a virtual CPU for operation. One physical CPU is mapped with one virtual CPU. Among them, the multiple virtual CPUs mapped by the multiple physical CPUs can be virtual CPUs of the same virtual machine or virtual CPUs of different virtual machines. For each virtual CPU, a storage area can be created to store the corresponding virtual CPU information. In this way, when it is determined that a task initiated by the electronic device needs to be executed, the kernel program of the electronic device can sequentially read the working states of the virtual CPUs from each storage area and determine the target physical CPU corresponding to the virtual CPU whose current working state is the user state from the virtual CPUs. Then, the virtual CPU mapped by the target physical CPU is paused so that the target physical CPU can execute the task initiated by the electronic device.
[0076] An information reading and writing method provided by an embodiment of this specification designs a storage area created in virtual memory to store the working state of a virtual CPU. During the operation of a virtual machine, when the working state of the virtual CPU changes, the virtual CPU information recorded in this storage area can be updated, enabling the electronic device to directly know the working state of the virtual CPU, which is more conducive to the electronic device making a correct scheduling of the physical CPU and preventing the virtual machine operating system from crashing due to pausing the operation of the virtual CPU in the kernel state.
[0077] As Figure 5 shown, the electronic device may include at least two physical CPUs 511-512 (two physical CPUs are shown in the figure as an example). Among them, at least two physical CPUs 511-512 may be integrated on the CPU circuit board 500. In this way, the virtual CPU can be mapped to any one of the at least two CPUs 511-512 for operation. The physical CPU mapped with this virtual CPU may be the first physical CPU. The CPU circuit board 300 may also be integrated with a first-level cache 521-522, a second-level cache 531-532, and a third-level cache 540. In some embodiments, a fourth-level cache (not shown in the figure) may also be integrated. Among them, the third-level cache and the fourth-level cache are also referred to as the last-level cache (Last Level Cache, LLC). Taking the CPU circuit board integrated with the first to third-level caches as an example, each physical CPU has a corresponding first-level cache and second-level cache. For example, physical CPU 511 corresponds to first-level cache 521 and second-level cache 531; physical CPU 512 corresponds to first-level cache 522 and second-level cache 532. And physical CPU 511 and physical CPU 512 share the third-level cache 540.
[0078] As described above, in some scenarios, the virtual CPU may be paused during operation. When it is necessary to resume the operation of the virtual CPU, in related technologies, an available physical CPU is often randomly assigned to the virtual CPU that needs to resume operation, so that the virtual CPU is mapped to the assigned physical CPU for operation. In this way, each time the virtual CPU is paused and then resumed, it may be mapped to a different physical CPU for operation. However, during the process of the virtual CPU executing a task, the data required for the task is often stored in the cache corresponding to the mapped physical CPU. If the virtual CPU frequently changes the mapped physical CPU, then when the virtual CPU continues to execute the interrupted task, it needs to repeatedly read the data required for the task from the memory. Take Figure 5 as an example. If the virtual CPU is mapped to the physical CPU 511 for operation before being paused, then the data required for the task can be stored in the corresponding cache sub-regions of the first-level cache 521, the second-level cache 531, and the third-level cache 540 in sequence according to the priority of the first-level cache > the second-level cache > the third-level cache. When it is necessary to resume the operation of the virtual CPU, if the virtual CPU is mapped to the physical CPU 512 for operation, then the data previously stored in the cache sub-regions corresponding to the first-level cache 521, the second-level cache 531, and the third-level cache 540 cannot be used continuously, and the data required for the task needs to be read from the memory again. Obviously, the above physical CPU scheduling method will affect the task execution speed.
[0079] To solve the above technical problems, in some embodiments, the physical CPU information written by the kernel program of the electronic device may include the information of the first physical CPU, where the first physical CPU may be the physical CPU to which the virtual CPU is mapped before being paused. Specifically, as Figure 3 shown, after the virtual machine is initialized, the electronic device can obtain the address of the above storage area, so that the information of the first physical CPU assigned to the virtual CPU can be recorded in the storage area. Then, when it is necessary to resume the operation of the paused virtual CPU, the kernel program of the electronic device can read the information of the first physical CPU recorded in the corresponding storage area before the virtual CPU is paused, and then remap the virtual CPU to the first physical CPU for operation.
[0080] As described above, the last-level cache is a cache shared by multiple physical CPUs. The last-level cache can be divided into multiple cache sub-regions, and each cache sub-region is respectively allocated to a different physical CPU. In order for the first physical CPU to reuse the cache sub-region of the last-level cache corresponding to the virtual CPU before it pauses running after the virtual CPU resumes running, that is, to maintain the hot cache, in some embodiments, the physical CPU information written by the electronic device kernel program may include the information of the first physical CPU and the region information of the cache sub-region allocated to the first physical CPU. That is, as Figure 3 shown, after the virtual machine completes initialization, the electronic device can record the information of the first physical CPU allocated to the virtual CPU and the information of the corresponding LLC in the storage area. In this way, when it is necessary to resume the operation of the suspended virtual CPU, the electronic device kernel program can read the information of the first physical CPU recorded in the storage area corresponding to the virtual CPU before it is suspended, and the region information of the cache sub-region allocated to the first physical CPU. Then, the cache sub-region matching the region information is allocated to the first physical CPU, and the virtual CPU is remapped to the first physical CPU to run.
[0081] An information reading and writing method provided by an embodiment of this specification, by designing a storage area created in the virtual memory to store the information of the first physical CPU mapped by the virtual CPU before it pauses running, and the region information of the cache sub-region allocated to the first physical CPU, enables the electronic device to preferentially remap the virtual CPU to the first physical CPU and reallocate the corresponding cache sub-region to the first physical CPU when it is necessary to resume the operation of the virtual CPU. In this way, the hot cache can be maintained, and it is avoided that the virtual CPU needs to read the data required for the task from the memory again when it resumes running, improving the task execution efficiency.
[0082] In some scenarios, the virtual machines running on the electronic device may include more than two virtual CPUs. For each virtual CPU, a storage area can be created to store the corresponding information. The virtual machine can allocate the tasks to be executed to different virtual CPUs for execution. In order to balance the load, in some embodiments, the physical CPU information written by the electronic device kernel program may include the load information of the physical CPU mapping the virtual CPU. In this way, when the virtual machine initiates a task to be executed, it can read the load information of the physical CPU recorded in the storage area corresponding to each virtual CPU and allocate tasks to multiple virtual CPUs based on the load information. Thus, it is avoided that overly heavy tasks are arranged on the virtual CPU with a relatively high load.
[0083] In the initialization stage of the virtual machine, the write instruction sent by the virtual kernel program to the virtual register for the address of the storage area carries the address of the storage area. In some embodiments, the address of the storage area may be the physical address of the storage area in the virtual machine, also known as the Guest Physical Address (GPA). Thus, the process of reading virtual CPU information in step 120 above may include the steps as Figure 6 shown:
[0084] Step 610: Convert the physical address in the virtual machine into a virtual address in the electronic device;
[0085] Step 620: Based on the virtual address in the electronic device, read the virtual CPU information recorded in the storage area from the physical memory corresponding to the virtual memory.
[0086] Among them, the virtual address in the electronic device is also the Host Virtual Address (HVA). It can be understood that after obtaining the HVA, the Memory Management Unit (MMU) of the electronic device can convert the virtual address into a physical address to read the virtual CPU information recorded in the storage area from the corresponding physical memory using the converted physical address.
[0087] In addition, an embodiment of the present specification also provides an information reading and writing method, which is applied to an electronic device. When the virtual machine running on the electronic device initializes, the virtual machine kernel program creates a storage area for storing information in the virtual memory of the virtual machine and sends a write instruction for the address of the storage area to the virtual register; so that the electronic device kernel program captures the write instruction, obtains the address of the storage area from the write instruction, and reads and writes information in the storage area based on the address;
[0088] During the running process of the virtual machine, the virtual machine kernel program reads and writes information in the storage area.
[0089] In some embodiments, the above virtual machine includes at least two virtual CPUs, and a storage area for storing virtual CPU information is created for each virtual CPU. The virtual CPU may include the load information of the physical CPU that maps the virtual CPU. In order to more reasonably allocate tasks to the virtual CPUs included in the virtual machine, in this embodiment, the virtual machine also executes the steps as Figure 7 shown:
[0090] Step 710: For each virtual CPU, obtain the load information of the physical CPU recorded in the corresponding storage area;
[0091] Step 720: Allocate tasks to the at least two virtual CPUs according to the load information.
[0092] An information reading and writing method provided in an embodiment of this specification is applied to an electronic device running a virtual machine. In the initialization stage of the virtual machine, the virtual machine kernel program creates a storage area in the allocated virtual memory to store information, and then sends a write instruction for the address of this storage area to the virtual register. During the running process of the virtual machine, the virtual machine kernel program can read and write in this storage area. At the same time, the electronic device kernel program can capture this write instruction, so as to obtain the address of this storage area from the write instruction. Based on the address of the storage area, information can be read and written in this storage area. Through the above method, the virtual machine and the electronic device can perform data interaction using this storage area, so as to make resource allocation and scheduling using the interaction data.
[0093] Based on the information reading and writing method described in any of the above embodiments, an embodiment of this specification also provides a Figure 8 structural schematic diagram of an electronic device as shown. A virtual machine runs on this electronic device. As Figure 8 shown, at the hardware level, this electronic device includes a physical CPU, an internal bus, a network interface, a memory, and a non-volatile memory. Of course, it may also include other hardware required for other services. The processor reads the corresponding computer program from the non-volatile memory into the memory and then runs it to implement the information reading and writing method described in any of the above embodiments.
[0094] In some embodiments, the above electronic device may also be an electronic device in a distributed system. Figure 9 A schematic diagram of a distributed system is shown. The distributed system 900 may include multiple electronic devices, such as the electronic devices 910 - 940 shown in the figure. The distributed system can be used to maintain and manage big data. Each electronic device in the distributed system can store a part of the data respectively and maintain the stored data. In this embodiment, at least some of the electronic devices 910 - 940 may run a virtual machine and execute an information reading and writing method provided in any of the above embodiments.
[0095] Based on the information reading and writing method described in any of the above embodiments, an embodiment of this specification also provides a computer program product, including a computer program, which can be used to execute an information reading and writing method described in any of the above embodiments when executed by a processor.
[0096] Based on the information reading and writing method described in any of the above embodiments, the embodiments of the present specification further provide a computer storage medium. The storage medium stores a computer program, and when the computer program is executed by a processor, it can be used to execute the information reading and writing method described in any of the above embodiments.
[0097] The specific embodiments of the present specification have been described above. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments and still achieve the desired result. Additionally, the processes depicted in the drawings do not necessarily require the particular order or sequential order shown to achieve the desired result. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.
[0098] Those skilled in the art will readily conceive of other implementations of the embodiments of the present specification after considering the specification and practicing the invention herein. The embodiments of the present specification are intended to cover any variations, uses, or adaptations of the embodiments of the present specification, which follow the general principles of the embodiments of the present specification and include common general knowledge or conventional technical means in the technical field not claimed in the embodiments of the present specification. The specification and the embodiments are only regarded as exemplary, and the true scope and spirit of the embodiments of the present specification are pointed out by the following claims.
Claims
1. An information reading and writing method, applied to an electronic device, where the electronic device runs a virtual machine, and the electronic device includes a physical CPU. The method includes: When the virtual machine is initialized, a virtual machine kernel program creates a storage area for storing information in the virtual memory of the virtual machine, and sends a write instruction of the address of the storage area to a virtual register that does not correspond to a physical register. Wherein, during the operation of the virtual machine, the virtual machine kernel program reads and writes information in the storage area. The information stored in the storage area includes: the current working state of the virtual CPU written by the virtual machine kernel program, and the current working state includes kernel mode or user mode; The electronic device kernel program captures the write instruction, obtains the address of the storage area from the write instruction, and reads and writes information in the storage area based on the address; If it is determined that a task initiated by the electronic device needs to be executed, the electronic device kernel program suspends the target physical CPU mapped by the target virtual CPU whose current working state is in the user mode according to the working state of the virtual CPU recorded in the storage area, and uses the target physical CPU to execute the task.
2. The method according to claim 1, wherein the information stored in the storage area includes: The virtual CPU information written by the virtual machine kernel program for the electronic device kernel program to read; And / or The physical CPU information written by the electronic device kernel program for the virtual machine kernel program to read.
3. The method according to claim 2, wherein the electronic device includes at least one physical CPU, and the virtual CPU of the virtual machine runs on the first physical CPU among the at least one physical CPU. The method further includes: During the operation of the virtual machine, if it is determined that the operation of the virtual CPU needs to be suspended, the electronic device kernel program suspends the mapping of the virtual CPU to the first physical CPU, so that the virtual CPU suspends running.
4. The method according to claim 3, wherein if it is determined that the operation of the virtual CPU needs to be suspended, the electronic device kernel program suspends the mapping of the virtual CPU to the first physical CPU, including: If it is determined that a task initiated by the electronic device needs to be executed, the electronic device kernel program determines the target physical CPU corresponding to the virtual CPU whose current working state is in the user mode, and suspends the virtual CPU mapped by the target physical CPU, so that the target physical CPU executes the task initiated by the electronic device.
5. The method according to claim 4, wherein the electronic device includes at least two of the physical CPUs, where At least two of the physical CPUs share a last-level cache; the last-level cache includes a plurality of cache sub-regions; the physical CPU information further includes region information of the cache sub-region allocated to the first physical CPU. The method further includes: The electronic device kernel program allocates a cache sub-region that matches the region information to the first physical CPU.
6. The method according to claim 2, wherein the virtual machine includes at least two virtual CPUs, and one virtual CPU corresponds to one storage area for storing virtual CPU information; the physical CPU information includes the load information of the physical CPU mapping the virtual CPU, so that the virtual machine allocates tasks to the at least two virtual CPUs according to the load information.
7. The method according to claim 1, wherein the address of the storage area is a physical address in the virtual machine; The reading and writing of information in the storage area based on the address includes: Converting the physical address in the virtual machine into a virtual address in the electronic device; Reading and writing information in the storage area based on the virtual address in the electronic device.
8. An information reading and writing method applied to an electronic device, the electronic device includes a physical CPU, and the virtual machine running on the electronic device performs the following steps: When the virtual machine is initialized, a storage area for storing information is created in the virtual memory of the virtual machine by the virtual machine kernel program, and a write instruction of the address of the storage area is sent to a virtual register that does not correspond to a physical register; so that the electronic device kernel program captures the write instruction, obtains the address of the storage area from the write instruction, and reads and writes information in the storage area based on the address; the information stored in the storage area includes: The current working state of the virtual CPU written by the virtual machine kernel program, the current working state includes a kernel state or a user state, so that when the electronic device kernel program determines that a task initiated by the electronic device needs to be executed, according to the working state of the virtual CPU recorded in the storage area, pause the target physical CPU mapped by the target virtual CPU whose current working state is in the user state, and use the target physical CPU to execute the task; During the operation of the virtual machine, the virtual machine kernel program reads and writes information in the storage area.
9. An electronic device running a virtual machine, the electronic device includes: A physical CPU; A memory for storing processor-executable instructions; Wherein, when the physical CPU calls the executable instructions, the operations of the method according to any one of claims 1-8 are implemented.
10. A distributed system, the distributed system includes at least one electronic device according to claim 9.
11. A computer program product, including a computer program, when the computer program is executed by a processor, the steps of the method according to any one of claims 1-8 are implemented.
12. A computer-readable storage medium, on which a number of computer instructions are stored, and when the computer instructions are executed, the method according to any one of claims 1-8 is executed.
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