FPGA-based flash application verification system

The FPGA-based FLASH application verification system uses two FPGAs as the controller and processor, respectively, to achieve comprehensive functional verification of various non-volatile memories. This solves the problem of insufficient versatility in existing FLASH verification systems and improves verification efficiency and coverage.

CN114692540BActive Publication Date: 2026-01-09BEIJING MXTRONICS CORP +1
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Patent Information

Application Number
CN202210406688.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-04-18
Publication Date
2026-01-09
Estimated Expiration
2042-04-18

AI Technical Summary

Technical Problem

In the existing technology, FLASH verification systems lack universality, cannot be compatible with different models of FLASH memory, and mainly focus on timing matching verification, which cannot meet the application verification needs of non-volatile memory.

Method used

An FPGA-based FLASH application verification system was designed, including a PC, a FLASH application verification board, and a programmable power supply. Two FPGAs are used as the controller and processor, respectively. The system verifies the erase, write, and read functions of the FLASH, the JTAG function, and the memory configuration function through a serial port module, JTAG module, and power supply module. It supports multiple non-volatile memory types.

Benefits of technology

It enables comprehensive functional verification of different types of FLASH, improves the coverage and versatility of verification, can quickly identify design problems, accelerate device maturity, and reduce hardware costs.

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Abstract

The application discloses a FLASH application verification system based on FPGA, which comprises a PC, an FPGA application verification board and a FLASH subboard. The FPGA application verification board is provided with two FPGA chips; each FPGA chip is connected with the FLASH and can independently access the FLASH to perform verification operation; each FPGA is externally connected with a large-capacity 160Mb SRAM; and the NOR_FLASH and the SPI_FLASH can be verified by replacing the FLASH subboard. The application also discloses a verification method based on the system, which comprises the following steps: determining power-on sequence, JTAG function verification, digital logic verification and read-write function verification. The application has comprehensive verification function, strong universality and important significance for application verification of a series of FLASH.
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