semiconductor devices

Abstract

A semiconductor device of an embodiment comprises: a semiconductor layer of a first conductivity type; a first electrode, arranged on the semiconductor layer; a second electrode, arranged on the semiconductor layer; a third electrode, arranged on the semiconductor layer, and separately arranged between the first electrode and the second electrode; a first semiconductor region of a second conductivity type, arranged in the semiconductor layer; a first cathode region of the first conductivity type; a first anode region of the second conductivity type; a second cathode region of the first conductivity type; a second anode region of the second conductivity type; a third anode region of the second conductivity type; a third cathode region of the first conductivity type; a second semiconductor region of the second conductivity type; a fourth anode region of the second conductivity type; and a fourth cathode region of the first conductivity type.

Description

[0001] Related applications

[0002] This application claims priority based on Japanese Patent Application No. 2020-216800 (filing date: December 25, 2020) and Japanese Patent Application No. 2021-137447 (filing date: August 25, 2021), and the entire contents of these basic applications are incorporated herein by reference. Technical Field

[0003] Embodiments of the present invention relate to a semiconductor device. Background Art

[0004] An ESD protection diode is provided in the electronic circuit to protect the electronic circuit from electrostatic discharge (ESD).

[0005] Characteristics required of an ESD protection diode include a reduction in operating voltage or internal resistance (dynamic resistance) during operation. Summary of the Invention

[0006] An embodiment of the present invention provides a semiconductor device capable of reducing voltage and internal resistance during operation.

[0007] A semiconductor device according to an embodiment includes: a semiconductor layer of a first conductivity type; a first electrode provided on the semiconductor layer; a second electrode provided on the semiconductor layer; and a third electrode provided on the semiconductor layer and spaced apart from the first electrode and the second electrode. The semiconductor device also includes: a first semiconductor region of a second conductivity type provided in the semiconductor layer; a first cathode region of the first conductivity type provided in the first semiconductor region and connected to the first electrode; a first anode region of the second conductivity type provided in the first semiconductor region and connected to the third electrode; a second cathode region of the first conductivity type provided in the semiconductor layer and spaced apart from the first semiconductor region in a first direction from the first electrode toward the second electrode and connected to the third electrode; and a second anode region of the second conductivity type provided in the semiconductor layer and connected to the second electrode. It has: a third anode region of the second conductivity type, arranged in the semiconductor layer and connected to the first electrode; a third cathode region of the first conductivity type, arranged in the semiconductor layer and connected to the third electrode; a second semiconductor region of the second conductivity type, separated from the first cathode region in a first direction and arranged in the semiconductor layer separately from the first semiconductor region; a fourth anode region of the second conductivity type, arranged in the second semiconductor region and connected to the third electrode; and a fourth cathode region of the first conductivity type, arranged in the second semiconductor region and connected to the second electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1This is a circuit diagram showing an example of use of the semiconductor device 100 according to the first embodiment.

[0009] Figure 2A It is a top view of the semiconductor device 100 according to the first embodiment. Figure 2B yes Figure 2A A cross-sectional view along line AA' is shown. Figure 2C yes Figure 2A A cross-sectional view taken along line BB' is shown.

[0010] Figure 3 This is an equivalent circuit 200 of the semiconductor device according to the first embodiment.

[0011] Figure 4 FIG. 3 is an equivalent circuit 300 of a semiconductor device according to a comparative example.

[0012] Figure 5A It is a top view of a semiconductor device 101 according to a modification of the first embodiment. Figure 5B yes Figure 5A A cross-sectional view taken along line CC' is shown. Figure 5C yes Figure 5A A cross-sectional view taken along line DD' is shown.

[0013] Figure 6A It is a top view of the semiconductor device 102 according to the second embodiment. Figure 6B yes Figure 6A A cross-sectional view taken along line EE' is shown. Figure 6C yes Figure 6A A cross-sectional view along line FF' is shown.

[0014] Figure 7A It is a top view of the semiconductor device 103 according to the third embodiment. Figure 7B yes Figure 7A A cross-sectional view taken along line G-G' is shown. Figure 7C yes Figure 7A A cross-sectional view taken along line H-H' is shown.

[0015] Figure 8A It is a top view of a semiconductor device 104 according to a modification of the third embodiment. Figure 8B yes Figure 8A A cross-sectional view taken along line II' is shown. Figure 8C yes Figure 8A A cross-sectional view along the J-J' line is shown.

[0016] Figure 9A It is a top view of a semiconductor device 105 according to a fourth embodiment. Figure 9B yes Figure 9A The cross-sectional view along the K-K' line is shown.

[0017] Figure 10This is an equivalent circuit 201 of the semiconductor device 105 according to the fourth embodiment.

[0018] Figure 11A It is a top view of the semiconductor device 106 according to the fifth embodiment. Figure 11B yes Figure 11A A cross-sectional view taken along line LL' is shown.

[0019] Figure 12A Yes Figure 11A A top view showing only the semiconductor layer 110 and the electrodes. Figure 12B It is omitted Figure 11A Top view of the electrodes in . DETAILED DESCRIPTION

[0020] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In this description, common reference numerals are used throughout the drawings to identify common parts. Furthermore, the dimensional ratios in the drawings are not limited to those shown. Furthermore, this embodiment does not limit the present invention.

[0021] [First embodiment]

[0022] The semiconductor device 100 of the first embodiment is used as a protection circuit for protecting an electronic circuit 400 from ESD, for example. Figure 1 An example of use of the semiconductor device 100 will be described. Figure 1 This is a circuit diagram showing an example of using the semiconductor device 100 according to the first embodiment. One end of the semiconductor device 100 is connected between the electronic circuit 400 and the external terminal 401. Furthermore, the other end of the semiconductor device 100 is connected to the ground potential GND. When an excessive positive voltage exceeding the voltage normally applied to the electronic circuit 400 is applied to the external terminal 401, current flows from the external terminal 401 to the ground potential GND via the semiconductor device 100. On the other hand, when an excessive negative voltage is applied to the external terminal 401, current flows from the ground potential GND to the external terminal 401 via the semiconductor device 100. In this manner, the semiconductor device 100 has the function of protecting the electronic circuit 400 from excessive voltage caused by noise such as ESD input to the external terminal 401.

[0023] (Structure of Semiconductor Device 100)

[0024] The detailed structure of the semiconductor device 100 according to the first embodiment will be described with reference to FIG. 2 . Figure 2A is a top view of the semiconductor device 100 according to the first embodiment. Figure 2B yes Figure 2A The cross-sectional view of the line AA' is shown. Figure 2C yes Figure 2A A cross-sectional view taken along line BB' is shown.

[0025] The following description will be made by taking the case where the first conductivity type is n-type and the second conductivity type is p-type as an example. + 、n、n - and p + ,p,p - The mark indicates the relative high and low of the impurity concentration in each conductivity type. + Compared with n, the n-type impurity concentration is relatively high. - Indicates that the impurity concentration of n-type is relatively low compared to n. + Compared with p type, the impurity concentration of p type is relatively high. - Indicates that the p-type impurity concentration is relatively low compared to the p-type. + Type, n - Type is simply recorded as n type, and p + Type, p - The type is simply recorded as p-type.

[0026] The semiconductor device 100 has n - The semiconductor layer 110, the first electrode 121, the second electrode 122, the third electrode 123, the insulating layer 124, the p - The first semiconductor region 131 of type p - The second semiconductor region 132 of type n + Type first cathode region 141, n + Type second cathode region 142, n + The third cathode region 143, n + The fourth cathode region 144 of type p + Type first anode region 151, p + The second anode region 152 of type p + The third anode region 153 of type p + A fourth anode region 154 of type.

[0027] In addition, Figure 2A In FIG. 1 , the first electrode 121 , the second electrode 122 and the third electrode 123 are respectively represented by dotted lines, and the insulating layer 124 is omitted.

[0028] As an example, n - The semiconductor layer 110 of the Si type is formed by epitaxially growing, for example, silicon (Si) on a substrate (not shown).

[0029] The first electrode 121, the second electrode 122 and the third electrode 123 are provided on n - type semiconductor layer 110.

[0030] The direction from the first electrode 121 toward the second electrode 122 is defined as the X direction (first direction), the direction perpendicular to the X direction is defined as the Y direction (second direction), and the direction perpendicular to the X and Y directions is defined as the Z direction (third direction). Figure 2A The semiconductor device 100 shown is a top view taken along the XY plane. Figure 2B The semiconductor device 100 shown is a cross-sectional view taken along the XZ plane. In this embodiment, the X, Y, and Z directions are shown as being orthogonal to each other, but are not limited to being orthogonal, and may be mutually intersecting directions.

[0031] The third electrode 123 is located between the first electrode 121 and the second electrode 122 in the X direction, and is disposed separately from the first electrode 121 and the second electrode 122 .

[0032] The first electrode 121 , the second electrode 122 , and the third electrode 123 can be made of, for example, aluminum (Al). The first electrode 121 , the second electrode 122 , and the third electrode 123 are formed by sputtering and etching Al.

[0033] p - Type first semiconductor region 131 and p - The second semiconductor region 132 of type n is provided - In the semiconductor layer 110 of the type, the first semiconductor region 131 is connected to the first electrode 121 and the third electrode 123. The second semiconductor region 132 is connected to the second electrode 122 and the third electrode 123. The first semiconductor region 131 and the second semiconductor region 132 are separated from each other in the XY plane.

[0034] n + Type first cathode region 141 and p + The first anode region 151 of the type is provided in the first semiconductor region 131 and is adjacent in the X direction. The first cathode region 141 is electrically connected to the first electrode 121 in the Z direction. The first anode region 151 is electrically connected to the third electrode 123 in the Z direction.

[0035] n + Type second cathode region 142 and p + The second anode region 152 of the type is provided at n - The second cathode region 142 is separated from the first semiconductor region 131 in the X direction and is electrically connected to the third electrode 123 in the Z direction. The second anode region 152 is electrically connected to the second electrode 122 in the Z direction.

[0036] As described above, the first cathode region 141 , the first anode region 151 , the second cathode region 142 , and the second anode region 152 are sequentially arranged in the X direction. The first anode region 151 and the second cathode region 142 are electrically connected via the third electrode 123 .

[0037] p + The third anode region 153 and n + The third cathode region 143 of type n is provided - In the semiconductor layer 110 of the type, the third anode region 153 and the third cathode region 143 are adjacent in the X direction. Furthermore, the third anode region 153 and the third cathode region 143 are separated from the first cathode region 141 and the first anode region 151 in the Y direction and are arranged side by side. The third anode region 153 is electrically connected to the first electrode 121 in the Z direction. The third cathode region 143 is separated from the second semiconductor region 132 in the X direction and is electrically connected to the third electrode 123 in the Z direction.

[0038] p - The fourth anode region 154 and n - The fourth cathode region 144 of the type is provided in the second semiconductor region 132 and is adjacent in the X direction. The fourth anode region 154 is electrically connected to the third electrode 123 in the Z direction. The fourth cathode region 144 is electrically connected to the second electrode 122 in the Z direction.

[0039] As described above, the third anode region 153 , the third cathode region 143 , the fourth anode region 154 , and the fourth cathode region 144 are sequentially arranged in the X direction. The third cathode region 143 and the fourth anode region 154 are electrically connected via the third electrode 123 .

[0040] The first cathode region 141 , the first anode region 151 , the second cathode region 142 , the second anode region 152 , the third cathode region 143 , the third anode region 153 , the fourth cathode region 144 , and the fourth anode region 154 are formed by, for example, embedding an impurity diffusion layer.

[0041] An example of an n-type impurity used in semiconductor device 100 is phosphorus (P). An example of a p-type impurity used in semiconductor device 100 is boron (B). An "n-type impurity" is an impurity that acts as a donor when contained in a semiconductor material, such as silicon (Si), forming semiconductor layer 110. A "p-type impurity" is an impurity that acts as an acceptor when contained in a semiconductor material forming semiconductor layer 110.

[0042] The insulating layer 124 is provided between a portion of the first electrode 121 and the first semiconductor region 131, a portion between the first electrode 121 and the first cathode region 141, a portion between the third electrode 123 and the first anode region 151, and a portion between the third electrode 123 and the n- The insulating layer 124 electrically insulates the electrodes from the semiconductor regions, as well as the third electrode 123 from the fourth anode region 154.

[0043] (Operation of Semiconductor Device 100)

[0044] use Figure 3 The equivalent circuit of the first embodiment will be described. Figure 3 An equivalent circuit 200 of the semiconductor device 100 according to the first embodiment is shown.

[0045] The semiconductor device 100 has the structure as described above, and is formed by n + Type first cathode region 141 and p - Type first semiconductor region 131 (including p + Similarly, a diode D1 is formed by forming a p + The second anode region 152 and n - Type semiconductor layer 110 (including n + A diode D2 is formed by a second cathode region 142 of the type. In addition, a third anode region 153 and an n - Type semiconductor layer 110 (including n + Furthermore, a diode D3 is formed by forming a third cathode region 143 of the n type. + The fourth cathode region 144 and p - The second semiconductor region 132 (including n + Therefore, as an equivalent circuit, the semiconductor device 100 has a current flowing from the diode D4. Figure 3 The circuit shown is a circuit in which current flows from the first electrode 121 to the second electrode 122 via diodes D3 and D4 , and a bidirectional circuit in which current flows from the second electrode 122 to the first electrode 121 via diodes D2 and D1 .

[0046] Specifically, the current input to the first electrode 121 is proportional to the current of the third anode region 153, n -After flowing in the X direction through the semiconductor layer 110 of the first and second semiconductor regions 132, the current reaches the third cathode region 143 and flows to the third electrode 123. The current that has passed through the third electrode 123 flows to the fourth anode region 154, passes through the second semiconductor region 132 in the X direction, and then reaches the fourth cathode region 144, and is output to the second electrode 122.

[0047] On the other hand, the current input to the second electrode 122 is proportional to the second anode region 152, n - After flowing in the X direction through the semiconductor layer 110 of the type, the current reaches the second cathode region 142 and flows to the third electrode 123. The current that has passed through the third electrode 123 flows to the first anode region 151, passes through the first semiconductor region 131 in the X direction, reaches the first cathode region 141, and is output to the first electrode 121.

[0048] Therefore, in Figure 3 In the equivalent circuit of the semiconductor device 100 shown in FIG, the current input to the first electrode 121 passes through the diode D3 (forward direction) and the diode D4 (forward direction) in this order and is output to the second electrode 122. On the other hand, the current input to the second electrode 122 passes through the diode D2 (forward direction) and the diode D1 (forward direction) in this order and is output to the first electrode 121.

[0049] (Effects of the First Embodiment)

[0050] The effects of the semiconductor device 100 according to the first embodiment will be described using an equivalent circuit 300 in a semiconductor device according to a comparative example. Figure 4 An equivalent circuit 300 in a semiconductor device of a comparative example is shown. Components identical to those of the semiconductor device 100 of the first embodiment are denoted by the same reference numerals.

[0051] The structure of the semiconductor device of the comparative example will be described. The anode of diode D7 is connected to first electrode 121 . Diode D8 is connected in series with diode D7 , and the cathode of diode D7 is connected to the cathode of diode D8 . The anode of diode D8 is connected to second electrode 122 .

[0052] Furthermore, the cathode of the diode D5 is connected to the first electrode 121 . The diode D6 is connected in series with the diode D5 , and the anode of the diode D5 is connected to the anode of the diode D6 . The cathode of the diode D6 is connected to the second electrode 122 .

[0053] Furthermore, the cathode of diode D9, which is a Zener diode, is connected to the cathode of diode D7 and the cathode of diode D8. Furthermore, the anode of diode D9 is connected to the cathode of diode D5 and the anode of diode D6.

[0054] In the equivalent circuit 300 of the semiconductor device of the comparative example, current input to the first electrode 121 passes through the diode D7 (forward), diode D9 (reverse), and diode D6 (forward) in this order, and is output to the second electrode 122. On the other hand, current input to the second electrode 122 passes through the diode D8 (forward), diode D9 (reverse), and diode D5 (forward) in this order, and is output to the first electrode 121. Whether current flows from the first electrode 121 to the second electrode 122 or from the second electrode 122 to the first electrode 121, both paths always pass through the diode D9 (reverse).

[0055] Here, the reverse voltage when passing through the diode is greater than the forward voltage. For example, the forward voltage is 0.75V and the reverse voltage is 2V. Therefore, in the semiconductor device of the comparative example, when the current flows in the order of diode D7 (forward direction: 0.75V), diode D9 (reverse direction: 2V), and diode D6 (forward direction: 0.75V), a total voltage of 3.5V is applied. Similarly, in the semiconductor device of the comparative example, when the current flows in the order of diode D8 (forward direction: 0.75V), diode D9 (reverse direction: 2V), and diode D5 (forward direction: 0.75V), a total voltage of 3.5V is applied.

[0056] The semiconductor device of the comparative example and the semiconductor device of the first embodiment are as follows. Figure 1 As described above, a protection circuit is used to protect electronic circuit 400 from ESD. During normal operation of electronic circuit 400, the voltage applied may be as low as 1V or less. In this case, the required operating voltage of the ESD protection circuit also decreases. Therefore, a structure with a threshold of 3.5V or higher, such as the semiconductor device in the comparative example, is not suitable. For example, if a 3V ESD is applied, the semiconductor device in the comparative example will not conduct, and the electronic circuit 400 may be damaged.

[0057] On the other hand, in the semiconductor device 100 of the first embodiment, even when passing through any path, the reverse diode is not passed, so no reverse voltage is applied. For example, when the forward voltage of the diode is 0.75V and the reverse voltage is 2V, even when passing through any path, the total is 1.5V, which can achieve a lower voltage than the semiconductor device of the comparative example. For example, when a 3V ESD is applied, the semiconductor device 100 of the first embodiment is turned on, which can protect the electronic circuit 400. On the other hand, even if a voltage applied during the normal operation of the electronic circuit 400 (for example, less than 1V) is applied to the semiconductor device 100, the semiconductor device 100 does not turn on, so there is no impact on the operation of the electronic circuit 400.

[0058] By being able to achieve the aforementioned lower voltage, the ESD protection diode can be adapted to applications requiring lower voltage, such as signal lines.

[0059] Furthermore, in the semiconductor device 100 according to the first embodiment, the diode D1 and the diode D2 , and the diode D3 and the diode D4 are connected in series, respectively. Therefore, the parasitic capacitance of the diodes can be reduced.

[0060] Furthermore, in the semiconductor device 100 of the first embodiment, the first cathode region 141 and the first anode region 151, the second cathode region 142 and the second anode region 152, the third cathode region 143 and the third anode region 153, and the fourth cathode region 144 and the fourth anode region 154 are arranged parallel to each other in the X direction. Therefore, current flows in the X direction and hardly flows in the Z direction. Therefore, compared to conventional semiconductor devices in which the anode and cathode regions are arranged in the Z direction and the current flows in the Z direction, the current path is shortened, and the internal resistance (dynamic resistance) of the semiconductor device during operation can be reduced.

[0061] [Modification of the First Embodiment]

[0062] A semiconductor device 101 according to a modified example of the first embodiment will be described with reference to FIG. 5 . Figure 5A A top view showing a semiconductor device 101 according to a modified example of the first embodiment is shown. Figure 5B express Figure 5A The cross-sectional view of the CC' line shown, Figure 5C express Figure 5A The same components as those of the semiconductor device 100 according to the first embodiment are denoted by the same reference numerals.

[0063] The semiconductor device 101 of the modified example of the first embodiment is different from the semiconductor device 100 of the first embodiment in that a second cathode region 142 and a second anode region 152 are provided in the first semiconductor region 131, and a third cathode region 143 and a third anode region 153 are provided in the second semiconductor region 132. The first cathode region 141 and the first anode region 151, and the fourth cathode region 144 and the fourth anode region 154 are provided at n -type semiconductor layer 110. When the semiconductor device 101 of this modification is compared with the semiconductor device 100 of the first embodiment, only the positions of the first semiconductor region 131 and the second semiconductor region 132 are changed, and the positional relationship among the first cathode region 141, the first anode region 151, the second cathode region 142, the second anode region 152, the third cathode region 143, the third anode region 153, the fourth cathode region 144, the fourth anode region 154, the first electrode 121, the second electrode 122, and the third electrode 123 remains unchanged.

[0064] The modified example of the first embodiment can also achieve the same effects as those of the semiconductor device 100 of the first embodiment.

[0065] Furthermore, in the first embodiment and its modified example described above, the first conductivity type is n-type and the second conductivity type is p-type. However, the same effect can be obtained even if the first conductivity type is p-type and the second conductivity type is n-type.

[0066] [Second embodiment]

[0067] A semiconductor device 102 according to the second embodiment will be described with reference to FIG. 6 . Figure 6A is a top view of a semiconductor device 102 according to the second embodiment. Figure 6B yes Figure 6A The cross-sectional view of the line EE' is shown. Figure 6C yes Figure 6A The same reference numerals are used to denote the same components as those of the semiconductor device 100 according to the first embodiment.

[0068] The difference between the semiconductor device 102 of the second embodiment and the semiconductor device 100 of the first embodiment is that the interface between the first cathode region 141 and the first anode region 151, the interface between the second cathode region 142 and the second anode region 152, the interface between the third cathode region 143 and the third anode region 153, and the interface between the fourth cathode region 144 and the second anode region 154 are respectively formed in a comb shape.

[0069] To explain in detail, when looking down at the semiconductor device 102, in the Y direction, a portion of the first cathode region 141 is sandwiched by a portion of the first anode region 151, and a portion of the first anode region 151 is sandwiched by a portion of the first cathode region 141. Similarly, in the Y direction, a portion of the second cathode region 142 is sandwiched by a portion of the second anode region 152, and a portion of the second anode region 152 is sandwiched by a portion of the second cathode region 142. Furthermore, a portion of the third cathode region 143 is sandwiched by a portion of the third anode region 153, and a portion of the third anode region 153 is sandwiched by a portion of the third cathode region 143. Furthermore, a portion of the fourth cathode region 144 is sandwiched by a portion of the fourth anode region 154, and a portion of the fourth anode region 154 is sandwiched by a portion of the fourth cathode region 144.

[0070] As a result, compared to the semiconductor device 100 of the first embodiment described above, the junction area between the cathode region and the anode region where the diodes D1, D2, D3, and D4 are formed in the semiconductor device 102 is increased. As a result, the area through which current can flow is increased compared to the semiconductor device 100, thereby further reducing the dynamic resistance.

[0071] In addition, in the second embodiment described above, the first conductivity type is set to n-type and the second conductivity type is set to p-type. However, even if the first conductivity type is set to p-type and the second conductivity type is set to n-type, the same effect can be obtained. Furthermore, in the second embodiment, as in the modified example of the first embodiment, by providing the second cathode region 142 and the second anode region 152 in the first semiconductor region 131, and providing the third cathode region 143 and the third anode region 153 in the second semiconductor region 132, the same effect as the second embodiment can be obtained.

[0072] [Third embodiment]

[0073] A semiconductor device 103 according to the third embodiment will be described with reference to FIG. 7 . Figure 7A is a top view of a semiconductor device 103 according to the third embodiment. Figure 7B yes Figure 7A The cross-sectional view of the G-G' line is shown, Figure 7C yes Figure 7A The same reference numerals are used to denote the same components as those of the semiconductor device 100 according to the first embodiment.

[0074] like Figures 7A to 7C As shown, in the semiconductor device 103 of this embodiment, in addition to the structure of the semiconductor device 100 of the first embodiment, p +The semiconductor substrate 111 and the element isolation insulator 161 are of type n - The semiconductor layer 110 is provided on the p + The device isolation insulator 161 is formed by embedding an insulating material such as silicon oxide in a deep trench. The upper end of the device isolation insulator 161 contacts the insulating layer 124, and the lower end is located within the semiconductor substrate 111.

[0075] When viewed from the Z direction, the element isolation insulator 161 has a lattice-like shape, surrounding the regions that constitute each diode. Specifically, when viewed from the Z direction, the element isolation insulator 161 surrounds the first cathode region 141, the first semiconductor region 131, and the first anode region 151 that constitute diode D1. Similarly, the element isolation insulator 161 surrounds the second cathode region 142 and the second anode region 152 that constitute diode D2. Furthermore, the element isolation insulator 161 surrounds the third cathode region 143 and the third anode region 153 that constitute diode D3. Furthermore, the element isolation insulator 161 surrounds the fourth cathode region 144, the second semiconductor region 132, and the fourth anode region 154 that constitute diode D4. Furthermore, the element isolation insulator 161 only needs to be provided between diodes D1 and D2, and between diodes D3 and D4, and does not necessarily need to surround each diode.

[0076] Next, the effects of the third embodiment will be described.

[0077] According to this embodiment, by providing the element isolation insulator 161 between the regions constituting each diode, it is possible to suppress the - The leakage current flowing in the semiconductor layer 110 of the type. Figure 7C As shown as a virtual current path I1 in FIG, the current input to the first electrode 121 flows into the semiconductor layer 110 via the third anode region 153, then flows into the semiconductor layer 110 instead of the third cathode region 143 and the fourth anode region 154, and is suppressed from flowing from the semiconductor layer 110 to the second electrode 122 via the second semiconductor region 132 and the fourth cathode region 144. Figure 7C As shown as the current path I2, the current input to the first electrode 121 easily flows to the second electrode 122 via the third anode region 153, the semiconductor layer 110, the third cathode region 143, the third electrode 123, the fourth anode region 154, the second semiconductor region 132, and the fourth cathode region 144.

[0078] Likewise, if Figure 7BAs shown as a virtual current path I3 in FIG, the current input to the second electrode 122 flows into the semiconductor layer 110 via the second anode region 152, then flows into the semiconductor layer 110 instead of the second cathode region 142 and the first anode region 151, and is suppressed from flowing from the semiconductor layer 110 to the first electrode 121 via the first semiconductor region 131 and the first cathode region 141. Figure 7B As shown as the current path I4, the current input to the second electrode 122 easily flows to the first electrode 121 via the second anode region 152, the semiconductor layer 110, the second cathode region 142, the third electrode 123, the first anode region 151, the first semiconductor region 131, and the first cathode region 141.

[0079] As described above, according to this embodiment, it is possible to reduce the leakage current of the semiconductor device 103. As a result, it is possible to suppress the breakdown voltage of the semiconductor device 103 from falling below the designed value.

[0080] [Modification of the Third Embodiment]

[0081] A semiconductor device 104 according to a modified example of the third embodiment will be described with reference to FIG. 8 . Figure 8A is a top view of a semiconductor device 104 according to a modification of the third embodiment. Figure 8B yes Figure 8A The cross-sectional view of the II' line is shown. Figure 8C yes Figure 8A The same reference numerals are used to denote the same components as those of the semiconductor device 103 according to the third embodiment.

[0082] like Figures 8A to 8C As shown, in the semiconductor device 104 of this modification, in addition to the structure of the semiconductor device 103 of the third embodiment, n + The buried diffusion layer 112 is arranged on the p + Type semiconductor substrate 111 and n - The element isolation insulator 161 penetrates the buried diffusion layer 112 in the Z direction.

[0083] According to this modification, since + Type semiconductor substrate 111 and n +Since a pn interface is formed between the buried diffusion layers 112 of the first and second electrodes 121 and 122, the current input from the first and second electrodes 121 and 122 is prevented from flowing into the semiconductor substrate 111, thereby suppressing leakage current flowing in the semiconductor substrate 111. This can further reduce leakage current.

[0084] [Fourth embodiment]

[0085] Refer to Figure 9 and Figure 10 A semiconductor device 105 according to the fourth embodiment will be described. Figure 9A is a top view of a semiconductor device 105 according to a fourth embodiment. Figure 9B yes Figure 9A The cross-sectional view along the K-K' line is shown. Figure 10 1 is an equivalent circuit diagram showing an equivalent circuit 201 of the semiconductor device 105 according to the fourth embodiment. Components identical to those of the semiconductor device 100 according to the first embodiment are denoted by the same reference numerals.

[0086] like Figure 9A 、 Figure 9B and Figure 10 As shown, the fourth embodiment is an example in which the number of diodes connected in series is increased compared to the first embodiment. In the semiconductor device 105 of the fourth embodiment, - In the upper portion of the semiconductor layer 110, in addition to the first semiconductor region 131 and the second semiconductor region 132, a p - The third semiconductor region 133 of type p - The fourth semiconductor region 134 of type p - The fifth semiconductor region 135 and the p - In addition to the first cathode region 141 to the fourth cathode region 144, an n-type sixth semiconductor region 136 is also provided. + The fifth cathode region 145 and n + Similarly, in addition to the first to fourth anode regions 151 to 154, p + The fifth anode region 155 and the p + The sixth anode region 156 of the type is provided. In addition to the first electrode 121 , the second electrode 122 and the third electrode 123 , a fourth electrode 125 is provided on the semiconductor layer 110 .

[0087] The positional relationship between the various components will be described below.

[0088] The first semiconductor region 131, the third semiconductor region 133, and the fourth semiconductor region 134 are arranged in sequence, separated from each other, along the X direction. The fifth semiconductor region 135, the sixth semiconductor region 136, and the second semiconductor region 132 are also arranged in sequence, separated from each other, along the X direction. The fifth semiconductor region 135 and the first semiconductor region 131 are arranged in sequence, separated from each other, along the Y direction. The sixth semiconductor region 136 and the third semiconductor region 133 are arranged in sequence, separated from each other, along the Y direction. The second semiconductor region 132 and the fourth semiconductor region 134 are arranged in sequence, separated from each other, along the Y direction. Thus, the first to sixth semiconductor regions are arranged in a matrix with two rows along the Y direction and three columns along the X direction.

[0089] The first cathode region 141 and the first anode region 151 are arranged in the upper portion of the first semiconductor region 131, forming a diode D1. The second cathode region 142 and the second anode region 152 are arranged in the upper portion of the fourth semiconductor region 134, forming a diode D2. The third cathode region 143 and the third anode region 153 are arranged in the upper portion of the fifth semiconductor region 135, forming a diode D3. The fourth cathode region 144 and the fourth anode region 154 are arranged in the upper portion of the second semiconductor region 132, forming a diode D4. The fifth cathode region 145 and the fifth anode region 155 are arranged in the upper portion of the third semiconductor region 133, forming a diode D5. The sixth cathode region 146 and the sixth anode region 156 are arranged in the upper portion of the sixth semiconductor region 136, forming a diode D6.

[0090] The fourth electrode 125 is disposed between the second electrode 122 and the third electrode 123. Thus, on the semiconductor layer 110, the first electrode 121, the third electrode 123, the fourth electrode 125, and the second electrode 122 are sequentially arranged along the X direction, separated from each other. The first electrode 121 is connected to the first cathode region 141 and the third anode region 153. The third electrode 123 is connected to the first anode region 151, the third cathode region 143, the fifth cathode region 145, and the sixth anode region 156. The fourth electrode 125 is connected to the fifth anode region 155, the sixth cathode region 146, the second cathode region 142, and the fourth anode region 154. The second electrode 122 is connected to the second anode region 152 and the fourth cathode region 144.

[0091] Therefore, if Figure 10As shown, diodes D2, D5, and D1 are connected in series in the forward direction from the second electrode 122 toward the first electrode 121. Furthermore, diodes D3, D6, and D4 are connected in series in the forward direction from the first electrode 121 toward the second electrode 122. Thus, in the semiconductor device 105, three diodes are connected in series in both the forward and reverse directions between the first electrode 121 and the second electrode 122.

[0092] Next, the effects of the fourth embodiment will be described.

[0093] According to the semiconductor device 105 of the fourth embodiment, the number of diodes connected in series between the first electrode 121 and the second electrode 122 can be increased from 2 to 3 compared to the semiconductor device 100 of the first embodiment.

[0094] In this way, the number of diodes connected in series can be arbitrarily selected according to the required withstand voltage of the semiconductor device. Therefore, the design freedom of the semiconductor device can be improved. In more general terms, when the number of diodes connected in series is N (N is an integer greater than 2), the number of electrodes is (N+1), and the p - The number of semiconductor regions of the type is set to (2×N), and one anode region and one cathode region can be provided in each semiconductor region.

[0095] In the fourth embodiment, the p-type and n-type may be reversed. Similarly to the third embodiment, an element isolation insulator 161 may be provided. Furthermore, similar to the modified example of the third embodiment, a buried diffusion layer 112 may be provided.

[0096] [Fifth embodiment]

[0097] A semiconductor device 106 according to a fifth embodiment will be described with reference to FIG. 11 . Figure 11A is a top view of a semiconductor device 106 according to the fifth embodiment. Figure 11B yes Figure 11A A cross-sectional view taken along line LL' is shown. Figure 12A Yes Figure 11A A top view showing only the semiconductor layer 110 and the electrodes, Figure 12B It is omitted Figure 11A Components identical to those of the semiconductor device 105 according to the fourth embodiment are denoted by the same reference numerals.

[0098] like Figures 11A to 12BAs shown, the semiconductor device 106 of the fifth embodiment is different from the semiconductor device 105 of the fourth embodiment in that the first electrode 121 and the second electrode 122 are comb-shaped, and the third electrode 123 and the fourth electrode 125 are respectively provided in plurality and arranged in the Y direction, and the anode region and cathode region constituting each diode are arranged in the Y direction.

[0099] In the first electrode 121, there is provided a base 121_0 extending in the Y direction and M (M is an integer greater than 2) protrusions 121_k (k is an integer from 1 to M) extending in the X direction from the base 121_0 toward the second electrode 122. Similarly, in the second electrode 122, there is provided a base 122_0 extending in the Y direction and M protrusions 122_k extending in the opposite direction of the X direction from the base 122_0 toward the first electrode 121. There are M third electrodes 123 arranged along the Y direction. Hereinafter, the third electrode 123 is also referred to as the third electrode 123_k. There are also M fourth electrodes 125 arranged along the Y direction. Hereinafter, the fourth electrode 125 is also referred to as the fourth electrode 125_k. In Figure 11A and Figure 11B In the example shown, M is 5.

[0100] The protrusions 121_k of the first electrode 121 and the fourth electrode 125_k are arranged along the X direction. The protrusions 121_k of the third electrode 123_k and the second electrode 122 are arranged along the X direction. The protrusions of the first electrode 121 and the portion of the third electrode 123 on the first electrode 121 side are alternately arranged along the Y direction. The portion of the third electrode 123 on the second electrode 122 side and the portion of the fourth electrode 125 on the first electrode 121 side are alternately arranged along the Y direction. The portion of the fourth electrode 125 on the second electrode 122 side and the protrusions of the second electrode 122 are alternately arranged along the Y direction.

[0101] As in the fourth embodiment, - The upper part of the semiconductor layer 110 is arranged in a matrix of 2 rows and 3 columns. - The first semiconductor region 131, the second semiconductor region 132, the third semiconductor region 133, the fourth semiconductor region 134, the fifth semiconductor region 135 and the sixth semiconductor region 136 of the type.

[0102] In the upper portion of the first semiconductor region 131 and directly below the convex portion 121_k of the first electrode 121, a first cathode region 141 is disposed. Figure 11A and Figure 11BIn the example shown, the first cathode region 141 is disposed directly below the convex portion 121_1 and the convex portion 121_2. In addition, the third anode region 153 is disposed directly below the convex portion 121_k of the first electrode 121 in the upper layer portion of the fifth semiconductor region 135. Figure 11A and Figure 11B In the example shown, the third anode region 153 is arranged in the region directly below the convex portion 121_3 , the convex portion 121_4 , and the convex portion 121_5 .

[0103] In the upper layer portion of the first semiconductor region 131, the first anode region 151 is arranged in the region directly below the third electrode 123_k. Figure 11A and Figure 11B In the example shown, first anode regions 151 are respectively arranged directly below the third electrodes 123_1, 123_2, and 123_3. In addition, third cathode regions 143 are respectively arranged directly below the third electrodes 123_k in the upper layer portion of the fifth semiconductor region 135. Figure 11A and Figure 11B In the example shown, the third cathode regions 143 are respectively arranged directly below the third electrode 123_4 and the third electrode 123_5 .

[0104] In the upper portion of the third semiconductor region 133, a fifth cathode region 145 is disposed directly below the third electrode 123_k. Figure 11A and Figure 11B In the example shown, a fifth cathode region 145 is disposed directly below each of the third electrodes 123_1, 123_2, and 123_3. Furthermore, a sixth anode region 156 is disposed directly below each of the third electrodes 123_k in the upper portion of the sixth semiconductor region 136. Figure 11A and Figure 11B In the example shown, the sixth anode region 156 is disposed directly below the third electrode 123_4 and the third electrode 123_5 .

[0105] In the upper layer portion of the third semiconductor region 133, the fifth anode region 155 is arranged in the region directly below the fourth electrode 125_k. Figure 11A and Figure 11B In the example shown, the fifth anode region 155 is disposed directly below the fourth electrode 125_1 and the fourth electrode 125_2. In addition, the sixth cathode region 146 is disposed directly below the fourth electrode 125_k in the upper portion of the sixth semiconductor region 136. Figure 11A and Figure 11B In the illustrated example, the sixth cathode region 146 is disposed directly below the fourth electrode 125_3 , the fourth electrode 125_4 , and the fourth electrode 125_5 .

[0106] In the upper portion of the fourth semiconductor region 134, the second cathode region 142 is arranged in the region directly below the fourth electrode 125_k. Figure 11A and Figure 11B In the example shown, the second cathode region 142 is disposed directly below the fourth electrode 125_1 and the fourth electrode 125_2. In addition, the fourth anode region 154 is disposed directly below the fourth electrode 125_k in the upper portion of the second semiconductor region 132. Figure 11A and Figure 11B In the illustrated example, the fourth anode region 154 is disposed directly below the fourth electrode 125_3 , the fourth electrode 125_4 , and the fourth electrode 125_5 .

[0107] In the upper layer portion of the fourth semiconductor region 134, the second anode region 152 is arranged in the region directly below the protrusion 122_k of the second electrode 122. Figure 11A and Figure 11B In the example shown, the second anode region 152 is disposed directly below the convex portion 122_1, the convex portion 122_2, and the convex portion 122_3. In addition, the fourth cathode region 144 is disposed directly below the convex portion 122_k of the second electrode 122 in the upper portion of the second semiconductor region 132. Figure 11A and Figure 11B In the example shown, the fourth cathode region 144 is arranged directly below the convex portion 122_4 and the convex portion 122_5 .

[0108] When viewed from the Z direction, the element isolation insulator 161 has a lattice shape and surrounds the first semiconductor region 131 , the second semiconductor region 132 , the third semiconductor region 133 , the fourth semiconductor region 134 , the fifth semiconductor region 135 , and the sixth semiconductor region 136 .

[0109] Thus, in each semiconductor region, a diode is formed by the anode region and cathode region adjacent to each other in the Y direction. As a result, the semiconductor device 106 realizes the same Figure 10 The equivalent circuit shown is the same as the equivalent circuit.

[0110] According to the semiconductor device 106 of this embodiment, the anode and cathode regions constituting each diode can be arranged along the Y direction, thereby shortening the length of the semiconductor device 106 in the X direction. To increase the withstand voltage of the semiconductor device 106, intermediate electrodes such as the third electrode 123 and the fourth electrode 125 can be arranged along the X direction to increase the length of the semiconductor device 106 in the X direction. On the other hand, to reduce the resistance of the semiconductor device 106, the value of M can be increased to increase the length of the semiconductor device 106 in the Y direction.

[0111] According to the embodiment, a semiconductor device capable of reducing voltage and internal resistance during operation can be provided.

[0112] While several embodiments of the present invention have been described, these embodiments are provided as examples and are not intended to limit the scope of the invention. These novel embodiments may be implemented in various other ways, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. These embodiments and their variations are intended to be within the scope and spirit of the invention and are encompassed by the invention set forth in the claims and their equivalents.

Claims

1. A semiconductor device comprising: a semiconductor layer of a first conductivity type; A first electrode is disposed on the semiconductor layer; a second electrode disposed on the semiconductor layer; a third electrode, disposed on the semiconductor layer between the first electrode and the second electrode, and separated from the first electrode and the second electrode; A first semiconductor region of the second conductivity type is disposed in the semiconductor layer; a first cathode region of a first conductivity type, disposed in the first semiconductor region and connected to the first electrode; a first anode region of a second conductivity type, disposed in the first semiconductor region and connected to the third electrode; a second cathode region of the first conductivity type, provided in the semiconductor layer and separated from the first semiconductor region in a first direction from the first electrode toward the second electrode, and connected to the third electrode; a second anode region of the second conductivity type, disposed in the semiconductor layer and connected to the second electrode; a third anode region of the second conductivity type, disposed in the semiconductor layer and connected to the first electrode; A third cathode region of the first conductivity type, disposed in the semiconductor layer and connected to the third electrode; a second semiconductor region of a second conductivity type, disposed in the semiconductor layer; a fourth anode region of the second conductivity type, disposed in the second semiconductor region and connected to the third electrode; as well as A fourth cathode region of the first conductivity type is provided in the second semiconductor region and is connected to the second electrode. The first cathode region and the third anode region are arranged in a second direction intersecting with the first direction, The second semiconductor region is separated from the first semiconductor region in both the first direction and the second direction.

2. The semiconductor device according to claim 1, wherein The impurity concentration of the semiconductor layer is lower than the impurity concentrations of the first cathode region, the second cathode region, the third cathode region, and the fourth cathode region. The impurity concentrations of the first semiconductor region and the second semiconductor region are lower than the impurity concentrations of the first anode region, the second anode region, the third anode region, and the fourth anode region.

3. The semiconductor device according to claim 1, wherein At least one pair of regions are alternately arranged in a second direction intersecting with the first direction, The at least one pair of regions includes: a portion of the first anode region and a portion of the first cathode region, a portion of the second anode region and a portion of the second cathode region, a portion of the third anode region and a portion of the third cathode region, and / or a portion of the fourth anode region and a portion of the fourth cathode region.

4. The semiconductor device according to claim 1, wherein An element isolation insulator is further provided. The element isolation insulator is arranged between the second cathode region and the first anode region, and between the third cathode region and the fourth anode region.

5. The semiconductor device according to claim 4, wherein further comprising a semiconductor substrate of a second conductivity type, The semiconductor layer is arranged on the semiconductor substrate, The lower end of the element isolation insulator is arranged inside the semiconductor substrate. The semiconductor device according to claim 5 , wherein: The invention further comprises a buried diffusion layer, which is arranged between the semiconductor substrate and the semiconductor layer, is of the first conductivity type, and has an impurity concentration higher than that of the semiconductor layer.

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