Photodetection devices and electronic devices

Abstract

The present disclosure relates to a solid-state imaging element and electronic device that can prevent charge from leaking into adjacent pixels. A plurality of pixels perform photoelectric conversion on light incident on the back surface via different on-chip lenses for each pixel. A pixel separation wall is formed between adjacent pixels and includes a front surface groove, which is a groove formed on the front surface, and a back surface groove, which is a groove formed on the back surface. A wiring layer is provided on the front surface. For example, the present disclosure can be applied to a back-illuminated CMOS image sensor.

Description

[0001] This application is a divisional application of the patent application with application number 201780001074.9, whose application date is January 13, 2017 and whose invention name is “Solid-state imaging element and electronic device”. Technical Field

[0002] The present disclosure relates to a solid-state imaging element and an electronic device, and in particular, to a solid-state imaging element and an electronic device capable of preventing charge leakage between adjacent pixels. Background Art

[0003] In the past, electronic devices with imaging functions, such as digital cameras and digital video cameras, used solid-state imaging elements such as charge-coupled device (CCD) image sensors and complementary metal oxide semiconductor (CMOS) image sensors. Solid-state imaging elements have pixels that combine photodiodes (photoelectric conversion elements) and transistors for photoelectric conversion, and create images based on pixel signals output from multiple pixels arranged in a plane.

[0004] For example, in a solid-state imaging device, the charge accumulated in a photodiode (PD) is transferred to a floating diffusion (FD) with a predetermined capacitance at the connection between the PD and the gate electrode of an amplifier transistor. A pixel signal corresponding to the amount of charge accumulated in the FD is then read from the pixel and converted to digital by an analog-to-digital (AD) conversion circuit equipped with a comparator, which then outputs the signal.

[0005] In recent years, technology that uses a portion of the pixels in a CMOS image sensor to detect phase to improve autofocus (AF) speed (so-called image plane phase difference AF) has become popular. Examples of image plane phase difference AF systems include PD segmentation systems (for example, see Patent Document 1). In PD segmentation systems, the PD of a pixel is segmented into multiple parts, phase information is generated based on the pixel signals obtained from each segmented PD, and distance measurement is performed based on this phase information.

[0006] Reference List

[0007] Patent Literature

[0008] Patent Document 1: Japanese Patent Application Laid-Open No. 2000-292685 Summary of the Invention

[0009] Technical issues

[0010] On the other hand, when strong light enters a pixel, a phenomenon called color mixing may occur in which the charge accumulated in the pixel's PD becomes saturated, overflows, and leaks into adjacent pixels. When leakage color mixing occurs, the amount of charge corresponding to the pixel signal read from the adjacent pixel is greater than the original charge, which can lead to degradation of imaging characteristics.

[0011] The present disclosure has been made in view of the above circumstances to prevent charge leakage between adjacent pixels.

[0012] Technical Solution

[0013] According to the first aspect of the present disclosure, the solid-state imaging element is a solid-state imaging element having the following characteristics, the solid-state imaging element including: a plurality of pixels, the plurality of pixels performing photoelectric conversion on light, the light being incident on each pixel from the back side of the solid-state imaging element via a different lens for each pixel; a pixel separation wall formed between adjacent pixels; and a wiring layer arranged on the front surface of the solid-state imaging element, wherein the pixel separation wall includes a front surface groove as a groove formed from the front surface and a back surface groove as a groove formed from the back side.

[0014] In the first aspect of the present disclosure, there are provided: a plurality of pixels that perform photoelectric conversion on light, the light being incident on each pixel from the back side of the solid-state imaging element via a different lens for each pixel; a pixel separation wall formed between adjacent pixels; and a wiring layer provided on the front surface of the solid-state imaging element, wherein the pixel separation wall includes a front surface groove as a groove formed from the front surface and a back surface groove as a groove formed from the back side.

[0015] An electronic device according to the second aspect of the present disclosure is an electronic device having the following characteristics, wherein the electronic device includes a solid-state imaging element, the solid-state imaging element including: a plurality of pixels, the plurality of pixels performing photoelectric conversion on light, the light being incident on each pixel from the back side of the solid-state imaging element via a different lens for each pixel; a pixel separation wall formed between adjacent pixels; and a wiring layer arranged on the front surface of the solid-state imaging element, wherein the pixel separation wall includes a front surface groove as a groove formed from the front surface and a back surface groove as a groove formed from the back side.

[0016] In a second aspect of the present disclosure, a solid-state imaging element having the following characteristics is provided, the solid-state imaging element including: a plurality of pixels that perform photoelectric conversion on light, the light being incident on each pixel from the back side of the solid-state imaging element via a different lens for each pixel; a pixel separation wall formed between adjacent pixels; and a wiring layer provided on the front surface of the solid-state imaging element, wherein the pixel separation wall includes a front surface groove as a groove formed from the front surface and a back surface groove as a groove formed from the back side.

[0017] Beneficial effects

[0018] According to the first and second aspects of the present disclosure, an image can be captured. In addition, according to the first and second aspects of the present disclosure, charge leakage between adjacent pixels can be prevented.

[0019] It should be noted that the effects described here are not necessarily restrictive and may be any effects described in the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a block diagram showing a configuration example of a first embodiment of a CMOS image sensor as a solid-state imaging element to which the present disclosure is applied.

[0021] Figure 2 It shows that Figure 1 FIG. 1 is a diagram showing an example of a circuit configuration of a pixel group arranged in a pixel region shown in FIG.

[0022] Figure 3 It shows Figure 2 The first structural example of the pixel group shown is as viewed from the front surface side of the CMOS image sensor.

[0023] Figure 4 It is along Figure 3 Cross-sectional views obtained along line AA', line BB' and line CC'.

[0024] Figure 5 It means that when Figure 2 The diagram shows the flow of charge when the charge stored in the PD overflows.

[0025] Figure 6 It shows Figure 2 A diagram of a second structural example of a pixel group is shown.

[0026] Figure 7 : is a block diagram showing a configuration example of a second embodiment of a CMOS image sensor as a solid-state imaging element to which the present disclosure is applied.

[0027] Figure 8It shows that Figure 7 FIG. 1 is a diagram showing an example of a circuit configuration of phase difference detection pixels arranged in a pixel region shown in FIG.

[0028] Figure 9 It shows Figure 8 The diagram shows an example of the structure of a phase difference detection pixel as viewed from the front surface side of a CMOS image sensor.

[0029] Figure 10 It is along Figure 9 Cross-sectional views obtained along line AA', line BB' and line CC'.

[0030] Figure 11 It is along Figure 9 Cross-sectional views obtained along line D-D' and line EE'.

[0031] Figure 12 It is an explanation Figure 7 A diagram showing the operation of a CMOS image sensor.

[0032] Figure 13 It is an explanation Figure 7 A diagram showing the operation of a CMOS image sensor.

[0033] Figure 14 It is an explanation Figure 7 A diagram showing the operation of a CMOS image sensor.

[0034] Figure 15 This is a diagram showing a circuit configuration example of a phase difference detection pixel in a third embodiment of a CMOS image sensor to which the present disclosure is applied.

[0035] Figure 16 2 is a diagram showing a first configuration example of the phase difference detection pixel 270 as viewed from the front surface side of the CMOS image sensor.

[0036] Figure 17 It is along Figure 16 Cross-sectional views obtained along line AA' and line BB'.

[0037] Figure 18 It is along Figure 16 Cross-sectional views obtained along line C-C' and line D-D'.

[0038] Figure 19 2 is a diagram illustrating the operation of the third embodiment of the CMOS image sensor.

[0039] Figure 20 2 is a diagram illustrating the operation of the third embodiment of the CMOS image sensor.

[0040] Figure 212 is a diagram illustrating the operation of the third embodiment of the CMOS image sensor.

[0041] Figure 22 2 is a diagram illustrating the operation of the third embodiment of the CMOS image sensor.

[0042] Figure 23 yes Figure 15 The second configuration example of the phase difference detection pixel shown is along Figure 16 Cross-sectional views obtained along line BB' and line CC'.

[0043] Figure 24 yes Figure 15 The third configuration example of the phase difference detection pixel shown is along Figure 16 Cross-sectional view obtained along line EE'.

[0044] Figure 25 The fourth structural example of the phase difference detection pixel at the end of the angle of view of the third embodiment of the CMOS image sensor is as follows Figure 16 Cross-sectional view obtained along line EE'.

[0045] Figure 26 It is an explanation Figure 25 A diagram showing a method for manufacturing a PD of a phase difference detection pixel.

[0046] Figure 27 The fifth structural example of the phase difference detection pixel at the edge of the viewing angle of the third embodiment of the CMOS image sensor to which the present disclosure is applied is along Figure 16 Cross-sectional view obtained along line EE'.

[0047] Figure 28 It is an explanation Figure 27 A diagram showing a method for manufacturing a PD of a phase difference detection pixel.

[0048] Figure 29 It is an explanation Figure 27 A diagram showing a method for manufacturing a PD of a phase difference detection pixel.

[0049] Figure 30 It shows Figure 15 FIG. 1 is a diagram showing a sixth configuration example of a phase difference detection pixel.

[0050] Figure 31 It shows Figure 15 FIG. 1 is a diagram showing a sixth configuration example of a phase difference detection pixel.

[0051] Figure 32 It shows Figure 15 FIG. 1 is a diagram showing a seventh configuration example of a phase difference detection pixel.

[0052] Figure 33It shows Figure 15 FIG. 1 is a diagram showing a seventh configuration example of a phase difference detection pixel.

[0053] Figure 34 It shows Figure 15 FIG. 8 is a diagram showing an eighth structural example of a phase difference detection pixel.

[0054] Figure 35 It shows Figure 15 FIG. 8 is a diagram showing an eighth structural example of a phase difference detection pixel.

[0055] Figure 36 It shows Figure 15 FIG. 1 is a diagram showing a ninth structural example of a phase difference detection pixel.

[0056] Figure 37 : is a diagram showing another configuration example of a phase difference detection pixel.

[0057] Figure 38 It is an explanation Figure 37 A diagram showing a method for manufacturing backside trenches.

[0058] Figure 39 It shows Figure 37 FIG. 2 is a diagram showing another structural example of the back side trench.

[0059] Figure 40 FIG. 1 is a diagram showing another configuration example of the pixel region as viewed from the front surface side of the CMOS image sensor.

[0060] Figure 41 : is a block diagram showing a configuration example of an imaging device as an electronic device to which the present disclosure is applied.

[0061] Figure 42 FIG. 1 is a diagram showing an example of use of the above-described CMOS image sensor. DETAILED DESCRIPTION

[0062] Hereinafter, a method for implementing the present disclosure (hereinafter referred to as an "implementation") will be described. It should be noted that the description will be given in the following order.

[0063] 1. First embodiment: CMOS image sensor ( Figures 1 to 6 )

[0064] 2. Second implementation: CMOS image sensor ( Figures 7 to 14 )

[0065] 3. Third embodiment: CMOS image sensor ( Figures 15 to 40 )

[0066] 4. Fourth embodiment: Imaging device ( Figure 41 )

[0067] 5. Examples of CMOS image sensors used ( Figure 42 )

[0068] First embodiment

[0069] Configuration Example of First Embodiment of CMOS Image Sensor

[0070] Figure 1 This is a block diagram showing a configuration example of a first embodiment of a CMOS image sensor as a solid-state imaging element to which the present disclosure is applied.

[0071] The CMOS image sensor 50 includes a pixel region 51 formed on a semiconductor substrate (chip) (not shown) such as a silicon substrate, a pixel drive line 52, a vertical signal line 53, a vertical drive section 54, a column processing section 55, a horizontal drive section 56, a system control section 57, a signal processing section 58, and a storage section 59. The CMOS image sensor 50 is a back-illuminated CMOS image sensor in which the surface to which light is irradiated is the back surface opposite to the front surface on which the wiring layer is provided.

[0072] In the pixel region 51 of the CMOS image sensor 50, multiple pixels are arranged two-dimensionally in an array to capture images. Each pixel has a photoelectric device (PD) that performs photoelectric conversion on light incident from the back and accumulates charge. The color filter array for each pixel in the pixel region 51 is a Bayer array. In the pixel region 51, a pixel drive line 52 is formed for every two rows of pixels, and a vertical signal line 53 is formed for every two columns of pixels.

[0073] The vertical drive section 54 includes a shift register, an address decoder, etc., and provides a drive signal to the pixel drive line 52, thereby sequentially reading pixel signals corresponding to the charge accumulated in the PD of each pixel of the pixel area 51 from the top in units of rows in the order of odd columns and even columns.

[0074] The column processing section 55 includes a signal processing circuit for every two columns of pixels in the pixel area 51. Each signal processing circuit in the column processing section 55 performs signal processing such as A / D conversion and correlated double sampling (CDS) on pixel signals read from the pixels and supplied via the vertical signal lines 53. The column processing section 55 temporarily holds the pixel signals after the signal processing.

[0075] The horizontal drive section 56 includes a shift register, an address decoder, etc., and sequentially selects the signal processing circuits of the column processing section 55. Therefore, the pixel signals processed in the respective signal processing circuits of the column processing section 55 are sequentially output to the signal processing section 58.

[0076] The system control section 57 includes a timing generator that generates various timing signals and the like, and controls the vertical drive section 54 , the column processing section 55 , and the horizontal drive section 56 based on the various timing signals generated by the timing generator.

[0077] The signal processing unit 58 performs various signal processing on the pixel signals output from the column processing unit 55. At this time, the signal processing unit 58 stores intermediate results of the signal processing in the storage unit 59 as needed, and references these results when necessary. The signal processing unit 58 outputs the pixel signals after the signal processing.

[0078] The storage unit 59 includes a dynamic random access memory (DRAM), a static random access memory (SRAM), and the like.

[0079] Circuit configuration example of a pixel group

[0080] Figure 2 It shows that Figure 1 1 is a diagram showing an example of a circuit configuration of a pixel group consisting of 2 (horizontal)×2 (vertical) pixels among the pixels arranged in the pixel region 51 shown.

[0081] exist Figure 1 In the pixel area 51 shown, Figure 2 The pixel groups 70 shown are arranged in an array. Each pixel group 70 includes 2×2 pixels 71 - 1 to 71 - 4 , an FD 72 , a reset transistor 73 , an amplifying transistor 74 , a selection transistor 75 , a power supply electrode 76 , and a well electrode 77 .

[0082] Each of pixels 71-1 to 71-4 includes a PD and a transfer transistor. Specifically, pixel 71-1 includes a PD 91-1 and a transfer transistor 92-1, and pixel 71-2 includes a PD 91-2 and a transfer transistor 92-2. Furthermore, pixel 71-3 includes a PD 91-3 and a transfer transistor 92-3, and pixel 71-4 includes a PD 91-4 and a transfer transistor 92-4.

[0083] Note that in the following description, when there is no need to distinguish between pixels 71-1 to 71-4, they are collectively referred to as pixels 71. Similarly, PDs 91-1 to 91-4 are collectively referred to as PDs 91, and transfer transistors 92-1 to 92-4 are collectively referred to as transfer transistors 92.

[0084] The PD 91 of the pixel 71 generates and accumulates electric charge corresponding to the amount of light incident on and received by the back surface of the CMOS image sensor 50. The anode terminal of the PD 91 is connected to the well electrode 77 having a potential of VSS (e.g., GND), and the cathode terminal of the PD 91 is connected to the FD 72 via the transfer transistor 92.

[0085] The gate electrode 92-1A of the transfer transistor 92-1 is connected to a line TG1 formed for the pixels 71 in the odd-numbered columns of the pixel 71-1 (71-2) row, among the pixel drive lines 52 corresponding to the two rows of pixels 71 constituting the pixel group 70. In addition, the gate electrode 92-2A of the transfer transistor 92-2 is connected to a line TG2 formed for the pixels 71 in the even-numbered columns of the pixel 71-1 (71-2) row, among the pixel drive lines 52 corresponding to the two rows of pixels 71 constituting the pixel group 70.

[0086] In addition, the gate electrode 92-3A of the transfer transistor 92-3 is connected to a line TG3 formed for the pixels 71 in the odd-numbered columns of the pixel 71-3 (71-4) row, among the pixel drive lines 52 corresponding to the two rows of pixels 71 constituting the pixel group 70. In addition, the gate electrode 92-4A of the transfer transistor 92-4 is connected to a line TG4 formed for the pixels 71 in the even-numbered columns of the pixel 71-3 (71-4) row, among the pixel drive lines 52 corresponding to the two rows of pixels 71 constituting the pixel group 70. It should be noted that in the following description, when there is no need to particularly distinguish between the gate electrodes 92-1A to 92-4A, they are collectively referred to as the gate electrode 92A.

[0087] from Figure 1 The vertical drive section 54 shown supplies a transfer signal as a drive signal to lines TG1-TG4. The vertical drive section 54 sequentially turns on the transfer signals of lines TG1-TG4, depending on the row and odd-numbered or even-numbered column of the pixel 71 from which the pixel signal is to be read. When the transfer signal input to gate electrode 92A is turned on, transfer transistor 92 transfers the charge accumulated in PD 91 to FD 72.

[0088] The FD 72 holds the charge read from the PD 91. The FD 72 is connected to a power supply electrode 76 having a potential of VDD via a reset transistor 73.

[0089] In addition, the gate electrode 73A of the reset transistor 73 is connected to a line RST1 formed for the pixels 71 in the two rows of pixels 71 constituting the pixel group 70, among the pixel drive lines 52 corresponding to the two rows of pixels 71. A reset signal as a drive signal is supplied to the line RST1 from the vertical drive section 54. The vertical drive section 54 turns on the reset signal before turning on a new transmission signal.

[0090] When a reset signal input to the gate electrode 73A is turned on, the reset transistor 73 discharges the charge transferred to the FD 72 to the power supply electrode 76 and resets the potential of the FD 72 .

[0091] The amplifier transistor 74 and the selection transistor 75 are connected in series between the power supply electrode 76 and the vertical signal line 53. The gate electrode 74A of the amplifier transistor 74 is connected to the FD 72, and the amplifier transistor 74 outputs a pixel signal corresponding to the potential of the FD 72 to the selection transistor 75 via the power supply electrode 76.

[0092] The gate electrode 75A of the selection transistor 75 is connected to a line SEL1 formed for the pixels 71 in the two rows of pixels 71 that constitute the pixel group 70, among the pixel drive lines 52 corresponding to the two rows of pixels 71. The line SEL1 is supplied with a selection signal as a drive signal from the vertical drive section 54. The vertical drive section 54 turns on the selection signal after turning on the transfer signal and before turning on the reset signal.

[0093] When the selection signal input to the gate electrode 75A is turned on, the selection transistor 75 transmits the pixel signal input from the amplifier transistor 74 through the gate electrode 75A. Figure 1 The illustrated vertical signal line 53 is provided to a column processing section 55 .

[0094] As described above, in the CMOS image sensor 50 , one FD 72 is shared between the 2×2 pixels 71 constituting the pixel group 70 , and charges accumulated in the PDs 91 of the pixels 71 are sequentially transferred to the FD 72 in row units from the top in the order of odd columns and even columns.

[0095] First structural example of pixel group

[0096] Figure 3 It shows Figure 2 The first structural example of the pixel group 70 shown is as viewed from the front surface side of the CMOS image sensor 50. Figure 4 It is along Figure 3 Cross-sectional views obtained along line AA', line BB' and line CC'.

[0097] like Figure 3 As shown, with the P-type impurity 101-2 in the horizontal direction ( Figure 3 and aligned with the P-type impurity 101-3 in the vertical direction ( Figure 3P-type impurity 101-1 is arranged so as to be aligned in the vertical direction (in the vertical direction), wherein P-type impurity 101-1 is a well in which PD 91-1 is formed, PD 91-2 is formed in P-type impurity 101-2, and PD 91-3 is formed in P-type impurity 101-3. In addition, P-type impurity 101-4 is arranged so as to be aligned in the horizontal direction with P-type impurity 101-3 and in the vertical direction with P-type impurity 101-2, wherein PD 91-4 is formed in P-type impurity 101-4. It should be noted that in the following description, when there is no need to specifically distinguish between P-type impurities 101-1 to 101-4, they are collectively referred to as P-type impurity 101.

[0098] like Figure 4 As shown, pixel separation walls 111 are formed between adjacent P-type impurities 101 in the same pixel group 70. Pixel separation walls 111 are formed by contact between front surface trenches 111A, which are trenches formed from the front surface of the CMOS image sensor 50, and back surface trenches 111B, which are trenches formed from the back surface. It should be noted that in the region between adjacent P-type impurities 101 in the same pixel group 70 on the front surface of the CMOS image sensor 50, front surface trenches 111A are not formed in the central region of the P-type impurities 101-1 to 101-4 where the FDs 72 are formed.

[0099] That is, the pixel separation wall 111 is formed by the contact between the front surface groove 111A and the back surface groove 111B, wherein the front surface groove is formed in the area on the front surface between adjacent P-type impurities 101 in the same pixel group 70 where the FD 72 is not formed, and the back surface groove is formed in the entire area of ​​the back surface between the P-type impurities 101.

[0100] Furthermore, across the pixel group 70 , pixel separation walls 112 are formed between the P-type impurities 101 adjacent to each other in the vertical direction, and pixel separation walls 113 are formed between the P-type impurities 101 adjacent to each other in the horizontal direction.

[0101] Pixel separation wall 112 includes two front surface trenches 112A and a back surface trench 112B sandwiching N-type impurities 114 to 117 and P-type impurities 118. Back surface trench 112B is formed at a position corresponding to N-type impurities 114 to 117 and P-type impurities 118 and different from the positions of the two front surface trenches 112A.

[0102] N-type impurity 114 is connected to FD 72 and constitutes the source of reset transistor 73. N-type impurity 115 is connected to power supply electrode 76 and constitutes the drain of reset transistor 73 and amplifier transistor 74. N-type impurity 116 constitutes the source of amplifier transistor 74 and the drain of selection transistor 75. N-type impurity 117 is connected to vertical signal line 53 and constitutes the source of selection transistor 75. P-type impurity 118 is a well connected to well electrode 77.

[0103] The gate electrode 92A, the gate electrode 73A, and the gate electrode 75A are connected to the pixel driving line 52 provided in the wiring layer 119 formed on the front surface of the CMOS image sensor 50. The FD 72 is connected to the gate electrode 74A.

[0104] Furthermore, red (R), green (G), and blue (B) color filters 121 corresponding to the pixels 71 are formed on the back side of each P-type impurity 101, and an on-chip lens 122 is formed outside each color filter 121. The PD 91 performs photoelectric conversion on light incident from the back side of the CMOS image sensor 50 via the on-chip lens 122 and the color filter 121.

[0105] As described above, since the front surface grooves 111A and the back surface grooves 111B are in contact with each other in the region other than the FDs 72 in the pixel separation wall 111, the PDs 91 in the same pixel group 70 are completely electrically cut off in the region other than the FDs 72. Furthermore, since the front surface grooves 113A and the back surface grooves 113B are in contact with each other in the pixel separation wall 113, the PDs 91 adjacent to each other across the pixel group 70 are also completely electrically cut off.

[0106] On the other hand, in pixel separation wall 112, front surface groove 112A and back surface groove 112B are located at different positions and do not contact each other. Therefore, PD 91 is not completely electrically isolated from N-type impurities 114 to 117 and P-type impurity 118.

[0107] It should be noted that the lengths of the front surface grooves 111A (112A, 113A) and the back surface grooves 111B (112B, 113B) in the depth direction perpendicular to the back surface may differ depending on the position of the pixel separation wall 111 (112, 113). In addition, the material of at least one of the front surface grooves 111A (112A, 113A) and the back surface grooves 111B (112B, 113B) may differ depending on the position of the pixel separation wall 111 (112, 113).

[0108] In addition, one on-chip lens 122 may be provided for each pixel group 70 .

[0109] Explanation of the flow of charge during overflow

[0110] Figure 5 3 is a diagram illustrating the flow of charges when the charges accumulated in the PD 91 overflow.

[0111] Figure 5 Part A of FIG. 7 is a diagram showing the pixel group 70 as viewed from the front surface side when the charge accumulated in the PD 91 overflows. Figure 5 Part B is along Figure 5 A cross-sectional view taken along line CC' of part A.

[0112] As described above, since each PD 91 is completely electrically cut off in the region other than the FD 72 , it is possible to prevent the charge accumulated in the PD 91 from leaking from the PD 91 to another adjacent PD 91 in the event of charge overflow.

[0113] On the other hand, the front surface groove 111A is not formed in the region of the FD 72 of the pixel separation wall 111. Therefore, when the charge accumulated in the PD 91 overflows, the overflowed charge passes through the PD 91. Figure 5 The path W1 shown in the portion B of FIG7 leaks into the FD 72 via the P-type impurity 101. However, since the FD 72 is reset before the charge is transferred from the PD 91, the charge leakage from the PD 91 to the FD 72 has little influence on the imaging characteristics.

[0114] In addition, as described above, since the front surface groove 112A and the back surface groove 112B are not in contact with each other in the pixel separation wall 112, the PD 91 is not completely electrically cut off from the N-type impurities 114 to 117 and the P-type impurity 118. Therefore, when the charge accumulated in the PD 91 overflows, the overflowed charge can also be discharged through the PD 91. Figure 5 The path W2 shown in the portion B of FIG. 1 is discharged to the power supply electrode 76 via the N-type impurity 115 .

[0115] Therefore, even when the amount of charge overflowing from the PD 91 is greater than the amount of charge that can be accumulated in the FD 72, the charge can be prevented from leaking to the adjacent PD 91 by discharging the charge to the power supply electrode 76. Therefore, degradation of imaging characteristics due to charge leakage to the adjacent PD 91 can be prevented.

[0116] On the other hand, if the path W2 does not exist, the charge accumulated in the FD 72 needs to be cleared by turning on the reset signal before the amount of charge overflowing from the PD 91 exceeds the amount of charge that can be accumulated in the FD 72. Therefore, the processing of the vertical drive unit 54 becomes complicated.

[0117] It should be noted that charge leakage occurs in the absence of a physical barrier in path W1, while charge leakage occurs in path W2 through the gap between the physical barriers formed by front surface trenches 112A and back surface trenches 112B. Therefore, leakage in path W1 takes precedence over leakage in path W2.

[0118] As described above, in the CMOS image sensor 50 , the pixel separation wall 111 ( 112 , 113 ) is formed by the front surface trench 111A ( 112A, 113A) and the back surface trench 111B ( 112B, 113B).

[0119] Therefore, by making the front surface groove 113A and the back surface groove 113B of the pixel separation wall 113 contact each other, the pixel separation wall 113 can be made to penetrate the CMOS image sensor 50. The aspect ratio of the depth to the width of the front surface groove 113A and the back surface groove 113B is smaller than the aspect ratio of the through-groove that penetrates from one of the front surface and the back surface of the CMOS image sensor 50. Therefore, compared with the case where the pixel separation wall is formed by a through-groove, the pixel separation wall 113 is easier to form.

[0120] In addition, intentional leakage and cutoff of charges can be easily achieved by controlling the presence / absence and positions of the front surface trenches 111A to 113A by forming a mask pattern, which is a general semiconductor process.

[0121] Furthermore, compatibility with typical CMOS image sensors, which have trenches for device isolation, such as shallow trench isolation (STI), formed on the front surface, can be improved. Therefore, for example, when applying this technology to a CMOS image sensor having trenches for device isolation, such as STI, formed on the front surface, the trench can be used as at least one of the front surface trenches 111A to 113A. Consequently, the increase in the number of manufacturing steps associated with forming the pixel separation walls 111 to 113 can be suppressed.

[0122] Second structural example of pixel group

[0123] Figure 6 1 is a diagram showing a second configuration example of the 2×2 pixel group 70 . Figure 6 Part A is a diagram showing a second structural example of the 2×2 pixel group 70 as viewed from the front surface side of the CMOS image sensor 50 , Figure 6 Part B is a diagram as viewed from the back side. Figure 6 Section C is along Figure 6Note that, in the following figures, unless otherwise specified, the color filter 231 and the on-chip lens 232 are not shown in the figures viewed from the back side of the CMOS image sensor.

[0124] exist Figure 6 In the structure shown, Figure 3 and Figure 4 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0125] Figure 6 The structure of the pixel group 70 shown is similar to Figure 3 and Figure 4 The structure shown differs in that P-type impurities 118 are located at the intersections of the 2×2 pixel groups 70 .

[0126] like Figure 6 As shown in part C of FIG, the two front surface grooves 112A of the pixel separation wall 112 are formed in a manner that sandwiches the P-type impurity 118, and the back surface groove 112B is formed at a position corresponding to the P-type impurity 118. Specifically, the front surface groove 112A and the back surface groove 112B do not contact each other. Therefore, the potential of the peripheral P-type impurity 101 can be simultaneously fixed to the potential of the well electrode 77 via the single P-type impurity 118.

[0127] On the other hand, in the case where the front surface groove 112A and the back surface groove 112B of the pixel separation wall 112 are in contact with each other, it is necessary to form the P-type impurity 118 for each pixel 71. Therefore, the area that can be allocated to the PD 91, the transfer transistor 92, the reset transistor 73, the amplifying transistor 74, the selection transistor 75, etc. is reduced, which will lead to deterioration of imaging characteristics.

[0128] In addition, Figure 6 In the example, Figure 6 As shown in part A of FIG, since the P-type impurity 118 is located at the intersection of the 2×2 pixel group 70, the path W2 ( Figure 5 ) is prone to charge leakage.

[0129] Second embodiment

[0130] Configuration Example of Second Embodiment of CMOS Image Sensor

[0131] Figure 7 : is a block diagram showing a configuration example of a second embodiment of a CMOS image sensor as a solid-state imaging element to which the present disclosure is applied.

[0132] exist Figure 7 In the structure shown, Figure 1The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0133] The CMOS image sensor 180 is a back-illuminated CMOS image sensor, in which a pixel area 181, a pixel drive line 182, a vertical signal line 183, a vertical drive unit 184, a column processing unit 185, a horizontal drive unit 56, a system control unit 57, a signal processing unit 188 and a storage unit 59 are formed on a semiconductor substrate (not shown) such as a silicon substrate.

[0134] In the pixel region 181 of the CMOS image sensor 180, multiple phase difference detection pixels are arranged two-dimensionally in an array to capture images. Each phase difference detection pixel has two photoelectric devices (PDs) for photoelectrically converting light incident from the back and accumulating charge. The color filter array of each phase difference detection pixel in the pixel region 181 is a Bayer array. In the pixel region 181, a pixel drive line 182 is formed for each row of phase difference detection pixels, and a vertical signal line 183 is formed for each column of phase difference detection pixels.

[0135] The vertical drive section 184 includes a shift register, an address decoder, etc., and supplies a drive signal to the pixel drive line 182, thereby sequentially reading pixel signals corresponding to charges accumulated in two PDs of each phase difference detection pixel of the pixel area 181 from the top in row units.

[0136] The column processing section 185 includes a signal processing circuit for each column of phase difference detection pixels in the pixel area 181. Each signal processing circuit in the column processing section 185 performs signal processing such as A / D conversion and correlated double sampling (CDS) on pixel signals read from the phase difference detection pixels and supplied via the vertical signal lines 183. The column processing section 185 temporarily holds the pixel signals after the signal processing.

[0137] The signal processing unit 188 selects the horizontal drive unit 56 and performs image plane phase difference AF, etc., based on the pixel signals of the two PDs of each phase difference detection pixel output from the column processing unit 185. At this time, the signal processing unit 188 stores intermediate processing results, etc. in the storage unit 59 as needed, and references these results at the necessary timing. The signal processing unit 188 outputs the processing results, etc.

[0138] Circuit Configuration Example of Phase Difference Detection Pixel

[0139] Figure 8 It shows that Figure 7 FIG. 1 is a diagram showing an example of a circuit configuration of phase difference detection pixels arranged in the pixel region 181 shown.

[0140] The phase difference detection pixel 190 includes divided pixels 191 - 1 to 191 - 2 , an FD 192 , a reset transistor 193 , an amplifying transistor 194 , a selection transistor 195 , a power supply electrode 197 , and a well electrode 198 .

[0141] The divided pixel 191 - 1 includes a PD 201 - 1 and a transfer transistor 202 - 1 , and the divided pixel 191 - 2 includes a PD 201 - 2 and a transfer transistor 202 - 2 .

[0142] It should be noted that in the following description, when there is no need to specifically distinguish between the split pixel 191-1 and the split pixel 191-2, they are collectively referred to as the split pixel 191. Similarly, the PD 201-1 and the PD 201-2 are collectively referred to as the PD 201, and the transfer transistor 202-1 and the transfer transistor 202-2 are collectively referred to as the transfer transistor 202.

[0143] The PD 201 of the segmented pixel 191 generates and accumulates electric charge corresponding to the amount of light incident on and received by the CMOS image sensor 180 from the back surface thereof. The anode terminal of the PD 201 is connected to the well electrode 198 having a potential of VSS (e.g., GND), and the cathode terminal of the PD 201 is connected to the FD 192 via the transfer transistor 202.

[0144] The gate electrode 202-1A of the transfer transistor 202-1 is connected to a line TG11 formed for one of the divided pixels 191-1 constituting the phase difference detection pixel 190, among the pixel drive lines 182 corresponding to the row of the phase difference detection pixel 190. Furthermore, the gate electrode 202-2A of the transfer transistor 202-2 is connected to a line TG12 formed for the other of the divided pixels 191-2 constituting the phase difference detection pixel 190, among the pixel drive lines 182 corresponding to the row of the phase difference detection pixel 190. It should be noted that in the following description, when there is no need to particularly distinguish between the gate electrode 202-1A and the gate electrode 202-2A, they are collectively referred to as the gate electrode 202A.

[0145] A transfer signal serving as a drive signal is supplied from the vertical drive section 184 to the lines TG11 and TG12. The vertical drive section 184 sequentially turns on the transfer signals of the lines TG11 and TG12 in the row of phase difference detection pixels 190 from which pixel signals are to be read. When the transfer signal input to the gate electrode 202A is turned on, the transfer transistor 202 transfers the charge accumulated in the PD 201 to the FD 192.

[0146] The FD 192 holds the charge read from the PD 201. The FD 192 is connected to a power supply electrode 197 having a potential of VDD via a reset transistor 193.

[0147] The gate electrode 193A of the reset transistor 193 is connected to a line RST2 formed for the phase difference detection pixels 190 in the row of the phase difference detection pixels 190, among the pixel drive lines 182 corresponding to the row of the phase difference detection pixels 190. A reset signal as a drive signal is supplied to the line RST2 from the vertical drive section 184. The vertical drive section 184 turns on the reset signal before turning on a new transmission signal.

[0148] When a reset signal input to the gate electrode 193A is turned on, the reset transistor 193 discharges the charge transferred to the FD 192 to the power supply electrode 197 and resets the potential of the FD 192 .

[0149] An amplifier transistor 194 and a selection transistor 195 are connected in series between a power supply electrode 197 and a vertical signal line 183. A gate electrode 194A of the amplifier transistor 194 is connected to the FD 192. The amplifier transistor 194 outputs a pixel signal corresponding to the potential of the FD 192 to the selection transistor 195 via the power supply electrode 197.

[0150] The gate electrode 195A of the selection transistor 195 is connected to a line SEL2 formed for the phase difference detection pixels 190 in the row of pixel drive lines 182 corresponding to the row of phase difference detection pixels 190. A selection signal serving as a drive signal is supplied to the line SEL2 from the vertical drive unit 184. The vertical drive unit 184 turns on the selection signal after turning on the transfer signal and before turning on the reset signal.

[0151] When a selection signal input to the gate electrode 195A is turned on, the selection transistor 195 supplies the pixel signal output from the amplification transistor 194 to the column processing section 185 via the vertical signal line 183 .

[0152] As described above, in the CMOS image sensor 180, one FD 192 is shared between the 2 (horizontal) × 2 (vertical) divided pixels 191. Thus, the charge accumulated in the PD 201 of each divided pixel 191 is sequentially transferred to the FD 192 in the order of the divided pixel 191-1 and the divided pixel 191-2 from the top in units of rows of the phase difference detection pixels 190.

[0153] Example of the structure of a phase difference detection pixel

[0154] Figure 9 It shows Figure 8 The illustrated configuration example of the phase difference detection pixel 190 is a diagram as viewed from the front surface side of the CMOS image sensor 180 . Figure 10 It is along Figure 9 Cross-sectional views obtained along line AA', line BB' and line CC'. Figure 11 It is along Figure 9Cross-sectional views obtained along line D-D' and line EE'.

[0155] like Figure 9 As shown in FIG. 1 , the P-type impurity 210 serving as the well of the phase difference detection pixel 190 is divided into the P-type impurity 211-1 and the P-type impurity 211-2. Figure 10 and Figure 11 As shown, PD 201-1 is formed in P-type impurity 211-1, and PD 201-2 is formed in P-type impurity 211-2. It should be noted that in the following description, when there is no need to distinguish between P-type impurity 211-1 and P-type impurity 211-2, they are collectively referred to as P-type impurity 211.

[0156] like Figure 9 and Figure 10 As shown, in the same phase difference detection pixel 190, a pixel partitioning wall 221 is formed between the P-type impurity 211-1 and the P-type impurity 211-2. Figure 10 As shown, the dividing pixel separation wall 221 is formed by contact between a front surface groove 221A formed from the front surface of the CMOS image sensor 180 and a back surface groove 221B formed from the back surface.

[0157] It should be noted that, in the region between adjacent P-type impurities 211 in the same phase difference detection pixel 190 on the front surface of the CMOS image sensor 180, the front surface groove 211A is not formed in the region where the FD 192 is formed and in the end portion in the vertical direction opposite to the FD 192. That is, the pixel dividing separation wall 221 is formed by contact between the front surface groove 221A, which is formed in the region on the front surface between adjacent P-type impurities 211 in the same phase difference detection pixel 190 except for the region of the FD 192 and the end portion in the vertical direction opposite to the FD 192, and the back surface groove 221B, which is formed in the entire region of the back surface between the P-type impurities 211.

[0158] In addition, if Figure 10 As shown in FIG. 1 , an impurity 212 having a depth potential is formed on the front surface side of the end portion of the pixel separation wall 221 in the vertical direction opposite to the FD 192. Therefore, when the charge accumulated in one of the PD 201-1 and the PD 201-2 overflows, the charge can be easily discharged through the PD 201-1. Figure 10 The path S1 shown leaks to other PDs via the impurities 212 .

[0159] Across the phase difference detection pixels 190 , pixel separation walls 222 are formed between the P-type impurities 211 adjacent to each other in the vertical direction, and pixel separation walls 223 are formed between the P-type impurities 211 adjacent to each other in the horizontal direction.

[0160] The pixel separation wall 222 includes two front surface trenches 222A and a back surface trench 222B that sandwich N-type impurities 224-228 and P-type impurities 229. The back surface trench 222B is formed at a position corresponding to the N-type impurities 224-228 and P-type impurities 229 and different from the positions of the two front surface trenches 222A.

[0161] The N-type impurity 224 is connected to the power supply electrode 197 and constitutes the drain of the amplifier transistor 194. The N-type impurity 225 constitutes the source of the amplifier transistor 194 and the drain of the selection transistor 195. The N-type impurity 226 is connected to the vertical signal line 183 and constitutes the source of the selection transistor 195.

[0162] The N-type impurity 227 is connected to the FD 192 and constitutes the source of the reset transistor 193. The N-type impurity 228 is connected to the power supply electrode 197 and constitutes the drain of the reset transistor 193. The P-type impurity 229 is a well connected to the well electrode 198.

[0163] The gate electrode 202A, the gate electrode 193A, and the gate electrode 195A are connected to the pixel driving line 182 provided in the wiring layer 230 formed on the front surface of the CMOS image sensor 180. The FD 192 is connected to the gate electrode 194A.

[0164] Furthermore, red (R), green (G), and blue (B) color filters 231 corresponding to the phase difference detection pixels 190 are formed on the back side of the P-type impurity 210 , and an on-chip lens 232 is formed outside the color filter 231 .

[0165] PD 201-1 receives the signal from the chip through the on-chip lens 232 and the color filter 231. Figure 9 PD 201-2 receives light incident from the back side of the right side and performs photoelectric conversion on the received light. Figure 9 The left rear surface receives incident light and performs photoelectric conversion on the received light.

[0166] Therefore, the pixel signal read from the segmented pixel 191-1 is different from the pixel signal from the phase difference detection pixel 190. Figure 9 The pixel signal read from the split pixel 191-2 corresponds to the light incident from the right side of the phase difference detection pixel 190. Figure 9Therefore, the signal processing unit 188 can detect the phase in the horizontal direction based on the difference between the pixel signals read from the divided pixel 191-1 and the divided pixel 191-2 and perform image plane phase difference AF or the like.

[0167] As described above, the front surface groove 221A is not formed in the region of the FD 192 in the pixel separation wall 221. Therefore, when the charge accumulated in the PD 201 overflows, the overflowed charge is discharged through the PD 201. Figure 10 The illustrated path S2 leaks into the FD 192 via the P-type impurity 211. However, since the FD 192 is reset before the charge is transferred from the PD 201, the charge leakage from the PD 201 to the FD 192 has little influence on the imaging characteristics.

[0168] On the other hand, since the front surface groove 223A and the back surface groove 223B are in contact with each other in the pixel separation wall 223, the PDs 201 adjacent to each other across the phase difference detection pixel 190 are completely electrically disconnected. Therefore, even if the charge accumulated in the PD 201 overflows, the charge does not leak to other PDs 201 adjacent to the PD 201 across the phase difference detection pixel 190.

[0169] In addition, if Figure 11 As shown, in the pixel separation wall 222, the front surface groove 222A and the back surface groove 222B are located at different positions and do not contact each other. Therefore, the PD 201 is not completely electrically isolated from the N-type impurities 224 to 228 and the P-type impurity 229.

[0170] Therefore, when the charge accumulated in all PDs 201 overflows, the overflowed charge can be discharged through Figure 11 The path S3 shown is discharged to the power supply electrode 197 via the P-type impurity 211 and the N-type impurity 224. Figure 11 The path E1 shown can fix the potential of the P-type impurity 211 (well) to the potential of the well electrode 198 connected to the P-type impurity 229 .

[0171] It should be noted that the length and material of at least one of the front surface grooves 221A (222A, 223A) and the back surface grooves 221B (222B, 223B) in the depth direction may differ depending on the position of the pixel separation wall 221 (pixel separation walls 222, 223). In addition, the length and material of at least one of the back surface grooves 222B (223B) of the pixel separation wall 222 (223) may differ from those of the back surface grooves 221B of the pixel separation wall 221 in the depth direction.

[0172] CMOS Image Sensor Operating Instructions

[0173] Figures 12 to 14 Description Figure 7 The operation of the CMOS image sensor 180 is shown in FIG.

[0174] like Figure 12 Part B to Figure 14 As shown in part B of , among the barriers of paths S1 to S3 , the barrier of path S1 is the weakest, the barrier of path S2 is the second weakest, and the barrier of path S3 is the strongest.

[0175] The signal processing section 188 detects the horizontal phase based on the difference between the pixel signals sequentially read from the divided pixel 191-1 and the divided pixel 191-2 until the charge accumulated in either the PD 201-1 or the PD 201-2 overflows. The signal processing section 188 then performs image plane phase difference AF based on the detected phase.

[0176] When the charge is further accumulated in the PD 201 and the charge accumulated in either the PD 201-1 or the PD 201-2 overflows, as shown in FIG. Figure 12 As shown, the overflowing charge begins to leak into another PD through the path S1 having the weakest barrier (step 1). In this case, the signal processing section 188 can acquire pixel signals of the entire phase difference detection pixel 190 by adding pixel signals sequentially read from PD 201-1 and PD 201-2.

[0177] When the charge is further accumulated in the PD 201 and the charge accumulated in all the PDs 201 overflows, as shown in FIG. Figure 13 As shown, the overflowing charge begins to leak into the FD 192 through the path S2 having the second weak barrier (step 2). Since the FD 192 is reset before the charge is transferred from the PD 201, the charge leakage from the PD 201 to the FD 192 has little effect on the imaging characteristics.

[0178] When the charge is further accumulated in the PD 201 and the amount of charge overflowing from the entire PD 201 becomes larger, as shown in FIG. Figure 14 As shown, charge begins to leak into N-type impurities 224 and 228 through path S3 having the strongest barrier (step 3). Since N-type impurities 224 and 228 are connected to power electrode 197, the charge leaked from PD 201 is discharged to power electrode 197.

[0179] As described above, in the CMOS image sensor 180 , the segmented pixel separation wall 221 (pixel separation walls 222 , 223 ) is formed by the front surface groove 221A ( 222A, 223A) and the back surface groove 221B ( 222B, 223B).

[0180] Therefore, in the region where the pixel separation wall 221 is formed, the front surface groove 221A is not formed in the end portion in the vertical direction opposite to the FD 192 and in the region of the FD 192, and the foreign matter 212 may be formed in the end portion in the vertical direction opposite to the FD 192. In addition, the positions of the front surface groove 222A and the back surface groove 222B of the pixel separation wall 222 can be shifted so that the positions thereof do not correspond to each other, and the front surface groove 222A and the back surface groove 222B can be prevented from contacting each other.

[0181] In this way, charge leakage between the PD 201 - 1 and the PD 201 - 2 , charge leakage from the PD 201 to the FD 192 , and discharge of charge accumulated in the PD 201 to the power supply electrode 197 can be caused to occur gradually.

[0182] Furthermore, by making the front surface groove 223A and the back surface groove 223B of the pixel separation wall 223 contact each other, the pixel separation wall 223 can penetrate the CMOS image sensor 180. Therefore, charge leakage between adjacent phase difference detection pixels 190 can be prevented.

[0183] The aspect ratio of the depth to the width of the front surface groove 223A and the back surface groove 223B is smaller than the aspect ratio of the through groove penetrating from one of the front surface and the back surface of the CMOS image sensor 180. Therefore, the pixel separation wall 223 is easier to form than when the pixel separation wall is formed by the through groove.

[0184] In addition, such gradual occurrence and prevention of leakage can be easily achieved by controlling the presence / absence and positions of the front surface trenches 221A to 223A by forming a mask pattern, which is a general semiconductor process.

[0185] Third embodiment

[0186] Circuit Configuration Example of Phase Difference Detection Pixel of Third Embodiment of CMOS Image Sensor

[0187] The configuration of the third embodiment of the CMOS image sensor to which the present disclosure is applied is the same as that of the third embodiment except that the phase difference detection pixel is formed of 2 (horizontal)×2 (vertical) divided pixels. Figure 7 The CMOS image sensor 180 shown is the same. Therefore, only the phase difference detection pixels will be described below.

[0188] Figure 15 This is a diagram showing a circuit configuration example of a phase difference detection pixel in a third embodiment of a CMOS image sensor to which the present disclosure is applied.

[0189] exist Figure 15 In the structure shown, Figure 8 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0190] Figure 15 The phase difference detection pixel 270 shown in FIG. Figure 8 The configuration of the phase difference detection pixel 190 shown is different in that the number of divided pixels is 2 (horizontally)×2 (vertically).

[0191] Specifically, the phase difference detection pixel 270 includes 2×2 divided pixels 271 - 1 to 271 - 4 , an FD 192 , a reset transistor 193 , an amplifying transistor 194 , a selection transistor 195 , a power supply electrode 197 , and a well electrode 198 .

[0192] Each of the segmented pixels 271-1 to 271-4 includes a PD and a transfer transistor. Specifically, segmented pixel 271-1 includes a PD 291-1 and a transfer transistor 292-1, and segmented pixel 271-2 includes a PD 291-2 and a transfer transistor 292-2. Furthermore, segmented pixel 271-3 includes a PD 291-3 and a transfer transistor 292-3, and segmented pixel 271-4 includes a PD 291-4 and a transfer transistor 292-4.

[0193] In the following description, when there is no need to distinguish between the divided pixels 271-1 to 271-4, they are collectively referred to as divided pixels 271. Similarly, the PDs 291-1 to 291-4 are collectively referred to as PDs 291, and the transfer transistors 292-1 to 292-4 are collectively referred to as transfer transistors 292.

[0194] The PD 291 of the divided pixel 271 generates and accumulates charges corresponding to the amount of light incident from the back side of the CMOS image sensor and received by it. The anode terminal of the PD 291 is connected to the well electrode 198, and the cathode terminal of the PD 291 is connected to the FD 192 via the transfer transistor 292.

[0195] The gate electrode 292-1A of the transfer transistor 292-1 is connected to a line TG21 formed for the upper left divided pixel 271-1 constituting the phase difference detection pixel 270, among the pixel drive lines 182 corresponding to the row of the phase difference detection pixel 270. Furthermore, the gate electrode 292-2A of the transfer transistor 292-2 is connected to a line TG22 formed for the upper right divided pixel 271-2 constituting the phase difference detection pixel 270, among the pixel drive lines 182 corresponding to the row of the phase difference detection pixel 270.

[0196] Furthermore, the gate electrode 292-3A of the transfer transistor 292-3 is connected to a line TG23 formed for the lower left divided pixel 271-3 constituting the phase difference detection pixel 270, among the pixel drive lines 182 corresponding to the row of the phase difference detection pixel 270. Furthermore, the gate electrode 292-4A of the transfer transistor 292-4 is connected to a line TG24 formed for the lower right divided pixel 271-4 constituting the phase difference detection pixel 270, among the pixel drive lines 182 corresponding to the row of the phase difference detection pixel 270. It should be noted that in the following description, when there is no need to particularly distinguish between the gate electrodes 292-1A to 292-4A, they are collectively referred to as the gate electrode 292A.

[0197] A transfer signal serving as a drive signal is supplied from the vertical drive section 184 to the lines TG21 to TG24. The vertical drive section 184 sequentially turns on the transfer signals of the lines TG21 to TG24 in the row of phase difference detection pixels 270 from which pixel signals are to be read. When the transfer signal input to the gate electrode 292A is turned on, the transfer transistor 292 transfers the charge accumulated in the PD 291 to the FD 192.

[0198] As described above, in the third embodiment of the CMOS image sensor, one FD 192 is shared between the 2×2 divided pixels 271. Thus, the charges accumulated in the PDs 291 of the respective divided pixels 271 are sequentially transferred to the FD 192 in the order of the divided pixel 271-1, the divided pixel 271-2, the divided pixel 271-3, and the divided pixel 271-4 from the top in units of rows of the phase difference detection pixels 270.

[0199] First Configuration Example of Phase Difference Detection Pixel

[0200] Figure 16 2 is a diagram showing a first configuration example of the phase difference detection pixel 270 as viewed from the front surface side of the CMOS image sensor. Figure 17 It is along Figure 16 Cross-sectional views obtained along line AA' and line BB'. Figure 18 It is along Figure 16 Cross-sectional views obtained along line C-C' and line D-D'.

[0201] exist Figures 16-18 In the structure shown, Figures 9-11 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0202] like Figure 16 As shown, the P-type impurity 210 of the phase difference detection pixel 270 is divided into P-type impurities 301-1 to 301-4. Figure 17 and Figure 18 As shown, PD 291-1, PD 291-2, PD 291-3, and PD 291-4 are formed in P-type impurity 301-1, P-type impurity 301-2, P-type impurity 301-3, and P-type impurity 301-4, respectively. It should be noted that in the following description, when there is no need to specifically distinguish between P-type impurities 301-1 to 301-4, they are collectively referred to as P-type impurity 301.

[0203] like Figures 16 to 18 As shown, pixel separation walls 311 are formed between the P-type impurities 301 in the same phase difference detection pixel 270. Figure 17 and Figure 18 As shown, the dividing pixel separation wall 311 is formed by contact between a front surface trench 311A ​​formed from the front surface of the CMOS image sensor and a back surface trench 311B formed from the back surface.

[0204] It should be noted that, in the region between adjacent P-type impurities 301 in the same phase difference detection pixel 270 on the front surface of the CMOS image sensor, the front surface groove 311A ​​is not formed in the region where the FD 192 is formed and in the end portion in the horizontal direction or vertical direction opposite to the FD 192. That is, the pixel dividing separation wall 311 is formed by contact between the front surface groove 311A, which is formed in the region on the front surface between adjacent P-type impurities 301 in the same phase difference detection pixel 270 except for the region of the FD 192 and the end portion in the horizontal direction or vertical direction opposite to the FD 192, and the back surface groove 311B, which is formed in the entire region of the back surface between the P-type impurities 301.

[0205] In addition, if Figure 17 As shown, an impurity 302 having a depth potential is formed on the front surface side of the end portion in the horizontal direction opposite to the FD 192 of the dividing pixel separation wall 311 between the vertically adjacent P-type impurities 301. Therefore, when the charge accumulated in one of the vertically adjacent PDs 291 in the same phase difference detection pixel 270 overflows, the charge can be easily transferred to the PD 291. Figure 17The illustrated path S11 leaks to another PD via the impurity 302 .

[0206] In addition, if Figure 18 As shown, an impurity 303 having a different concentration from that of the impurity 302 and a potential deeper than that of the impurity 302 is formed on the front surface side of the end portion in the vertical direction opposite to the FD 192 of the dividing pixel separation wall 311 between the P-type impurities 301 adjacent to each other in the horizontal direction. Therefore, when the charge accumulated in one of the PDs 291 adjacent to each other in the horizontal direction in the same phase difference detection pixel 270 overflows, the charge can be easily transferred to the PD 291. Figure 18 The illustrated path S12 leaks to another PD via the impurity 303 .

[0207] The front surface groove 222A of the pixel separation wall 222 sandwiches N-type impurities 312 to 315 and a P-type impurity 316. The N-type impurity 312 is connected to the FD 192 and constitutes the source of the reset transistor 193. The N-type impurity 313 is connected to the power supply electrode 197 and constitutes the drain of the reset transistor 193 and the amplifier transistor 194.

[0208] The N-type impurity 314 constitutes the source of the amplifier transistor 194 and the drain of the selection transistor 195. The N-type impurity 315 is connected to the vertical signal line 183 and constitutes the source of the selection transistor 195. The P-type impurity 316 is a well connected to the well electrode 198. Figure 17 As shown, the gate electrode 292A is connected to the pixel driving line 182 provided in the wiring layer 230 formed in the CMOS image sensor.

[0209] PD 291-1 and PD 291-2 receive signals from the chip through the on-chip lens 232 and the color filter 231, respectively. Figure 16 The incident light from the lower right and Figure 16 The sensor receives the incident light from the lower left and performs photoelectric conversion on the light.

[0210] In addition, the PD 291-3 and the PD 291-4 receive signals from the chip through the on-chip lens 232 and the color filter 231, respectively. Figure 16 The incident light from the upper right and Figure 16 The sensor receives the incident light from the upper left corner and performs photoelectric conversion on the light.

[0211] Therefore, the pixel signal read from the segmented pixel 271-1 is different from the pixel signal from the phase difference detection pixel 270. Figure 16 The pixel signal read from the split pixel 271-2 corresponds to the light incident from the lower right corner of the image. Figure 16 The pixel signal read from the split pixel 271-3 corresponds to the light incident from the lower left corner of the image. Figure 16The pixel signal read from the split pixel 271-4 corresponds to the light incident from the upper right corner of the image. Figure 16 This corresponds to the light incident from the upper left in the figure.

[0212] Therefore, the signal processing section 188 can detect the phases in the horizontal and vertical directions based on the differences between the pixel signals read from the divided pixels 271 - 1 to 271 - 4 and perform image plane phase difference AF or the like.

[0213] As described above, the front surface groove 311A ​​is not formed in the region of the FD 192 in the pixel separation wall 311. Therefore, when the charge accumulated in the entire PD 291 overflows, the overflowed charge is discharged through the PD 291. Figure 18 The illustrated path S13 leaks into the FD 192 via the P-type impurity 301. However, since the FD 192 is reset before the charge is transferred from the PD 291, the charge leakage from the PD 291 to the FD 192 has little influence on the imaging characteristics.

[0214] On the other hand, since the front surface groove 223A and the back surface groove 223B are in contact with each other in the pixel separation wall 223, the PD 291 adjacent to each other across the phase difference detection pixel 270 is completely electrically cut off. Therefore, even if the charge accumulated in the PD 291 overflows, the charge does not leak to another PD 291 adjacent to the PD 291 across the phase difference detection pixel 270.

[0215] In addition, if Figure 17 and Figure 18 As shown, since the front surface trench 222A and the back surface trench 222B are not in contact with each other in the pixel separation wall 222, the PD 291 is not completely electrically cut off from the N-type impurities 312 to 315 and the P-type impurity 316.

[0216] Therefore, when the charge accumulated in all PDs 291 overflows, the overflowed charge can be discharged through Figure 18 The illustrated path S14 discharges to the power supply electrode 197 via the P-type impurity 301 and the N-type impurity 313 .

[0217] It should be noted that the lengths of the front surface groove 311A ​​and the back surface groove 311B in the depth direction may be different depending on the position of the pixel separation wall 311. In addition, the back surface groove 222B (223B) of the pixel separation wall 222 (223) and the back surface groove 311B of the pixel separation wall 311 may be different in the depth direction.

[0218] CMOS Image Sensor Operating Instructions

[0219] Figures 19 to 22 Each of them is a diagram illustrating the operation of the third embodiment of the CMOS image sensor.

[0220] like Figure 19 Part B to Figure 22 As shown in part B of , among the barriers of paths S11 to S14 , the barrier of path S11 is the weakest, the barrier of path S12 is the second weakest, the barrier of path S13 is the third weakest, and the barrier of path S14 is the strongest.

[0221] The signal processing unit 188 detects the phase in the horizontal and vertical directions based on the difference between the pixel signals sequentially read from the segmented pixels 271-1 to 271-4 until the charge accumulated in any of the PDs 291-1 to 291-4 overflows. The signal processing unit 188 then performs image plane phase difference AF based on the detected phase.

[0222] When the charge is further accumulated in the PD 291 and the charge accumulated in any one of the PDs 291-1 to 291-4 overflows, as shown in FIG. Figure 19 As shown, the overflowing charges begin to leak into the PD 291 adjacent in the vertical direction through the path S11 having the weakest barrier (step 11).

[0223] In this case, the signal processing section 188 can obtain pixel signals for the left and right regions when the phase difference detection pixels 270 are divided in the horizontal direction by adding the pixel signals read from the PDs 291 adjacent to each other in the vertical direction. Therefore, the signal processing section 188 detects the phase in the horizontal direction based on the difference between the pixel signals in the left and right regions, and performs image plane phase difference AF based on the phase.

[0224] When the charge is further accumulated in the PD 291 and the charge accumulated in any one of the entire left PD 291 and the entire right PD 291 overflows, as shown in FIG. Figure 20 As shown, the overflowing charge begins to leak into the PD 291 adjacent in the horizontal direction through the path S12 having the second weak barrier (step 12). In this case, the signal processing unit 188 can obtain the pixel signal of the entire phase difference detection pixel 270 by adding the pixel signals read from all PDs 291.

[0225] When the charge is further accumulated in the PD 291 and the charge accumulated in all the PDs 291 overflows, as shown in FIG. Figure 21As shown, the overflowing charge begins to leak into the FD 192 through the path S13 having the third weak barrier (step 13). Since the FD 192 is reset before the charge is transferred from the PD 291, the charge leakage from the PD 291 to the FD 192 has little effect on the imaging characteristics.

[0226] When the charge is further accumulated in the PD 291 and the amount of charge overflowing from the entire PD 291 becomes larger, as shown in FIG. Figure 22 As shown, charges begin to leak into the N-type impurity 313 through the path S14 having the strongest barrier (step 14). Since the N-type impurity 313 is connected to the power electrode 197, the charges leaked from the PD 291 are discharged to the power electrode 197.

[0227] As described above, in the third embodiment of the CMOS image sensor, the pixel separation wall 311 is formed of the front surface groove 311A ​​and the back surface groove 311B. Therefore, in the region where the pixel separation wall 311 is formed, the front surface groove 311A ​​is not formed in the end portions in the horizontal or vertical directions opposite the FD 192 and in the region of the FD 192. Impurities 302 can be formed in the horizontal end portions, and impurities 303 having a potential deeper than that of the impurities 302 can be formed in the vertical end portions. This allows charge leakage between vertically adjacent PDs and charge leakage between horizontally adjacent PDs to occur gradually.

[0228] Second Configuration Example of Phase Difference Detection Pixel

[0229] Figure 23 yes Figure 15 The second configuration example of the phase difference detection pixel 270 shown is along Figure 16 Cross-sectional views obtained along line BB' and line CC'.

[0230] exist Figure 23 In the structure shown, Figures 16-18 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0231] Figure 23 The structure of the phase difference detection pixel 270 shown is similar to that of Figures 16-18 The structure shown is different in that an impurity 321 is provided instead of the impurities 302 and 303, and a front surface trench 322 and a front surface trench 323 are newly provided. Figure 23 In the illustrated phase difference detection pixel 270 , the strength of the barriers of the path S11 and the path S12 is controlled not by the concentration of the impurities but by the front surface grooves 322 and 323 .

[0232] Specifically, in Figure 23 In the illustrated phase difference detection pixel 270, impurities 321 having the same impurity concentration are formed on the front surface side of the end portion of the pixel separation wall 311 in the horizontal or vertical direction opposite to the FD 192. Furthermore, a front surface groove 322 having a shorter depth direction than the front surface groove 311A ​​is formed on the front surface side of the horizontal end portion. A front surface groove 323 having a longer depth direction than the front surface groove 322 but shorter depth direction than the front surface groove 311A ​​is formed on the front surface side of the vertical end portion.

[0233] Therefore, the front surface groove 322 and the back surface groove 311B do not contact each other, and the front surface groove 323 and the back surface groove 311B do not contact each other. The distance between the front surface groove 322 and the back surface groove 311B is greater than the distance between the front surface groove 323 and the back surface groove 311B. Therefore, the PD 291 in the same phase difference detection pixel 270 is not electrically disconnected, and the barrier of path S11 is weaker than the barrier of path S12.

[0234] Third Configuration Example of Phase Difference Detection Pixel

[0235] Figure 24 yes Figure 15 The third configuration example of the phase difference detection pixel 270 shown is along Figure 16 Cross-sectional view obtained along line EE'.

[0236] exist Figure 24 In the structure shown, Figures 16-18 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0237] Figure 24 The structure of the phase difference detection pixel 270 shown is similar to that of Figures 16-18 The illustrated structure is different in that the positions of the partitioning pixel separation wall 311 , the color filter 231 , and the on-chip lens 232 in the phase difference detection pixel 270 differ depending on the position of the phase difference detection pixel 270 on the pixel region 181 .

[0238] That is, generally, the incident angle of light from the on-chip lens differs between the center and the edge of the angle of view of a CMOS image sensor. Therefore, in pixels at the edge, light does not sufficiently enter the PD, and the pixel signal decreases.

[0239] Therefore, in Figure 24 In the illustrated phase difference detection pixel 270 , the positions of the partitioning pixel separation wall 311 , the color filter 231 , and the on-chip lens 232 in the phase difference detection pixel 270 change depending on the position of the phase difference detection pixel 270 on the pixel region 181 .

[0240] Specifically, when the position of the phase difference detection pixel 270 on the pixel region 181 is the center of the angle of view of the CMOS image sensor, as shown in FIG. Figure 24 As shown in part A of FIG. 2 , the color filter 231 and the on-chip lens 232 are arranged so as to center the P-type impurity 210. In addition, the pixel separation wall 311 is formed at the center of the P-type impurity 210 in the horizontal direction or the vertical direction.

[0241] On the other hand, when the position of the phase difference detection pixel 270 on the pixel region 181 is at the end of the viewing angle of the CMOS image sensor, as shown in FIG. Figure 24 As shown in part B of FIG, the centers of the color filter 231 and the on-chip lens 232 are arranged to be offset from the center of the P-type impurity 210. In addition, the pixel separation wall 311 is formed at a position offset from the center of the P-type impurity 210 in the horizontal direction or the vertical direction. In other words, the P-type impurity 210 is unequally divided into the P-type impurities 301-1 to 301-4. Figure 24 In the example shown, the size of the PD 291 varies depending on the size of the P-type impurity 301 .

[0242] In this way, pupil correction can be performed to bring the optical center of the phase difference detection pixel 270 closer to the center of the phase difference detection pixel 270. Therefore, the difference between pixel signals that occurs depending on the position of the phase difference detection pixel 270 on the pixel area 181 can be reduced. Furthermore, since not only the positions of the color filter 231 and the on-chip lens 232 are changed, but also the position of the pixel separation wall 311 is changed, the difference between pixel signals can be reduced even when the incident angle at the end of the viewing angle is large.

[0243] It should be pointed out that in Figure 24 In the example, although the positions of the color filter 231 and the on-chip lens 232 and the position of the dividing pixel separation wall 311 are changed depending on the position of the phase difference detection pixel 270 on the pixel region 181, only the position of one of them may be changed.

[0244] Fourth Configuration Example of Phase Difference Detection Pixel

[0245] Figure 25 The fourth structural example of the phase difference detection pixel 270 at the end of the angle of view of the third embodiment of the CMOS image sensor is shown along Figure 16 Cross-sectional view obtained along line EE'.

[0246] exist Figure 25 In the structure shown, Figure 24 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0247] Figure 25 The structure of the phase difference detection pixel 270 shown is similar to that of Figure 24 The structure shown differs in that the size of the PD 291 is constant regardless of the size of the P-type impurity 301 .

[0248] Specifically, in Figure 25 In the illustrated phase difference detection pixel 270, a PD 291 having a size corresponding to the minimum size of the P-type impurity 301 is formed on the boundary side of the phase difference detection pixel 270. Therefore, the size of each PD 291 is the same, and the saturation amount of charge accumulated in each divided pixel 271 is the same.

[0249] Manufacturing method of fourth structural example of phase difference detection pixel

[0250] Figure 26 It is an explanation Figure 25 FIG. 2 is a diagram illustrating a method for manufacturing the PD 291 of the phase difference detection pixel 270.

[0251] like Figure 26 As shown in part A of FIG, first, front surface grooves 223A are formed in the P-type impurity 210 at intervals corresponding to the size of the phase difference detection pixel 270. In addition, depending on the position of the phase difference detection pixel 270 having two adjacent front surface grooves 223A as the boundary with other adjacent phase difference detection pixels 270 on the pixel region 181, a front surface groove 311A ​​is formed at a position between the two front surface grooves 223A.

[0252] Then, if Figure 26 As shown in part B of FIG, a pattern corresponding to the PD 291 corresponding to the amount across two divided pixels 271 adjacent to the phase difference detection pixel 270 is formed so that the center of the front surface groove 223A is centered. Then, by implanting N-type impurities according to the formed pattern, the PD 291 corresponding to the amount across two divided pixels 271 adjacent to the phase difference detection pixel 270 is formed.

[0253] Finally, if Figure 26 As shown in part C of FIG, the back surface groove 223B is formed in contact with the front surface groove 223A. Therefore, the PD 291 corresponding to the number of two adjacent divided pixels 271 is divided, and the PD 291 for each divided pixel 271 is formed on the pixel separation wall 223 side (that is, the boundary side of the phase difference detection pixel 270).

[0254] Furthermore, a back surface groove 311B is formed in contact with the front surface groove 311A, and a color filter 231 and an on-chip lens 232 are formed at positions corresponding to the positions of the phase difference detection pixels 270 on the pixel region 181 .

[0255] As mentioned above, in Figure 26 In the manufacturing method, once the PDs 291 corresponding to two divided pixels 271 are formed, the PDs 291 corresponding to the two divided pixels 271 are divided into PDs 291 for each divided pixel 271 by the pixel separation wall 223. Therefore, compared with the case of forming the PDs 291 for each divided pixel 271 separately, patterning when forming the PDs 291 can be easily performed.

[0256] On the other hand, when forming the PDs 291 for each segmented pixel 271, it is necessary to form a pattern corresponding to the PDs 291 having a size corresponding to the minimum size of the P-type impurities 301, which is smaller than the normal size. Therefore, patterning of the PDs 291 is very difficult.

[0257] Fifth Configuration Example of Phase Difference Detection Pixel

[0258] Figure 27 The fifth structural example of the phase difference detection pixel 270 at the edge of the viewing angle of the third embodiment of the CMOS image sensor to which the present disclosure is applied is shown in FIG. Figure 16 Cross-sectional view obtained along line EE'.

[0259] exist Figure 27 In the structure shown, Figure 25 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0260] Figure 27 The structure of the phase difference detection pixel 270 shown is similar to that of Figure 25 The difference in the structure shown is that: regardless of the position of the phase difference detection pixel 270 on the pixel area 181, the front surface groove 311A ​​is formed at the center of the phase difference detection pixel 270; the size of the PD 291 on the front surface side is larger than the size on the back surface side, and the potential of the PD 291 on the front surface side is deeper than the potential on the back surface side.

[0261] Specifically, in Figure 27 In the illustrated phase difference detection pixel 270, the position of the back surface groove 311B varies depending on the position of the phase difference detection pixel 270 on the pixel region 181. On the other hand, the front surface groove 311A ​​is formed at the center of the phase difference detection pixel 270 regardless of the position of the phase difference detection pixel 270 on the pixel region 181.

[0262] Therefore, if Figure 27As shown, in the phase difference detection pixel 270 at the end of the viewing angle, the positions of the front surface groove 311A ​​and the back surface groove 311B are different, and the front surface groove 311A ​​and the back surface groove 311B are not in contact with each other.

[0263] The horizontal and vertical dimensions of the back side of the PD 291 correspond to the minimum horizontal and vertical dimensions of the P-type impurity 301, respectively. Meanwhile, the horizontal and vertical dimensions of the front side of the PD 291 correspond to half the horizontal and vertical dimensions of the P-type impurity 210 of the phase difference detection pixel 270, respectively. All PDs 291 have the same dimensions. Furthermore, the potential on the front side of the PD 291 is deeper than that on the back side.

[0264] As mentioned above, in Figure 27 In the phase difference detection pixel 270 shown, the front surface groove 311A ​​is formed at the center of the phase difference detection pixel 270 regardless of the position of the phase difference detection pixel 270 on the pixel region 181. Therefore, the horizontal and vertical dimensions of the front surface side of the PD 291 can be made to correspond to half the horizontal and vertical dimensions of the P-type impurity 210 of the phase difference detection pixel 270, respectively. Figure 26 Compared with the case of FIG. 2 , the size of the PD 291 becomes larger, and the amount of charge that can be accumulated in the PD 291 increases.

[0265] In addition, since the size of the front surface side of the PD 291 is sufficiently large and the potential is deep, the saturation charge amount of the PD 291 is large.

[0266] Manufacturing method of fifth structural example of phase difference detection pixel

[0267] Figure 28 and Figure 29 Description Figure 27 FIG. 2 is a diagram illustrating a method for manufacturing the PD 291 of the phase difference detection pixel 270.

[0268] like Figure 28 As shown in part A of FIG, first, front surface trenches 223A are formed in the P-type impurity 210 at intervals corresponding to the size of the phase difference detection pixel 270. In addition, a front surface trench 311A ​​is formed at the center between two adjacent front surface trenches 223A.

[0269] Then, if Figure 28As shown in part B of FIG. 2 , a pattern corresponding to the back side of the PD 291 corresponding to the amount spanning two divided pixels 271 adjacent to the phase difference detection pixel 270 is formed so that the center of the front surface groove 223A is centered. Then, by implanting N-type impurities into the back side according to the formed pattern, the back side of the PD 291 corresponding to the amount spanning two divided pixels 271 adjacent to the phase difference detection pixel 270 is formed.

[0270] Then, if Figure 29 As shown in part A of FIG. , a pattern corresponding to the front surface side of the PD 291 of each divided pixel 271 is formed. Then, by implanting N-type impurities into the front surface side according to the formed pattern, the front surface side of the PD 291 of each divided pixel 271 corresponding to the divided pixel 271 is formed in such a manner as to be connected to the back surface sides of the PD 291 corresponding to two adjacent divided pixels 271.

[0271] Finally, if Figure 29 As shown in the portion B of the image processing apparatus, the back surface groove 223B is formed so as to contact the front surface groove 223A. Therefore, the back surface side of the PD 291 corresponding to the amount of two adjacent divided pixels 271 is divided, and the back surface side of the PD 291 of each divided pixel 271 is formed on the pixel separation wall 223 side (that is, the boundary side of the phase difference detection pixel 270).

[0272] In addition, a back surface groove 311B is formed depending on the position of the phase difference detection pixel 270 having two adjacent front surface grooves 223A as a boundary with other adjacent phase difference detection pixels 270 on the pixel region 181. In addition, a color filter 231 and an on-chip lens 232 are formed at a position corresponding to the position of the phase difference detection pixel 270 on the pixel region 181.

[0273] As mentioned above, in Figure 28 and Figure 29 In the manufacturing method shown, once the back side of the PD 291 corresponding to two divided pixels 271 is formed, the back side of the PD 291 corresponding to the two divided pixels 271 is divided into the back side of the PD 291 of each divided pixel 271 by the pixel separation wall 223. Figure 26 As in the case of , patterning when forming the back side of the PD 291 can be easily performed compared to the case of forming the back side of the PD 291 for each divided pixel 271 separately.

[0274] It should be pointed out that although Figure 27 The front surface groove 311A ​​is formed in the illustrated phase difference detection pixel 270 , but the front surface groove 311A ​​does not necessarily need to be formed.

[0275] Sixth Configuration Example of Phase Difference Detection Pixel

[0276] Figure 30 and Figure 31 They are shown respectively Figure 15 FIG. 2 is a diagram showing a sixth configuration example of the phase difference detection pixel 270 .

[0277] exist Figure 30 and Figure 31 In the structure shown, Figures 16-18 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0278] Figure 30 and Figure 31 The structure of the phase difference detection pixel 270 shown is similar to that of Figures 16-18 The difference of the structure shown is that the pixel separation wall 222 is formed by two front surface grooves 222A that clamp N-type impurities 312~315 and P-type impurities 316 and two back surface grooves 222B that are respectively in contact with the two front surface grooves 222A, and the P-type impurity 210 is connected to the well electrode 198.

[0279] Figure 30 Part A and Figure 30 Part B of FIG. 1 is a diagram showing the phase difference detection pixel 270 as viewed from the front surface side and the back surface side of the CMOS image sensor, respectively. Figure 31 Part A and Figure 31 Part B is along Figure 30 Cross-sectional views obtained along lines AA' and BB'.

[0280] exist Figure 30 and Figure 31 In the illustrated phase difference detection pixel 270, the pixel separation wall 222 is formed by two front surface trenches 222A that sandwich the N-type impurities 312 to 315 and the P-type impurity 316, and two back surface trenches 222B that are in contact with the two front surface trenches 222A. Therefore, the reset transistor 193, the amplifier transistor 194, the select transistor 195, the power supply electrode 197, and the well electrode 198 are completely electrically isolated from the P-type impurity 210.

[0281] Therefore, the power supply electrode 197 can be separated from the PD 291. In addition, it is possible to suppress degradation of imaging characteristics caused by charge leakage from the PD 291 to the reset transistor 193, the amplifying transistor 194, the selecting transistor 195, the power supply electrode 197, or the well electrode 198. It should be noted that since the P-type impurity 210 is directly connected to the well electrode 198, the potential of the P-type impurity 210 can be fixed to the potential of the well electrode 198.

[0282] In addition, when metal or a material with low transmittance is used for the front surface trench 222A and the back surface trench 222B, the reset transistor 193, the amplifier transistor 194, the selection transistor 195, the power supply electrode 197 and the well electrode 198 can also be completely optically separated from the P-type impurity 210.

[0283] Seventh Configuration Example of Phase Difference Detection Pixel

[0284] Figure 32 and Figure 33 They are shown respectively Figure 15 FIG. 2 is a diagram showing a seventh configuration example of the phase difference detection pixel 270 .

[0285] exist Figure 32 and Figure 33 In the structure shown, Figures 16-18 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0286] Figure 32 and Figure 33 The structure of the phase difference detection pixel 270 shown is similar to that of Figures 16-18 The structure shown is different in that a pixel separation wall 351 is formed instead of the pixel separation wall 222 , and a front surface groove 352 and a dummy front surface groove 353 are newly formed.

[0287] Figure 32 Part A and Figure 32 Part B of FIG. 1 is a diagram showing the phase difference detection pixel 270 as viewed from the front surface side and the back surface side of the CMOS image sensor. Figure 33 Part A and Figure 33 Part B is along Figure 32 Cross-sectional views obtained along lines AA' and BB' of part A.

[0288] exist Figure 32 and Figure 33 In the illustrated phase difference detection pixel 270, a pixel separation wall 351 is formed between adjacent P-type impurities 301 in the vertical direction across the phase difference detection pixel 270. The pixel separation wall 351 is formed by the contact between the front surface trench 351A and the back surface trench 351B. Therefore, charge leakage between adjacent PDs 291 in the vertical direction across the phase difference detection pixel 270 can be prevented.

[0289] Furthermore, the front surface groove 352 (electrode groove) is formed so that the N-type impurities 312 to 315 and the P-type impurity 316 are sandwiched between the front surface groove 352 and the front surface groove 351A. Furthermore, a dummy front surface groove 353 is formed at a position symmetrical to the front surface groove 352 with respect to the pixel separation wall 311 closest to the front surface groove 352. Therefore, the size of each PD 291 can be made uniform.

[0290] That is, in the P-type impurity 301 having the front surface trench 352 formed therein, the PD 291 cannot be formed in the region of the front surface trench 352. Therefore, the size of the PD 291 formed in the P-type impurity 301 having the front surface trench 352 formed therein is smaller than the size of the PD 291 formed in the P-type impurity 301 having no front surface trench 352 formed therein.

[0291] Therefore, in Figure 32 and Figure 33 In the illustrated phase difference detection pixel 270, dummy front surface grooves 353 are formed in the P-type impurity 301 where the front surface grooves 352 are not formed, at positions corresponding to the front surface grooves 352. Therefore, the size of the PD 291 formed in each P-type impurity 301 is the same, regardless of the presence or absence of the front surface grooves 352. Furthermore, the PD 291 has a symmetrical shape.

[0292] Furthermore, since the PD 291 can be formed on the back side of the region where the front surface trench 352 or the front surface trench 353 is formed in the P-type impurity 301, the aperture ratio of the PD 291 is large, thereby improving sensitivity.

[0293] Eighth Configuration Example of Phase Difference Detection Pixel

[0294] Figure 34 and Figure 35 They are shown respectively Figure 15 FIG. 2 is a diagram showing an eighth configuration example of the phase difference detection pixel 270 .

[0295] exist Figure 34 and Figure 35 In the structure shown, Figure 32 and Figure 33 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0296] Figure 34 and Figure 35 The structure of the phase difference detection pixel 270 shown is similar to that of Figure 32 and Figure 33 The structure shown is different in that a front surface groove 371 is formed instead of the front surface groove 352 , and the front surface groove 353 is not formed.

[0297] Figure 34 Part A and Figure 34 Part B of FIG. 1 is a diagram showing the phase difference detection pixel 270 as viewed from the front surface side and the back surface side of the CMOS image sensor, respectively. Figure 35 Part A and Figure 35 Part B is along Figure 34 Cross-sectional views obtained along lines AA' and BB' of part A.

[0298] exist Figure 34 and Figure 35 In the phase difference detection pixel 270 shown, the front surface trench 371 (electrode trench) is formed so that the N-type impurities 312 to 315 and the P-type impurity 316 are sandwiched between the front surface trench 371 and the front surface trench 351A. The depth direction of the front surface trench 371 is sufficiently smaller than the length of the front surface trench 351A.

[0299] Therefore, even in the case where the front surface trench 371 is formed in the P-type impurity 301, the PD 291 can be formed in the entire region on the front surface side. Therefore, regardless of the presence or absence of the front surface trench 371, the size of the PD 291 formed in each P-type impurity 301 can be made the same. In addition, the size of the PD 291 can be made sufficiently large.

[0300] It should be noted that the front surface trench 371 can be formed by, for example, CION, STI, II separation, etc.

[0301] Ninth Configuration Example of Phase Difference Detection Pixel

[0302] Figure 36 To show Figure 15 FIG. 2 is a diagram showing a ninth configuration example of the phase difference detection pixel 270 .

[0303] exist Figure 36 In the structure shown, Figure 32 and Figure 33 The same components as shown are denoted by the same reference numerals, and duplicate descriptions are omitted as appropriate.

[0304] Figure 36 The structure of the phase difference detection pixel 270 shown is similar to that of Figure 32 and Figure 33 The structure shown is different in that the sizes of adjacent phase difference detection pixels 270 are different.

[0305] Figure 36 Part A of FIG. 1 is a diagram showing 3 (horizontal)×3 (vertical) phase difference detection pixels 270 as viewed from the front surface side of the CMOS image sensor. Figure 36 Part B is along Figure 36 The cross-sectional view is obtained along the line AA' in part A. It should be noted that Figure 36 In part A of FIG. 1 , the on-chip lens 232 formed on the back surface side is shown for convenience of explanation.

[0306] exist Figure 36 In the figure, the phase difference detection pixel 270 having the green color filter 231 includes the N-type impurities 312 to 315 and the P-type impurity 316 in the phase difference detection pixel 270 itself and in the phase difference detection pixels 270 having the blue or red color filters 231 adjacent to the phase difference detection pixel 270. Therefore, all the P-type impurities 301 constituting the phase difference detection pixel 270 having the green color filter 231 form the front surface groove 352, the N-type impurities 312 to 315, and the P-type impurity 316 of the phase difference detection pixel 270 or the phase difference detection pixels 270 adjacent to the phase difference detection pixel.

[0307] Therefore, in all the P-type impurities 301, no PD 291 is formed in the region of the front surface trench 352 on the front surface side, and the size of the PD 291 formed in each P-type impurity 301 is the same. In addition, the PD 291 has a symmetrical shape.

[0308] On the other hand, the phase difference detection pixel 270 having the blue or red color filter 231 does not include the N-type impurities 312 to 315 and the P-type impurity 316. Therefore, the front surface groove 352 is not formed in all the P-type impurities 301 constituting the phase difference detection pixel 270 having the blue or red color filter 231.

[0309] Therefore, the PD 291 can be formed over the entire region of the front surface side in all the P-type impurities 301, and the size of the PD 291 formed in each of the P-type impurities 301 is the same. In addition, the shape of the PD 291 has symmetry.

[0310] The size of the PD 291 of the phase difference detection pixel 270 having the green color filter 231 can be increased compared to the size of the PD 291 of the phase difference detection pixel 270 having the red or blue color filter 231 , and the sensitivity can be improved.

[0311] Therefore, for example, a color image with a wide dynamic range can be acquired by acquiring pixel signals with a high SN ratio only for a plurality of phase difference detection pixels 270 having high sensitivity and a green filter 231. Specifically, by combining luminance information with a wide dynamic range acquired from pixel signals with a large SN ratio of a phase difference detection pixel 270 having a green filter and color information acquired by processing color information of another phase difference detection pixel 270, a color image with a wide dynamic range can be acquired.

[0312] It should be pointed out that in Figure 36 In the illustrated example, although the color filter 231 and the on-chip lens 232 are formed in the region on the front surface corresponding to each phase difference detection pixel 270 , the sizes of the color filter 231 and the on-chip lens 232 may be the same in all phase difference detection pixels 270 .

[0313] The materials or structures of the front surface groove 111A (112A, 113A, 221A, 222A, 223A, 311A, 322, 323, 351A) and the back surface groove 111B (112B, 113B, 221B, 222B, 223B, 311B, 351B) constituting the above-mentioned pixel separation wall 111 (112, 113, 222, 223, 351) or the divided pixel separation wall 221 (311) may be the same or different.

[0314] In addition, the material or structure of the front surface grooves 111A (112A, 113A, 222A, 223A, 351A) and the back surface grooves 111B (112B, 113B, 222B, 223B, 351B) constituting the pixel separation wall 111 (112, 113, 222, 223, 351) can be the same as or different from the material or structure of the front surface grooves 221A (311A, 322, 323) and the back surface grooves 221B (311B) constituting the segmented pixel separation wall 221 (311). The material or structure can be determined by the incident angle of light, the size of the pixel 71 (phase difference detection pixel 190, 270), etc. For example, the materials of the back surface groove 223B and the back surface groove 311B can have different refractive indices, etc.

[0315] In addition, for example, Figure 37 As shown, the back trench 223B between the PDs 291 of adjacent phase difference detection pixels 270 having different color filters 231 can be formed of a metal 382. When the back trench 223B is formed of a conductor such as the metal 382 and an impurity-doped poly, an insulating film 381 such as an oxide film or a nitride film is formed between the conductor and the semiconductor substrate (P-type impurity 301) to prevent a short circuit. On the other hand, in the same phase difference detection pixel 270, the back trench 311B between the PDs 291 having the same color filter 231 can be formed of a material having high transmittance (such as an oxide film) in a thinner manner than the back trench 223B.

[0316] It should be pointed out that Figure 37 Part A is the phase difference detection pixel 270 along Figure 16 The cross-sectional view obtained by line E-E'. Figure 37Part B is a diagram viewed from the back side of the CMOS image sensor 180 .

[0317] Through Figure 37 By configuring back trench 223B and back trench 311B as shown, light obliquely incident and collected at the periphery of back trench 223B passes through P-type impurities 301 and is reflected by metal 382 in back trench 223B. This suppresses color mixing. Furthermore, light collected at the periphery of back trench 311B is not reflected by back trench 311B and enters PD 291. This suppresses sensitivity loss.

[0318] On the other hand, in the case where the back side trench 311B includes metal similar to the back side trench 223B, light collected on the periphery of the back side trench 311B is reflected by the back side trench 311B without entering the PD 291. Therefore, a loss in sensitivity may occur.

[0319] It should be noted that the width of the back surface trench 311B (the length in the horizontal direction relative to the semiconductor substrate) is sufficiently small relative to the wavelength of the incident light. When the width of the back surface trench 311B is sufficiently small relative to the incident light, light incident on the back surface trench 311B formed by an oxide film or the like having a refractive index different from that of silicon (Si), the material of the semiconductor substrate, is diffracted and split, and then incident on each PD 291. Therefore, sensitivity loss can be further suppressed.

[0320] In addition, the back side trench 223B may include a material having low transmittance, such as polysilicon other than metal.

[0321] Figure 38 It is an explanation Figure 37 FIG. 2 is a diagram illustrating a method for manufacturing the back side trench 223B and the back side trench 311B.

[0322] like Figure 38 As shown, in the first step, a resist pattern 391 is formed in the P-type impurity 210, and the P-type impurity 210 in the region corresponding to the back side trench 223B and the back side trench 311B is etched. Then, the resist pattern 391 is peeled off.

[0323] In the second step, a thin insulating film 392 such as an oxide film is formed in the P-type impurity 210. Here, as described above, the back side trench 311B is thinner than the back side trench 223B. That is, the width of the region corresponding to the back side trench 311B after etching is narrower than the width of the region corresponding to the back side trench 223B after etching. Therefore, although the region corresponding to the back side trench 311B after etching is filled with the insulating film 392, the region corresponding to the back side trench 223B after etching is not filled with the insulating film 392.

[0324] In the third step, a metal film (metal) 393 is formed on the insulating film 392. At this time, since the region corresponding to the back side trench 311B is filled with the insulating film 392, the metal film 393 is not buried in the region corresponding to the back side trench 311B. However, since the region corresponding to the back side trench 223B is not filled with the insulating film 392, the metal film 393 is also buried in this region.

[0325] In the fourth step, the excess metal film 393 is etched away, and the metal 382 of the back side trench 223B is formed. Thereafter, the excess oxide film 392 is etched away, and the insulating film 381 of the back side trench 223B and the back side trench 311B are formed.

[0326] As described above, since the back side trench 223B and the back side trench 311B have different widths, the materials of the back side trench 223B and the back side trench 311B can be made different simply by forming the metal film 393 after forming the oxide film 392. Therefore, a significant increase in the number of manufacturing steps due to the different materials of the back side trench 223B and the back side trench 311B can be suppressed.

[0327] It should be pointed out that although Figure 37 In the example shown, the back surface groove 223B (311B) contacts the front surface groove 223A (311A), but as Figure 39 As shown in the portion A of , it is not necessary to contact the front surface groove 223A (311A). Figure 39 As shown in part A, when the length of the back side groove 223B and the back side groove 311B in the direction perpendicular to the back side is short, manufacturing is easier and there is less damage to the semiconductor substrate. Figure 39 In the portion A, the front surface groove 223A and the front surface groove 311A ​​are not necessarily formed.

[0328] In addition, if Figure 39 As shown in part B, the front surface groove 223A and the front surface groove 311A ​​are not formed, and the lengths of the back surface groove 223B and the back surface groove 311B in the depth direction can be different. In this case, the separation performance of the back surface groove 223B and the back surface groove 311B can be made different.

[0329] In addition, if Figure 39 As shown in part C of FIG. , the front surface groove 311A ​​is not necessarily formed. In this case, the PDs 291 having the same color filter 231 in the same phase difference detection pixel 270 are not completely separated. In addition, not only the front surface groove 223A but also the front surface groove 331A is not necessarily formed.

[0330] In addition, if Figure 39 As shown in part D of FIG, the front surface groove 223A and the front surface groove 311A ​​are formed of metal. In this case, light transmitted through the oxide film of the back surface groove 223B (311B) is reflected by the front surface groove 223A (311A), and the loss of sensitivity is further suppressed.

[0331] It should be noted that when the front surface groove 111A (112A, 113A, 222A, 223A, 351A) and the back surface groove 111B (112B, 113B, 222B, 223B, 351B) are formed of materials with low transmittance such as metal-based materials and polysilicon, connection parts for fixing the potential are provided in the front surface groove 111A (112A, 113A, 222A, 223A, 351A) and the back surface groove 111B (112B, 113B, 222B, 223B, 351B).

[0332] In the second and third embodiments, the phase difference detection pixels 190 ( 270 ) are arranged in an array in the pixel region 181 . However, not only the phase difference detection pixels 190 ( 270 ) but also normal pixels may be arranged.

[0333] For example, Figure 40 As shown, the phase difference detection pixel 270 may be arranged only in the center of the pixel region 181, and the normal pixel 400 may be arranged in other regions. Figure 40 1 is a diagram showing an area of ​​3×3 pixels 400 or phase difference detection pixels 270 centered on the center of the pixel area 181 as viewed from the front surface side of the CMOS image sensor.

[0334] A PD is formed in a P-type impurity 401, which serves as a well in a normal pixel 400. The P-type impurity 401 is connected to a PD 403 formed of an N-type impurity via a gate electrode 402 of a transfer transistor. The PD 403 is connected to an N-type impurity 405 connected to a power supply electrode via a gate electrode 404 of a reset transistor, and is further connected to a gate electrode 406 of an amplifier transistor.

[0335] The N-type impurity 405 is connected to the N-type impurity 407 forming the drain of the selection transistor via the gate electrode 406 of the amplification transistor, and the N-type impurity 407 is connected to the N-type impurity 409 connected to the vertical signal line 183 via the gate electrode 408 of the selection transistor. In addition, in the pixel 400, a P-type impurity 410 connected to the well electrode is formed.

[0336] A pixel separation wall 411 is formed between vertically adjacent P-type impurities 401 in the pixel 400, sandwiching the FD 403, N-type impurity 405, N-type impurity 407, N-type impurity 409, and P-type impurity 410. Furthermore, a pixel separation wall 412 is formed between horizontally adjacent P-type impurities 401.

[0337] For example, the pixel separation wall 411 is configured in the same manner as the above-mentioned pixel separation wall 112 (222, 351), and the pixel separation wall 412 is configured in the same manner as the above-mentioned pixel separation wall 113 (223).

[0338] The phase difference detection pixel 270 is read out in units of PDs, and the other pixels 400 in the row of the phase difference detection pixel 270 are read out simultaneously. Therefore, when acquiring the pixel signal of the pixel 400, by performing image plane phase difference AF based on the pixel signal of each PD 291 and summing the pixel signals of all the PDs 291, the pixel signals of all the phase difference detection pixels 270 can be acquired.

[0339] It should be noted that the P-type impurity 210 and the P-type impurity 401 have the same size. Therefore, in the phase difference detection pixel 270, the P-type impurity 210 is divided into four regions, and the PD 291 is formed for each of the obtained regions. In the pixel 400, the PD is formed in the P-type impurity 210 as it is.

[0340] Therefore, the size of the entire PD 291 of the phase difference detection pixel 270 is smaller than the size of the PD of the pixel 400, and the saturation charge amount in the phase difference detection pixel 270 is smaller than the saturation charge amount in the pixel 400. Therefore, color mixing is more likely to occur in the phase difference detection pixel 270 than in the pixel 400, but color mixing can be prevented by the pixel separation wall 222 and the pixel separation wall 223.

[0341] Fourth Implementation Plan

[0342] Configuration example of an embodiment of an imaging device

[0343] Figure 41 : is a block diagram showing a configuration example of an embodiment of an imaging device as an electronic device to which the present disclosure is applied.

[0344] Figure 41The imaging device 1000 shown is a video camera, a digital camera, etc. The imaging device 1000 includes a lens group 1001, a solid-state imaging element 1002, a DSP circuit 1003, a frame memory 1004, a display unit 1005, a recording unit 1006, an operation unit 1007, and a power supply unit 1008. The DSP circuit 1003, the frame memory 1004, the display unit 1005, the recording unit 1006, the operation unit 1007, and the power supply unit 1008 are connected to each other via a bus 1009.

[0345] The lens group 1001 captures incident light (image light) from a subject and forms an image on the imaging surface of the solid-state imaging element 1002. The solid-state imaging element 1002 is formed by the first to third embodiments of the CMOS image sensor described above. The solid-state imaging element 1002 converts the amount of incident light formed on the imaging surface by the lens group 1001 into an electrical signal in pixel units and supplies this signal as a pixel signal to the DSP circuit 1003.

[0346] The DSP circuit 1003 performs predetermined image processing on the pixel signal supplied from the solid-state imaging element 1002 , supplies the image signal after the image processing to the frame memory 1004 in units of frames, and causes the frame memory 1004 to temporarily store the image signal.

[0347] The display unit 1005 is configured by a panel-type display device such as a liquid crystal panel and an organic electroluminescence (EL: Electro Luminescence) panel, and displays an image based on pixel signals in units of frames temporarily stored in the frame memory 1004 .

[0348] The recording unit 1006 is formed of a digital versatile disk (DVD), a flash memory, or the like, and reads and records the pixel signal in units of frames temporarily stored in the frame memory 1004 .

[0349] The operation unit 1007 outputs operation instructions for various functions of the imaging apparatus 1000 based on user operations. The power supply unit 1008 supplies power to the DSP circuit 1003, frame memory 1004, display unit 1005, recording unit 1006, and operation unit 1007 as appropriate.

[0350] The electronic device to which this technology is applicable only needs to be a device that uses a CMOS image sensor as an image capturing unit (photoelectric conversion unit), and in addition to the imaging device 1000, it can also be applied to a portable terminal device with an imaging function, a copier that uses a CMOS image sensor as an image reading unit, etc.

[0351] Examples of CMOS image sensors used

[0352] Figure 42 FIG. 1 is a diagram showing an example of use of the above-described CMOS image sensor.

[0353] The above-mentioned CMOS image sensor can be used in various situations in which light such as visible light, infrared light, ultraviolet light, X-rays, etc. is sensed.

[0354] Devices for capturing images to be viewed, such as digital cameras and mobile devices equipped with camera functions

[0355] Devices for traffic use, such as on-board cameras that capture images of the front, rear, surroundings, and interior of a car for safe driving, such as automatic stopping and driver identification, surveillance cameras that monitor moving vehicles and roads, and distance measurement sensors that measure the distance between vehicles.

[0356] Devices used in home appliances such as TVs, refrigerators, and air conditioners to capture user gestures and operate the device based on the gestures

[0357] Devices for medical and health care purposes, such as endoscopes and devices for angiography by receiving infrared light

[0358] Devices used for security purposes, such as surveillance cameras for crime prevention and cameras for personal authentication

[0359] Devices for cosmetic purposes, such as skin measurement instruments that take images of the skin and microscopes that take images of the scalp

[0360] Devices for sports use, such as action cameras and wearable cameras for sports use

[0361] Devices used for agricultural purposes, such as cameras for monitoring the status of fields and crops

[0362] It should be noted that the effects described here are merely examples and not limitative, and other effects may be provided.

[0363] In addition, the embodiments of the present disclosure are not limited to the above-described embodiments, and various modifications may be made without departing from the essence of the present disclosure.

[0364] For example, although the well is a P-type impurity in this specification, the well may be an N-type impurity.

[0365] In addition, the pixel separation walls 111 to 113 in the first embodiment may respectively have the same structure as the divided pixel separation wall 221 (311), the pixel separation wall 222 (351) and the pixel separation wall 223 in the second embodiment or the third embodiment.

[0366] It should be understood that the present technology can be configured as follows.

[0367] (1) A solid-state imaging element, comprising:

[0368] a plurality of pixels that photoelectrically convert light, the light being incident on each pixel from a back surface of the solid-state imaging element via a different lens for each pixel;

[0369] a pixel separation wall formed between adjacent pixels; and

[0370] a wiring layer provided on a front surface of the solid-state imaging element, wherein

[0371] The pixel separation wall includes a front surface groove which is a groove formed from the front surface and a back surface groove which is a groove formed from the back surface.

[0372] (2) The solid-state imaging element according to (1) above, wherein

[0373] At least a portion of the front surface groove and at least a portion of the back surface groove of the pixel separation wall are in contact with each other.

[0374] (3) The solid-state imaging element according to (1) or (2) above, wherein

[0375] Lengths of the front surface grooves and the back surface grooves in a direction perpendicular to the back surface differ depending on positions of the pixel separation walls including the corresponding front surface grooves and the corresponding back surface grooves.

[0376] (4) The solid-state imaging device according to any one of (1) to (3) above, wherein

[0377] A material of at least one of the front surface groove and the back surface groove is different depending on a position of the pixel separation wall including the corresponding front surface groove and the corresponding back surface groove.

[0378] (5) The solid-state imaging device according to any one of (1) to (4) above, wherein

[0379] The pixel separation wall between the pixels adjacent in a predetermined direction includes two front surface grooves and the back surface groove, the two front surface grooves clamp the well electrode, the pixels do not share a floating diffusion, and the position of the back surface groove on the back surface corresponds to the position of the well electrode.

[0380] (6) The solid-state imaging device according to any one of (1) to (4) above, wherein

[0381] The pixel separation wall between the pixels adjacent in a predetermined direction includes two front surface grooves and the back surface groove, the two front surface grooves clamp the power electrode, the pixels do not share a floating diffusion, and the position of the back surface groove on the back surface corresponds to the position of the power electrode.

[0382] (7) The solid-state imaging device according to any one of (1) to (4) above, wherein

[0383] The pixel separation wall between the pixels sharing a floating diffusion includes the front surface groove and the back surface groove, wherein the front surface groove is formed in an area on the front surface between the pixels in which no floating diffusion is formed, and the back surface groove is formed in the entire area on the back surface between the pixels, and the front surface groove and the back surface groove are in contact with each other.

[0384] (8) The solid-state imaging element according to (1) above, wherein

[0385] At least a portion of the plurality of pixels is divided into a plurality of divided pixels for each pixel, each of the divided pixels including: a photoelectric conversion element that photoelectrically converts light incident on each of the divided pixels from the back surface via the same lens; and

[0386] A split pixel separation wall is formed between adjacent split pixels. The split pixel separation wall includes a front surface groove that is a groove formed from the front surface and a back surface groove that is a groove formed from the back surface.

[0387] (9) The solid-state imaging element according to (8) above, wherein

[0388] The lengths of the front surface grooves and the back surface grooves in the direction perpendicular to the back surface differ depending on positions of the pixel separation walls or the segmented pixel separation walls including the corresponding front surface grooves and the corresponding back surface grooves.

[0389] (10) The solid-state imaging element according to (8) or (9) above, wherein

[0390] The back surface groove of the pixel isolation wall and the back surface groove of the partitioning pixel isolation wall have different lengths in a direction perpendicular to the back surface.

[0391] (11) The solid-state imaging device according to any one of (8) to (10) above, wherein

[0392] The material of at least one of the front surface groove and the back surface groove is different depending on the position of the pixel separation wall or the segmented pixel separation wall including the corresponding front surface groove and the corresponding back surface groove.

[0393] (12) The solid-state imaging device according to any one of (8) to (11) above, wherein

[0394] The pixel separation wall and the back surface groove dividing the pixel separation wall are made of different materials.

[0395] (13) The solid-state imaging device according to any one of (8) to (12) above, wherein

[0396] The front surface groove of the split pixel separation wall is formed only in a portion of the area on the front surface between adjacent split pixels, and the back surface groove is formed in the entire area on the back surface between adjacent split pixels.

[0397] The back surface groove and the front surface groove of the dividing pixel separation wall are in contact with each other, and

[0398] A floating diffusion is formed in a region on the front surface between adjacent divided pixels, in which region the front surface trench is not formed.

[0399] (14) The solid-state imaging device according to any one of (8) to (12) above, wherein

[0400] The front surface groove of the split pixel separation wall is formed in a region on the front surface between adjacent split pixels where no floating diffusion is formed, and the back surface groove is formed in the entire region on the back surface between adjacent split pixels.

[0401] A portion of the front surface groove of the dividing pixel separation wall and the back surface groove are in contact with each other, and

[0402] The length of the other portion of the front surface groove of the dividing pixel separation wall in a direction perpendicular to the rear surface is shorter than the length of the portion of the front surface groove.

[0403] (15) The solid-state imaging device according to any one of (8) to (14) above, wherein

[0404] The pixel separation wall between the pixels adjacent to each other in a predetermined direction includes two front surface grooves and two back surface grooves, the two front surface grooves sandwiching a power electrode, and the two back surface grooves contacting the corresponding front surface grooves.

[0405] (16) The solid-state imaging device according to any one of (8) to (14) above, further comprising:

[0406] an electrode groove which is a front surface groove formed so as to sandwich a power supply electrode between the front surface groove itself and the front surface groove of the pixel separation wall between the pixels adjacent in a predetermined direction; and

[0407] A dummy groove is a dummy front surface groove formed at a position symmetrical to the electrode groove relative to the pixel separation wall closest to the electrode groove, wherein

[0408] The front surface groove contacts the back surface groove to form the pixel separation wall.

[0409] (17) The solid-state imaging device according to any one of (8) to (16) above, wherein

[0410] The position of the dividing pixel separating wall in the pixel where the dividing pixel separating wall is formed differs depending on the position of the pixel.

[0411] (18) The solid-state imaging element according to (17) above, wherein

[0412] The position of the back surface groove of the pixel dividing wall in the pixel formed with the pixel dividing wall differs depending on the position of the pixel.

[0413] The positions of the front surface grooves of the dividing pixel separating walls in the pixels formed with the dividing pixel separating walls are the same regardless of the positions of the pixels, and

[0414] The photoelectric conversion element of the divided pixel has a size on the front surface side larger than a size on the back surface side.

[0415] (19) The solid-state imaging device according to any one of (8) to (14) above, further comprising:

[0416] The electrode groove is a front surface groove formed so as to sandwich a power supply electrode between the front surface groove itself and the front surface groove of the pixel separation wall between the pixels adjacent in a predetermined direction, wherein

[0417] One of the adjacent pixels includes the pixel itself and the electrode groove of another pixel, and

[0418] The front surface groove contacts the back surface groove to form the pixel separation wall.

[0419] (20) An electronic device, comprising:

[0420] A solid-state imaging element, comprising:

[0421] a plurality of pixels that photoelectrically convert light, the light being incident on each pixel from a back surface of the solid-state imaging element via a different lens for each pixel;

[0422] a pixel separation wall formed between adjacent pixels; and

[0423] a wiring layer provided on a front surface of the solid-state imaging element, wherein

[0424] The pixel separation wall includes a front surface groove which is a groove formed from the front surface and a back surface groove which is a groove formed from the back surface.

[0425] Reference Signs List

[0426] 50 CMOS image sensor

[0427] 71-1~71-4 pixels

[0428] 72 FD

[0429] 76 Power supply electrode

[0430] 77 Well Electrode

[0431] 111~113 pixel separation wall

[0432] 111A~113A front surface groove

[0433] 111B~113B back groove

[0434] 119 Wiring Layer

[0435] 122 On-chip lens

[0436] 180 CMOS image sensor

[0437] 190 phase difference detection pixels

[0438] 191-1, 191-2 split pixels

[0439] 192 FD

[0440] 197 Power Electrode

[0441] 198 well electrode

[0442] 201-1, 201-2 PD

[0443] 221 Split Pixel Separation Wall

[0444] 221A front surface groove

[0445] 221B back groove

[0446] 222, 223 pixel separation wall

[0447] 222A, 223A front surface groove

[0448] 222B, 223B back groove

[0449] 230 wiring layer

[0450] 232 On-chip lens

[0451] 271-1~271-4 pixels

[0452] 291-1~291-4 PD

[0453] 311 Split Pixel Separation Wall

[0454] 311A front surface groove

[0455] 311B backside groove

[0456] 322, 323 front surface grooves

[0457] 351 pixel separation wall

[0458] 351A front surface groove

[0459] 352 front surface groove

[0460] 352, 353 front surface grooves

Claims

1. A light detection device, comprising: a first photodiode and a second photodiode disposed on a semiconductor substrate; a divided pixel separation wall disposed in the semiconductor substrate and disposed between the first photodiode and the second photodiode; as well as an impurity disposed in the semiconductor substrate and disposed between the first photodiode and the second photodiode, The semiconductor substrate includes a first surface and a second surface opposite to the first surface. The pixel separation wall reaches the first surface and the second surface, and In the case where the charge stored in one of the first photodiode and the second photodiode overflows, the overflowed charge is configured to leak to the other of the first photodiode and the second photodiode through the impurities.

2. The light detecting device according to claim 1, wherein In the first cross-sectional view, the dividing pixel separation wall is arranged between the first photodiode and the second photodiode, and in the second cross-sectional view, the impurity is arranged between the first photodiode and the second photodiode.

3. The light detection device according to claim 1 or 2, further comprising an on-chip lens, wherein: The first photodiode and the second photodiode are configured to receive light through the on-chip lens.

4. The light detecting device according to claim 3, wherein The first photodiode, the second photodiode, and the on-chip lens are part of a phase difference detection pixel.

5. The light detecting device according to claim 1 or 2, further comprising a color filter arranged above the semiconductor substrate, wherein The first photodiode and the second photodiode are configured to receive light through the color filter.

6. An electronic device, comprising: lens; Digital signal processing circuit; as well as The light detecting device according to claim 1 or 2.

Images