Solid-state imaging device and electronic apparatus

Abstract

The present disclosure relates to a solid-state imaging device and an electronic apparatus that can prevent charge leakage into an adjacent pixel. A plurality of pixels photoelectrically convert light incident onto a back surface via different on-chip lenses for the respective pixels. A pixel separation wall is formed between adjacent pixels, and includes a front surface trench that is a trench formed on a front surface and a back surface trench that is a trench formed on a back surface. A wiring layer is provided on the front surface. The present disclosure is applicable to, for example, a backside illumination type CMOS image sensor.

Description

[0001] This application is a divisional application of patent application No. 201780001074.9 for which the application date is January 13, 2017, and the title of which is "Solid-state Imaging Element and Electronic Device". TECHNICAL FIELD

[0002] The present disclosure relates to a solid-state imaging element and an electronic device, and particularly, to a solid-state imaging element and an electronic device capable of preventing charge leakage between adjacent pixels. BACKGROUND

[0003] In the past, in electronic devices having an imaging function such as a digital camera and a digital video camera, a solid-state imaging element such as a charge coupled device (CCD: Charge Coupled Device) image sensor and a complementary metal oxide semiconductor (CMOS: Complementary Metal Oxide Semiconductor) image sensor has been used. The solid-state imaging element has a pixel in which a photodiode (photoelectric conversion element) for performing photoelectric conversion and a transistor are combined, and an image is created based on a pixel signal output from a plurality of pixels arranged in a plane.

[0004] For example, in the solid-state imaging element, charges accumulated in a photodiode (PD: photodiode) are transferred to a floating diffusion (FD: floating diffusion) portion having a predetermined capacitance provided at a connection portion between the PD and a gate electrode of an amplification transistor. Then, a pixel signal corresponding to the amount of charges accumulated in the FD portion is read from the pixel, and the pixel signal is AD-converted and output by an analog-digital (AD: Analog Digital) conversion circuit having a comparator.

[0005] In addition, in recent years, a technology of detecting a phase by using a part of pixels of a CMOS image sensor to improve an autofocusing (AF: autofocusing) speed (i.e., so-called image plane phase difference AF) has been popularized. An example of a system of the image plane phase difference AF includes a PD division system (for example, see Patent Literature 1). In the PD division system, a PD of a pixel is divided into a plurality of parts, phase information is generated based on pixel signals acquired by the divided respective PDs, and distance measurement is performed based on the phase information.

[0006] LIST OF CITATIONS

[0007] PATENT LITERATURE

[0008] Patent Literature 1: Japanese Patent Application Laid-Open No. 2000-292685 SUMMARY

[0009] Technical Problem

[0010] On the other hand, when strong light is incident into a pixel, in some cases, a phenomenon called blooming in which electric charges accumulated in the PD of the pixel saturate, overflow, and leak into an adjacent pixel occurs. When blooming leakage occurs, the amount of electric charges corresponding to a pixel signal read from an adjacent pixel is greater than the original amount of electric charges, which causes deterioration of imaging characteristics.

[0011] The present disclosure is accomplished in view of the above circumstances to prevent leakage of electric charges between adjacent pixels.

[0012] Technical Solution

[0013] The solid-state imaging device according to a first aspect of the present disclosure is a solid-state imaging device including: a plurality of pixels that photoelectrically convert light incident into each pixel from a back surface of the solid-state imaging device via a different lens for each pixel; a pixel separation wall formed between adjacent ones of the pixels; and a wiring layer provided on a front surface of the solid-state imaging device, wherein the pixel separation wall includes a front surface trench that is a trench formed from the front surface and a back surface trench that is a trench formed from the back surface.

[0014] In the first aspect of the present disclosure, there are provided: a plurality of pixels that photoelectrically convert light incident into each pixel from a back surface of the solid-state imaging device via a different lens for each pixel; a pixel separation wall formed between adjacent ones of the pixels; and a wiring layer provided on a front surface of the solid-state imaging device, wherein the pixel separation wall includes a front surface trench that is a trench formed from the front surface and a back surface trench that is a trench formed from the back surface.

[0015] The electronic device according to a second aspect of the present disclosure is an electronic device including a solid-state imaging device including: a plurality of pixels that photoelectrically convert light incident into each pixel from a back surface of the solid-state imaging device via a different lens for each pixel; a pixel separation wall formed between adjacent ones of the pixels; and a wiring layer provided on a front surface of the solid-state imaging device, wherein the pixel separation wall includes a front surface trench that is a trench formed from the front surface and a back surface trench that is a trench formed from the back surface.

[0016] In a second aspect of the present disclosure, there is provided a solid-state imaging device having the following features, the solid-state imaging device including: a plurality of pixels that photoelectrically convert light incident into each pixel from a back surface of the solid-state imaging device via a different lens for each pixel; a pixel separation wall formed between adjacent pixels; and a wiring layer provided on a front surface of the solid-state imaging device, wherein the pixel separation wall includes a front surface trench that is a trench formed from the front surface and a back surface trench that is a trench formed from the back surface.

[0017] Advantageous Effects

[0018] According to the first and second aspects of the present disclosure, an image can be captured. In addition, according to the first and second aspects of the present disclosure, charge leakage between adjacent pixels can be prevented.

[0019] Note that the effects described here are not necessarily limiting and can be any effect described in the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 is a block diagram illustrating a configuration example of a first embodiment of a CMOS image sensor as a solid-state imaging device to which the present disclosure is applied.

[0021] Figure 2 is a circuit configuration example of a pixel group configured in the pixel region illustrated in Figure 1

[0022] Figure 3 is a view illustrating a first structure example of the pixel group illustrated in Figure 2

[0023] Figure 4 is a cross-sectional view taken along the line A-A', the line B-B', and the line C-C' of Figure 3

[0024] Figure 5 is a view illustrating a flow of charge when charge accumulated in the PD illustrated in Figure 2

[0025] Figure 6 is a view illustrating a second structure example of the pixel group illustrated in Figure 2

[0026] Figure 7 is a block diagram illustrating a configuration example of a second embodiment of a CMOS image sensor as a solid-state imaging device to which the present disclosure is applied.

[0027] Figure 8 ​​​​​is a diagram showing a circuit configuration example of a phase difference detection pixel configured in the pixel region shown in Figure 7

[0028] Figure 9 is a diagram showing a structure example of the phase difference detection pixel shown in Figure 8

[0029] Figure 10 are cross-sectional views taken along the line A-A', the line B-B', and the line C-C' of Figure 9

[0030] Figure 11 are cross-sectional views taken along the line D-D' and the line E-E' of Figure 9

[0031] Figure 12 is a diagram illustrating the operation of the CMOS image sensor shown in Figure 7

[0032] Figure 13 is a diagram illustrating the operation of the CMOS image sensor shown in Figure 7

[0033] Figure 14 is a diagram illustrating the operation of the CMOS image sensor shown in Figure 7

[0034] Figure 15 is a diagram showing a circuit configuration example of a phase difference detection pixel of a third embodiment of the CMOS image sensor to which the present disclosure is applied.

[0035] Figure 16 is a diagram showing a first structure example of the phase difference detection pixel 270 as viewed from the front surface side of the CMOS image sensor.

[0036] Figure 17 are cross-sectional views taken along the line A-A' and the line B-B' of Figure 16

[0037] Figure 18 are cross-sectional views taken along the line C-C' and the line D-D' of Figure 16

[0038] Figure 19 is a diagram illustrating the operation of the third embodiment of the CMOS image sensor.

[0039] Figure 20 is a diagram illustrating the operation of the third embodiment of the CMOS image sensor.

[0040] Figure 21 ​​​​​​​​​is a diagram illustrating the operation of the third embodiment of the CMOS image sensor.

[0041] Figure 22 is a diagram illustrating the operation of the third embodiment of the CMOS image sensor.

[0042] Figure 23 is Figure 15 is a sectional view taken along the line B-B' and the line C-C' of the phase difference detection pixel shown in Figure 16

[0043] Figure 24 is Figure 15 is a sectional view taken along the line E-E' of the phase difference detection pixel shown in Figure 16

[0044] Figure 25 is a sectional view taken along the line E-E' of the fourth structure example of the phase difference detection pixel at the angle-of-view end portion of the third embodiment of the CMOS image sensor. Figure 16

[0045] Figure 26 is a diagram illustrating the manufacturing method of the PD of the phase difference detection pixel shown in Figure 25

[0046] Figure 27 is a sectional view taken along the line E-E' of the fifth structure example of the phase difference detection pixel at the angle-of-view end portion of the CMOS image sensor to which the present disclosure is applied. Figure 16

[0047] Figure 28 is a diagram illustrating the manufacturing method of the PD of the phase difference detection pixel shown in Figure 27

[0048] Figure 29 is a diagram illustrating the manufacturing method of the PD of the phase difference detection pixel shown in Figure 27

[0049] Figure 30 is a diagram illustrating the sixth structure example of the phase difference detection pixel shown in Figure 15

[0050] Figure 31 is a diagram illustrating the sixth structure example of the phase difference detection pixel shown in Figure 15

[0051] Figure 32 is a diagram illustrating the seventh structure example of the phase difference detection pixel shown in Figure 15

[0052] Figure 33 ​​​​​​​​​​is a view showing Figure 15 is a view showing a seventh structure example of the phase difference detection pixel.

[0053] Figure 34 is a view showing Figure 15 is a view showing an eighth structure example of the phase difference detection pixel.

[0054] Figure 35 is a view showing Figure 15 is a view showing an eighth structure example of the phase difference detection pixel.

[0055] Figure 36 is a view showing Figure 15 is a view showing a ninth structure example of the phase difference detection pixel.

[0056] Figure 37 is a view showing another structure example of the phase difference detection pixel.

[0057] Figure 38 is a view showing Figure 37 is a view showing a manufacturing method of the backside trench.

[0058] Figure 39 is a view showing Figure 37 is a view showing another structure example of the backside trench.

[0059] Figure 40 is a view showing another configuration example of the pixel region as viewed from the front surface side of the CMOS image sensor.

[0060] Figure 41 is a block diagram showing a configuration example of an imaging device as an electronic device to which the present disclosure is applied.

[0061] Figure 42 is a view showing a use example using the above-described CMOS image sensor. DETAILED DESCRIPTION

[0062] Hereinafter, a scheme for implementing the present disclosure (hereinafter referred to as "embodiment") will be described. Note that the description will be given in the following order.

[0063] 1. First Embodiment: CMOS Image Sensor Figures 1-6 )

[0064] 2. Second Embodiment: CMOS Image Sensor Figures 7-14 )

[0065] 3. Third Embodiment: CMOS Image Sensor Figures 15-40 )

[0066] 4. Fourth Embodiment: Imaging Device Figure 41 )

[0067] 5. Usage example of CMOS image sensor Figure 42 )

[0068] First embodiment

[0069] Configuration example of first embodiment of CMOS image sensor

[0070] Figure 1 is a block diagram illustrating a configuration example of the first embodiment of the CMOS image sensor as a solid-state imaging device to which the present disclosure is applicable.

[0071] The CMOS image sensor 50 includes a pixel region 51, a pixel drive line 52, a vertical signal line 53, a vertical drive section 54, a column processing section 55, a horizontal drive section 56, a system control section 57, a signal processing section 58, and a storage section 59, which are formed on a semiconductor substrate (chip) such as a silicon substrate (not shown). The CMOS image sensor 50 is a back-illuminated CMOS image sensor in which an irradiation surface of light is a back surface opposite to a front surface on which a wiring layer is provided.

[0072] On the pixel region 51 of the CMOS image sensor 50, a plurality of pixels each having a PD for photoelectrically converting light incident from the back surface and accumulating electric charges are two-dimensionally arranged in an array, and image capturing is performed. An array of color filters of each pixel of the pixel region 51 is a Bayer array. In addition, in the pixel region 51, the pixel drive line 52 is formed for every two rows of pixels, and the vertical signal line 53 is formed for every two columns of pixels.

[0073] The vertical drive section 54 includes a shift register, an address decoder, and the like, and supplies a drive signal to the pixel drive line 52, thereby sequentially reading a pixel signal corresponding to the electric charges accumulated in the PD of each pixel of the pixel region 51 in units of rows from the top in the order of odd-numbered columns and even-numbered columns.

[0074] The column processing section 55 includes a signal processing circuit for every two columns of pixels of the pixel region 51. Each signal processing circuit of the column processing section 55 performs signal processing such as A / D conversion processing and Correlated Double Sampling (CDS) processing on a pixel signal read from a pixel and supplied via the vertical signal line 53. The column processing section 55 temporarily holds the pixel signal after the signal processing.

[0075] The horizontal drive section 56 includes a shift register, an address decoder, and the like, and sequentially selects the signal processing circuits of the column processing section 55. Thus, the pixel signal processed in each signal processing circuit of the column processing section 55 is sequentially output to the signal processing section 58.

[0076] The system control section 57 includes a timing generator that generates various timing signals and the like, and controls the vertical drive section 54, the column processing section 55, and the horizontal drive section 56 on the basis of the various timing signals generated by the timing generator.

[0077] The signal processing section 58 performs various signal processing on the pixel signal output from the column processing section 55. At this time, the signal processing section 58 stores an intermediate result of the signal processing or the like in the storage section 59 as necessary, and refers to the result at the necessary timing. The signal processing section 58 outputs the pixel signal after the signal processing.

[0078] The storage section 59 includes a dynamic random access memory (DRAM), a static random access memory (SRAM), or the like.

[0079] Circuit configuration example of pixel group

[0080] Figure 2 is a view showing a circuit configuration example of a pixel group consisting of 2 (horizontal) x 2 (vertical) pixels among the pixels arranged in the pixel region 51. Figure 1 is a view showing a circuit configuration example of a pixel group consisting of 2 (horizontal) x 2 (vertical) pixels among the pixels arranged in the pixel region 51.

[0081] In Figure 1 In the pixel region 51 shown in Figure 2 The pixel groups 70 shown in

[0082] Each of the pixels 71-1 to 71-4 includes a PD and a transfer transistor. Specifically, the pixel 71-1 includes a PD 91-1 and a transfer transistor 92-1, and the pixel 71-2 includes a PD 91-2 and a transfer transistor 92-2. In addition, the pixel 71-3 includes a PD 91-3 and a transfer transistor 92-3, and the pixel 71-4 includes a PD 91-4 and a transfer transistor 92-4.

[0083] Note that, in the following description, when it is not necessary to particularly distinguish the pixels 71-1 to 71-4, they will be collectively referred to as the pixel 71. Similarly, the PDs 91-1 to 91-4 will be collectively referred to as the PD 91, and the transfer transistors 92-1 to 92-4 will be collectively referred to as the transfer transistor 92.

[0084] The PD 91 of the pixel 71 generates and accumulates electric charges corresponding to the light quantity of light incident from the back surface of the CMOS image sensor 50 and received thereby. The anode terminal of the PD 91 is connected to the well electrode 77 of which the potential is VSS (e.g., GND), and the cathode terminal of the PD 91 is connected to the FD 72 via the transfer transistor 92.

[0085] The gate electrode 92-1A of the transfer transistor 92-1 is connected to the line TG1 formed of the pixels 71 in the odd-numbered column for the row of the pixels 71-1 (71-2) among the pixel drive lines 52 corresponding to the two rows of the pixels 71 constituting the pixel group 70. In addition, the gate electrode 92-2A of the transfer transistor 92-2 is connected to the line TG2 formed of the pixels 71 in the even-numbered column for the row of the pixels 71-1 (71-2) among the pixel drive lines 52 corresponding to the two rows of the pixels 71 constituting the pixel group 70.

[0086] In addition, the gate electrode 92-3A of the transfer transistor 92-3 is connected to the line TG3 formed of the pixels 71 in the odd-numbered column for the row of the pixels 71-3 (71-4) among the pixel drive lines 52 corresponding to the two rows of the pixels 71 constituting the pixel group 70. In addition, the gate electrode 92-4A of the transfer transistor 92-4 is connected to the line TG4 formed of the pixels 71 in the even-numbered column for the row of the pixels 71-3 (71-4) among the pixel drive lines 52 corresponding to the two rows of the pixels 71 constituting the pixel group 70. Note that, in the following description, when it is not necessary to particularly distinguish the gate electrodes 92-1A to 92-4A, they will be collectively referred to as the gate electrode 92A.

[0087] From Figure 1 The vertical drive section 54 illustrated in FIG. 6 supplies the transfer signals as drive signals to the lines TG1 to TG4. The vertical drive section 54 sequentially turns on the transfer signals of the lines TG1 to TG4 in accordance with the row of the pixel 71 from which the pixel signal is to be read and the odd-numbered column or the even-numbered column. Upon turning on the transfer signal input to the gate electrode 92A, the transfer transistor 92 transfers the electric charges accumulated in the PD 91 to the FD 72.

[0088] The FD 72 holds the electric charges read from the PD 91. The FD 72 is connected to the power supply electrode 76 of which the potential is VDD via the reset transistor 73.

[0089] In addition, the gate electrode 73A of the reset transistor 73 is connected to the line RST1 formed of the pixels 71 in the two rows of the pixels 71 among the pixel drive lines 52 corresponding to the two rows of the pixels 71 constituting the pixel group 70. The reset signal as a drive signal is supplied to the line RST1 from the vertical drive section 54. The vertical drive section 54 turns on the reset signal before newly turning on the transfer signal.

[0090] When a reset signal is input to the gate electrode 73A, the reset transistor 73 discharges the charge transferred to FD 72 to the power supply electrode 76 and resets the potential of FD 72.

[0091] Between the power supply electrode 76 and the vertical signal line 53, an amplifying transistor 74 and a selecting transistor 75 are connected in series. The gate electrode 74A of the amplifying transistor 74 is connected to the FD 72, and the amplifying transistor 74 outputs a pixel signal corresponding to the potential of the FD 72 to the selecting transistor 75 via the power supply electrode 76.

[0092] The gate electrode 75A of the selection transistor 75 is connected to line SEL1 formed in the pixel drive line 52 corresponding to the two rows of pixels 71 constituting the pixel group 70 for the pixels 71 in these two rows. A selection signal as a drive signal is provided to line SEL1 from the vertical drive unit 54. The vertical drive unit 54 turns on the selection signal after turning on the transmission signal and before turning on the reset signal.

[0093] When the selection signal input to the gate electrode 75A is turned on, the selection transistor 75 will select the pixel signal input from the amplification transistor 74 via... Figure 1 The vertical signal line 53 shown is provided to the column processing unit 55.

[0094] As described above, in the CMOS image sensor 50, the 2×2 pixels 71 constituting the pixel group 70 share a single FD 72, and the charge stored in the PD 91 of the pixel 71 is sequentially transferred from top to FD 72 in row-by-row order according to the odd and even columns.

[0095] First structural example of a pixel group

[0096] Figure 3 It shows Figure 2 The first structural example of the pixel group 70 shown is as observed from the front surface side of the CMOS image sensor 50. Figure 4 It is along Figure 3 The cross-sectional views obtained from lines A-A', B-B', and C-C'.

[0097] like Figure 3 As shown, with respect to P-type impurity 101-2 in the horizontal direction ( Figure 3 Aligned with the left and right directions in the middle and with P-type impurity 101-3 in the vertical direction ( Figure 3The P-type impurity 101-1 is arranged in alignment with the P-type impurity 101-3 in the horizontal direction and with the P-type impurity 101-2 in the vertical direction, in which the PD 91-4 is formed in the P-type impurity 101-4. Note that, in the following description, when it is not necessary to particularly distinguish the P-type impurities 101-1 to 101-4, they will be collectively referred to as the P-type impurity 101.

[0098] As shown in FIG. 1, the pixel separation wall 111 is formed between the adjacent P-type impurities 101 in the same pixel group 70. The pixel separation wall 111 is formed by the contact between a front surface trench 111A that is a trench formed from the front surface of the CMOS image sensor 50 and a back surface trench 111B that is a trench formed from the back surface. Note that, in the region between the adjacent P-type impurities 101 in the same pixel group 70 on the front surface of the CMOS image sensor 50, the front surface trench 111A is not formed in the region in which the FD 72 is not formed in the central region of the P-type impurities 101-1 to 101-4 in which the FD 72 is formed. Figure 4

[0099] That is, the pixel separation wall 111 is formed by the contact between the front surface trench 111A that is formed in the region in which the FD 72 is not formed in the region on the front surface between the adjacent P-type impurities 101 in the same pixel group 70 and the back surface trench 111B that is formed in the entire region of the back surface between the P-type impurities 101.

[0100] In addition, the pixel separation wall 112 is formed between the P-type impurities 101 adjacent to each other in the vertical direction across the pixel group 70, and the pixel separation wall 113 is formed between the P-type impurities 101 adjacent to each other in the horizontal direction.

[0101] The pixel separation wall 112 includes two front surface trenches 112A and a back surface trench 112B that sandwich the N-type impurities 114 to 117 and the P-type impurity 118. The back surface trench 112B is formed at a position corresponding to the N-type impurities 114 to 117 and the P-type impurity 118 and different from the positions of the two front surface trenches 112A.

[0102] ​The N-type impurity 114 is connected to the FD 72 and constitutes the source of the reset transistor 73. The N-type impurity 115 is connected to the power supply electrode 76 and constitutes the drain of the reset transistor 73 and the amplification transistor 74. The N-type impurity 116 constitutes the source of the amplification transistor 74 and the drain of the selection transistor 75. The N-type impurity 117 is connected to the vertical signal line 53 and constitutes the source of the selection transistor 75. The P-type impurity 118 is a well connected to the well electrode 77.

[0103] The gate electrode 92A, the gate electrode 73A, and the gate electrode 75A are connected to the pixel drive line 52 provided in a wiring layer 119 formed on the front surface of the CMOS image sensor 50. The FD 72 is connected to the gate electrode 74A.

[0104] Further, on the back surface side of each P-type impurity 101, a red (R), green (G), and blue (B) color filter 121 corresponding to the pixel 71 is formed, and on the outer side of each color filter 121, an on-chip lens 122 is formed. The PD 91 photoelectrically converts light incident from the back surface of the CMOS image sensor 50 via the on-chip lens 122 and the color filter 121.

[0105] As described above, since in the pixel separation wall 111, the front surface trench 111A and the back surface trench 111B contact each other in the region other than the FD 72, in the region other than the FD 72, each PD 91 in the same pixel group 70 is completely electrically cut off. Further, since in the pixel separation wall 113, the front surface trench 113A and the back surface trench 113B contact each other, PD 91s across the pixel groups 70 adjacent to each other are also completely electrically cut off.

[0106] On the other hand, in the pixel separation wall 112, the positions of the front surface trench 112A and the back surface trench 112B are different, and the front surface trench 112A and the back surface trench 112B do not contact each other. Therefore, the PD 91 is not completely electrically cut off from the N-type impurities 114 to 117 and the P-type impurity 118.

[0107] Note that the length in the depth direction perpendicular to the back surface of the front surface trench 111A (112A, 113A) and the back surface trench 111B (112B, 113B) can be different depending on the position of the pixel separation wall 111 (112, 113). Further, the material of at least one of the front surface trench 111A (112A, 113A) and the back surface trench 111B (112B, 113B) can be different depending on the position of the pixel separation wall 111 (112, 113).

[0108] Further, one on-chip lens 122 can be provided for each pixel group 70.

[0109] Explanation of flow of overflow charge

[0110] Figure 5 It is a diagram illustrating the flow of charge when the charge accumulated in PD 91 overflows.

[0111] Figure 5 Part A is a diagram showing the pixel group 70 as viewed from the front surface side when the charge accumulated in PD 91 overflows. Figure 5 Part B is along Figure 5 The cross-sectional view obtained from line C-C' of part A.

[0112] As described above, since each PD 91 is completely electrically disconnected in the region other than FD 72, in the event of charge overflow, the charge accumulated in PD 91 can be prevented from leaking from PD 91 to another adjacent PD 91.

[0113] On the other hand, in the region of FD 72 of pixel separation wall 111, the front surface trench 111A is not formed. Therefore, in the event of charge overflow in PD 91, the overflowed charge will pass through Figure 5 Part B, shown by path W1, leaks into FD 72 via P-type impurity 101. However, since FD 72 is reset before transferring charge from PD 91, the effect of charge leakage from PD 91 to FD 72 on imaging characteristics is small.

[0114] Furthermore, as described above, since the front surface trench 112A and the back surface trench 112B in the pixel separation wall 112 are not in contact with each other, the PD 91 is not completely electrically cut off from the N-type impurities 114-117 and the P-type impurities 118. Therefore, in the event of charge overflow in the PD 91, the overflowed charge can also be discharged through... Figure 5 Part B, shown by path W2, discharges to power electrode 76 via N-type impurity 115.

[0115] Therefore, even if the amount of charge overflowing from PD 91 is greater than the amount of charge that can be stored in FD 72, charge leakage to adjacent PD 91 can be prevented by discharging the charge to power supply electrode 76. Thus, degradation of imaging characteristics due to charge leakage to adjacent PD 91 can be prevented.

[0116] On the other hand, in the absence of path W2, the charge accumulated in FD 72 needs to be cleared by turning on a reset signal before the amount of charge overflowing from PD 91 exceeds the amount of charge that can be accumulated in FD 72. Therefore, the processing of the vertical drive unit 54 becomes complicated.

[0117] Note that the charge leaks in the path W1 without a physical barrier, and in the path W2 through a gap between physical barriers formed by the front surface trench 112A and the back surface trench 112B. Thus, the leak in the path W1 is preferentially performed compared to the leak in the path W2.

[0118] As described above, in the CMOS image sensor 50, the pixel separation wall 111 (112, 113) is formed by the front surface trench 111A (112A, 113A) and the back surface trench 111B (112B, 113B).

[0119] Thus, by bringing the front surface trench 113A and the back surface trench 113B of the pixel separation wall 113 into contact with each other, the pixel separation wall 113 can be made to penetrate the CMOS image sensor 50. The aspect ratio of the depth and the width of the front surface trench 113A and the back surface trench 113B is smaller than that of the through trench that penetrates from one of the front surface and the back surface of the CMOS image sensor 50. Thus, the formation of the pixel separation wall 113 is easier compared to the case where the pixel separation wall is formed by the through trench.

[0120] In addition, by controlling the presence / absence and the position of the front surface trench 111A to 113A by forming a mask pattern, which is a general semiconductor process, the intentional leak and the cut-off of the charge can be easily achieved.

[0121] In addition, the compatibility with a general CMOS image sensor in which a trench for device isolation such as a shallow trench isolation (STI) is formed on the front surface side can be improved. Thus, for example, in the case where the present technology is applied to a CMOS image sensor in which a trench for device isolation such as an STI is formed on the front surface side, the trench can be used as at least one of the front surface trenches 111A to 113A. Thus, an increase in the number of manufacturing steps due to the formation of the pixel separation walls 111 to 113 can be suppressed.

[0122] Second example of the structure of a pixel group

[0123] Figure 6 is a diagram showing a second example of the structure of a 2x2 pixel group 70. Figure 6 Part A of is a diagram showing a second example of the structure of a 2x2 pixel group 70 as viewed from the front surface side of the CMOS image sensor 50, Figure 6 Part B of is a diagram as viewed from the back surface side. Figure 6 Part C of is a diagram along Figure 6The cross-sectional view obtained by line D-D' of part A. It should be noted that, unless otherwise stated, the color filter 231 and on-chip lens 232 are not shown in the figure below, which is viewed from the back side of the CMOS image sensor.

[0124] exist Figure 6 In the configuration shown, with Figure 3 and Figure 4 The same configurations are indicated by the same reference numerals. Repetitive descriptions are omitted where appropriate.

[0125] Figure 6 The structure of pixel group 70 shown is similar to Figure 3 and Figure 4 The difference in the structure shown is that the P-type impurity 118 is located at the intersection of the 2×2 pixel group 70.

[0126] like Figure 6 As shown in part C, the two front surface trenches 112A of the pixel separation wall 112 are formed in a manner that clamps the P-type impurity 118, and the back surface trench 112B is formed at a position corresponding to the P-type impurity 118. Specifically, the front surface trenches 112A and the back surface trenches 112B are not in contact with each other. Therefore, the potential of the peripheral P-type impurity 101 can be simultaneously fixed as the potential of the well electrode 77 via a P-type impurity 118.

[0127] On the other hand, when the front surface trench 112A and the back surface trench 112B of the pixel separation wall 112 are in contact with each other, P-type impurities 118 need to be formed for each pixel 71. Therefore, the area that can be allocated to the PD 91, the transmission transistor 92, the reset transistor 73, the amplification transistor 74, the selection transistor 75, etc. will be reduced, which will lead to the degradation of imaging characteristics.

[0128] In addition, Figure 6 In the example, such as Figure 6 As shown in part A, since the P-type impurity 118 is located at the intersection of the 2×2 pixel group 70, the path W2 from PD 91 to N-type impurity 115 ( Figure 5 Charge leakage is prone to occur in ( ).

[0129] Second Implementation Plan

[0130] Configuration example of a second embodiment of a CMOS image sensor

[0131] Figure 7 This is a block diagram illustrating a configuration example of a second embodiment of a CMOS image sensor that serves as a solid-state imaging element to which this disclosure applies.

[0132] exist Figure 7 In the configuration shown, with Figure 1The same components are denoted by the same reference numerals. Repetitive explanation is appropriately omitted.

[0133] The CMOS image sensor 180 is a back-illuminated CMOS image sensor in which a pixel region 181, a pixel drive line 182, a vertical signal line 183, a vertical drive section 184, a column processing section 185, a horizontal drive section 56, a system control section 57, a signal processing section 188, and a storage section 59 are formed on a semiconductor substrate (not shown) such as a silicon substrate.

[0134] A plurality of phase difference detection pixels each having two PDs for photoelectrically converting light incident from the back and accumulating electric charges are two-dimensionally arranged in an array on the pixel region 181 of the CMOS image sensor 180, and image capturing is performed. The array of color filters of each phase difference detection pixel of the pixel region 181 is a Bayer array. In addition, in the pixel region 181, the pixel drive line 182 is formed for each row of phase difference detection pixels, and the vertical signal line 183 is formed for each column of phase difference detection pixels.

[0135] The vertical drive section 184 includes a shift register, an address decoder, and the like, and supplies a drive signal to the pixel drive line 182, thereby sequentially reading a pixel signal corresponding to the electric charges accumulated in the two PDs of each phase difference detection pixel of the pixel region 181 in units of rows from the top.

[0136] The column processing section 185 includes a signal processing circuit for each column of phase difference detection pixels of the pixel region 181. Each signal processing circuit of the column processing section 185 performs signal processing such as A / D conversion processing and correlated double sampling (CDS) processing on a pixel signal read from a phase difference detection pixel and supplied via the vertical signal line 183. The column processing section 185 temporarily holds the pixel signal after signal processing.

[0137] The signal processing section 188 performs image plane phase difference AF and the like based on the pixel signals of the two PDs of each phase difference detection pixel output from the column processing section 185 by selecting the horizontal drive section 56. At this time, the signal processing section 188 stores an intermediate result of processing and the like in the storage section 59 as necessary, and refers to the result at a necessary timing. The signal processing section 188 outputs a processing result and the like.

[0138] Circuit configuration example of phase difference detection pixel

[0139] Figure 8 is a diagram showing a circuit configuration example of a phase difference detection pixel arranged in the pixel region 181 shown in Figure 7 is a diagram showing a circuit configuration example of a phase difference detection pixel arranged in the pixel region 181 shown in

[0140] The phase difference detection pixel 190 includes split pixels 191-1 to 191-2, an FD 192, a reset transistor 193, an amplification transistor 194, a selection transistor 195, a power supply electrode 197, and a well electrode 198.

[0141] The split pixel 191-1 includes a PD 201-1 and a transfer transistor 202-1, and the split pixel 191-2 includes a PD 201-2 and a transfer transistor 202-2.

[0142] Note that, in the following description, when it is not necessary to particularly distinguish between the split pixel 191-1 and the split pixel 191-2, they will be collectively referred to as the split pixel 191. Also, the PD 201-1 and the PD 201-2 will be collectively referred to as the PD 201, and the transfer transistor 202-1 and the transfer transistor 202-2 will be collectively referred to as the transfer transistor 202.

[0143] The PD 201 of the split pixel 191 generates and accumulates electric charges corresponding to the amount of light incident from the back surface of the CMOS image sensor 180 and received thereby. The anode terminal of the PD 201 is connected to the well electrode 198 having a potential of VSS (e.g., GND), and the cathode terminal of the PD 201 is connected to the FD 192 via the transfer transistor 202.

[0144] The gate electrode 202-1A of the transfer transistor 202-1 is connected to a line TG11 formed in the pixel drive line 182 corresponding to the row of the phase difference detection pixel 190 for one split pixel 191-1 constituting the phase difference detection pixel 190. Also, the gate electrode 202-2A of the transfer transistor 202-2 is connected to a line TG12 formed in the pixel drive line 182 corresponding to the row of the phase difference detection pixel 190 for another split pixel 191-2 constituting the phase difference detection pixel 190. Note that, in the following description, when it is not necessary to particularly distinguish between the gate electrode 202-1A and the gate electrode 202-2A, they will be collectively referred to as the gate electrode 202A.

[0145] A transfer signal is supplied as a drive signal from the vertical drive section 184 to the lines TG11 and TG12. The vertical drive section 184 sequentially turns on the transfer signals of the lines TG11 and TG12 in the row of the phase difference detection pixel 190 from which a pixel signal is to be read. Upon turning on the transfer signal input to the gate electrode 202A, the transfer transistor 202 transfers the electric charges accumulated in the PD 201 to the FD 192.

[0146] The FD 192 holds the electric charges read from the PD 201. The FD 192 is connected to the power supply electrode 197 having a potential of VDD via the reset transistor 193.

[0147] The gate electrode 193A of the reset transistor 193 is connected to a line RST2 formed in the pixel driving line 182 corresponding to the row of the phase difference detection pixel 190 for the phase difference detection pixels 190 in the row. The line RST2 is supplied with a reset signal as a drive signal from the vertical drive section 184. The vertical drive section 184 turns on the reset signal before turning on the transfer signal.

[0148] When the reset signal input to the gate electrode 193A is turned on, the reset transistor 193 discharges the charge transferred to the FD 192 to the power supply electrode 197, and resets the potential of the FD 192.

[0149] Between the power supply electrode 197 and the vertical signal line 183, the amplification transistor 194 and the selection transistor 195 are connected in series. The gate electrode 194A of the amplification transistor 194 is connected to the FD 192, and the amplification transistor 194 outputs a pixel signal corresponding to the potential of the FD 192 to the selection transistor 195 with the power supply electrode 197.

[0150] The gate electrode 195A of the selection transistor 195 is connected to a line SEL2 formed in the pixel driving line 182 corresponding to the row of the phase difference detection pixel 190 for the phase difference detection pixels 190 in the row. The line SEL2 is supplied with a selection signal as a drive signal from the vertical drive section 184. The vertical drive section 184 turns on the selection signal after turning on the transfer signal and before turning on the reset signal.

[0151] When the selection signal input to the gate electrode 195A is turned on, the selection transistor 195 supplies the pixel signal output from the amplification transistor 194 to the column processing section 185 via the vertical signal line 183.

[0152] As described above, in the CMOS image sensor 180, one FD 192 is shared between 2 (horizontal) x 2 (vertical) divided pixels 191. Then, the charge accumulated in the PD 201 of each divided pixel 191 is sequentially transferred to the FD 192 in the order of the divided pixel 191-1 and the divided pixel 191-2 in units of the row of the phase difference detection pixel 190 from the top.

[0153] Structure Example of Phase Difference Detection Pixel

[0154] Figure 9 is a diagram showing Figure 8 is a diagram showing a structure example of the phase difference detection pixel 190 as viewed from the front surface side of the CMOS image sensor 180. Figure 10 is a cross-sectional view taken along the line A-A' of Figure 9 Figure 11 is a cross-sectional view taken along the line B-B' of Figure 9 ​a cross-sectional view obtained by cutting the CMOS image sensor 180 along the line D-D' and the line E-E'.

[0155] As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. Figure 9 As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. Figure 10 and Figure 11 As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. As shown in FIG. 2, a PD 201-1 is formed in the P-type impurity 211-1, and a PD 201-2 is formed in the P-type impurity 211-2. Note that, in the following description, when it is not necessary to particularly distinguish the P-type impurity 211-1 and the P-type impurity 211-2, they will be collectively referred to as the P-type impurity 211.

[0156] As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. As shown in FIG. 2, a PD 201-1 is formed in the P-type impurity 211-1, and a PD 201-2 is formed in the P-type impurity 211-2. Note that, in the following description, when it is not necessary to particularly distinguish the P-type impurity 211-1 and the P-type impurity 211-2, they will be collectively referred to as the P-type impurity 211. Figure 9 and Figure 10 As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. As shown in FIG. 2, a PD 201-1 is formed in the P-type impurity 211-1, and a PD 201-2 is formed in the P-type impurity 211-2. Note that, in the following description, when it is not necessary to particularly distinguish the P-type impurity 211-1 and the P-type impurity 211-2, they will be collectively referred to as the P-type impurity 211. Figure 10 As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. As shown in FIG. 2, a PD 201-1 is formed in the P-type impurity 211-1, and a PD 201-2 is formed in the P-type impurity 211-2. Note that, in the following description, when it is not necessary to particularly distinguish the P-type impurity 211-1 and the P-type impurity 211-2, they will be collectively referred to as the P-type impurity 211.

[0157] As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. As shown in FIG. 2, a PD 201-1 is formed in the P-type impurity 211-1, and a PD 201-2 is formed in the P-type impurity 211-2. Note that, in the following description, when it is not necessary to particularly distinguish the P-type impurity 211-1 and the P-type impurity 211-2, they will be collectively referred to as the P-type impurity 211.

[0158] As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. As shown in FIG. 2, a PD 201-1 is formed in the P-type impurity 211-1, and a PD 201-2 is formed in the P-type impurity 211-2. Note that, in the following description, when it is not necessary to particularly distinguish the P-type impurity 211-1 and the P-type impurity 211-2, they will be collectively referred to as the P-type impurity 211. Figure 10 As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. As shown in FIG. 2, a PD 201-1 is formed in the P-type impurity 211-1, and a PD 201-2 is formed in the P-type impurity 211-2. Note that, in the following description, when it is not necessary to particularly distinguish the P-type impurity 211-1 and the P-type impurity 211-2, they will be collectively referred to as the P-type impurity 211. Figure 10 As shown in FIG. 2, the P-type impurity 210 that is the well of the phase difference detection pixel 190 is divided into a P-type impurity 211-1 and a P-type impurity 211-2. As shown in FIG. 2, a PD 201-1 is formed in the P-type impurity 211-1, and a PD 201-2 is formed in the P-type impurity 211-2. Note that, in the following description, when it is not necessary to particularly distinguish the P-type impurity 211-1 and the P-type impurity 211-2, they will be collectively referred to as the P-type impurity 211.

[0159] The pixel separation wall 222 is formed between the P-type impurities 211 adjacent to each other in the vertical direction across the phase difference detection pixel 190, and the pixel separation wall 223 is formed between the P-type impurities 211 adjacent to each other in the horizontal direction.

[0160] The pixel separation wall 222 includes two front surface trenches 222A and a back surface trench 222B sandwiching N-type impurities 224 to 228 and a P-type impurity 229. The back surface trench 222B is formed at a position corresponding to the N-type impurities 224 to 228 and the P-type impurity 229 and different from the positions of the two front surface trenches 222A.

[0161] The N-type impurity 224 is connected to the power supply electrode 197 and constitutes a drain of the amplification transistor 194. The N-type impurity 225 constitutes a source of the amplification transistor 194 and a drain of the selection transistor 195. The N-type impurity 226 is connected to the vertical signal line 183 and constitutes a source of the selection transistor 195.

[0162] The N-type impurity 227 is connected to the FD 192 and constitutes a source of the reset transistor 193. The N-type impurity 228 is connected to the power supply electrode 197 and constitutes a drain of the reset transistor 193. The P-type impurity 229 is a well connected to the well electrode 198.

[0163] The gate electrode 202A, the gate electrode 193A, and the gate electrode 195A are connected to the pixel drive line 182 provided in a wiring layer 230 formed on the front surface of the CMOS image sensor 180. The FD 192 is connected to the gate electrode 194A.

[0164] In addition, a red (R), a green (G), and a blue (B) color filter 231 corresponding to the phase difference detection pixel 190 is formed on the back surface side of the P-type impurity 210, and an on-chip lens 232 is formed outside the color filter 231.

[0165] The PD 201-1 receives light incident from the back surface side of the right side via the on-chip lens 232 and the color filter 231 and photoelectrically converts the received light. In addition, the PD 201-2 receives light incident from the back surface side of the left side via the on-chip lens 232 and the color filter 231 and photoelectrically converts the received light. Figure 9 The PD 201-1 receives light incident from the back surface side of the right side via the on-chip lens 232 and the color filter 231 and photoelectrically converts the received light. In addition, the PD 201-2 receives light incident from the back surface side of the left side via the on-chip lens 232 and the color filter 231 and photoelectrically converts the received light. Figure 9

[0166] Therefore, the pixel signal read from the split pixel 191-1 corresponds to light incident from the right side in the phase difference detection pixel 190, and the pixel signal read from the split pixel 191-2 corresponds to light incident from the left side in the phase difference detection pixel 190. Figure 9 Figure 9 ​​corresponds to the left side incident light in FIG. 19. Therefore, the signal processing unit 188 can detect the phase in the horizontal direction and perform face phase difference AF and the like based on the difference between the pixel signals read from the divided pixel 191-1 and the divided pixel 191-2.

[0167] As described above, in the region of the FD 192 in the divided pixel separation wall 221, the front surface trench 221A is not formed. Therefore, in the case where the charge accumulated in the PD 201 overflows, the overflowing charge leaks to the FD 192 through the P-type impurity 211 Figure 10 However, since the FD 192 is reset before the charge is transferred from the PD 201, the influence of the charge leakage from the PD 201 to the FD 192 on the imaging characteristics is small.

[0168] On the other hand, since the front surface trench 223A and the back surface trench 223B in the pixel separation wall 223 contact each other, the PD 201 adjacent to the phase difference detection pixel 190 is completely electrically cut off. Therefore, even in the case where the charge accumulated in the PD 201 overflows, the charge leakage to the other PD 201 adjacent to the PD 201 across the phase difference detection pixel 190 does not occur.

[0169] In addition, as Figure 11 As illustrated in FIG. 19, in the pixel separation wall 222, the positions of the front surface trench 222A and the back surface trench 222B are different, and the front surface trench 222A and the back surface trench 222B do not contact each other. Therefore, the PD 201 and the N-type impurities 224 to 228 and the P-type impurity 229 are not completely electrically cut off.

[0170] Therefore, in the case where the charge accumulated in the entire PD 201 overflows, the overflowing charge can be discharged to the power supply electrode 197 through the P-type impurity 211 and the N-type impurity 224 Figure 11 In addition, by Figure 11 As illustrated in FIG. 19, the potential of the P-type impurity 211 (well) can be fixed to the potential of the well electrode 198 connected to the P-type impurity 229 through the path E1.

[0171] Note that the length and the material of at least one of the front surface trench 221A (222A, 223A) and the back surface trench 221B (222B, 223B) in the depth direction can be different depending on the position of the divided pixel separation wall 221 (the pixel separation wall 222, 223). In addition, at least one of the back surface trench 222B (223B) of the pixel separation wall 222 (223) and the back surface trench 221B of the divided pixel separation wall 221 can be different in the length and the material in the depth direction.

[0172] Explanation of operation of CMOS image sensor

[0173] Figures 12-14 respectively. Figure 7 illustrating the operation of the CMOS image sensor 180.

[0174] As Figure 12 illustrated in part B of FIG. 6B, among the barriers of the paths S1 to S3, the barrier of the path S1 is the weakest, the barrier of the path S2 is the second weakest, and the barrier of the path S3 is the strongest. Figure 14

[0175] The signal processing unit 188 detects the phase in the horizontal direction based on the difference between the pixel signals read sequentially from the split pixels 191-1 and 191-2 until the charge accumulated in either of the PDs 201-1 and 201-2 overflows. Then, the signal processing unit 188 performs the image plane phase difference AF based on the detected phase.

[0176] When further charge is accumulated in the PD 201 and the charge accumulated in either of the PDs 201-1 and 201-2 overflows, as Figure 12 illustrated, the overflowing charge starts to leak into the other PD through the path S1 having the weakest barrier (step 1). In this case, the signal processing unit 188 can acquire the pixel signal of the entire phase difference detection pixel 190 by adding the pixel signals read sequentially from the PDs 201-1 and 201-2.

[0177] When further charge is accumulated in the PD 201 and the charge accumulated in the entire PD 201 overflows, as Figure 13 illustrated, the overflowing charge starts to leak into the FD 192 through the path S2 having the second weakest barrier (step 2). Since the FD 192 is reset before the charge is transferred from the PD 201, the leakage of the charge from the PD 201 to the FD 192 has little influence on the imaging characteristics.

[0178] When further charge is accumulated in the PD 201 and the amount of the charge overflowing from the entire PD 201 becomes large, as Figure 14 illustrated, the charge starts to leak into the N-type impurities 224 and 228 through the path S3 having the strongest barrier (step 3). Since the N-type impurities 224 and 228 are connected to the power supply electrode 197, the charge leaked from the PD 201 is discharged to the power supply electrode 197.

[0179] ​As described above, in the CMOS image sensor 180, the pixel separation wall 221 (pixel separation wall 222, 223) is formed by front surface trenches 221A (222A, 223A) and back surface trenches 221B (222B, 223B).

[0180] Therefore, in the region where the pixel separation wall 221 is formed, the front surface trench 221A is not formed at the end in the vertical direction opposite to FD 192 and in the region of FD 192, and impurities 212 can be formed in the end in the vertical direction opposite to FD 192. Furthermore, the positions of the front surface trench 222A and the back surface trench 222B of the pixel separation wall 222 can be shifted in such a way that their positions do not correspond to each other, and the front surface trench 222A and the back surface trench 222B can be prevented from contacting each other.

[0181] In this way, charge leakage between PD 201-1 and PD 201-2, charge leakage from PD 201 to FD 192, and discharge of the charge accumulated in PD 201 to the power supply electrode 197 can occur gradually.

[0182] Furthermore, by making the front surface trench 223A and the back surface trench 223B of the pixel separation wall 223 contact each other, the pixel separation wall 223 can penetrate the CMOS image sensor 180. Therefore, charge leakage between adjacent phase difference detection pixels 190 can be prevented.

[0183] The aspect ratio of the depth and width of the front surface trench 223A and the back surface trench 223B is smaller than that of a through trench extending from either the front or back surface of the CMOS image sensor 180. Therefore, the pixel separation wall 223 is easier to form than the pixel separation wall formed by the through trench.

[0184] Furthermore, by forming a mask pattern to control the presence / absence and position of the front surface trenches 221A to 223A, the gradual occurrence and prevention of leakage can be easily achieved, wherein forming the mask pattern is a common semiconductor process.

[0185] Third Implementation Plan

[0186] Example of circuit configuration for phase difference detection pixels in a third embodiment of a CMOS image sensor

[0187] Except that the phase difference detection pixel is formed by 2 (horizontal) × 2 (vertical) segmented pixels, the third embodiment of the CMOS image sensor to which this disclosure applies is configured similarly to... Figure 7 The CMOS image sensor 180 shown is the same. Therefore, only the phase difference detection pixels will be described below.

[0188] Figure 15 This is a diagram illustrating an example of the circuit configuration of a phase difference detection pixel in a third embodiment of a CMOS image sensor to which this disclosure applies.

[0189] exist Figure 15 In the configuration shown, with Figure 8 The same configurations are indicated by the same reference numerals. Repetitive descriptions are omitted where appropriate.

[0190] Figure 15 The phase difference detection pixel 270 shown is composed of... Figure 8 The difference in the structure of the phase difference detection pixel 190 shown is that the number of segmented pixels is 2 (horizontal) × 2 (vertical).

[0191] Specifically, the phase difference detection pixel 270 includes 2×2 segmented pixels 271-1 to 271-4, FD 192, reset transistor 193, amplification transistor 194, selection transistor 195, power supply electrode 197, and well electrode 198.

[0192] Each of the segmented pixels 271-1 to 271-4 includes a PD and a transmission transistor. Specifically, segmented pixel 271-1 includes a PD 291-1 and a transmission transistor 292-1, and segmented pixel 271-2 includes a PD 291-2 and a transmission transistor 292-2. Additionally, segmented pixel 271-3 includes a PD 291-3 and a transmission transistor 292-3, and segmented pixel 271-4 includes a PD 291-4 and a transmission transistor 292-4.

[0193] It should be noted that in the following description, when there is no need to specifically distinguish between segmented pixels 271-1 to 271-4, they will be collectively referred to as segmented pixels 271. Similarly, PDs 291-1 to 291-4 will be collectively referred to as PDs 291, and transmission transistors 292-1 to 292-4 will be collectively referred to as transmission transistors 292.

[0194] PD 291 of segmented pixel 271 generates and stores a charge corresponding to the amount of light incident from the back of the CMOS image sensor and received therefrom. The anode terminal of PD 291 is connected to the well electrode 198, and the cathode terminal of PD 291 is connected to FD 192 via transfer transistor 292.

[0195] The gate electrode 292-1A of the transfer transistor 292-1 is connected to a line TG21 formed in the pixel drive line 182 corresponding to the row of the phase difference detection pixel 270 for the upper left split pixel 271-1 constituting the phase difference detection pixel 270. In addition, the gate electrode 292-2A of the transfer transistor 292-2 is connected to a line TG22 formed in the pixel drive line 182 corresponding to the row of the phase difference detection pixel 270 for the upper right split pixel 271-2 constituting the phase difference detection pixel 270.

[0196] In addition, the gate electrode 292-3A of the transfer transistor 292-3 is connected to a line TG23 formed in the pixel drive line 182 corresponding to the row of the phase difference detection pixel 270 for the lower left split pixel 271-3 constituting the phase difference detection pixel 270. In addition, the gate electrode 292-4A of the transfer transistor 292-4 is connected to a line TG24 formed in the pixel drive line 182 corresponding to the row of the phase difference detection pixel 270 for the lower right split pixel 271-4 constituting the phase difference detection pixel 270. Note that, in the following description, when it is not necessary to particularly distinguish the gate electrodes 292-1A to 292-4A, they will be collectively referred to as the gate electrode 292A.

[0197] A transfer signal is supplied as a drive signal from the vertical drive section 184 to the lines TG21 to TG24. The vertical drive section 184 sequentially turns on the transfer signals of the lines TG21 to TG24 in the row of the phase difference detection pixel 270 from which the pixel signal is to be read. Upon turning on the transfer signal input to the gate electrode 292A, the transfer transistor 292 transfers the charge accumulated in the PD 291 to the FD 192.

[0198] As described above, in the third embodiment of the CMOS image sensor, one FD 192 is shared between 2×2 split pixels 271. Thus, the charge accumulated in the PD 291 of each split pixel 271 is sequentially transferred to the FD 192 in the order of the split pixel 271-1, the split pixel 271-2, the split pixel 271-3, and the split pixel 271-4 in units of the row of the phase difference detection pixel 270 from the top.

[0199] First configuration example of phase difference detection pixel

[0200] Figure 16 is a view as viewed from the front surface side of the CMOS image sensor, which shows a first configuration example of the phase difference detection pixel 270. Figure 17 is a cross-sectional view taken along the line A-A' and the line B-B' of Figure 16 . Figure 18 is a cross-sectional view taken along the line C-C' and the line D-D' of Figure 16 .

[0201] In Figures 16-18 the configuration shown, the same configuration as Figures 9-11 the configuration shown is indicated by the same reference numeral. Repetitive explanation is omitted as appropriate.

[0202] As Figure 16 shown, the P-type impurity 210 of the phase difference detection pixel 270 is divided into P-type impurities 301-1 to 301-4. As Figure 17 and Figure 18 shown, the PD 291-1, the PD 291-2, the PD 291-3, and the PD 291-4 are formed in the P-type impurity 301-1, the P-type impurity 301-2, the P-type impurity 301-3, and the P-type impurity 301-4, respectively. Note that, in the following explanation, when it is not necessary to particularly distinguish the P-type impurities 301-1 to 301-4, they are collectively referred to as the P-type impurity 301.

[0203] As Figures 16-18 shown, the division pixel separation wall 311 is formed between the respective P-type impurities 301 in the same phase difference detection pixel 270. As Figure 17 and Figure 18 shown, the division pixel separation wall 311 is formed by a contact between a front surface trench 311A formed from the front surface of the CMOS image sensor and a back surface trench 311B formed from the back surface.

[0204] Note that, in the region between the adjacent P-type impurities 301 in the same phase difference detection pixel 270 on the front surface of the CMOS image sensor, the front surface trench 311A is not formed in the region in which the FD 192 is formed and in the end portion in the horizontal direction or the vertical direction opposite the FD 192. That is, the division pixel separation wall 311 is formed by the contact between the front surface trench 311A and the back surface trench 311B, in which the front surface trench is formed in the region on the front surface between the adjacent P-type impurities 301 in the same phase difference detection pixel 270, in the region other than the region of the FD 192 and the end portion in the horizontal direction or the vertical direction opposite the FD 192, and the back surface trench is formed in the entire region of the back surface between the P-type impurities 301.

[0205] In addition, as Figure 17 shown, on the front surface side of the end portion in the horizontal direction of the division pixel separation wall 311 opposite the FD 192 between the P-type impurities 301 adjacent to each other in the vertical direction, an impurity 302 having a deep potential is formed. Therefore, in the case where the electric charge accumulated in one of the PDs 291 adjacent to each other in the vertical direction in the same phase difference detection pixel 270 overflows, the electric charge can easily pass through Figure 17The illustrated path S11 leaks to the other PD via the impurity 302.

[0206] In addition, as Figure 18 illustrated, the front surface side of the end portion in the vertical direction of the division pixel separation wall 311 opposite the FD 192 between the P-type impurities 301 adjacent to each other in the horizontal direction is formed with an impurity 303 having a concentration different from that of the impurity 302 and a potential deeper than that of the impurity 302. Thus, in the case where the electric charge accumulated in one of the PDs 291 adjacent to each other in the horizontal direction in the same phase difference detection pixel 270 overflows, the electric charge can easily leak to the other PD via the impurity 303. Figure 18 The illustrated path S12 leaks to the other PD via the impurity 303.

[0207] The front surface trench 222A of the pixel separation wall 222 holds the N-type impurities 312 to 315 and the P-type impurity 316. The N-type impurity 312 is connected to the FD 192 and constitutes the source of the reset transistor 193. The N-type impurity 313 is connected to the power supply electrode 197 and constitutes the drain of the reset transistor 193 and the amplification transistor 194.

[0208] The N-type impurity 314 constitutes the source of the amplification transistor 194 and the drain of the selection transistor 195. The N-type impurity 315 is connected to the vertical signal line 183 and constitutes the source of the selection transistor 195. The P-type impurity 316 is a well connected to the well electrode 198. As Figure 17 illustrated, the gate electrode 292A is connected to the pixel drive line 182 provided in the wiring layer 230 formed in the CMOS image sensor.

[0209] The PD 291-1 and the PD 291-2 receive light incident from the right lower side of the Figure 16 and light incident from the left lower side of the Figure 16 respectively via the on-chip lens 232 and the color filter 231, and photoelectrically convert the light.

[0210] In addition, the PD 291-3 and the PD 291-4 receive light incident from the right upper side of the Figure 16 and light incident from the left upper side of the Figure 16 respectively via the on-chip lens 232 and the color filter 231, and photoelectrically convert the light.

[0211] Thus, the pixel signal read from the division pixel 271-1 corresponds to light incident from the right lower side of the Figure 16 , and the pixel signal read from the division pixel 271-2 corresponds to light incident from the left lower side of the Figure 16 of the phase difference detection pixel 270. In addition, the pixel signal read from the division pixel 271-3 corresponds to light incident from the right upper side of the Figure 16corresponding to the light incident from the upper right in FIG. 27A is read from the split pixel 271-4, and a pixel signal corresponding to the light incident from the upper left in FIG. 27A is read from the split pixel 271-3. Figure 16 corresponding to the light incident from the upper left in FIG. 27A is read from the split pixel 271-3.

[0212] Accordingly, the signal processing unit 188 can detect the phase in the horizontal direction and the vertical direction and perform face phase difference AF and the like based on the difference between the pixel signals read from the split pixels 271-1 to 271-4.

[0213] As described above, in the region of the FD 192 in the split pixel separation wall 311, the front surface trench 311A is not formed. Accordingly, in a case where the electric charge accumulated in the entire PD 291 overflows, the overflowing electric charge can be discharged to the FD 192 through the Figure 18 path S13 illustrated in FIG. 27B via the P-type impurity 301. However, since the FD 192 is reset before the electric charge is transferred from the PD 291, the influence of the electric charge leakage from the PD 291 to the FD 192 on the imaging characteristics is small.

[0214] On the other hand, since the front surface trench 223A and the back surface trench 223B contact each other in the pixel separation wall 223, the PD 291 adjacent to the phase difference detection pixel 270 across is completely electrically cut off. Accordingly, even in a case where the electric charge accumulated in the PD 291 overflows, electric charge leakage into another PD 291 adjacent to the PD 291 across the phase difference detection pixel 270 does not occur.

[0215] In addition, as described above, in the region of the FD 192 in the split pixel separation wall 311, the front surface trench 311A is not formed. Accordingly, in a case where the electric charge accumulated in the entire PD 291 overflows, the overflowing electric charge can be discharged to the FD 192 through the Figure 17 and Figure 18 As described above, in the region of the FD 192 in the split pixel separation wall 311, the front surface trench 311A is not formed. Accordingly, in a case where the electric charge accumulated in the entire PD 291 overflows, the overflowing electric charge can be discharged to the FD 192 through the

[0216] Accordingly, in a case where the electric charge accumulated in the entire PD 291 overflows, the overflowing electric charge can be discharged to the FD 192 through the Figure 18 path S14 illustrated in FIG. 27B via the P-type impurity 301 and the N-type impurity 313.

[0217] Note that the length in the depth direction of the front surface trench 311A and the back surface trench 311B can be different depending on the position of the split pixel separation wall 311. In addition, the length in the depth direction of the back surface trench 222B (223B) of the pixel separation wall 222 (223) and the back surface trench 311B of the split pixel separation wall 311 can be different.

[0218] Explanation of Operation of CMOS Image Sensor

[0219] Figures 19-22 FIGS. 12A and 12B are diagrams each illustrating an operation of the third embodiment of the CMOS image sensor.

[0220] As Figure 19 shown in part B of FIG. 6A, among the barriers of the paths S11 to S14, the barrier of the path S11 is the weakest, the barrier of the path S12 is the second weakest, the barrier of the path S13 is the third weakest, and the barrier of the path S14 is the strongest. Figure 22

[0221] The signal processing unit 188 detects the phase in the horizontal direction and the vertical direction based on the difference between the pixel signals sequentially read from the divided pixels 271-1 to 271-4 until the charge accumulated in any of the PDs 291-1 to 291-4 overflows. Then, the signal processing unit 188 performs the image plane phase difference AF based on the detected phase.

[0222] When the charge is further accumulated in the PD 291 and the charge accumulated in any of the PDs 291-1 to 291-4 overflows, as Figure 19 shown in FIG. 7A, the overflowing charge starts to leak to the PD 291 adjacent in the vertical direction through the path S11 having the weakest barrier (step 11).

[0223] In this case, the signal processing unit 188 can acquire the pixel signals of the left region and the right region when the phase difference detection pixel 270 is divided in the horizontal direction by adding the pixel signals read from the PDs 291 adjacent to each other in the vertical direction. Thus, the signal processing unit 188 detects the phase in the horizontal direction based on the difference between the pixel signals of the left region and the right region, and performs the image plane phase difference AF based on the phase.

[0224] When the charge is further accumulated in the PD 291 and the charge accumulated in any of the PDs 291-1 to 291-4 overflows, as Figure 20 shown in FIG. 7B, the overflowing charge starts to leak to the PD 291 adjacent in the horizontal direction through the path S12 having the second weakest barrier (step 12). In this case, the signal processing unit 188 can acquire the pixel signals of the entire phase difference detection pixel 270 by adding the pixel signals read from all the PDs 291.

[0225] When the charge is further accumulated in the PD 291 and the charge accumulated in all the PDs 291 overflows, as Figure 21 ​As shown, the overflowing charge starts to leak into the FD 192 through the path S13 having the third weak barrier (step 13). Since the FD 192 is reset before the charge is transferred from the PD 291, the effect of the leaked charge from the PD 291 to the FD 192 on the imaging characteristics is small.

[0226] When the amount of the charge overflowing from the entire PD 291 becomes large as the charge further accumulates in the PD 291, as shown in FIG. 14B, the charge starts to leak into the N-type impurity 313 through the path S14 having the strongest barrier (step 14). Since the N-type impurity 313 is connected to the power supply electrode 197, the charge leaked from the PD 291 is discharged to the power supply electrode 197. Figure 22

[0227] As described above, in the third embodiment of the CMOS image sensor, the division pixel separation wall 311 is formed by the front surface trench 311A and the back surface trench 311B. Therefore, in the region in which the division pixel separation wall 311 is formed, in the region of the end portion in the horizontal direction or the vertical direction opposite to the FD 192 and the FD 192, the front surface trench 311A is not formed, and in the end portion in the horizontal direction, the impurity 302 can be formed, and in the end portion in the vertical direction, the impurity 303 having a potential deeper than that of the impurity 302 can be formed. In this way, the charge leakage between the PDs adjacent to each other in the vertical direction and the charge leakage between the PDs adjacent to each other in the horizontal direction can be caused step by step.

[0228] Second configuration example of phase difference detection pixel

[0229] Figure 23 is Figure 15 A cross-sectional view taken along the line B-B' and the line C-C' of the second configuration example of the phase difference detection pixel 270 shown in FIG. 15A is shown in FIG. 15B. Figure 16

[0230] In the configuration shown in FIG. 16A, the same configuration as that shown in FIG. 15A is denoted by the same reference numerals. The repeated explanation is appropriately omitted. Figure 23 Figures 16-18

[0231] Figure 23 The structure of the phase difference detection pixel 270 shown in FIG. 17A is different from that shown in FIG. 15A in that the impurity 321 is provided instead of the impurity 302 and the impurity 303, and the front surface trench 322 and the front surface trench 323 are newly provided. In the phase difference detection pixel 270 shown in FIG. 17A, the strength of the barrier of the path S11 and the path S12 is not controlled by the concentration of the impurity, but is controlled by the front surface trench 322 and the front surface trench 323. Figures 16-18 Figure 23

[0232] Specifically, in the​​​​​​Figure 23 In the phase difference detection pixel 270 illustrated, impurities 321 having the same impurity concentration are formed on the front surface side of the end portion of the division pixel separation wall 311 in the horizontal direction or the vertical direction opposite the FD 192. In addition, a front surface trench 322 having a length in the depth direction that is shorter than the front surface trench 311A is formed on the front surface side of the end portion in the horizontal direction. A front surface trench 323 having a length in the depth direction that is longer than the front surface trench 322 but shorter than the front surface trench 311A is formed on the front surface side of the end portion in the vertical direction.

[0233] Therefore, the front surface trench 322 and the back surface trench 311B do not contact each other, and the front surface trench 323 and the back surface trench 311B do not contact each other. The distance between the front surface trench 322 and the back surface trench 311B is greater than the distance between the front surface trench 323 and the back surface trench 311B. Therefore, the PD 291 in the same phase difference detection pixel 270 is not electrically cut off, and the barrier of the path S11 is weaker than the barrier of the path S12.

[0234] Third configuration example of phase difference detection pixel

[0235] Figure 24 is Figure 15 A cross-sectional view obtained along the line E-E' of the third configuration example of the phase difference detection pixel 270 illustrated. Figure 16

[0236] In the configuration illustrated, the same configuration as the configuration illustrated in Figure 24 Figures 16-18 is indicated by the same reference numerals. Repeated explanation is appropriately omitted.

[0237] Figure 24 The structure of the phase difference detection pixel 270 illustrated is different from the structure illustrated in Figures 16-18 in that the positions of the division pixel separation wall 311, the color filter 231, and the on-chip lens 232 in the phase difference detection pixel 270 depend on the position of the phase difference detection pixel 270 on the pixel region 181.

[0238] That is, generally, between the center of the angle of view of the CMOS image sensor and the end portion of the angle of view, the incident angle of light from the on-chip lens is different. Therefore, in the pixel at the end portion, light cannot sufficiently be incident into the PD, and the pixel signal is reduced.

[0239] Therefore, in the phase difference detection pixel 270 illustrated in Figure 24 , the positions of the division pixel separation wall 311, the color filter 231, and the on-chip lens 232 in the phase difference detection pixel 270 are changed depending on the position of the phase difference detection pixel 270 on the pixel region 181. ​​

[0240] Specifically, in a case where the position of the phase difference detection pixel 270 on the pixel region 181 is the center of the angle of view of the CMOS image sensor, as shown in part A of FIG. 27, the color filter 231 and the on-chip lens 232 are arranged in a manner that the center of the P-type impurity 210 is centered. In addition, the split-pixel separation wall 311 is formed at the center in the horizontal direction or the vertical direction of the P-type impurity 210. Figure 24

[0241] On the other hand, in a case where the position of the phase difference detection pixel 270 on the pixel region 181 is the end portion of the angle of view of the CMOS image sensor, as shown in part B of FIG. 27, the centers of the color filter 231 and the on-chip lens 232 are arranged to be offset from the center of the P-type impurity 210. In addition, the split-pixel separation wall 311 is formed at a position offset from the center in the horizontal direction or the vertical direction of the P-type impurity 210. That is, the P-type impurity 210 is unevenly split into P-type impurities 301-1 to 301-4. In the example shown in part B of FIG. 27, the size of the PD 291 differs depending on the size of the P-type impurity 301. Figure 24 Figure 24

[0242] In this way, pupil correction that makes the optical center of the phase difference detection pixel 270 closer to the center of the phase difference detection pixel 270 can be performed. Therefore, it is possible to reduce the difference between pixel signals that occurs depending on the position of the phase difference detection pixel 270 on the pixel region 181. In addition, since not only the positions of the color filter 231 and the on-chip lens 232 but also the position of the split-pixel separation wall 311 are changed, it is possible to reduce the difference between pixel signals even in a case where the incident angle is large at the end portion of the angle of view.

[0243] Note that, in the example of FIG. 27, although the positions of the color filter 231 and the on-chip lens 232 and the position of the split-pixel separation wall 311 are changed depending on the position of the phase difference detection pixel 270 on the pixel region 181, it is possible to change only the position of one of them. Figure 24

[0244] Fourth Structure Example of Phase Difference Detection Pixel

[0245] Figure 25 is a cross-sectional view obtained along the line E-E' of the fourth structure example of the phase difference detection pixel 270 at the end portion of the angle of view of the third embodiment of the CMOS image sensor. Figure 16

[0246] In the configuration shown in FIG. 28, the same configuration as that shown in FIG. 27 is denoted by the same reference numerals. Repeated explanation is appropriately omitted. Figure 25 Figure 24 ​​​​​​​

[0247] Figure 25 The structure of the phase difference detection pixel 270 shown is similar to Figure 24 The difference in the structure shown is that the size of PD 291 is constant regardless of the size of P-type impurity 301.

[0248] Specifically, in Figure 25 In the phase difference detection pixel 270 shown, a PD 291 with a size corresponding to the minimum size of the P-type impurity 301 is formed on the boundary side of the phase difference detection pixel 270. Therefore, each PD 291 has the same size, and the saturation amount of charge accumulated in each segmented pixel 271 is the same.

[0249] Manufacturing method of the fourth structure example of phase difference detection pixel

[0250] Figure 26 This is an explanation Figure 25 A diagram illustrating the manufacturing method of PD 291 of phase difference detection pixel 270.

[0251] like Figure 26 As shown in part A, firstly, front surface trenches 223A are formed in the P-type impurity 210 at intervals corresponding to the size of the phase difference detection pixel 270. Additionally, depending on the position of the phase difference detection pixel 270 having two adjacent front surface trenches 223A as boundaries with other adjacent phase difference detection pixels 270 on the pixel region 181, a front surface trench 311A ​​is formed at a position between the two front surface trenches 223A.

[0252] Next, as Figure 26 As shown in part B, a pattern corresponding to the amount of PD 291 corresponding to the two segmented pixels 271 adjacent to the phase difference detection pixel 270 is formed in such a way that the center of the front surface trench 223A is centered. Then, by injecting N-type impurities according to the formed pattern, the amount of PD 291 corresponding to the two segmented pixels 271 adjacent to the phase difference detection pixel 270 is formed.

[0253] Finally, as Figure 26 As shown in part C, the back surface groove 223B is formed in a manner that contacts the front surface groove 223A. Therefore, the amount of PD 291 corresponding to two adjacent segmented pixels 271 is segmented, and the PD 291 of each segmented pixel 271 is formed on the pixel separation wall 223 side (i.e., the boundary side of the phase difference detection pixel 270).

[0254] Additionally, a back groove 311B is formed in contact with the front surface groove 311A, and a color filter 231 and an on-chip lens 232 are formed at positions corresponding to the positions of the phase difference detection pixel 270 on the pixel region 181.

[0255] As described above, in the manufacturing method of the present embodiment, once the amount of PD 291 corresponding to two divided pixels 271 is formed, the amount of PD 291 corresponding to two divided pixels 271 is divided into the PD 291 of each divided pixel 271 by the pixel separation wall 223. Therefore, the patterning at the time of forming the PD 291 can be easily performed compared to the case where the PD 291 of each divided pixel 271 is formed respectively.

[0256] On the other hand, in the case where the PD 291 of each divided pixel 271 is formed respectively, it is necessary to form a pattern corresponding to this PD 291, which has a size corresponding to the minimum size of the P-type impurity 301 smaller than the normal size. Therefore, the difficulty of the patterning at the time of forming this PD 291 is great.

[0257] Fifth configuration example of phase difference detection pixel

[0258] Figure 27 is a cross-sectional view taken along the line E-E' of the fifth configuration example of the phase difference detection pixel 270 at the angle-of-view end portion of the third embodiment of the CMOS image sensor to which the present disclosure is applied. Figure 16 is a cross-sectional view taken along the line E-E' of the fifth configuration example of the phase difference detection pixel 270 at the angle-of-view end portion of the third embodiment of the CMOS image sensor to which the present disclosure is applied.

[0259] In the configuration shown in Figure 27 , the same configuration as that shown in Figure 25 is denoted by the same reference numerals. The repeated explanation is appropriately omitted.

[0260] Figure 27 The structure of the phase difference detection pixel 270 shown in Figure 25 differs from that shown in in that the front surface trench 311A is formed at the center of the phase difference detection pixel 270 regardless of the position of the phase difference detection pixel 270 on the pixel region 181, the size of the PD 291 on the front surface side is larger than that on the back surface side, and the potential of the PD 291 on the front surface side is deeper than that on the back surface side.

[0261] Figure 27 Specifically, in the phase difference detection pixel 270 shown in , the position of the back surface trench 311B differs depending on the position of the phase difference detection pixel 270 on the pixel region 181. On the other hand, the position of the front surface trench 311A is formed at the center of the phase difference detection pixel 270 regardless of the position of the phase difference detection pixel 270 on the pixel region 181.

[0262] Figure 27 Therefore, as shown in In the phase difference detection pixel 270 shown, the positions of the front surface trench 311A and the back surface trench 311B are different, and the front surface trench 311A and the back surface trench 311B do not contact each other.

[0263] In addition, the dimensions of the PD 291 in the horizontal direction and the vertical direction on the back surface side are dimensions corresponding to the minimum dimensions of the P-type impurities 301 in the horizontal direction and the vertical direction, respectively. On the other hand, the dimensions of the PD 291 in the horizontal direction and the vertical direction on the front surface side are dimensions corresponding to half the dimensions of the P-type impurities 210 of the phase difference detection pixel 270 in the horizontal direction and the vertical direction, respectively. The dimensions of all the PDs 291 are the same. In addition, the potential on the front surface side of the PD 291 is deeper than the potential on the back surface side.

[0264] As described above, in the phase difference detection pixel 270 shown, Figure 27 In the phase difference detection pixel 270 shown, the front surface trench 311A is formed at the center of the phase difference detection pixel 270 regardless of the position of the phase difference detection pixel 270 on the pixel region 181. Therefore, the dimensions of the PD 291 in the horizontal direction and the vertical direction on the front surface side can be made dimensions corresponding to half the dimensions of the P-type impurities 210 of the phase difference detection pixel 270 in the horizontal direction and the vertical direction, respectively. Therefore, compared to the case of Figure 26 , the dimensions of the PD 291 become larger, and the amount of charge that can be accumulated in the PD 291 increases.

[0265] In addition, since the dimensions of the PD 291 on the front surface side are large enough and the potential is deep, the saturated charge amount of the PD 291 is large.

[0266] Manufacturing method of the fifth configuration example of the phase difference detection pixel

[0267] Figure 28 and Figure 29 are explanatory diagrams Figure 27 of the manufacturing method of the PD 291 of the phase difference detection pixel 270 shown.

[0268] As Figure 28 part A, first, the front surface trench 223A is formed in the P-type impurities 210 at an interval corresponding to the dimensions of the phase difference detection pixel 270. In addition, the front surface trench 311A is formed at the center between two adjacent front surface trenches 223A.

[0269] Next, as Figure 28The pattern corresponding to the back surface side of the PD 291 in an amount corresponding to two adjacent divided pixels 271 across the phase difference detection pixel 270 is formed in a manner that the center of the front surface trench 223A is centered, as shown in part B of FIG. 27. Then, the back surface side of the PD 291 in an amount corresponding to two adjacent divided pixels 271 across the phase difference detection pixel 270 is formed by implanting N-type impurities to the back surface side according to the formed pattern.

[0270] Then, as shown in part A of FIG. 26, a pattern corresponding to the front surface side of the PD 291 of each divided pixel 271 is formed. Then, the front surface side of the PD 291 of each divided pixel 271 corresponding to the divided pixel 271 is formed by implanting N-type impurities to the front surface side according to the formed pattern in a manner that the back surface side of the PD 291 corresponding to an amount of two adjacent divided pixels 271 is connected. Figure 29 Finally, as shown in part B of FIG. 26, the back surface trench 223B is formed in contact with the front surface trench 223A. Thus, the back surface side of the PD 291 in an amount corresponding to two adjacent divided pixels 271 is divided, and the back surface side of the PD 291 of each divided pixel 271 is formed on the pixel separation wall 223 side (i.e., the boundary side of the phase difference detection pixel 270).

[0271] Figure 29

[0272] In addition, the back surface trench 311B is formed depending on the position of the phase difference detection pixel 270 on the pixel region 181 having two adjacent front surface trenches 223A as boundaries with other adjacent phase difference detection pixels 270. In addition, the color filter 231 and the on-chip lens 232 are formed at positions corresponding to the position of the phase difference detection pixel 270 on the pixel region 181.

[0273] As described above, in the manufacturing method shown in Figure 28 and Figure 29 , once the back surface side of the PD 291 in an amount corresponding to two divided pixels 271 is formed, the back surface side of the PD 291 in an amount corresponding to two divided pixels 271 is divided into the back surface side of the PD 291 of each divided pixel 271 by the pixel separation wall 223. Thus, as in the case of Figure 26 , the pattern formation at the time of forming the back surface side of the PD 291 can be easily performed compared to the case where the back surface side of the PD 291 of each divided pixel 271 is formed respectively.

[0274] Note that although the front surface trench 311A is formed in the phase difference detection pixel 270 shown in Figure 27 , the front surface trench 311A is not necessarily formed.

[0275] ​​Sixth configuration example of phase difference detection pixel

[0276] Figure 30 and Figure 31 are diagrams respectively illustrating Figure 15 the sixth configuration example of the phase difference detection pixel 270.

[0277] In Figure 30 and Figure 31 , the same configuration as that illustrated in Figures 16-18 is indicated by the same reference numerals. Repetitive explanation is omitted as appropriate.

[0278] Figure 30 and Figure 31 , the structure of the phase difference detection pixel 270 is different from that illustrated in Figures 16-18 in that the pixel separation wall 222 is formed by two front surface trenches 222A sandwiching the N-type impurities 312 to 315 and the P-type impurity 316 and two back surface trenches 222B respectively in contact with the two front surface trenches 222A, and the P-type impurity 210 is connected to the well electrode 198.

[0279] Figure 30 Part A of Figure 30 and Part B of Figure 31 are diagrams respectively illustrating the phase difference detection pixel 270 as viewed from the front surface side and the back surface side of the CMOS image sensor. Figure 31 Part A of Figure 30 and Part B of are cross-sectional views taken along lines A-A' and B-B' of

[0280] . Figure 30 Figure 31 In the phase difference detection pixel 270 illustrated in and

[0281] , the pixel separation wall 222 is formed by two front surface trenches 222A sandwiching the N-type impurities 312 to 315 and the P-type impurity 316 and two back surface trenches 222B respectively in contact with the two front surface trenches 222A. Therefore, the reset transistor 193, the amplification transistor 194, the selection transistor 195, the power supply electrode 197, and the well electrode 198 can be completely electrically separated from the P-type impurity 210.

[0282] In addition, in the case where metal or a material with low transmittance is used for the front surface trench 222A and the back surface trench 222B, the reset transistor 193, the amplification transistor 194, the selection transistor 195, the power supply electrode 197, and the well electrode 198 can also be completely optically separated from the P-type impurity 210.

[0283] Seventh configuration example of phase difference detection pixel

[0284] Figure 32 and Figure 33 are cross-sectional views showing Figure 15 the seventh configuration example of the phase difference detection pixel 270.

[0285] In Figure 32 and Figure 33 the configurations shown in Figures 16-18 the configurations shown in

[0286] Figure 32 and Figure 33 the configuration of the phase difference detection pixel 270 shown in Figures 16-18 is different from the configuration shown in

[0287] Figure 32 Part A of Figure 32 Part B of Figure 33 Part A of Figure 33 Part B of Figure 32 are cross-sectional views obtained along lines A-A' and B-B' of Part A of

[0288] In Figure 32 and Figure 33 the phase difference detection pixel 270, the pixel separation wall 351 is formed across the P-type impurities 301 adjacent to each other in the vertical direction of the phase difference detection pixel 270. The pixel separation wall 351 is formed by contact between the front surface trench 351A and the back surface trench 351B. Thus, charge leakage across the PDs 291 adjacent to each other in the vertical direction of the phase difference detection pixel 270 can be prevented.

[0289] Further, the front surface trench 352 (electrode trench) is formed in such a manner that the N-type impurities 312 to 315 and the P-type impurity 316 are sandwiched between the front surface trench 352 and the front surface trench 351A. Further, a dummy front surface trench 353 is formed at a position symmetrical to the division pixel separation wall 311 closest to the front surface trench 352 with respect to the front surface trench 352. Thus, the size of the PD 291 can be made the same for each PD 291.

[0290] That is, in the P-type impurity 301 in which the front surface trench 352 is formed, the PD 291 cannot be formed in the region of the front surface trench 352. Thus, the size of the PD 291 formed in the P-type impurity 301 in which the front surface trench 352 is formed is smaller than the size of the PD 291 formed in the P-type impurity 301 in which the front surface trench 352 is not formed

[0291] Thus, in the phase difference detection pixel 270 shown in Figure 32 and Figure 33 , the dummy front surface trench 353 is formed in the P-type impurity 301 in which the front surface trench 352 is not formed at a position corresponding to the front surface trench 352. Thus, the size of the PD 291 formed in each P-type impurity 301 is the same regardless of the presence / absence of the front surface trench 352. Further, the PD 291 has a symmetrical shape.

[0292] Further, since the PD 291 can be formed on the back surface side of the region in which the front surface trench 352 or the front surface trench 353 is formed in the P-type impurity 301, the aperture ratio of the PD 291 is large. Thus, the sensitivity is good.

[0293] Eighth Structure Example of Phase Difference Detection Pixel

[0294] Figure 34 and Figure 35 are diagrams showing Figure 15 the eighth structure example of the phase difference detection pixel 270 shown in FIG. 27.

[0295] In the configuration shown in Figure 34 and Figure 35 , the same configuration as that shown in Figure 32 and Figure 33 is denoted by the same reference numerals. The repeated explanation is appropriately omitted.

[0296] Figure 34 and Figure 35 the structure of the phase difference detection pixel 270 shown in Figure 32 and Figure 33 differs from the structure shown in

[0297] Figure 34 Part A and Figure 34 Part B shows the phase difference detection pixel 270 as seen from the front and back sides of the CMOS image sensor. Figure 35 Part A and Figure 35 Part B is along Figure 34 The cross-sectional view obtained from the lines A-A' and B-B' of part A.

[0298] exist Figure 34 and Figure 35 In the phase difference detection pixel 270 shown, the front surface trench 371 (electrode trench) is formed such that N-type impurities 312-315 and P-type impurities 316 are sandwiched between the front surface trench 371 and the front surface trench 351A. The length of the front surface trench 371 in the depth direction is sufficiently smaller than the length of the front surface trench 351A.

[0299] Therefore, even when the front surface groove 371 is formed in the P-type impurity 301, the PD 291 can be formed in the entire region on the front surface side. Thus, regardless of the presence or absence of the front surface groove 371, the size of the PD 291 formed in each P-type impurity 301 can be made the same. Furthermore, the size of the PD 291 can be made sufficiently large.

[0300] It should be noted that the front surface groove 371 can be formed by, for example, CION, STI, II separation, etc.

[0301] Ninth structure example of phase difference detection pixels

[0302] Figure 36 To show Figure 15 The diagram shows a ninth structural example of the phase difference detection pixel 270.

[0303] exist Figure 36 In the configuration shown, with Figure 32 and Figure 33 The same configurations are indicated by the same reference numerals. Repetitive descriptions are omitted where appropriate.

[0304] Figure 36 The structure of the phase difference detection pixel 270 shown is similar to Figure 32 and Figure 33 The difference in the structure shown is that the size of adjacent phase difference detection pixels 270 is different.

[0305] Figure 36 Part A is a diagram showing 3 (horizontal) × 3 (vertical) phase difference detection pixels 270 as observed from the front surface side of the CMOS image sensor. Figure 36 Part B is alongFigure 36 A cross-sectional view obtained by cutting along the line A-A' in the portion A of FIG. 2. Note that, in the portion A of FIG. 2, the on-chip lens 232 formed on the back surface side is illustrated for ease of description. Figure 36

[0306] In the portion A of FIG. 2, the on-chip lens 232 formed on the back surface side is illustrated for ease of description. Figure 36 In the portion A of FIG. 2, the on-chip lens 232 formed on the back surface side is illustrated for ease of description.

[0307] Thus, in all the P-type impurities 301, the PD 291 is not formed in the region of the front surface trench 352 on the front surface side, and the size of the PD 291 formed in each P-type impurity 301 is the same. In addition, the PD 291 shape has symmetry.

[0308] On the other hand, the phase difference detection pixel 270 having the blue or red color filter 231 does not include the N-type impurities 312 to 315 and the P-type impurity 316. Thus, in all the P-type impurities 301 constituting the phase difference detection pixel 270 having the blue or red color filter 231, the front surface trench 352 is not formed.

[0309] Thus, in all the P-type impurities 301, the PD 291 can be formed over the entire region on the front surface side, and the size of the PD 291 formed in each P-type impurity 301 is the same. In addition, the PD 291 shape has symmetry.

[0310] The size of the PD 291 of the phase difference detection pixel 270 having the green color filter 231 can be increased compared with the size of the PD 291 of the phase difference detection pixel 270 having the red or blue color filter 231, and the sensitivity is improved.

[0311] Thus, for example, by acquiring a pixel signal having a high SN ratio only for a plurality of phase difference detection pixels 270 having a high sensitivity and a green color filter 231, a color image having a wide dynamic range can be acquired. Specifically, by combining luminance information having a wide dynamic range acquired from a pixel signal having a large SN ratio of the phase difference detection pixel 270 having a green color filter and color information acquired by processing color information of another phase difference detection pixel 270, a color image having a wide dynamic range can be acquired. Thus, for example, by acquiring a pixel signal having a high SN ratio only for a plurality of phase difference detection pixels 270 having a high sensitivity and a green color filter 231, a color image having a wide dynamic range can be acquired. Specifically, by combining luminance information having a wide dynamic range acquired from a pixel signal having a large SN ratio of the phase difference detection pixel 270 having a green color filter and color information acquired by processing color information of another phase difference detection pixel 270, a color image having a wide dynamic range can be acquired.

[0312] Note that, in the example shown, although the color filters 231 and the on-chip lenses 232 are formed in regions on the front surface corresponding to the respective phase difference detection pixels 270, the sizes of the color filters 231 and the on-chip lenses 232 can be the same in all the phase difference detection pixels 270. Figure 36

[0313] The materials or structures of the front surface grooves 111A (112A, 113A, 221A, 222A, 223A, 311A, 322, 323, 351A) and the back surface grooves 111B (112B, 113B, 221B, 222B, 223B, 311B, 351B) that constitute the one pixel separation wall 111 (112, 113, 222, 223, 351) or the split pixel separation wall 221 (311) can be the same or different.

[0314] In addition, the materials or structures of the front surface grooves 111A (112A, 113A, 222A, 223A, 351A) and the back surface grooves 111B (112B, 113B, 222B, 223B, 351B) that constitute the pixel separation wall 111 (112, 113, 222, 223, 351) can be the same as or different from the materials or structures of the front surface grooves 221A (311A, 322, 323) and the back surface grooves 221B (311B) that constitute the split pixel separation wall 221 (311). The materials or structures can be determined by the incident angle of light, the size of the pixel 71 (the phase difference detection pixel 190, 270), and the like. For example, the materials of the back surface grooves 223B and the back surface grooves 311B can have different refractive indexes and the like.

[0315] In addition, for example, as shown in Figure 37 The back surface grooves 223B between the PDs 291 of adjacent phase difference detection pixels 270 having different color filters 231 can be formed of a metal 382. In the case where the back surface grooves 223B are formed of a conductor such as the metal 382 and impurity-doped Poly, in order to prevent short-circuiting of the conductor and the semiconductor substrate (P-type impurity 301), an insulating film 381 such as an oxide film and a nitride film is formed between the conductor and the semiconductor substrate (P-type impurity 301). On the other hand, in the same phase difference detection pixel 270, the back surface grooves 311B between the PDs 291 having the same color filter 231 can be formed of a material having high transmittance (such as an oxide film and the like) in a manner thinner than the back surface grooves 223B.

[0316] Note that, in the example shown, although the color filters 231 and the on-chip lenses 232 are formed in regions on the front surface corresponding to the respective phase difference detection pixels 270, the sizes of the color filters 231 and the on-chip lenses 232 can be the same in all the phase difference detection pixels 270. Figure 37 Part A of FIG. 12 is a cross-sectional view taken along the line E-E' of the phase difference detection pixel 270. In addition, Part B of FIG. 12 is a cross-sectional view taken along the line F-F' of the phase difference detection pixel 270. Figure 16 Part A of FIG. 12 is a cross-sectional view taken along the line E-E' of the phase difference detection pixel 270. In addition, Part B of FIG. 12 is a cross-sectional view taken along the line F-F' of the phase difference detection pixel 270. Figure 37 ​Part B of FIG. 8 is a view observed from the back surface side of the CMOS image sensor 180.

[0317] By configuring the back surface trench 223B and the back surface trench 311B as shown in Figure 37 By configuring the back surface trench 223B and the back surface trench 311B as shown in

[0318] On the other hand, in a case where the back surface trench 311B includes a metal similar to the back surface trench 223B, light collected on the periphery of the back surface trench 311B is reflected by the back surface trench 311B without being incident into the PD 291. Thus, a loss of sensitivity can occur.

[0319] Note that the width (length in the horizontal direction with respect to the semiconductor substrate) of the back surface trench 311B is sufficiently small with respect to the wavelength of incident light. In a case where the width of the back surface trench 311B is sufficiently small with respect to incident light, light incident into the back surface trench 311B formed of an oxide film or the like having a refractive index different from that of silicon (Si) as the material of the semiconductor substrate is diffracted, divided, and incident into each PD 291. Thus, a loss of sensitivity can be further suppressed.

[0320] Further, the back surface trench 223B can contain a material having low transmittance, such as polysilicon other than a metal or the like.

[0321] Figure 38 is a view illustrating Figure 37 a manufacturing method of the back surface trench 223B and the back surface trench 311B.

[0322] As shown in Figure 38 In a first step, a resist pattern 391 is formed in the P-type impurity 210, and the P-type impurity 210 in regions corresponding to the back surface trench 223B and the back surface trench 311B is etched. Then, the resist pattern 391 is peeled off.

[0323] In a second step, a thin insulating film 392 such as an oxide film or the like is formed in the P-type impurity 210. Here, as described above, the back surface trench 311B is thinner than the back surface trench 223B. That is, the width of the region corresponding to the etched back surface trench 311B is narrower than the width of the region corresponding to the etched back surface trench 223B. Thus, although the region corresponding to the etched back surface trench 311B is filled with the insulating film 392, the region corresponding to the etched back surface trench 223B is not filled with the insulating film 392.

[0324] In the third step, a metal film (metal) 393 is formed on the insulating film 392. At this time, since the area corresponding to the back trench 311B is filled with the insulating film 392, the metal film 393 is not embedded in the area corresponding to the back trench 311B. However, since the area corresponding to the back trench 223B is not filled with the insulating film 392, the metal film 393 is also embedded in this area.

[0325] In the fourth step, excess metal film 393 is etched away, and metal 382 is formed for back trench 223B. Subsequently, excess oxide film 392 is etched away, and insulating film 381 and back trench 311B for back trench 223B are formed.

[0326] As described above, since the back trenches 223B and 311B have different widths, the materials of the back trenches 223B and 311B can be made different simply by forming the metal film 393 after forming the oxide film 392. Therefore, the significant increase in the number of manufacturing steps caused by the different materials of the back trenches 223B and 311B can be suppressed.

[0327] It should be pointed out that, although in Figure 37 In the example shown, the back surface groove 223B (311B) contacts the front surface groove 223A (311A), but as Figure 39 As shown in part A, it is not necessary for it to contact the front surface groove 223A (311A). Figure 39 As shown in part A, when the lengths of the back trenches 223B and 311B in the direction perpendicular to the back surface are shorter, manufacturing is easier and causes less damage to the semiconductor substrate. Furthermore, in Figure 39 In part A, it is not necessary to form front surface grooves 223A and front surface grooves 311A.

[0328] In addition, such as Figure 39 As shown in part B, the front surface grooves 223A and 311A ​​are not formed, and the lengths of the back surface grooves 223B and 311B in the depth direction can be different. In this case, the separation performance of the back surface grooves 223B and 311B can be made different.

[0329] In addition, such as Figure 39 As shown in part C, it is not necessary to form the front surface trench 311A. In this case, PDs 291 with the same color filter 231 in the same phase difference detection pixel 270 are not completely separated. In addition, it is not necessary to form not only the front surface trench 223A, but also the front surface trench 331A.

[0330] In addition, such asFigure 39 As shown in part D, the front surface trenches 223A and 311A ​​are formed of metal. In this case, light transmitted through the oxide film of the back surface trench 223B (311B) is reflected by the front surface trench 223A (311A), further suppressing the loss of sensitivity.

[0331] It should be noted that when the front surface trenches 111A (112A, 113A, 222A, 223A, 351A) and the back surface trenches 111B (112B, 113B, 222B, 223B, 351B) are formed of materials with low transmittance, such as metallic materials and polycrystalline silicon, connection portions for fixing potentials are provided in the front surface trenches 111A (112A, 113A, 222A, 223A, 351A) and the back surface trenches 111B (112B, 113B, 222B, 223B, 351B).

[0332] In addition, in the second and third embodiments, although the phase difference detection pixels 190 (270) are arranged in an array in the pixel region 181, not only the phase difference detection pixels 190 (270) can be arranged, but ordinary pixels can also be arranged.

[0333] For example, such as Figure 40 As shown, the phase difference detection pixel 270 can be configured only at the center of pixel region 181, and ordinary pixels 400 can be configured in other regions. It should be noted that... Figure 40 This is a diagram showing a region of 3×3 pixels 400 or phase difference detection pixels 270 centered on the center of pixel region 181, as observed from the front surface side of the CMOS image sensor.

[0334] A PD is formed in a P-type impurity 401, which serves as the well for a normal pixel 400. The P-type impurity 401 is connected to a PD 403 formed from an N-type impurity via the gate electrode 402 of a transfer transistor. The PD 403 is connected to an N-type impurity 405, which is connected to a power supply electrode, via the gate electrode 404 of a reset transistor, and is also connected to the gate electrode 406 of an amplification transistor.

[0335] N-type impurity 405 is connected to N-type impurity 407, which forms the drain of the select transistor, via the gate electrode 406 of the amplifying transistor, and N-type impurity 407 is connected to N-type impurity 409, which is connected to the vertical signal line 183, via the gate electrode 408 of the select transistor. Additionally, in pixel 400, P-type impurity 410 is formed and connected to the well electrode.

[0336] A pixel separation wall 411 that sandwiches the FD 403, the N-type impurity 405, the N-type impurity 407, the N-type impurity 409, and the P-type impurity 410 is formed across the P-type impurities 401 that are adjacent in the vertical direction of the pixel 400. In addition, a pixel separation wall 412 is formed between the P-type impurities 401 that are adjacent in the horizontal direction.

[0337] For example, the pixel separation wall 411 is configured in the same manner as the pixel separation wall 112 (222, 351) described above, and the pixel separation wall 412 is configured in the same manner as the pixel separation wall 113 (223) described above.

[0338] The reading of the phase difference detection pixels 270 is performed in units of PDs, while the reading of the other pixels 400 in the row of the phase difference detection pixels 270 is performed. Therefore, when the pixel signals of the pixels 400 are acquired, the pixel signals of the entire phase difference detection pixels 270 can be acquired by performing face image phase difference AF based on the pixel signals of each PD 291 and adding the pixel signals of all the PDs 291.

[0339] Note that the P-type impurity 210 and the P-type impurity 401 are the same size. Therefore, in the phase difference detection pixels 270, the P-type impurity 210 is divided into four regions, and a PD 291 is formed for each of the obtained regions. In the pixel 400, the PD is formed as is in the P-type impurity 210.

[0340] Therefore, the size of the entire PD 291 of the phase difference detection pixels 270 is smaller than the size of the PD of the pixel 400, and the saturated charge amount in the phase difference detection pixels 270 is smaller than the saturated charge amount in the pixel 400. Therefore, color mixing is more likely to occur in the phase difference detection pixels 270 than in the pixel 400, but color mixing can be prevented by the pixel separation wall 222 and the pixel separation wall 223.

[0341] Fourth Embodiment

[0342] Configuration Example of Embodiment of Imaging Device

[0343] Figure 41 is a block diagram showing a configuration example of an embodiment of an imaging device that is an electronic apparatus to which the present disclosure is applicable.

[0344] Figure 41The imaging device 1000 shown is a video camera, a digital still camera, or the like. The imaging device 1000 includes a lens group 1001, a solid-state imaging element 1002, a DSP circuit 1003, a frame memory 1004, a display unit 1005, a recording unit 1006, an operation unit 1007, and a power supply unit 1008. The DSP circuit 1003, the frame memory 1004, the display unit 1005, the recording unit 1006, the operation unit 1007, and the power supply unit 1008 are connected to each other via a bus 1009.

[0345] The lens group 1001 captures incident light (image light) from a subject and images it on an imaging surface of the solid-state imaging element 1002. The solid-state imaging element 1002 is formed of the first to third embodiments of the CMOS image sensor described above. The solid-state imaging element 1002 converts the amount of incident light imaged on the imaging surface by the lens group 1001 into an electric signal in pixel units and supplies the signal as a pixel signal to the DSP circuit 1003.

[0346] The DSP circuit 1003 performs predetermined image processing on the pixel signal supplied from the solid-state imaging element 1002, supplies the image-processed image signal in units of frames to the frame memory 1004, and causes the frame memory 1004 to temporarily store the image signal.

[0347] The display unit 1005 is constituted by a panel-type display device such as a liquid crystal panel and an organic electro luminescence (EL) panel, and displays an image based on the pixel signal in units of frames temporarily stored in the frame memory 1004.

[0348] The recording unit 1006 is formed of a digital versatile disk (DVD), a flash memory, or the like, and reads and records the pixel signal in units of frames temporarily stored in the frame memory 1004.

[0349] The operation unit 1007 outputs an operation instruction for various functions of the imaging device 1000 based on a user operation. The power supply unit 1008 appropriately supplies power to the DSP circuit 1003, the frame memory 1004, the display unit 1005, the recording unit 1006, and the operation unit 1007.

[0350] The electronic device to which the present technology is applicable only needs to be a device that uses a CMOS image sensor as an image capturing unit (photoelectric conversion unit), and in addition to the imaging device 1000, can be applicable to a portable terminal device having an imaging function, a copier that uses a CMOS image sensor as an image reading unit, or the like.

[0351] Examples of use of CMOS image sensor

[0352] Figure 42 is a diagram showing a use example using the CMOS image sensor described above.

[0353] The CMOS image sensor described above can be used in various cases of sensing light such as visible light, infrared light, ultraviolet light, X-rays, and the like.

[0354] Devices for taking images to be appreciated, such as digital cameras and mobile devices equipped with camera functions, and the like

[0355] Devices for transportation uses, such as vehicle-mounted cameras for taking images of the front, rear, surroundings, and the interior of a car for safe driving such as automatic stopping and recognizing the state of the driver, monitoring cameras for monitoring traveling vehicles and roads, and distance measuring sensors for measuring the distance between vehicles, and the like

[0356] Devices for use in household electric appliances such as TVs, refrigerators, air conditioners, and the like, for taking the gestures of a user and performing device operation according to the gestures

[0357] Devices for medical and health care uses, such as endoscopes and devices for angiography by receiving infrared light, and the like

[0358] Devices for security uses, such as monitoring cameras for crime prevention uses and cameras for personal authentication uses, and the like

[0359] Devices for beauty uses, such as skin measuring instruments for taking images of the skin and microscopes for taking images of the scalp, and the like

[0360] Devices for sports uses, such as action cameras and wearable cameras for sports uses, and the like

[0361] Devices for agricultural uses, such as cameras for monitoring the state of fields and crops, and the like

[0362] Note that the effects described here are merely examples and are not limiting, and other effects can be provided.

[0363] In addition, the embodiments of the present disclosure are not limited to the above-described embodiments, and various modifications can be made without departing from the essence of the present disclosure.

[0364] For example, although the well is a P-type impurity in the present specification, the well can also be an N-type impurity.

[0365] In addition, the pixel separation walls 111 to 113 in the first embodiment can each have the same configuration as the division pixel separation wall 221 (311), the pixel separation wall 222 (351), and the pixel separation wall 223 in the second embodiment or the third embodiment.

[0366] It should be understood that the present technology can adopt the following configurations.

[0367] (1) A solid-state imaging device comprising:

[0368] a plurality of pixels that photoelectrically convert light incident into each pixel from a back surface of the solid-state imaging device via a different lens for each pixel;

[0369] a pixel separation wall formed between adjacent pixels; and

[0370] a wiring layer provided on a front surface of the solid-state imaging device, wherein

[0371] the pixel separation wall includes a front surface trench that is a trench formed from the front surface and a back surface trench that is a trench formed from the back surface.

[0372] (2) The solid-state imaging device according to the above (1), wherein

[0373] at least a portion of the front surface trench of the pixel separation wall and at least a portion of the back surface trench contact each other.

[0374] (3) The solid-state imaging device according to the above (1) or (2), wherein

[0375] a length of the front surface trench and the back surface trench in a direction perpendicular to the back surface differs depending on a position of the pixel separation wall including the corresponding front surface trench and the corresponding back surface trench.

[0376] (4) The solid-state imaging device according to any one of the above (1) to (3), wherein

[0377] a material of at least one of the front surface trench and the back surface trench differs depending on a position of the pixel separation wall including the corresponding front surface trench and the corresponding back surface trench.

[0378] (5) The solid-state imaging device according to any one of the above (1) to (4), wherein

[0379] the pixel separation wall between the pixels adjacent in a predetermined direction includes two front surface trenches that sandwich a well electrode, the pixels do not share a floating diffusion, and a position of the back surface trench on the back surface corresponds to a position of the well electrode.

[0380] (6) The solid-state imaging device according to any one of the above (1) to (4), wherein

[0381] The pixel separation wall between the pixels adjacent in the predetermined direction includes two front surface trenches that sandwich a power supply electrode, the pixels do not share a floating diffusion, and the back surface trench is positioned on the back surface in correspondence with the position of the power supply electrode.

[0382] (7) The solid-state imaging device according to any one of the above (1) to (4), wherein

[0383] The pixel separation wall between the pixels sharing a floating diffusion includes the front surface trench formed in a region on the front surface between the pixels in which a floating diffusion is not formed and the back surface trench formed in the entire region on the back surface between the pixels, and the front surface trench and the back surface trench contact each other.

[0384] (8) The solid-state imaging device according to the above (1), wherein

[0385] At least a portion of the plurality of pixels is divided into a plurality of divided pixels for each pixel, each of the divided pixels includes a photoelectric conversion element that photoelectrically converts light incident into each of the divided pixels from the back surface via the same lens; and

[0386] A divided pixel separation wall is formed between adjacent divided pixels, the divided pixel separation wall includes a front surface trench that is a trench formed from the front surface and a back surface trench that is a trench formed from the back surface.

[0387] (9) The solid-state imaging device according to the above (8), wherein

[0388] The lengths of the front surface trench and the back surface trench in a direction perpendicular to the back surface differ depending on the positions of the pixel separation wall or the divided pixel separation wall including the corresponding front surface trench and the corresponding back surface trench.

[0389] (10) The solid-state imaging device according to the above (8) or (9), wherein

[0390] The lengths of the back surface trench of the pixel separation wall and the back surface trench of the divided pixel separation wall in a direction perpendicular to the back surface differ.

[0391] (11) The solid-state imaging device according to any one of the above (8) to (10), wherein

[0392] A material of at least one of the front surface trench and the back surface trench differs depending on a position of the pixel separation wall or the split pixel separation wall including the corresponding front surface trench and the corresponding back surface trench.

[0393] (12) The solid-state imaging device according to any one of (8) to (11) above, wherein

[0394] The material of the back surface trench of the pixel separation wall and the split pixel separation wall is different.

[0395] (13) The solid-state imaging device according to any one of (8) to (12) above, wherein

[0396] The front surface trench of the split pixel separation wall is formed only in a part of a region on the front surface between adjacent split pixels, and the back surface trench is formed in an entire region on the back surface between adjacent split pixels,

[0397] The back surface trench and the front surface trench of the split pixel separation wall contact each other, and

[0398] A floating diffusion is formed in a region on the front surface between adjacent split pixels in which the front surface trench is not formed.

[0399] (14) The solid-state imaging device according to any one of (8) to (12) above, wherein

[0400] The front surface trench of the split pixel separation wall is formed in a region on the front surface between adjacent split pixels in which a floating diffusion is not formed, and the back surface trench is formed in an entire region on the back surface between adjacent split pixels,

[0401] A part of the front surface trench of the split pixel separation wall and the back surface trench contact each other, and

[0402] A length of another part of the front surface trench of the split pixel separation wall in a direction perpendicular to the back surface is shorter than a length of the part of the front surface trench.

[0403] (15) The solid-state imaging device according to any one of (8) to (14) above, wherein

[0404] The pixel separation wall between the pixels adjacent in a predetermined direction includes two front surface trenches sandwiching a power supply electrode and two back surface trenches in contact with the corresponding front surface trenches.

[0405] (16) The solid-state imaging device according to any one of (8) to (14) above, further comprising:

[0406] an electrode trench that is a front surface trench formed between the front surface trenches of the pixel separation walls of the pixels themselves and the pixels adjacent in a predetermined direction to sandwich a power supply electrode therebetween; and

[0407] a dummy trench that is a dummy front surface trench formed at a position symmetrical to the electrode trench with respect to the divided pixel separation wall closest to the electrode trench,

[0408] the front surface trench and the back surface trench are in contact to form the pixel separation wall.

[0409] (17) The solid-state imaging device according to any one of (8) to (16) above, wherein

[0410] a position of the divided pixel separation wall in the pixel in which the divided pixel separation wall is formed differs depending on a position of the pixel.

[0411] (18) The solid-state imaging device according to (17) above, wherein

[0412] a position of the back surface trench of the divided pixel separation wall in the pixel in which the divided pixel separation wall is formed differs depending on a position of the pixel,

[0413] a position of the front surface trench of the divided pixel separation wall in the pixel in which the divided pixel separation wall is formed is the same regardless of a position of the pixel, and

[0414] a dimension of the front surface side of the photoelectric conversion element of the divided pixel is larger than a dimension of the back surface side.

[0415] (19) The solid-state imaging device according to any one of (8) to (14) above, further comprising:

[0416] an electrode trench that is a front surface trench formed between the front surface trenches of the pixel separation walls of the pixels themselves and the pixels adjacent in a predetermined direction to sandwich a power supply electrode therebetween, wherein

[0417] one of the pixels adjacent includes the electrode trench of the pixel itself and another pixel, and

[0418] the front surface trench and the back surface trench are in contact to form the pixel separation wall.

[0419] (20) An electronic device including:

[0420] A solid-state imaging element including:

[0421] A plurality of pixels that photoelectrically convert light incident into each pixel from a back surface of the solid-state imaging element via a different lens for each pixel;

[0422] A pixel separation wall formed between adjacent pixels; and

[0423] A wiring layer provided on a front surface of the solid-state imaging element, wherein

[0424] The pixel separation wall includes a front surface trench that is a trench formed from the front surface and a back surface trench that is a trench formed from the back surface.

[0425] List of Reference Signs

[0426] 50 CMOS image sensor

[0427] 71-1 to 71-4 Pixels

[0428] 72 FD

[0429] 76 Power supply electrode

[0430] 77 Well electrode

[0431] 111 to 113 Pixel separation walls

[0432] 111A to 113A Front surface trenches

[0433] 111B to 113B Back surface trenches

[0434] 119 Wiring layer

[0435] 122 On-chip lens

[0436] 180 CMOS image sensor

[0437] 190 Phase difference detection pixel

[0438] 191-1, 191-2 Split pixels

[0439] 192 FD

[0440] 197 Power supply electrode

[0441] 198 Well electrode

[0442] 201-1, 201-2 PD

[0443] 221 partitioning pixel separation wall

[0444] 221A front surface groove

[0445] 221B back surface groove

[0446] 222, 223 pixel separation wall

[0447] 222A, 223A front surface groove

[0448] 222B, 223B back surface groove

[0449] 230 wiring layer

[0450] 232 on-chip lens

[0451] 271-1 to 271-4 pixel

[0452] 291-1 to 291-4 PD

[0453] 311 partitioning pixel separation wall

[0454] 311A front surface groove

[0455] 311B back surface groove

[0456] 322, 323 front surface groove

[0457] 351 pixel separation wall

[0458] 351A front surface groove

[0459] 352 front surface groove

[0460] 352, 353 front surface groove

Claims

1. A solid-state imaging device comprising: a plurality of pixels that photoelectrically convert light incident into each pixel from a back surface of the solid-state imaging device via a different lens for each pixel; a pixel separation wall formed between adjacent pixels; a wiring layer provided on a front surface of the solid-state imaging device; an electrode trench that is a front surface trench formed to sandwich a power supply electrode between the pixel separation wall itself and a first front surface trench of the pixel separation wall adjacent in a predetermined direction; and a dummy trench that is a dummy front surface trench formed at a position symmetrical to the electrode trench with respect to a divided pixel separation wall closest to the electrode trench, wherein the pixel separation wall includes the first front surface trench that is a trench formed from the front surface and a first back surface trench that is a trench formed from the back surface, at least a portion of the plurality of pixels is divided into a plurality of divided pixels for each pixel, each of the divided pixels includes a photoelectric conversion element that photoelectrically converts light incident into each of the divided pixels from the back surface via the same lens, the divided pixel separation wall includes a second front surface trench formed from the front surface and a second back surface trench formed from the back surface, and is formed between adjacent divided pixels, and the first front surface trench and the first back surface trench are in contact to form the pixel separation wall.

2. A solid-state imaging device comprising: a plurality of pixels that photoelectrically convert light incident into each pixel from a back surface of the solid-state imaging device via a different lens for each pixel; a pixel separation wall formed between adjacent pixels; a wiring layer provided on a front surface of the solid-state imaging device; an electrode trench that is a front surface trench formed to sandwich a power supply electrode between the pixel separation wall itself and a first front surface trench of the pixel separation wall adjacent in a predetermined direction, wherein the pixel separation wall includes the first front surface trench that is a trench formed from the front surface and a first back surface trench that is a trench formed from the back surface, at least a portion of the plurality of pixels is divided into a plurality of divided pixels for each pixel, each of the divided pixels includes a photoelectric conversion element that photoelectrically converts light incident into each of the divided pixels from the back surface via the same lens, a divided pixel separation wall includes a second front surface trench formed from the front surface and a second back surface trench formed from the back surface, and is formed between adjacent divided pixels, one of the adjacent pixels includes the electrode trench of the pixel itself and another pixel, and the first front surface trench and the first back surface trench are in contact to form the pixel separation wall.

3. The solid-state imaging device according to claim 1 or 2, wherein at least a portion of the first front surface trench of the pixel separation wall and at least a portion of the first back surface trench contact each other.

4. The solid-state imaging device according to claim 1 or 2, wherein lengths of the first front surface trench and the first back surface trench in a direction perpendicular to the back surface differ depending on positions of the pixel separation walls including the corresponding first front surface trench and the corresponding first back surface trench.

5. The solid-state imaging device according to claim 1 or 2, wherein a material of at least one of the first front surface trench and the first back surface trench differs depending on positions of the pixel separation walls including the corresponding first front surface trench and the corresponding first back surface trench.

6. The solid-state imaging device according to claim 1 or 2, wherein the pixel separation wall between the pixels adjacent in a predetermined direction includes two first front surface trenches and the first back surface trench, the two first front surface trenches sandwich a well electrode, the pixels do not share a floating diffusion, and a position of the first back surface trench on the back surface corresponds to a position of the well electrode.

7. The solid-state imaging device according to claim 1 or 2, wherein the pixel separation wall between the pixels adjacent in a predetermined direction includes two first front surface trenches and the first back surface trench, the two front surface trenches sandwich a power supply electrode, the pixels do not share a floating diffusion, and a position of the first back surface trench on the back surface corresponds to a position of the power supply electrode.

8. The solid-state imaging device according to claim 1 or 2, wherein the pixel separation wall between the pixels sharing a floating diffusion includes the first front surface trench and the first back surface trench, the first front surface trench is formed in a region on the front surface between the pixels in which a floating diffusion is not formed, the first back surface trench is formed in an entire region on the back surface between the pixels, and the first front surface trench and the first back surface trench contact each other.

9. The solid-state imaging device according to claim 1 or 2, wherein lengths of the second front surface trench and the second back surface trench in a direction perpendicular to the back surface differ depending on positions of the split pixel separation walls including the corresponding second front surface trench and the corresponding second back surface trench.

10. The solid-state imaging device according to claim 1 or 2, wherein lengths of the first back surface trench of the pixel separation wall and the second back surface trench of the split pixel separation wall in a direction perpendicular to the back surface are different.

11. The solid-state imaging device according to claim 1 or 2, wherein a material of at least one of the second front surface trench and the second back surface trench differs depending on positions of the split pixel separation walls including the corresponding second front surface trench and the corresponding second back surface trench.

12. The solid-state imaging device according to claim 1 or 2, wherein The first back surface trench of the pixel separation wall is different in material from the second back surface trench of the partition pixel separation wall.

13. The solid-state imaging device according to claim 1 or 2, wherein the second front surface trench of the partition pixel separation wall is formed in only a part of a region on the front surface between adjacent partition pixels, the second back surface trench is formed in an entire region on the back surface between adjacent partition pixels, the second back surface trench and the second front surface trench of the partition pixel separation wall contact each other, and a floating diffusion is formed in a region on the front surface between adjacent partition pixels in which the second front surface trench is not formed.

14. The solid-state imaging device according to claim 1 or 2, wherein the second front surface trench of the partition pixel separation wall is formed in a region on the front surface between adjacent partition pixels in which a floating diffusion is not formed, the second back surface trench is formed in an entire region on the back surface between adjacent partition pixels, a part of the second front surface trench of the partition pixel separation wall contacts the second back surface trench, and another part of the second front surface trench of the partition pixel separation wall is shorter in length in a direction perpendicular to the back surface than the part of the second front surface trench.

15. The solid-state imaging device according to claim 1 or 2, wherein the pixel separation wall between the pixels adjacent in a predetermined direction includes two first front surface trenches and two first back surface trenches, the two first front surface trenches sandwich a power supply electrode, and the two first back surface trenches contact the corresponding first front surface trenches.

16. The solid-state imaging device according to claim 1 or 2, wherein a position of the partition pixel separation wall in the pixel in which the partition pixel separation wall is formed differs depending on a position of the pixel.

17. The solid-state imaging device according to claim 16, wherein a position of the second back surface trench of the partition pixel separation wall in the pixel in which the partition pixel separation wall is formed differs depending on a position of the pixel, a position of the second front surface trench of the partition pixel separation wall in the pixel in which the partition pixel separation wall is formed is the same regardless of a position of the pixel, and a size of the front surface side of the photoelectric conversion element of the partition pixel is larger than a size of the back surface side.

18. The solid-state imaging device according to claim 1 or 2, wherein one of the pixels adjacent includes the electrode trench of the pixel itself and another pixel.

19. An electronic device, the electronic device comprising: a solid-state imaging device, the solid-state imaging device being the solid-state imaging device according to claim 1 or 2.

Images