Imaging Device and Control Method Thereof

By using a delay circuit in the imaging device to optimize the duty cycle and phase difference of the optical control signal, the problem of inaccuracy of depth data caused by harmonic distortion is solved, and a high-accuracy depth image generation and simplified calibration process is achieved.

CN114697587BActive Publication Date: 2025-07-08SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
CN202111616275.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-12-28
Filing Date
2021-12-27
Publication Date
2025-07-08
Estimated Expiration
2041-12-27

AI Technical Summary

Technical Problem

Existing imaging devices are susceptible to harmonic distortion when generating depth images, resulting in reduced accuracy of depth data, and calibration operations require adjustment of the actual distance between the imaging device and the object, increasing time and resource consumption.

Method used

By introducing a delay circuit into the imaging device, the optical control signal is delayed to change the duty cycle and optimized the optical control signal without adjusting the distance between the device and the object, combining the delay time and phase difference to calculate the depth data, reducing harmonic distortion and improving the accuracy of the depth image.

Benefits of technology

It effectively reduces the impact of harmonic distortion noise, improves the accuracy of the imaging equipment to generate depth images, and simplifies calibration operations and shortens calibration time.

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Abstract

An imaging device, comprising: a light source configured to operate according to a light control signal having a first duty ratio; a pixel array in which a plurality of pixels are arranged, each of the plurality of pixels including a photodiode for generating charges in response to a received signal of light output from the light source and reflected from an object, and a pixel circuit for outputting a pixel signal corresponding to the charges of the photodiode; and a logic circuit configured to generate raw data for generating a depth image using the pixel signals, wherein the logic circuit inputs a photoelectric control signal having a second duty ratio to the pixel circuit connected to the photodiode in each of the plurality of pixels, and wherein the first duty ratio is not an integer multiple of the second duty ratio.
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Description

[0001] Cross - reference to related applications

[0002] Korean Patent Application No. 10 - 2020 - 0184615, filed on December 28, 2020, with the title "Imaging Device and Control Method Thereof", is incorporated herein by reference in its entirety. Technical field

[0003] Embodiments relate to an imaging device and a control method thereof. Background art

[0004] An imaging device may generate an image by converting an optical signal into an electrical signal. The imaging device may be mounted on an electronic device and may provide, for example, a camera function. Summary of the invention

[0005] Embodiments relate to an imaging device including: a light source configured to operate according to a light control signal having a first duty cycle; a pixel arranged in an array, each pixel including: a photodiode configured to generate charge in response to light output from the light source and reflected from an object, and a pixel circuit configured to output a pixel signal corresponding to the charge; and a logic circuit configured to generate raw data for generating a depth image using the pixel signal and configured to provide a photo - control signal having a second duty cycle to each pixel circuit, wherein the first duty cycle is not an integer multiple of the second duty cycle.

[0006] Embodiments relate to an imaging device including: a light source including at least one light - emitting device and a light - source driver for driving the light - emitting device; a pixel array in which a plurality of pixels are arranged, each of the plurality of pixels including a photodiode for generating charge in response to a received signal of light output from the light source and reflected from an object, and a pixel circuit for outputting a pixel signal corresponding to the charge of the photodiode; and a logic circuit including a control logic configured to generate raw data for generating a depth image by obtaining the pixel signal and output a light control signal having a predetermined demodulation frequency and duty cycle, and including a delay circuit configured to output a delay signal to the light - source driver by delaying the light control signal. The logic circuit may be configured to input a plurality of photo - control signals having different phase differences with respect to the light control signal to the pixel circuit connected to the photodiode in each of the plurality of pixels.

[0007] The embodiment also relates to a method of controlling an imaging device including a light source and an image sensor, the method including: setting a duty ratio of a light control signal for driving the light source to a first reference duty ratio; obtaining a first operation error corresponding to a difference between reference data according to the delay time of the light control signal and depth data generated by the image sensor while changing the delay time of the light control signal; calculating a first result value corresponding to a difference between a maximum value and a minimum value among the first operation errors when the delay time of the light control signal reaches a maximum delay time; setting the duty ratio of the light control signal to a second reference duty ratio; obtaining a second operation error corresponding to a difference between reference data according to the delay time of the light control signal and depth data generated by the image sensor while changing the delay time of the light control signal; calculating a second result value corresponding to a difference between a maximum value and a minimum value among the second operation errors when the delay time of the light control signal reaches the maximum delay time; and determining, based on the first result value and the second result value, the first reference duty ratio or the second reference duty ratio as the duty ratio of the light control signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Features will become apparent to those skilled in the art by describing exemplary embodiments in detail with reference to the accompanying drawings, in which:

[0009] Figure 1 and Figure 2 is a block diagram showing an imaging device according to an exemplary embodiment;

[0010] Figure 3 and Figure 4 is a block diagram showing an imaging device according to an exemplary embodiment;

[0011] Figure 5A and Figure 5B is a circuit diagram showing a pixel of an imaging device according to an exemplary embodiment;

[0012] Figures 6 to 8 is a schematic diagram showing an operation of an imaging device according to an exemplary embodiment;

[0013] Figure 9 is a schematic diagram showing an operation of an imaging device according to an exemplary embodiment;

[0014] Figure 10 is a flowchart showing an operation of an imaging device according to an exemplary embodiment;

[0015] Figures 11A to 13E is a schematic diagram showing an operation of an imaging device according to an exemplary embodiment;

[0016] Figure 14 is a schematic diagram showing an operation of an imaging device according to an exemplary embodiment;

[0017] Figure 15 is a flowchart showing the operation of an imaging device according to an exemplary embodiment;

[0018] Figures 16A to 18C is a schematic diagram showing the operation of an imaging device according to an exemplary embodiment; and

[0019] Figures 19 to 21 is a schematic diagram showing an electronic device including an imaging device according to an exemplary embodiment. DETAILED DESCRIPTION

[0020] Figure 1 and Figure 2 is a block diagram showing an imaging device according to an exemplary embodiment

[0021] Referring Figure 1 to [[ID=]], an imaging device 1 according to an exemplary embodiment may include a sensor module 2 and an image signal processor 5. The sensor module 2 may include a light source 3 and a sensor 4. In an exemplary embodiment, the sensor module 2 and the image signal processor 5 may be included in different semiconductor devices. In an exemplary embodiment, the sensor module 2 may be implemented in the form of a semiconductor package including the light source 3 and the sensor 4, and the image signal processor 5 may be included in a semiconductor device (e.g., an application processor, a central processing unit, and a system on chip) connected to the sensor module 2 through a predetermined interface for communication.

[0022] The light source 3 may include at least one light emitting device configured to output an optical signal in a predetermined wavelength band and a light source driver for driving the light emitting device. The light emitting device may be implemented as, for example, a vertical cavity surface emitting laser (VCSEL) or a light emitting diode (LED). The light source 3 may include a plurality of light emitting devices arranged in an array on a substrate. The light source 3 may include an optical device disposed in the path of the optical signal to improve the characteristics of the optical signal. In an exemplary embodiment, the optical signal output by the light source 3 may be in the infrared wavelength band.

[0023] The light output by the light source 3 may be reflected from an object 6, and the light reflected from the object 6 may be incident on the sensor 4. The sensor 4 may include pixels configured to generate an electrical signal in response to the light incident on the sensor 4. The sensor 4 may include a logic circuit configured to use the electrical signal to generate raw data for generating a resultant image. The raw data may include depth information indicating the distance to the object 6 and the background of the object 6. The image signal processor 5 may use the raw data to generate a resultant image, and the resultant image may be configured to be a depth image indicating the distance to the object 6 and the background of the object 6.

[0024] Referring Figure 2, the sensor module 2A and the image signal processor 5A of the imaging device 1A can be implemented in a single package. For example, the light source 3, the sensor 4A, and the image signal processor 5A can be included in a single semiconductor package. The image signal processor 5A can be included in the sensor 4A or can be implemented separately from the sensor 4A.

[0025] The image signal processor 5 and the image signal processor 5A can be implemented as, for example, software and / or hardware. As an example, when the image signal processor 5 is implemented separately from the sensor module 2 as in the example embodiment described in the reference Figure 1 the image signal processor 5 can be implemented as software in, for example, an application processor. In addition, when the image signal processor 5A is integrated into the sensor module 2A as in the example embodiment described in the reference Figure 2 the image signal processor 5A can be implemented as hardware, for example.

[0026] Figure 3 is a block diagram showing an imaging device according to an example embodiment.

[0027] Reference Figure 3 , the imaging device 10 can include a logic circuit 20, a pixel array 30, a light source driver 42, and a light source 40. The pixel array 30 can include a plurality of pixels PX arranged in an array form (e.g., in multiple rows and multiple columns). Each of the plurality of pixels PX can include a photodiode, where the photodiode is configured to generate charge in response to light incident on the photodiode from an object 60. Each pixel PX can include a pixel circuit, where the pixel circuit is configured to generate an electrical signal corresponding to the charge generated by the photodiode.

[0028] In an example embodiment, the pixel circuit can include a floating diffusion, a transfer transistor, a reset transistor, a driving transistor, and a selection transistor. The configuration of the pixel PX can vary according to the example embodiment. For example, each of the pixels PX can include an organic photodiode having an organic material different from a silicon photodiode, or can be implemented as, for example, a digital pixel. When the pixel PX is implemented as a digital pixel, each pixel PX can include a comparator and a counter for converting the output of the comparator into a digital signal and outputting the signal.

[0029] The logic circuit 20 may include multiple circuits for controlling the pixel array 30. As an example, the logic circuit 20 may include a clock driver 21, a readout circuit 22, an operation circuit 23, a control logic 24, etc. The clock driver 21 may drive the pixel array 30 in a first direction or a second direction (e.g., the row direction or the column direction). In an exemplary embodiment, the clock driver 21 may generate a transfer control signal input to the transfer gate of the pixel circuit, a reset control signal input to the reset gate, a selection control signal input to the selection gate, and a photoelectric control signal input to the photo gate. The first direction and the second direction may be defined in various ways. In an exemplary embodiment, the first direction may correspond to the row direction, and the second direction may correspond to the column direction.

[0030] The readout circuit 22 may include a correlated double sampler (CDS) and an analog-to-digital converter (ADC). The correlated double sampler may be connected to the pixel PX selected by the clock signal supplied by the clock driver 21 through the column lines, and may detect the reset voltage and the pixel voltage by performing correlated double sampling. The analog-to-digital converter may convert the reset voltage and the pixel voltage detected by the correlated double sampler into digital signals, and may transmit the signals to the operation circuit 23.

[0031] The operation circuit 23 may include a latch or a buffer circuit for temporarily storing digital signals and an amplifier circuit, and may process the digital signals received from the readout circuit 22. The clock driver 21, the readout circuit 22, and the operation circuit 23 may be controlled by the control logic 24. The control logic 24 may include a timing controller for controlling the operation timing of the clock driver 21, the readout circuit 22, and the operation circuit 23, and an image signal processor for processing image data. In an exemplary embodiment, the operation circuit 23 may be included in the control logic 24.

[0032] The control logic 24 may generate raw data for generating a result image by processing the data output by the readout circuit 22 and the operation circuit 23. In an exemplary embodiment, the result image generated from the raw data may be a depth image. When the image signal processor is included in the control logic 24, the control logic 24 may use the raw data to generate the result image.

[0033] In an exemplary embodiment, the control logic 24 may calculate the distance between the object 60 and the imaging device 10 based on the operation mode of the imaging device 10 using the data output by the readout circuit 22 and the operation circuit 23, or may identify the object 60 adjacent to the imaging device 10. In another embodiment, the operation circuit 23 may generate a depth image, and the control logic 24 may perform post-processing on the depth image to improve the quality of the result image.

[0034] The imaging device 10 may include a light source 40 for outputting light to an object 60. The light source 40 may include at least one light-emitting device 41 and a light source driver 42, and may include, for example, a semiconductor chip in which a plurality of light-emitting devices are arranged in an array. The light source driver 42 may be controlled by a light control signal output from the logic circuit 20. In an exemplary embodiment, the light control signal may be a pulse width modulation (PWM) signal having a predetermined frequency and a predetermined duty cycle.

[0035] In an exemplary embodiment, the light source driver 42 may drive the light-emitting device 41 in response to a light control signal having pulse signal characteristics. In an exemplary embodiment, the logic circuit 20 may synchronize at least one of the clock signals input to the pixel array 30 by the clock driver 21 with the light control signal input to the light source 40. In an exemplary embodiment, the signal synchronized with the light control signal input to the light source 40 may be a photo control signal input to the pixel PX by the clock driver 21. The photo control signal may control the on / off of a transistor connected between a photodiode and a floating diffusion of each pixel PX.

[0036] In an exemplary embodiment, the control logic 24 may include a delay circuit 25. The delay circuit 25 may include a delay locked loop (DLL). The delay circuit 25 may delay a light control signal generated by the control logic 24 and output to the light source 40.

[0037] In an exemplary embodiment, the imaging device 10 may operate in a normal mode or a calibration mode, and the mode of the imaging device 10 may be selected by the control logic 24. In the calibration mode, the imaging device 10 may perform a calibration operation for optimizing the duty cycle of the light control signal, and the delay circuit 25 may delay the light control signal. During the calibration operation, the delay circuit 25 may delay the light control signal, so that the depth data generated by sensing the object 60 by the imaging device 10 may be changed without adjusting the actual distance between the imaging device 10 and the object 60.

[0038] In an exemplary embodiment, the depth data generated by sensing the object 60 by the imaging device 10 may be determined as in Equation 1. In Equation 1, “c” represents the speed of light, “d” represents the depth data generated by sensing the object 60 by the imaging device 10, and “f m ” represents the frequency of the light control signal. In addition, in Equation 1, may be the phase difference between the light control signal input to the light source 40 and the photo control signal input to the pixel array 30 by the clock driver 21.

[0039]

Equation 1

[0040]

[0041] When the delay circuit 25 delays the light control signal, the light reflected from the object 60 and received by the pixel array 30 can also be delayed by the same amount as the light control signal is delayed. Therefore, by using the delay circuit 25 to delay the light control signal, the depth data generated by the imaging device 10 can be changed without adjusting the actual distance between the imaging device 10 and the object 60. In the imaging device 10 according to the exemplary embodiment, a calibration operation for optimizing the duty cycle of the light control signal can be performed.

[0042] The calibration operation can be performed as follows: While changing the duty cycle of the light control signal, the depth data generated by the imaging device 10 is compared with the actual distance between the imaging device 10 and the object 60.

[0043] For the calibration operation, the depth data generated by the imaging device 10 can be compared with the actual distance while changing the actual distance between the imaging device 10 and the object 60, but this may increase the time and resources for the calibration operation.

[0044] In the exemplary embodiment, by using the delay circuit 25, the calibration operation can be performed without changing the actual distance between the imaging device 10 and the object 60. As described above, when the delay circuit 25 delays the light control signal, the depth data generated by the imaging device 10 can be changed. Therefore, for each delay time applied to the light control signal, while the light source 40 operates according to the delayed light control signal, the reference data (corresponding to the actual distance between the imaging device 10 and the object 60 calculated according to Equation 1) can be compared with the depth data generated by sensing the object 60 by using the imaging device 10. This can shorten and simplify the calibration operation and can be performed (e.g., while the end user is using the electronic device,) by an application for operating the imaging device 10.

[0045] In another embodiment, the calibration operation can be performed while changing the actual distance between the imaging device 10 and the object 60, in which case no delay time may be applied to the light control signal. In addition, the actual distance between the imaging device 10 and the object 60 can be compared with the depth data generated by the imaging device 10 without separately calculating the reference data. This calibration operation can be completed before the imaging device 10 is installed on the electronic device and sold to the end user.

[0046] Reference Figure 4, in an exemplary embodiment, the imaging device 10A may not include the delay circuit 25, and the calibration operation of the imaging device 10A may be performed by delaying the light control signal using a delay circuit 50 outside the control logic 24. When performing the calibration operation, the delay circuit 50 may be implemented, for example, on a test board on which the imaging device 10A is mounted.

[0047] Figure 5A and Figure 5B is a circuit diagram showing a pixel of an imaging device according to an exemplary embodiment.

[0048] Reference Figure 5A , in the pixel PX of the imaging device in the exemplary embodiment, a photodiode PD for generating charge in response to incident light and a pixel circuit (e.g., first to fourth pixel circuits PC1 - PC4) for outputting an electrical signal corresponding to the charge generated by the photodiode PD may be included.

[0049] The first pixel circuit PC1 may be connected to the first column line COL1. The second pixel circuit PC2 may be connected to the second column line COL2. The third pixel circuit PC3 may be connected to the third column line COL3. The fourth pixel circuit PC4 may be connected to the fourth column line COL4. The first to fourth column lines COL1 to COL4 may be connected to a sampling circuit for obtaining pixel circuits from the first to fourth pixel circuits PC1 to PC4 and an analog - to - digital converter for converting the pixel circuits into digital data.

[0050] The first to fourth pixel circuits PC1 to PC4 may have the same structure. In the exemplary embodiment, the first pixel circuit PC1 may include a first phototransistor PX1 connected to the photodiode PD, a first transfer transistor TX1, a first floating diffusion FD1 for accumulating charge from the first phototransistor PX1, and a plurality of first circuit elements RX1, DX1, and SX1. The plurality of first circuit elements RX1, DX1, and SX1 may include a first reset transistor RX1, a first drive transistor DX1, and a first selection transistor SX1. Control signals TG1, control signal RG1, and control signal SEL1 for respectively controlling the first transfer transistor TX1, the first reset transistor RX1, and the first selection transistor SX1 may be input by a clock driver of the imaging device.

[0051] When the first reset transistor RX1 is turned on, the voltage of the first floating diffusion FD1 can be reset to the power supply voltage VDD, and the selection transistor SX1 can be turned on so that the first reset voltage can be output to the first column line COL1. During a first exposure time before the first reset transistor RX1 is turned off and the first transfer transistor TX1 is turned on, the photodiode PD can be exposed to light and can generate charges.

[0052] When the first transfer transistor TX1 is turned on, the charges generated by the phototransistor PD and accumulated by the first photodiode PX1 can move to the first floating diffusion FD1. When the first selection transistor SX1 is turned on, the first pixel voltage can be output to the first column line COL1. The first analog-to-digital converter connected to the first column line COL1 can convert the difference between the first reset voltage and the first pixel voltage into first raw data DATA1 (digital data).

[0053] The operations of the second to fourth pixel circuits PC2 - PC4 can be similar to the operation of the first pixel circuit PC1. However, the photoelectric control signals PG1 - PG4 input to each of the first to fourth pixel circuits PC1 - PC4 can have different phases. In an exemplary embodiment, the photoelectric control signals PG1 - PG4 can have the same frequency as the light control signal, can have phase differences of 0 degrees, 90 degrees, 180 degrees, and 270 degrees based on the light control signal, and can vary in terms of duty cycle, as further described below.

[0054] While performing the above calibration operation, the light control signal can be delayed by a delay circuit by a predetermined delay time. Even while performing the calibration operation, the photoelectric control signals PG1 - PG4 can still have phase differences of 0 degrees, 90 degrees, 180 degrees, and 270 degrees based on the light control signal before it is delayed (rather than the light control signal delayed by the delay circuit).

[0055] Reference Figure 5B , in another exemplary embodiment, the pixel PX can include first to fourth sub-pixels PX SUB1 -PX SUB4 . The first to fourth sub-pixels PX SUB1 -PX SUB4 can have the same structure. As an example, referring to the first sub-pixel PX SUB1 , the first sub-pixel PX SUB1It may include a first photodiode PD1 and a pixel circuit connected to the first photodiode PD1 through a first photoelectric node PN1. The pixel circuit may include a photoelectric transistor PX1, a transfer transistor TX1, a floating diffusion FD1, a reset transistor RX1, a driving transistor DX1, and a selection transistor SX1. The configuration of the pixel circuit may vary according to the exemplary embodiments. The operation of the pixel circuit may be similar to the example described with reference to Figure 5A as described.

[0056] In Figure 5A and Figure 5B the exemplary embodiments shown, the photoelectric control signals PG1 - PG4 may have phase differences of 0 degrees, 90 degrees, 180 degrees, and 270 degrees based on the optical control signal, and may have the same frequency as the frequency of the optical control signal. In addition, in the exemplary embodiments, through a calibration operation for optimizing the duty cycle of the optical control signal, the duty cycle of each of the photoelectric control signals PG1 - PG4 may be greater than 1 / 2 of the duty cycle of the optical control signal, as described below with reference to Figures 6 to 8 as described.

[0057] Figures 6 to 8 is a schematic diagram showing the operation of an imaging device according to an exemplary embodiment

[0058] Referring to Figures 6 to 8 , the photoelectric control signals PG1 - PG4 input to the pixel PX and the optical control signal input to the light source may have the same frequency. The photoelectric control signal PG1 to the photoelectric control signal PG4 may have phase differences of 0 degrees, 90 degrees, 180 degrees, and 270 degrees based on the optical control signal.

[0059] The optical control signal input to the light source of the imaging device and the light reception signal (generated from the light reflected by the object) input to the pixel array of the imaging device may have a predetermined phase difference Phase difference may be determined according to the raw data, where the raw data is determined according to the exposure times ex1 - ex3 during which the photoelectric control signals PG1 - PG4 overlap with the light reception signal. In the exemplary embodiments, the phase difference may be determined as in Equation 2 below. In Equation 2, "A1" to "A4" respectively indicate the raw data output by the first pixel circuit to the fourth pixel circuit PC1 - PC4.

[0060]

Equation 2

[0061]

[0062] The depth data for the object according to the phase difference may be determined as described above with reference to Equation 1.

[0063] Reference Figure 6 In the basic example of [reference], the duty ratio of each of the optoelectronic control signals PG1 - PG4 can be set to 1 / 2 of the duty ratio of the optical control signal. For example, the ratio between the period T PD and the first conduction time T ON1 (where the light emitting device of the light source actually outputs light) can be 50%, that is, the duty ratio is 50%. In this case, the duty ratio of each of the optoelectronic control signals PG1 to PG4 can be set to 1 / 2 of it, that is, 25%. However, when driving the imaging device in this way using the optical control signal and the optoelectronic control signals PG1 - PG4, harmonic distortion may occur (where the fundamental frequency component is enhanced or canceled by multiple components of the frequency of the optical control signal), and the accuracy of the depth data generated by the imaging device may be reduced. For example, the falling edge of the optical control signal can be aligned with the falling edge of one or more of the optoelectronic control signals PG1 - PG4.

[0064] In an exemplary embodiment, by performing a calibration operation for optimizing the duty ratio of the optical control signal while maintaining the duty ratio of the optoelectronic control signals PG1 - PG4 unchanged, harmonic distortion can be reduced, and the performance of the imaging device can be improved. Therefore, after the calibration operation is completed, the duty ratio of the optical control signal can have a value different from twice the duty ratio of each of the optoelectronic control signals PG1 - PG4.

[0065] In an exemplary embodiment, after the calibration operation is completed, the optoelectronic control signals PG1 - PG4 can each have the same frequency as the optical control signal, can have phase differences of 0 degrees, 90 degrees, 180 degrees, and 270 degrees relative to the optical control signal respectively, and the duty ratio of the optoelectronic control signals PG1 - PG4 can be determined such that the falling edge of each of the optoelectronic control signals PG1 - PG4 appears at a time point different from the time point of the falling edge of the optical control signal. This is described in Figure 7 and Figure 8 .

[0066] For example, with reference to Figure 7 and Figure 8 , the duty ratio of each of the optoelectronic control signals PG1 - PG4 can be maintained unchanged. For example, as maintained at 25% as described above with reference to Figure 6 , while the duty ratio of the optical control signal can be 40% in the exemplary embodiment described with reference to Figure 7 , and can be 33.3% in the exemplary embodiment described with reference to Figure 8 .

[0067] Since the duty ratio of the light reception signal (generated from the reflected light) is the same as the duty ratio of the optical control signal (generating the emitted light), thus in the above referenceFigures 6 to 8 In the described case, the exposure times ex1-ex3 (where the photoelectric control signals PG1-PG4 overlap with the light reception signals) may be different. Therefore, in different cases, the depth data generated by the imaging device may be different. During the calibration operation, the depth data generated by the imaging device under each light control signal with a different duty ratio can be compared with the actual depth between the imaging device and the object. As a result of the comparison, the light control signal can be configured such that the difference between the depth data and the actual depth is minimized.

[0068] Figure 9 is a schematic diagram showing the operation of an imaging device according to an exemplary embodiment.

[0069] Figure 9 shows the calibration operation of the imaging device 100 according to an exemplary embodiment. The calibration operation can be performed, for example, before the imaging device is installed on an electronic device.

[0070] The imaging device 100 may include an image sensor 110, a pixel array 111, a logic circuit 112, and a light source 120. The light source 120 may include a light emitting device 121 and a light source driver 122.

[0071] In an example, the imaging device 100 may not include a circuit such as a delay locked loop configured to delay the light control signal, PWM signal output by the logic circuit 112 and input the signal to the light source driver 122. Therefore, for the calibration operation, a delay signal can be generated by delaying the light control signal output from the logic circuit 112 to the light source driver 122 by using a delay circuit 300 mounted on a test board installed together with the imaging device 100. While performing the calibration operation, the light source 120 can operate according to the delay signal, and the imaging device 100 and the delay circuit 300 can be controlled by an external processor 400.

[0072] In another example, the logic circuit 112 of the imaging device 100 includes a circuit such as a delay locked loop, and the calibration operation can be performed without the delay circuit 300. In this case, the calibration operation can be performed even after the imaging device 100 is installed on an electronic device, and the calibration operation can be performed by an application processor or a central processing unit of the electronic device.

[0073] The test object 200 can be used for calibration operations. The test object 200 can be arranged to be spaced apart from the imaging device by a predetermined distance. A white chart or the like can be used as the test object. During the calibration operation, the distance between the test object 200 and the imaging device 100 may not change, and the delay circuit 300 can use the delay signal obtained by delaying the light control signal so that the depth data generated by sensing the test object 200 by the imaging device 100 can be changed.

[0074] In the following description, reference will be made to Figure 10 describe the calibration operation of the imaging device in more detail.

[0075] Figure 10 is a flowchart showing the operation of the imaging device according to an exemplary embodiment.

[0076] Refer to Figure 10 , the calibration operation of the imaging device 100 in the exemplary embodiment can start from initializing the duty cycle of the light control signal by the logic circuit 112 (S10). As described above, the light control signal can be the signal output from the logic circuit 112 to the light source driver 122, and can be a PWM signal having a predetermined frequency. In the exemplary embodiment, in operation S10, the duty cycle of the light control signal can be initialized to 50%.

[0077] When initializing the duty cycle of the light control signal, the delay time of the light control signal can be initialized (S11). In the exemplary embodiment, the delay circuit 300 can initialize the delay time in response to a control command from the processor 400. When the delay time is initialized, the light control signal output by the logic circuit 112 can be input to the light source driver 122 as it is.

[0078] The light source driver 122 can use the light control signal to drive the light emitting device 121, and the image sensor 110 can calculate the depth data of the test object 200 using the light reception signal (generated from the light reflected by the test object 200) while the light emitting device 121 is operating (S12). The depth data calculated in operation S12 can include information indicating the distance between the imaging device 100 and the test object 200.

[0079] The processor 400 can calculate reference data according to the delay time (S13). When the light source driver 122 drives the light emitting device 121 in response to the delay signal in which the predetermined delay time is reflected in the light control signal, the reference data can be determined by the delay phase difference obtained by adding the delay time to the phase difference between the light control signal and the light reception signal.

[0080] The processor 400 may obtain an operation error (S14) by comparing the depth data obtained in operations S12 and S13 with reference data. In an exemplary embodiment, the operation error may be the difference between the depth data and the reference data. The processor 400 that has obtained the operation error may determine whether the delay time reflected in the delay signal is the maximum delay time (S15). As a result of the determination in operation S15, when the delay time has not reached the maximum delay time, the processor 400 may control the delay circuit 300 to increase the delay time (S16), and may repeatedly execute operations S12 to S14. Operations S12 to S14 may be repeatedly executed until the delay time reaches the maximum delay time, so that the processor 400 may obtain a plurality of operation errors using delay signals with different delay times.

[0081] The maximum delay time may be determined according to the frequency of the light control signal. In an exemplary embodiment, the processor 400 may increase the delay time by adding the unit time to the delay time determined by the delay circuit 300. When it is determined that the delay time reaches or exceeds the maximum delay time as a result of adding the unit time to the delay time, the processor 400 may determine the difference between the maximum value and the minimum value among the plurality of operation errors as a result value (S17). The result value determined in operation S17 may indicate how large the deviation is in the operation error.

[0082] When operation S17 is executed, the processor 400 may determine that the performance evaluation of the light control signal having the duty cycle (e.g., 50% duty cycle) initialized in operation S10 has been completed. In an exemplary embodiment, the processor 400 may determine whether the duty cycle of the light control signal has reached the minimum duty cycle (S18). The minimum duty cycle of the light control signal may be defined as the duty cycle of the optoelectronic control signal input to the pixel array 111 by the logic circuit 112 in the image sensor 110. For example, when the duty cycle of the light control signal is initialized to 50%, the minimum duty cycle of the light control signal may be 25%. Operation S18 may be executed in the imaging device 100 instead of in the processor 400.

[0083] When it is determined as a result of the determination in operation S18 that the duty cycle of the light control signal is greater than the minimum duty cycle, the processor 400 may transmit a control command for reducing the duty cycle of the light control signal to the imaging device 100. The logic circuit 112 of the imaging device 100 may reduce the duty cycle of the light control signal in response to the control command (S19), and operations S11 to S17 may be executed again.

[0084] For example, in operation S19, when the initial duty ratio of the optical control signal is defined as a first duty ratio and the duty ratio of the optoelectronic control signal input from the logic circuit 112 to the pixel array 111 is defined as a second duty ratio, the duty ratio of the optical control signal can be changed to a first reference duty ratio that is less than the first duty ratio and greater than the second duty ratio. In operation S11, the delay time of the optical control signal can be initialized, and an operation error can be obtained while increasing the delay time of the optical control signal until the maximum delay time is reached. Therefore, a result value corresponding to the difference between the maximum value and the minimum value among the operation errors that occur in the imaging device 100 using the optical control signal having the first reference duty ratio can be obtained.

[0085] When the first reference duty ratio does not reach the minimum duty ratio of the optical control signal (No in S18), the duty ratio of the optical control signal can be reduced to a second reference duty ratio that is less than the first reference duty ratio, and operations S11 to S17 can be executed again. The minimum duty ratio of the optical control signal can be defined as the second duty ratio. For example, when the duty ratio of the optical control signal is initialized to 50%, the minimum duty ratio of the optical control signal can be 25%.

[0086] As a result of the determination in operation S18, when it is determined that as a result of reducing the duty ratio of the optical control signal, the duty ratio of the optical control signal reaches the minimum duty ratio or the duty ratio of the optical control signal is reduced to less than the minimum duty ratio (Yes in S18), the processor 400 can control the optical control signal.

[0087] In an exemplary embodiment, the processor 400 can determine the duty ratio of the optical control signal (S20) using the result value obtained by performing operations S11 to S17 using optical control signals having the first duty ratio, the first reference duty ratio, and the second reference duty ratio, respectively. In an exemplary embodiment, it can be determined that the smaller the result value, the smaller the deviation of the operation error generated in the imaging device 100, and the smaller the influence of the harmonic noise component reflected in the depth data in the operation of the light source 120. The duty ratio of the optical control signal can be determined as the duty ratio when the minimum result value among the obtained result values is obtained.

[0088] Generally, for example, as referred to above Figure 6 described, the duty ratio of the optical control signal and the duty ratio of the optoelectronic control signal can be set to an integer multiple of each other according to the structure of the imaging device. For example, the optical control signal and the optoelectronic control signal can have the same duty ratio, or the duty ratio of the optical control signal can be twice the duty ratio of the optoelectronic control signal.

[0089] In an exemplary embodiment, while maintaining the duty cycle of the opto-electronic control signal constant, the duty cycle of the optical control signal can be decreased to find the duty cycle of the optical control signal that minimizes the harmonic noise component. Thus, the duty cycle of the optical control signal may not be an integer multiple of the duty cycle of the opto-electronic control signal. As an example, the duty cycle of the optical control signal can be greater than the duty cycle of the opto-electronic control signal and less than twice the duty cycle of the opto-electronic control signal, for example, as described above with reference to Figure 7 and Figure 8 described.

[0090] In the following description, a method for determining the duty cycle of the optical control signal in an imaging device will be described in detail with reference to Figures 11A to 13E In an exemplary embodiment.

[0091] Figures 11A to 13E is a schematic diagram showing the operation of an imaging device according to an exemplary embodiment.

[0092] Figures 11A to 11E shows the operation of the imaging device when the optical control signal has a first duty cycle (i.e., the initial duty cycle). Figures 12A to 12E shows the operation of the imaging device when the optical control signal has a second duty cycle less than the first duty cycle. Figures 13A to 13E shows the operation of the imaging device when the optical control signal has a third duty cycle less than the second duty cycle.

[0093] Referring to Figure 11A , the first duty cycle (i.e., the initial duty cycle of the optical control signal) can be set to 50%. Thus, the first on-time T ON1 (wherein the light emitting device actually operates according to the optical control signal) can be 1 / 2 of the period T PD . The period of each of the opto-electronic control signals PG1 - PG4 can be the same as the period T PD of the optical control signal, and the duty cycle can be 25%, i.e., 1 / 2 of the first duty cycle. The optical reception signal (generated from the reflected light) can have a first phase difference with respect to the optical control signal (generating the emitted light)

[0094] In reference to Figure 11AIn the described exemplary embodiment, the depth data output by the imaging device may be determined according to exposure times ex1-ex3 that overlap each of the photoelectric control signals PG1-PG4 with the light reception signal. Each pixel included in the imaging device may output a pixel signal corresponding to the exposure times ex1-ex3, and the logic circuit may generate first depth data by converting the pixel signal into raw data. The first depth data may be compared with first reference data (the actual distance between the test object, the object, and the imaging device). The logic circuit of the imaging device or the processor for controlling the imaging device during the calibration operation may generate a first operation error by calculating the difference between the first depth data and the first reference data.

[0095] When generating the first operation error, a predetermined delay time may be reflected in the light control signal. Refer to Figure 11B , a delay circuit arranged inside or outside the imaging device may generate a delay signal by delaying the light control signal by a first delay time TD1. Since the light control signal is delayed by the first delay time TD1, the light reception signal may also be delayed by the first delay time TD1. Therefore, the first photoelectric control signal PG1 (synchronized to have the same phase as the phase of the light control signal) may have a second phase difference with respect to the light reception signal The second phase difference may be determined as the sum of the first phase difference and the first delay time TD1.

[0096] Therefore, refer to Figure 11B , the exposure times ex2-ex4 that overlap the photoelectric control signals PG1-PG4 with the light reception signal may be different from the exemplary embodiment described in Figure 11A , which may indicate that without adjusting the actual distance between the imaging device and the test object, the depth data generated by sensing the test object by the imaging device may change.

[0097] The imaging device may generate second depth data corresponding to the exposure times ex2-ex4, and the processor for controlling the imaging device during the calibration operation may use the second phase difference to calculate the second reference data. When the light control signal and the light reception signal have the second phase difference and the first delay time TD1 is not reflected in the light control signal, the second reference data may correspond to the distance between the imaging device and the test object. In the exemplary embodiment, the processor may calculate the second reference data by applying the second phase difference to Equation 1. Therefore, the second reference data may be the distance between the imaging device and the test object, where the distance can theoretically be calculated using the second phase difference to calculate.

[0098] The logic circuit or processor of the imaging device may generate a second operation error by calculating the difference between the second depth data and the second reference data. As described above, the second phase difference may be the sum of the first delay time TD1 and the first phase difference and the first phase difference may be calculated using the actual distance between the imaging device and the test object.

[0099] Reference Figure 11C , the light control signal may be delayed by the second delay time TD2, and the phase difference between the first opto-electronic control signal PG1 and the light reception signal may be defined as the third phase difference i.e., the sum of the second delay time TD2 and the first phase difference . Thus, reference Figure 11C , the exposure times ex3 and ex4 may be different from the examples shown in Figure 11A and Figure 11B . The imaging device may output third depth data, and the processor may calculate the third reference data using the third phase difference . The logic circuit or processor of the imaging device may obtain a third operation error by calculating the difference between the third depth data and the third reference data.

[0100] In the example embodiments described above with reference to Figure 11D and Figure 11E , the light control signal may be delayed by the third delay time TD3 and the fourth delay time TD4, respectively. Thus, the phase difference between the first opto-electronic control signal PG1 and the light reception signal may be increased to the fourth phase difference and the fifth phase difference respectively. Thus, the exposure times ex1-ex4 may vary. The processor for controlling the imaging device may generate the fourth reference data and the fifth reference data corresponding to the fourth phase difference and the fifth phase difference . Depending on the exposure times ex1-ex4, the imaging device may output the fourth depth data and the fifth depth data. The logic circuit or processor of the imaging device may obtain the fourth operation error and the fifth operation error by calculating the differences between the fourth depth data and the fourth reference data and between the fifth depth data and the fifth reference data.

[0101] In the example embodiment, when a delay time longer than the fourth delay time TD4 is applied to the light control signal, the delay time may exceed the period T of the light control signal PDAccordingly, when the imaging device operates using the delay signal reflecting the fourth delay time TD4 and obtains the fifth operation error, the processor may select the maximum value and the minimum value among the first operation error to the fifth operation error, and may determine the difference between the maximum value and the minimum value as the first result value. The first result value determined by the processor may be a value for evaluating the performance of the imaging device when the optical control signal has the first duty cycle.

[0102] Reference Figure 12A , the duty cycle of the optical control signal may be reduced to a second duty cycle that is less than the first duty cycle (i.e., less than the initial duty cycle). In an exemplary embodiment, the imaging device may reduce the duty cycle of the optical control signal to the second duty cycle in response to a control command received from the processor. In an exemplary embodiment, the second duty cycle may be 40%. The period of each of the photo - electric control signals PG1 - PG4 may be the same as the period T of the optical control signal PD and the duty cycle may be 25%, i.e., 1 / 2 of the first duty cycle. Accordingly, in an exemplary embodiment, the duty cycle of the optical control signal may not be determined as an integer multiple of the duty cycles of the photo - electric control signals PG1 - PG4, and may be less than twice the duty cycles of the photo - electric control signals PG1 - PG4. Since the distance between the imaging device and the test object does not change, the optical reception signal and the optical control signal may have a first phase difference

[0103] In the exemplary embodiment described in reference Figure 12A , the depth data output by the imaging device may be determined according to the exposure times ex1 - ex3 that overlap each of the photo - electric control signals PG1 - PG4 with the optical reception signal. However, since the duty cycle of the optical control signal is adjusted to the second duty cycle, the exposure times ex1 - ex3 in the exemplary embodiment described in reference Figure 12A may be different from the exposure times ex1 - ex3 in the exemplary embodiment described in reference Figure 11A . Accordingly, the first depth data may be generated differently from the exemplary embodiment described in reference Figure 11A , and the first operation error may also have a different value.

[0104] Once the first operation error is obtained, the processor may apply a first delay time TD1 to the optical control signal. The first delay time TD1 in the exemplary embodiment described in reference Figure 12B may be the same as the first delay time TD1 in the exemplary embodiment described in reference Figure 11B . Accordingly, the phase difference between the first photo - electric control signal PG1 and the optical reception signal may be a second phase difference and the second reference data calculated by the processor may be the same as the exemplary embodiment described in reference Figure 11B .

[0105] However, since the duty cycle of the optical control signal is adjusted to a second duty cycle, the exposure times ex2 and ex3 during which the photoelectric control signals PG1 - PG4 overlap with the optical reception signal may be different from those in the reference Figure 11B described exemplary embodiment. Accordingly, the second depth data generated by the imaging device may be different from that in the reference Figure 11B described exemplary embodiment, and the second operation error may also be different.

[0106] Reference Figures 12C to 12E , the optical control signal may be delayed by a second delay time TD2, a third delay time TD3, and a fourth delay time TD4, respectively, and the second to fourth delay times TD2 - TD4 may be the same as the second to fourth delay times TD2 - TD4 described in the foregoing exemplary embodiment of the reference Figures 11C to 11E . However, since the optical control signal has a second duty cycle, the exposure times ex1 - ex4 may be different from those in the reference Figures 11C to 11E described exemplary embodiment. Accordingly, at least one of the third to fifth depth data and the third to fifth operation errors may be calculated as different values.

[0107] As described above, the fourth delay time TD4 may correspond to the maximum delay time. Accordingly, when the imaging device operates using a delay signal reflecting the fourth delay time TD4 and obtains a fifth operation error, the processor may select the maximum and minimum values among the first to fifth operation errors, and may determine the difference between the maximum and minimum values as a second result value. The second result value may be used to evaluate the performance of the imaging device when the optical control signal has a second duty cycle.

[0108] Reference Figure 13A , the duty cycle of the optical control signal may be reduced to a third duty cycle that is less than the second duty cycle. In an exemplary embodiment, the imaging device may set the duty cycle of the optical control signal to the third duty cycle in response to a control command received from the processor. In an exemplary embodiment, the third on - time T ON3 may be 1 / 3 of the period T PD of the optical control signal, and the third duty cycle may be approximately 33.3%. The period of each of the photoelectric control signals PG1 to PG4 may be the same as the period T PD of the optical control signal, and the duty cycle may be 25%, i.e., 1 / 2 of the first duty cycle. Accordingly, the duty cycle of the optical control signal may be determined as a value other than an integer multiple of the duty cycles of the photoelectric control signals PG1 - PG4. Since the distance between the imaging device and the test object does not change, the optical reception signal and the optical control signal may have a first phase difference

[0109] In the exemplary embodiment described in the reference Figure 13A the depth data output by the imaging device can be determined according to exposure times ex1 and ex2 that overlap each of the photoelectric control signals PG1 - PG4 with the light reception signal. However, since the light control signal has a third duty ratio, the first depth data calculated from the exposure times ex1 and ex2 in the exemplary embodiment described in the reference Figure 13A may be different from the first depth data calculated from the exposure times ex1 - ex3 in the exemplary embodiments shown in Figure 11A and 12A Accordingly, the first operation error corresponding to the example without a delay time can also be different from the exemplary embodiments described in the reference Figure 11A and Figure 12A

[0110] Once the first operation error is obtained, the processor can apply a first delay time TD1 to the light control signal. The first delay time TD1 in the exemplary embodiment described in the reference Figure 13B can be the same as the first delay time TD1 in the exemplary embodiments shown in Figure 11B and Figure 12B Accordingly, the phase difference between the first photoelectric control signal PG1 and the light reception signal can be a second phase difference and the second reference data calculated by the processor can be the same as the exemplary embodiments described in the reference Figure 11B and Figure 12B

[0111] However, since the light control signal has a third duty ratio, the exposure times ex2 and ex3 that overlap the photoelectric control signals PG1 - PG4 with the light reception signal may be different from the examples shown in Figure 11B and Figure 12B Accordingly, the second depth data and the second operation error generated by the imaging device can be different from the exemplary embodiments described in the reference Figure 11B and Figure 12B

[0112] Referring to Figures 13C to 13E the light control signal can be delayed by a second delay time TD2, a third delay time TD3, and a fourth delay time TD4, respectively, and the second to fourth delay times TD2 - TD4 can be the same as the reference Figures 11C to 11E as well as Figures 12C to 12E ​​​The second to fourth delay times TD2 - TD4 described are the same. However, since the optical control signal has a second duty cycle, at least one of the third to fifth depth data and the third to fifth operation errors may be calculated differently.

[0113] The fourth delay time TD4 may correspond to the maximum delay time. Thus, when the imaging device operates using a delay signal reflecting the fourth delay time TD4 and obtains a fifth operation error, the processor may select the maximum and minimum values among the first to fifth operation errors, and may determine the difference between the maximum and minimum values as the third result value. The third result value may be a value for evaluating the performance of the imaging device when the optical control signal has a third duty cycle.

[0114] As an example, the processor may select the minimum result value among the first to third result values, and may determine the duty cycle corresponding to the selected result value as the final duty cycle of the optical control signal. In the following description, the configuration will be described in more detail with reference to Figure 14 more specifically.

[0115] Figure 14 is a schematic diagram showing the operation of an imaging device according to an exemplary embodiment.

[0116] In Figure 14 , the first to third graphs E1 - E3 correspond to the duty cycles applied to the optical control signal during the calibration operation of the imaging device. The horizontal axis corresponds to the reference data. The vertical axis corresponds to the operation error.

[0117] As described with reference to Figures 11A to 13E , the first to fifth reference data DR1 - DR5 can theoretically be calculated from the first to fifth phase differences reflecting the delay time . In the exemplary embodiment, the first to fifth reference data DR1 - DR5 do not necessarily correspond in order to the first phase difference to the fifth phase difference .

[0118] The first graph E1 may correspond to an example where the optical control signal has a first duty cycle. In the exemplary embodiment, the first duty cycle may be 50%. Thus, the first graph E1 may represent the operation error obtained by calculating the difference between the depth data output by the imaging device and the reference data calculated by the processor while applying different delay times to the optical control signal having the first duty cycle. The difference between the maximum value MAX1 and the minimum value MIN1 among the operation errors of the first graph E1 may be the first result value R1.

[0119] The second graph E2 may correspond to an example where the optical control signal has a second duty cycle that is less than the first duty cycle. In an example embodiment, the second duty cycle may be 40%. Similar to the first graph E1, the second graph E2 may represent an operation error obtained by calculating the difference between the depth data output by the imaging device and the reference data calculated by the processor while applying different delay times to the optical control signal with the second duty cycle. The difference between the maximum value MAX2 and the minimum value MIN2 among the operation errors of the second graph E2 may be the second result value R2.

[0120] The third graph E3 may correspond to an example where the optical control signal has a third duty cycle that is less than the second duty cycle. In an example embodiment, the third duty cycle may be 1 / 3 or 33%. The third graph E3 may represent an operation error obtained by calculating the difference between the depth data output by the imaging device and the reference data calculated by the processor while applying different delay times to the optical control signal with the third duty cycle. The difference between the maximum value MAX3 and the minimum value MIN3 among the operation errors of the third graph E3 may be the third result value R3.

[0121] In the example embodiment described with reference Figure 14 the third result value R3 may be the smallest result value among the first to third result values R1 - R3. Therefore, in the calibration operation, the duty cycle of the optical control signal may be set to the third duty cycle. After the calibration operation is completed, the imaging device may generate a depth image by driving the light source with the optical control signal having the third duty cycle.

[0122] As described above, the imaging device may operate in a normal mode and a calibration mode. In the normal mode after the calibration operation is terminated, the duty cycle of the optical control signal may be less than twice the duty cycle of the optoelectronic control signal.

[0123] Figure 15 is a flowchart showing the operation of an imaging device according to an example embodiment.

[0124] Referring to Figure 15 , in the calibration operation of the imaging device in the example embodiment, it may start with initializing the delay time of the optical control signal (S30). As described above, the optical control signal may be a signal output from a logic circuit to a light source driver and may be a PWM signal having a predetermined frequency. The delay time of the optical control signal may be determined by a delay circuit such as a delay locked loop. In an example embodiment, the delay time of the optical control signal may be initialized using a delay circuit installed on the imaging device or using a delay circuit installed on a test board together with the imaging device for performing the calibration operation. In an example embodiment, the delay time may be initialized to zero. In an example embodiment, the calibration operation may be performed by the imaging device and an external processor controlling the imaging device.

[0125] When initializing the delay signal of the optical control signal, the duty cycle of the optical control signal may be initialized (S31). In an exemplary embodiment, the duty cycle of the optical control signal may be initialized by a logic circuit included in the imaging device. In an exemplary embodiment, the duty cycle of the optical control signal may be initialized to 50%.

[0126] The light source driver may drive the light emitting device using the optical control signal having the initialized delay time and duty cycle, and the image sensor may calculate the depth data of the test object using the light reception signal reflected from the test object (S32). The depth data calculated in operation S32 may include information about the distance between the imaging device and the test object.

[0127] The processor may calculate reference data based on the delay time (S33). The reference data may be determined by the phase difference between the optical control signal and the light reception signal, and when the light source operates using the delay signal obtained by applying a predetermined delay time to the optical control signal, the reference data may be determined by the delay phase difference obtained by reflecting the delay time in the phase difference between the optical control signal and the light reception signal.

[0128] The processor may obtain an operation error by comparing the depth data obtained in operations S32 and S33 with the reference data (S34). The operation error may be the difference between the depth data and the reference data. The processor that has obtained the operation error may determine whether the duty cycle of the optical control signal is the minimum duty cycle. The duty cycle of the optical control signal may be greater than the duty cycle of the photoelectric control signal of the pixels input to the imaging device, and the minimum duty cycle may be determined under the above conditions.

[0129] When the duty cycle of the optical control signal does not reach the minimum duty cycle (No in S35), the processor may control the imaging device to reduce the duty cycle of the optical control signal (S36). When the imaging device reduces the duty cycle of the optical control signal, operations S32 to S34 may be performed again. Therefore, operations S32 to S34 may be repeatedly performed until the duty cycle of the optical control signal has been reduced to the minimum duty cycle, and the processor may obtain a plurality of operation errors while changing the duty cycle of the optical control signal having a single delay time.

[0130] When the duty cycle of the optical control signal reaches the minimum duty cycle or drops below the minimum duty cycle as a result of reducing the current duty cycle (Yes in S35), the processor may increase the delay time of the optical control signal (S37). When the delay time of the optical control signal increases, the processor may determine whether the delay time of the optical control signal reaches the maximum delay time (S38). When the delay time according to the determined result does not reach the maximum delay time (No in operation S38), the imaging device may re-initialize the duty cycle of the optical control signal (S31) and may obtain the operation error again while reducing the duty cycle.

[0131] Therefore, in the exemplary embodiment described with reference to Figure 15 the operation error can be obtained by reducing the duty cycle of the optical control signal without a delay time, the operation error can be obtained by reducing the duty cycle of the optical control signal with a first delay time, and the operation error can be obtained by reducing the duty cycle of the optical control signal with a second delay time longer than the first delay time. When the delay time reaches the maximum delay time, the processor may classify the operation error according to the delay time and may determine the difference between the maximum value and the minimum value among the operation errors at each delay time as the result value (S39). The processor may determine the duty cycle of the optical control signal as the duty cycle corresponding to the minimum result value among the result values obtained for the delay time (S40).

[0132] In the following description, reference will be made to Figures 16A to 18C a method for determining the duty cycle of an optical control signal in an imaging device in an exemplary embodiment will be described in detail.

[0133] Figures 16A to 18C is a schematic diagram showing the operation of an imaging device according to an exemplary embodiment.

[0134] Figures 16A to 16C shows the operation of the imaging device when the delay time is not reflected in the optical control signal. Figures 17A to 17C shows the operation of the imaging device when a first delay time TD1 is applied to the optical control signal. Figures 18A to 18C shows the operation of the imaging device when a second delay time TD2 longer than the first delay time TD1 is applied to the optical control signal.

[0135] With reference to Figure 16A , the first duty cycle (i.e., the initial duty cycle of the optical control signal) may be 50%. The period of each of the photoelectric control signals PG1 - PG4 is the same as the period T of the optical control signal PD and the duty cycle may be 25%, i.e., 1 / 2 of the first duty cycle. The optical reception signal may have a first phase difference with respect to the optical control signal

[0136] In the example embodiment described with reference to Figure 16A , the depth data output by the imaging device can be determined according to the exposure times ex1 - ex3 that overlap each of the photoelectric control signals PG1 - PG4 with the light reception signal. The logic circuit can generate first depth data by converting the pixel signals corresponding to the exposure times ex1 - ex3 into raw data. The first depth data can be compared with first reference data (the actual distance between the test object, the object, and the imaging device). The logic circuit of the imaging device or the processor that controls the imaging device during the calibration operation can generate a first operation error by calculating the difference between the first depth data and the first reference data.

[0137] When the first operation error is generated, the logic circuit of the imaging device can reduce the duty cycle of the light control signal from a first duty cycle to a second duty cycle. In the example embodiment described with reference to Figure 16B , the second duty cycle can be 40%. Since the duty cycle of the light control signal is reduced, the exposure times ex1 - ex3 that overlap the photoelectric control signals PG1 - PG4 with the light reception signal can be different from those in the example embodiment described with reference to Figure 16A . Therefore, the second depth data output by the imaging device can also be different from the first depth data. The logic circuit or the processor of the imaging device can generate a second operation error by calculating the difference between the second depth data and the first reference data.

[0138] When the second operation error is generated, the duty cycle of the light control signal can be reduced to a third duty cycle as described with reference to Figure 16C . In the example embodiment, the third duty cycle can be 1 / 3 or 33%. Since the duty cycle of the light control signal changes, the exposure times ex1 and ex2 that overlap the photoelectric control signals PG1 - PG4 with the light reception signal can change again, and the third depth data generated by the imaging device can be different from the first depth data and the second depth data. The logic circuit or the processor of the imaging device can generate a third operation error by calculating the difference between the third depth data and the first reference data.

[0139] When the first operation error to the third operation error are generated, the duty cycle of the light control signal can be initialized again to the first duty cycle. In addition, the processor can generate a delay signal by delaying the light control signal by a first delay time TD1 using a delay circuit arranged inside or outside the imaging device. Referring to Figures 17A to 17C , since the light control signal is delayed by the first delay time TD1, the light reception signal may also be delayed by the first delay time TD1. Therefore, the first photoelectric control signal PG1 synchronized to have the same phase as the phase of the light control signal can have a second phase difference with respect to the light reception signal Second phase difference can be determined as the sum of the first phase difference and the first delay time TD1.

[0140] Therefore, referring to Figure 17A , the exposure times ex1 - ex3 that overlap the photoelectric control signals PG1 - PG4 with the optical reception signal can be different from the exemplary embodiments described in the reference Figure 16A . Without adjusting the actual distance between the imaging device and the test object, the depth data generated by sensing the test object by the imaging device may change.

[0141] The imaging device can generate fourth depth data corresponding to the exposure times ex1 - ex3, and the processor that controls the imaging device during the calibration operation can use the second phase difference to calculate the second reference data. In the exemplary embodiment, the second reference data can be calculated by applying the second phase difference to Equation 1 . The logic circuit or processor of the imaging device can generate a fourth operation error by calculating the difference between the fourth depth data and the second reference data.

[0142] Referring to Figure 17B , while the delay time of the optical control signal is maintained as the first delay time TD1, the duty cycle of the optical control signal can be reduced to a second duty cycle. The imaging device can generate fifth depth data corresponding to the exposure times ex2 and ex3. Since the phase difference between the first photoelectric control signal PG1 and the optical reception signal is the second phase difference as described in the reference Figure 17A Therefore, the fifth operation error can be obtained by calculating the difference between the fifth depth data and the second reference data.

[0143] Referring to Figure 17C , the duty cycle of the optical control signal can be reduced to a third duty cycle. The delay time of the optical control signal can be maintained as the first delay time TD1. The imaging device can generate sixth depth data corresponding to the exposure times ex2 and ex3, and the processor can obtain a sixth operation error by calculating the difference between the sixth depth data and the second reference data.

[0144] When the fourth to sixth operation errors are obtained, the imaging device can initialize the duty cycle of the optical control signal to the first duty cycle. In addition, the processor can use a delay circuit arranged inside or outside the imaging device to delay the optical control signal by a second delay time TD2 that is longer than the first delay time TD1. Referring to Figures 18A to 18C ​, the optical received signal may also be delayed by a second delay time TD2. Thus, the first optoelectronic control signal PG1 synchronized to have the same phase as the phase of the optical control signal and the optical received signal may have a third phase difference Third phase difference may be determined as the sum of the first phase difference and the second delay time TD2.

[0145] Thus, referring to Figure 18A , the exposure times ex3 and ex4 that overlap the optoelectronic control signals PG1 - PG4 with the optical received signal may be different from the Figure 16A and Figure 17A example embodiments shown therein. In addition, without adjusting the actual distance between the imaging device and the test object, the depth data generated by sensing the test object by the imaging device may be changed.

[0146] The imaging device may generate seventh depth data corresponding to the exposure times ex3 and ex4, and the processor controlling the imaging device during the calibration operation may use the third phase difference and Equation 1 to calculate the third reference data. The logic circuit or processor of the imaging device may generate a seventh operation error by calculating the difference between the seventh depth data and the second reference data.

[0147] Referring to Figure 18B , while the delay time of the optical control signal is maintained as the second delay time TD2, the duty cycle of the optical control signal may be reduced to a second duty cycle. The imaging device may generate eighth depth data corresponding to the exposure times ex3 and ex4, and since the exposure times ex3 and ex4 are different from the Figure 18A example embodiments described therein, the eighth depth data may be different from the seventh depth data. Since the phase difference between the first optoelectronic control signal PG1 and the optical received signal is the second phase difference thus, the eighth operation error may be obtained by calculating the difference between the eighth depth data and the second reference data.

[0148] Referring to Figure 18C , the duty cycle of the optical control signal may be reduced to a third duty cycle, and the delay time of the optical control signal may be maintained as the second delay time TD2. The imaging device may generate ninth depth data corresponding to the changed exposure times ex3 and ex4 according to the reduction of the duty cycle of the optical control signal, and the processor may obtain a ninth operation error by calculating the difference between the ninth depth data and the second reference data.

[0149] As an example, in Figures 18A to 18CIn the illustrated exemplary embodiment, the seventh depth data may be greater than the eighth depth data, and the eighth depth data may be greater than the ninth depth data. Accordingly, among the seventh depth data to the ninth depth data, the duty cycle corresponding to the depth data having a size most similar to the size of the second reference data may be determined as the duty cycle of the light control signal optimized to improve the performance of the imaging device.

[0150] In the exemplary embodiment, the first to ninth operation errors obtained in the exemplary embodiment described with reference Figures 16A to 18C The first operation error, the fourth operation error, and the seventh operation error in which the light control signal has a first duty cycle may be classified into a first group. The second operation error, the fifth operation error, and the eighth operation error in which the light control signal has a second duty cycle may be classified into a second group. The third operation error, the sixth operation error, and the ninth operation error in which the light control signal has a third duty cycle may be classified into a third group.

[0151] The logic circuit of the imaging device or an external processor of the imaging device may calculate first to third result values by calculating the difference between the maximum value and the minimum value among the operation errors included in each of the first to third groups. The minimum result value among the first to third result values may be selected, and the duty cycle corresponding to the selected result value may be selected as the duty cycle of the light control signal.

[0152] Figures 19 to 21 is a schematic diagram showing an electronic device including an imaging device according to an exemplary embodiment.

[0153] Figure 19 shows the appearance of an electronic device 500 including an imaging device according to an exemplary embodiment. In Figure 19 , the electronic device 500 may be implemented as, for example, a mobile device or a smart phone. In the exemplary embodiment, in addition to the mobile device, the electronic device 500 may also be applied to devices such as a television, a desktop computer, a monitor, a refrigerator, and devices providing security such as a door lock and an automated teller machine.

[0154] Referring to Figure 19 , the electronic device 500 may include a housing 510 and a camera unit 520. The camera unit 520 may be disposed on the rear surface of the housing 510 and / or on the front surface of the housing 510 on which a display is disposed. The camera unit 520 may include a plurality of cameras 521-523 and a light source 524.

[0155] At least one of the plurality of cameras 521 - 523 may be implemented as an imaging device according to an example embodiment. In the example embodiment, the imaging device may employ a predetermined light control signal to drive a light source 524 mounted on the camera unit 520. The light output by the light source operated by the light control signal may be reflected from an object and may be incident on the pixel array of the imaging device to generate a light reception signal. The light reception signal and the light control signal may have a predetermined phase difference, and the imaging device may generate a depth image including the object by calculating the phase difference between the light control signal and the light reception signal. The specific operation of the imaging device may be understood with reference to the example embodiment described above with reference to Figures 1 to 18C The example embodiment described. In the example embodiment, the duty cycle of the light control signal may be less than twice the duty cycle of the photoelectric control signal input to the pixel array of the imaging device operated by being interlocked with the light source 524. Accordingly, the duty cycle of the light control signal may not be an integer multiple of the duty cycle of the photoelectric control signal.

[0156] Reference Figure 20 , the electronic device 1000 may include a camera module group 1100, an application processor 1200, a PMIC 1300, and a storage or external memory 1400.

[0157] The camera module group 1100 may include a plurality of camera modules 1100a, 1100b, and 1100c. Although the drawings illustrate three camera modules 1100a, 1100b, and 1100c, this is merely an example, and the camera module group 1100 may include, for example, two camera modules or four or more camera modules. In the example embodiment, at least one of the plurality of camera modules 1100a, 1100b, and 1100c included in the camera module group 1100 is an imaging device according to one of the example embodiments described above with reference to Figures 1 to 18C The example embodiment described.

[0158] Hereinafter, with reference to Figure 21 , the detailed configuration of the camera module 1100b will be described in more detail, and the following description also applies to the camera module 1100a and the camera module 1100b according to the example embodiment.

[0159] Reference Figure 21 , the camera module 1100b may include a prism 1105, an optical path folding element (hereinafter referred to as “OPFE”) 1110, an actuator 1130, an image sensing device 1140, and a storage unit 1150.

[0160] The prism 1105 may include a reflective surface 1107 made of a light-reflective material to change the path of the light L incident from the outside. In an exemplary embodiment, the prism 1105 may change the path of the light L incident in the first direction X to the second direction Y perpendicular to the first direction X. The prism 1105 may rotate the reflective surface 1107 made of a light-reflective material about the central axis 1106 in the direction A, or may rotate the central axis 1106 in the direction B, to change the path of the incident light L incident in the first direction X to the perpendicular second direction Y. The OPFE 1110 may also move in a third direction Z perpendicular to the first direction X and the second direction Y. For example, the maximum rotation angle of the prism 1105 in the A direction may be 15 degrees or less in the positive (+) A direction and greater than 15 degrees in the negative (-) A direction. The prism 1105 may move, for example, approximately 20 degrees, between 10 degrees and 20 degrees, or between 15 degrees and 20 degrees in the positive (+) B direction or the negative (-) B direction, and the prism 1105 may move the same angle or similar (within a range of about 1 degree) angles in the positive (+) B direction or the negative (-) B direction. The prism 1105 may move the reflective surface 1107 in a third direction (e.g., the Z direction) parallel to the extension direction of the central axis 1106.

[0161] The OPFE 1110 may include, for example, optical lenses including m (where m is a natural number) groups. The m lenses may move in the second direction Y to change the optical zoom ratio of the camera module 1100b. For example, when the basic optical zoom ratio of the camera module 1100b is Z and the m optical lenses included in the OPFE 1110 move, the optical zoom ratio of the camera module 1100b may be 3Z, 5Z, or 5Z or higher.

[0162] The actuator 1130 may move the OPFE 1110 or the optical lens to a specific position. In an exemplary embodiment, the actuator 1130 may adjust the position of the optical lens such that the imaging device 1142 may be disposed at the focal length of the optical lens for accurate sensing.

[0163] The image sensing device 1140 may include an imaging device 1142, control logic 1144, and a memory 1146. The imaging device 1142 may sense an image of a sensing target using the light L provided through the optical lens. The control logic 1144 may control the overall operation of the camera module 1100b. The control logic 1144 may control the operation of the camera module 1100b according to a control signal provided through the control signal line CSLb.

[0164] The memory 1146 may store information for the operation of the camera module 1100b, such as calibration data 1147. The calibration data 1147 may include information for the camera module 1100b to generate image data using the light L provided from the outside. The calibration data 1147 may include, for example, the above-mentioned information about the rotation angle, the information about the focal length, the information about the optical axis, etc. When the camera module 1100b is implemented as a multi-state camera whose focal length changes according to the position of the optical lens, the calibration data 1147 may include the information about the focal length value and the autofocus for each position (or each state) of the optical lens.

[0165] The storage unit 1150 may store the image data sensed by the imaging device 1142. The storage unit 1150 may be arranged outside the image sensing device 1140 and may be implemented as stacked with the sensor chip forming the image sensing device 1140. In an exemplary embodiment, the storage unit 1150 may be implemented as, for example, an electrically erasable programmable read-only memory (EEPROM).

[0166] Reference Figure 20 and Figure 21 In an exemplary embodiment, each of the plurality of camera modules 1100a, 1100b, and 1100c may include an actuator 1130. Thus, according to the operation of the actuator 1130 included therein, each of the plurality of camera modules 1100a, 1100b, and 1100c may include the same or different calibration data 1147.

[0167] In an exemplary embodiment, one of the plurality of camera modules 1100a, 1100b, and 1100c (e.g., 1100b) may be implemented as, for example, a folded lens type camera module including the above-mentioned prism 1105 and OPFE 1110, and the other camera modules (e.g., 1100a and 1100b) may be vertical type camera modules that do not include the prism 1105 and OPFE 1110.

[0168] In an exemplary embodiment, for example, one of the plurality of camera modules 1100a, 1100b, and 1100c (e.g., 1100c) may be implemented as a vertical type depth camera that may use infrared rays (IR) to extract depth information. In this case, the application processor 1200 may merge the image data provided from the depth camera with the image data provided from another camera module (e.g., camera module 1100a or camera module 1100b) and may generate a 3D depth image.

[0169] In an exemplary embodiment, at least two of the plurality of camera modules 1100a, 1100b, and 1100c (e.g., 1100a and 1100b) may have different fields of view. In this case, for example, the optical lenses of at least two of the plurality of camera modules 1100a, 1100b, and 1100c (e.g., 1100a and 1100b) may be different from each other.

[0170] In an exemplary embodiment, the fields of view of the plurality of camera modules 1100a, 1100b, and 1100c may be different from each other. In this case, the optical lenses included in each of the plurality of camera modules 1100a, 1100b, and 1100c may also be different from each other.

[0171] In an exemplary embodiment, the plurality of camera modules 1100a, 1100b, and 1100c may be configured to be physically isolated from each other. Accordingly, the sensing area of one imaging device 1142 may not be divided and used by the plurality of camera modules 1100a, 1100b, and 1100c, and an independent imaging device 1142 may be disposed in each of the plurality of camera modules 1100a, 1100b, and 1100c. In addition, at least one of the plurality of camera modules 1100a, 1100b, and 1100c may include a ToF sensor for generating a depth image based on distance information from an object.

[0172] Reference Figure 20 , the application processor 1200 may include an image processing device 1210, a memory controller 1220, and an internal memory 1230. The application processor 1200 may be implemented separately from the plurality of camera modules 1100a, 1100b, and 1100c. In an exemplary embodiment, the application processor 1200 and the plurality of camera modules 1100a, 1100b, and 1100c may be implemented as separate semiconductor chips separated from each other.

[0173] The image processing device 1210 may include a plurality of sub-image processors 1212a, 1212b, and 1212c, an image generator 1214, and a camera module controller 1216. The image processing device 1210 may include a plurality of sub-image processors 1212a, 1212b, and 1212c corresponding to the number of the plurality of camera modules 1100a, 1100b, and 1100c. Image data generated by each of the camera module 1100a, the camera module 1100b, and the camera module 1100c may be provided to the corresponding sub-image processors 1212a, 1212b, and 1212c through separate image signal lines ISLa, ISLb, and ISLc. For example, the image data generated by the camera module 1100a may be provided to the sub-image processor 1212a through the image signal line ISLa, the image data generated by the camera module 1100b may be provided to the sub-image processor 1212b through the image signal line ISLb, and the image data generated by the camera module 1100c may be provided to the sub-image processor 1212c through the image signal line ISLc. The image data transmission may be performed using, for example, a camera serial interface (CSI) based on the Mobile Industry Processor Interface (MIPI).

[0174] In an exemplary embodiment, one sub-image processor may be set to correspond to a plurality of camera modules. In an exemplary embodiment, the sub-image processors 1212a and 1212c may not be implemented separately from each other, but may be implemented as integrated into a single sub-image processor, and the image data provided by the camera modules 1100a and 1100c may be selected by a selection device (e.g., a multiplexer) and provided to the integrated sub-image processor.

[0175] The image data provided to each of the sub-image processors 1212a, 1212b, and 1212c can be provided to the image generator 1214. The image generator 1214 can generate an output image using the image data provided by each of the sub-image processors 1212a, 1212b, and 1212c according to image generation information or a mode signal. In an exemplary embodiment, the image generator 1214 can generate an output image by merging at least some portions of the image data generated by the camera modules 1100a, 1100b, and 1100c having different fields of view according to the image generation information or the mode signal. The image generator 1214 can generate an output image by selecting one of the image data generated by the camera modules 1100a, 1100b, and 1100c having different fields of view according to the image generation information or the mode signal. The image generation information can include a scaling signal or a scaling factor. The mode signal can be, for example, a signal based on a mode selected by the user. When the image generation information is a scaling signal (scaling factor) and the camera modules 1100a, 1100b, and 1100c have different fields of view, the image generator 1214 can perform different operations according to the type of the scaling signal. For example, when the scaling signal is a first signal, the image data output by the camera module 1100a can be merged with the image data output by the camera module 1100c, and the merged image signal and the image data output by the camera module 1100b not used in the merging can be used to generate an output image. When the scaling signal is a second signal different from the first signal, the image generator 1214 can not perform image data merging and can generate an output image by selecting one of the image data output by each of the camera modules 1100a, 1100b, and 1100c.

[0176] In an exemplary embodiment, the image generator 1214 can receive a plurality of image data having different exposure times from at least one of the plurality of sub-image processors 1212a, 1212b, and 1212c, and can perform high dynamic range (HDR) processing thereon, so that merged image data having an increased dynamic range can be generated.

[0177] The camera module controller 1216 can provide a control signal to each of the camera modules 1100a, 1100b, and 1100c. The control signal generated from the camera module controller 1216 can be provided to the corresponding camera modules 1100a, 1100b, and 1100c through separate control signal lines CSLa, CSLb, and CSLc.

[0178] One of the plurality of camera modules 1100a, 1100b, and 1100c can be designated as a main camera (e.g., 1100b) according to image generation information including a zoom signal or a mode signal, and the other camera modules (e.g., 1100a and 1100c) can be designated as slave cameras. The above information can be included in a control signal and can be provided to the corresponding camera modules 1100a, camera module 1100b, and camera module 1100c through separate control signal lines CSLa, control signal line CSLb, and control signal line CSLc. The camera modules operating as master and slave devices can be changed according to a zoom factor or an operation mode signal. For example, when the field of view of camera module 1100a is wider than the field of view of camera module 1100b and the zoom factor exhibits a low zoom ratio, camera module 1100b can operate as a master device, and camera module 1100a can operate as a slave device. Or, when the zoom factor exhibits a high zoom ratio, camera module 1100a can operate as a master device, and camera module 1100b can operate as a slave device.

[0179] In an exemplary embodiment, the control signal provided from the camera module controller 1216 to each of the camera modules 1100a, 1100b, and 1100c can include a synchronization enable signal. For example, when camera module 1100b is the main camera and camera modules 1100a and 1100c are slave cameras, the camera module controller 1216 can transmit a synchronization enable signal to camera module 1100b. The camera module 1100b that receives the synchronization enable signal can generate a synchronization signal based on the provided synchronization enable signal and can transmit the generated synchronization signal to camera modules 1100a and 1100c. Camera module 1100b and camera modules 1100a and 1100c can be synchronized using the synchronization signal and can transmit image data to the application processor 1200.

[0180] In an exemplary embodiment, the control signal provided from the camera module controller 1216 to the plurality of camera modules 1100a, 1100b, and 1100c can include mode information according to a mode signal. The plurality of camera modules 1100a, 1100b, and 1100c can operate in a first operation mode and a second operation mode related to a sensing speed based on the mode information.

[0181] In the first operation mode, the multiple camera modules 1100a, 1100b, and 1100c can generate image signals at a first rate (e.g., can generate image signals at a first frame rate), can encode the image signals at a second rate higher than the first rate (e.g., can encode image signals at a second frame rate higher than the first frame rate), and can transmit the encoded image signals to the application processor 1200. In this case, the second speed can be 30 times or lower than the first speed. The application processor 1200 can store the received image signals (encoded image signals) in the memory 1230 provided therein or in the external memory 1400 arranged outside the application processor 1200, can read out the encoded image signals from the memory 1230 or the external memory 1400, and can display the image data generated based on the decoded image signals. For example, the corresponding sub-processors among the multiple sub-image processors 1212a, 1212b, and 1212c of the image processing device 1210 can perform decoding and can also perform image processing on the decoded image signals.

[0182] In the second operation mode, the multiple camera modules 1100a, 1100b, and 1100c can generate image signals at a third rate lower than the first rate (e.g., generate image signals at a third frame rate lower than the first frame rate), and can transmit the image signals to the application processor 1200. The image signals provided to the application processor 1200 can be unencoded signals. The application processor 1200 can perform image processing on the received image signals or can store the image signals in the memory 1230 or the external memory 1400.

[0183] The PMIC 1300 can supply power, such as a power voltage, to each of multiple camera modules 1100a, 1100b, and 1100c. In an exemplary embodiment, the PMIC 1300 can supply a first power to the camera module 1100a via a power signalline PSLa under the control of the application processor 1200, can supply a second power to the camera module 1100b via the power signalline PSLb, and can supply a third power to the camera module 1100c via the power signalline PSLc. The PMIC 1300 can generate power corresponding to each of the multiple camera modules 1100a, 1100b, and 1100c in response to a power control signal PCON from the application processor 1200 and can also adjust the power level. The power control signal PCON can include a power adjustment signal for each operation mode of the multiple camera modules 1100a, 1100b, and 1100c. The operation mode can include a low power mode, and in this case, the power control signal PCON can include information about the camera module operating at the low power mode and a determined power level. The power levels supplied to the multiple camera modules 1100a, 1100b, and 1100c can be the same or different. In addition, the power levels can be changed dynamically.

[0184] Through summary and review, an imaging device can use an optical signal to generate a depth image including distance information. Such an imaging device can be installed on various electronic devices. A method for improving the performance of the imaging device for generating a depth image is expected.

[0185] As described above, an embodiment can provide an imaging device and a control method thereof that can reduce the influence of noise caused by harmonic distortion and can generate a depth image with high accuracy.

[0186] According to an exemplary embodiment, by comparing a calculated depth (which can change with the duty cycle of an optical control signal for driving a light source and can be output when using the imaging device to sense the distance to an object) with the actual depth between the imaging device and the object, a duty cycle with the smallest difference between the calculated depth and the actual depth can be selected. Therefore, the light source can be driven by an optical control signal with an optimized duty cycle, so that the performance of the imaging device can be improved. In addition, by using a method of delaying the optical control signal to reflect the change in the distance between the imaging device and the object, the optimized duty cycle of the optical control signal can be selected quickly.

[0187] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and interpreted in a general and descriptive sense only and not for purposes of limitation. In some instances, as will be apparent to those of ordinary skill in the art at the time of filing the present application, unless otherwise specifically indicated, features, characteristics, and / or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments. Accordingly, those skilled in the art will appreciate that various changes may be made in form and detail without departing from the spirit and scope of the invention as set forth in the appended claims.

Claims

1. An imaging device, comprising: A light source configured to operate according to a light control signal having a first duty cycle; Pixels arranged in an array, each of said pixels comprising: A photodiode configured to generate charge in response to light output by said light source and reflected from an object, and A pixel circuit configured to output a pixel signal corresponding to said charge; and a logic circuit configured to generate raw data for generating a depth image using said pixel signal, and configured to provide a photoelectric control signal having a second duty cycle to the pixel circuit in each of said pixels, wherein the first duty cycle is not an integer multiple of the second duty cycle.

2. The imaging device according to claim 1, wherein, The first duty cycle is less than twice the second duty cycle.

3. The imaging device according to claim 1, wherein, The frequency of the light control signal is equal to the frequency of the photoelectric control signal.

4. The imaging device according to claim 1, wherein: The logic circuit includes a clock driver configured to drive the pixels, a readout circuit configured to receive the pixel signal from each of said pixels, and a control logic configured to generate the raw data using said pixel signal, and The light source includes a light emitting device and a light source driver configured to drive the light emitting device according to the light control signal.

5. The imaging device according to claim 4, wherein, The control logic is configured to transmit, during a calibration operation, a delayed signal obtained by delaying the light control signal as the light control signal to the light source driver.

6. The imaging device according to claim 5, wherein: The control logic is configured to calculate reference data using the delayed signal, and calculate depth data from the raw data generated when the light source operates according to the delayed signal, and The control logic is configured to calculate an operation error using the difference between the depth data and the reference data.

7. The imaging device according to claim 4, wherein: The control logic is configured to determine, during a first calibration operation, the first duty cycle as a first reference duty cycle greater than the second duty cycle, The control logic is configured to determine, during a second calibration operation, the first duty cycle as a second reference duty cycle greater than the second duty cycle and less than the first reference duty cycle, and The control logic is configured to transmit, in each of the first calibration operation and the second calibration operation, a plurality of delayed signals obtained by delaying the light control signal by different delay times as the light control signal to the light source driver in sequence.

8. The imaging device according to claim 7, wherein: The control logic is configured to calculate a plurality of reference data using the delay time, and generate a plurality of depth data using the raw data while the light source operates according to the plurality of delayed signals, and The control logic is configured to obtain an operation error for each of the plurality of reference data in the first calibration operation and the second calibration operation by comparing the plurality of reference data with the plurality of depth data.

9. The imaging device according to claim 8, wherein: The control logic is configured to determine a first result value and a second result value using a difference between a maximum value and a minimum value among operation errors in each of the first calibration operation and the second calibration operation, and The control logic is configured to determine the first duty ratio by comparing the first result value with the second result value.

10. The imaging device according to claim 9, wherein: The control logic is configured to determine the first reference duty ratio as the first duty ratio when the first result value is less than the second result value, and The control logic is configured to determine the second reference duty ratio as the first duty ratio when the second result value is less than the first result value.

11. The imaging device according to claim 1, wherein: The logic circuit is configured to input a plurality of optoelectronic control signals to the pixel circuit, wherein the plurality of optoelectronic control signals have phase differences of 0 degrees, 90 degrees, 180 degrees, and 270 degrees with respect to the light control signal, respectively, and A falling edge of each of the plurality of optoelectronic control signals is generated at a time point different from a time point of the falling edge of the light control signal.

12. The imaging device according to claim 1, wherein, The first duty ratio is 1 / 3, and the second duty ratio is 1 / 4.

13. An imaging device, comprising: A light source, including at least one light emitting device and a light source driver for driving the light emitting device; A pixel array in which a plurality of pixels are arranged, each of the plurality of pixels including a photodiode for generating charges in response to a light reception signal output from the light source and reflected from an object, and a pixel circuit for outputting a pixel signal corresponding to the charges of the photodiode; And A logic circuit, including a control logic configured to generate raw data for generating a depth image by obtaining the pixel signal and output a light control signal having a predetermined demodulation frequency and duty ratio, and including a delay circuit configured to output a delay signal to the light source driver by delaying the light control signal, wherein the logic circuit is configured to input a plurality of optoelectronic control signals having different phase differences with respect to the light control signal to a pixel circuit connected to a photodiode in each of the plurality of pixels, The control logic is configured to select one of a normal mode and a calibration mode, wherein the control logic is configured to sequentially determine the duty ratio of the delay signal as a first reference duty ratio and a second reference duty ratio smaller than the first reference duty ratio in the calibration mode, wherein the control logic is configured to calculate first depth data from first raw data generated when the duty ratio of the delay signal is the first reference duty ratio, and the control logic is configured to calculate second depth data from second raw data generated when the duty ratio of the delay signal is the second reference duty ratio, and The control logic is configured to select the first reference duty cycle or the second reference duty cycle as the duty cycle of the light control signal by comparing each of the first depth data and the second depth data with predetermined reference data, wherein the duty cycle of the light control signal is not an integer multiple of the duty cycle of each of the plurality of optoelectronic control signals.

14. The imaging device according to claim 13, wherein: The delay circuit is deactivated in the normal mode and activated in the calibration mode.

15. The imaging device according to claim 13, wherein, The control logic is configured to calculate the predetermined reference data using the demodulation frequency and the delay time of the delay signal.

16. The imaging device according to claim 13, wherein, In the calibration mode, while the distance between the pixel array and the object is maintained constant, the control logic calculates the first depth data and the second depth data.

17. The imaging device according to claim 13, wherein, The first reference duty cycle and the second reference duty cycle are greater than the duty cycle of each of the plurality of optoelectronic control signals.

18. A method of controlling an imaging device including a light source and an image sensor, the method comprising: Setting the duty cycle of a light control signal for driving the light source to a first reference duty cycle; While changing the delay time of the light control signal, obtaining a first operation error corresponding to a difference between reference data according to the delay time of the light control signal and depth data generated by the image sensor; When the delay time of the light control signal reaches a maximum delay time, calculating a first result value corresponding to a difference between a maximum value and a minimum value among the first operation errors; Setting the duty cycle of the light control signal to a second reference duty cycle; While changing the delay time of the light control signal, obtaining a second operation error corresponding to a difference between reference data according to the delay time of the light control signal and depth data generated by the image sensor; When the delay time of the light control signal reaches the maximum delay time, calculating a second result value corresponding to a difference between a maximum value and a minimum value among the second operation errors; and Based on the first result value and the second result value, determining the first reference duty cycle or the second reference duty cycle as the duty cycle of the light control signal, wherein the duty cycle of the light control signal is not an integer multiple of the duty cycle of each of the plurality of optoelectronic control signals provided to pixel circuits connected to photodiodes.

Citation Information

Patent Citations

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    CN111757031A