Audio driver circuit and audio processing equipment
By using a Class AB amplifier with dual NMOS tubes in the audio driver circuit and using the output control circuit to manage quiescent current, the problem of insufficient power rejection ratio in traditional technology is solved, and more efficient power management is achieved.
Patent Information
- Application Number
- CN202011607730.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-12-30
- Publication Date
- 2025-05-02
- Estimated Expiration
- 2040-12-30
AI Technical Summary
Class AB amplifiers in traditional DAC drivers are difficult to achieve a larger power rejection ratio when the number of amplification poles is small and the use of smaller quiescent currents.
An audio driving circuit is designed, a Class AB amplifier with dual NMOS tubes as the driving tubes, and a quiescent current is maintained when a large current output is achieved in the output stage circuit and a quiescent current is maintained when a large current is absorbed.
With fewer amplification poles and smaller quiescent currents, a larger power supply rejection ratio is achieved, improving the efficiency and performance of the circuit.
Smart Images

Figure CN114697807B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of audio processing technology, and in particular to an audio driving circuit and an audio processing device. Background Art
[0002] Traditional audio processing modules mainly include analog-to-digital converters (ADCs), digital signal processors (DSPs), and digital-to-analog converters (DACs). ADCs convert analog signals in nature (such as sound signals) into digital signals that can be recognized by electronic devices. The digital signals are then processed by DSPs and sent to DACs. DACs can restore digital signals to analog signals and further drive sensors (such as speakers) to complete the processing of the entire audio signal. The internal resistance of the speaker load is relatively small, and a large current output is required for the DAC output to achieve a certain power for the speaker load. Therefore, the driver is an indispensable component of the DAC.
[0003] During the implementation process, the inventors found that there are at least the following problems in the conventional technology: it is difficult for the class AB amplifier in the conventional DAC driver to achieve a large power supply rejection ratio with a small number of amplification poles and a small quiescent current. Summary of the invention
[0004] Based on this, it is necessary to provide an audio driving circuit and an audio processing device that can achieve a larger power supply rejection ratio while using a smaller number of amplification poles and a smaller quiescent current in order to address the above technical problems.
[0005] In order to achieve the above-mentioned object, on the one hand, an embodiment of the present invention provides an audio driving circuit, including an input stage circuit, an amplifier stage circuit, an output control circuit and an output stage circuit;
[0006] The first input end of the input stage circuit is used to connect to the audio source circuit, and the output end is connected to the input end of the amplifier stage circuit; the output end of the output stage circuit is respectively connected to the second input end of the input stage circuit and the load;
[0007] The output control circuit includes MOS tube M1, MOS tube M2, MOS tube M3, MOS tube M4, MOS tube M5, MOS tube M6, MOS tube M7, MOS tube M8 and current source I0; the source of MOS tube M1 is grounded, and the drain of MOS tube M1 is respectively connected to the gate of MOS tube M1, the signal feedback end of the amplifier stage circuit and the drain of MOS tube M2; the source of MOS tube M2 is connected to the drain of MOS tube M3, and the gate is respectively connected to the gate and drain of MOS tube M5; the gate of MOS tube M3 is respectively connected to the gate of MOS tube M4 and the drain of MOS tube M4, and the source is connected to the external power supply AVD D33; the source of the MOS tube M4 is connected to the external power supply AVDD33, and the drain is connected to the drain of the MOS tube M8; the source of the MOS tube M5 is connected to the external power supply AVDD33, and the drain is connected to the drain of the MOS tube M7; the gate of the MOS tube M6 is connected to the first output end of the amplifier stage circuit, and the drain is connected to the positive electrode of the current source I0; the negative electrode of the current source I0 is grounded; the gate of the MOS tube M7 is connected to the first input end of the output stage circuit and the drain of the MOS tube M6, and the source is connected to the output end of the output stage circuit; the gate of the MOS tube M8 is respectively connected to the second output end of the amplifier stage circuit and the second input end of the output stage circuit, and the source is grounded.
[0008] In one embodiment, the output stage circuit includes an NMOS transistor M9 and an NMOS transistor M10;
[0009] The gate of the NMOS tube M9 is connected to the gate of the MOS tube M7, the source is connected to the source of the MOS tube M7, and the drain is connected to the external power supply AVDD12; the gate of the NMOS tube M10 is connected to the gate of the MOS tube M8, the source is grounded, and the drain is respectively connected to the second input terminal of the input stage circuit and the load.
[0010] In one of the embodiments, the output stage circuit further includes a first RC compensation circuit;
[0011] One end of the first RC compensation circuit is connected to the gate of the MOS transistor M6 , and the other end is connected to the source of the NMOS transistor M9 .
[0012] In one embodiment, the first RC compensation circuit includes a first resistor and a first capacitor; one end of the first resistor is connected to the gate of the MOS tube M6, and the other end is connected to one end of the first capacitor; the other end of the first capacitor is connected to the source of the NMOS tube M9.
[0013] In one of the embodiments, the output stage circuit further includes a second RC compensation circuit;
[0014] One end of the second RC compensation circuit is connected to the gate of the NMOS transistor M10 , and the other end is connected to the drain of the NMOS transistor M10 .
[0015] In one embodiment, the second RC compensation circuit includes a second resistor and a second capacitor; one end of the second resistor is connected to the gate of the NMOS tube M10, and the other end is connected to one end of the second capacitor; the other end of the second capacitor is connected to the drain of the NMOS tube M10.
[0016] In one embodiment, the input stage circuit includes a bias current source I1 and a differential pair of transistors;
[0017] The differential pair tubes include a MOS tube MIP and a MOS tube MIN; the gate of the MOS tube MIN is used to connect to the audio source circuit, the drain is connected to the first input end of the amplifier stage circuit, and the source is respectively connected to the source of the MOS tube MIP and the negative electrode of the bias current source I1; the positive electrode I1 of the bias current source is used to connect to the external power supply AVDD33; the gate of the MOS tube MIP is respectively connected to the source of the NMOS tube M9 and the drain of the NMOS tube, and the drain is connected to the second input end of the amplifier stage circuit.
[0018] In one embodiment, the amplifier stage circuit includes MOS tube M11, MOS tube M12, MOS tube M13, MOS tube M14, MOS tube M15, MOS tube M16, MOS tube M17, MOS tube M18, MOS tube M19, current source I2, current source I3, current source I4 and bias voltage source VB;
[0019] The gate of MOS tube M11 is connected to the gate of MOS tube M12, the source is grounded, and the drain is connected to the drain of MOS tube MIN and the source of MOS tube M13; the source of MOS tube M12 is grounded, and the drain is respectively connected to the drain of MOS tube MIP, the source of MOS tube M15, and the source of MOS tube M16; the gate of MOS tube M13 is respectively connected to the gate of MOS tube M15, the gate of MOS tube M14, and the drain of MOS tube M14, and the drain is connected to the drain of MOS tube M19; the source of MOS tube M14 is grounded, and the drain is connected to the negative electrode of current source I2; the positive electrode of current source I2 is connected to external power supply AVDD33; MOS The drain of the MOS tube M15 is respectively connected to the gate of the MOS tube M6 and the drain of the MOS tube M17; the gate of the MOS tube M16 is connected to the drain of the MOS tube M1, and the drain is respectively connected to the gate of the MOS tube M10 and the drain of the MOS tube M18; the gate of the MOS tube M17 is respectively connected to the negative electrode of the bias voltage source VB1, the gate of the MOS tube M19 and the gate of the MOS tube M18, and the source is respectively connected to the negative electrode of the current source I4 and the source of the MOS tube M18; the positive electrode of the current source I4 is connected to the external power supply AVDD33; the source of the MOS tube M19 is connected to the negative electrode of the current source I3; the positive electrode of the current source I3 is connected to the external power supply AVDD33.
[0020] In one embodiment, the ratio of the width to length ratio of the MOS transistor M9 to the width to length ratio of the MOS transistor M7 is the same as the ratio of the width to length ratio of the MOS transistor M10 to the width to length ratio of the MOS transistor M8.
[0021] On the other hand, an embodiment of the present invention further provides an audio processing device, comprising an audio source circuit and two audio driving circuits as described above;
[0022] The audio source circuit includes a first analog-to-digital converter, a second analog-to-digital converter, a processor, a first digital-to-analog converter and a second digital-to-analog converter; the input end of the processor is connected to the first analog-to-digital converter and the second analog-to-digital converter, and the output end is connected to the first digital-to-analog converter and the second digital-to-analog converter respectively; the first digital-to-analog converter is connected to the first input end of the input stage circuit of any audio driving circuit; the second digital-to-analog converter is connected to the first input end of the input stage circuit of another audio driving circuit.
[0023] One of the above technical solutions has the following advantages and beneficial effects:
[0024] The above audio driving circuit can realize that when the first output end of the output stage circuit outputs a large current, the second output end can maintain a static current through the output control circuit, and when the second output end absorbs a large current, the first output end can maintain a static current. When the output stage circuit adopts a dual NMOS driving tube, the above output control circuit can realize class AB output. The class AB amplifier using dual NMOS tubes as driving tubes can achieve a larger power supply rejection ratio when the number of amplification poles is small and a smaller static current is used. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] The above and other purposes, features and advantages of the present application will become clearer through a more specific description of the preferred embodiments of the present application shown in the accompanying drawings. The same reference numerals indicate the same parts in all the accompanying drawings, and the drawings are not deliberately scaled to the actual size, and the focus is on illustrating the subject matter of the present application.
[0026] Figure 1 is a first schematic structural block diagram of an audio driving circuit in an embodiment;
[0027] Figure 2 is a second schematic structural block diagram of an audio driving circuit in an embodiment;
[0028] Figure 3 Schematic diagram of waveforms of current output and absorption of M9 and M10 in one embodiment;
[0029] Figure 4 is a third schematic structural block diagram of an audio driving circuit in an embodiment;
[0030] Figure 5 is a fourth schematic structural block diagram of an audio driving circuit in an embodiment;
[0031] Figure 6 is a schematic structural block diagram of an input stage circuit in an embodiment;
[0032] Figure 7 is a fifth schematic structural block diagram of an audio driving circuit in an embodiment;
[0033] Figure 8 FIG. 4 is a structural block diagram of an audio processing device in an embodiment. DETAILED DESCRIPTION
[0034] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0035] It should be noted that when an element is considered to be "connected" to another element, it may be directly connected to another element and integrated therewith, or there may be an intermediate element at the same time. The terms "installed", "one end", "the other end" and similar expressions used herein are for illustrative purposes only.
[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0037] The traditional DAC driver is a class AB amplifier that uses P-channel MOS tubes (PMOS) and N-channel MOS tubes (NMOS) as output tubes. Generally, the driving ability of NMOS is stronger than that of PMOS, so under the same output capacity, the silicon chip area required for PMOS is larger than that of NMOS. In order to make the driving ability of the driver large enough, the width-to-length ratio of NMOS tubes and PMOS tubes is large, so the chip area occupied by NMOS tubes and PMOS tubes will be large.
[0038] In addition, in order to achieve a better power supply rejection ratio (PSRR), the loop gain of the class AB amplifier needs to be large and the bandwidth needs to be wide. The higher the power supply rejection ratio (PSRR), the better the noise on the power supply can be suppressed. Increasing the loop gain requires multi-pole amplification in series, but the more poles there are, the more poles there will be in the circuit, making the circuit compensation more complex and difficult. Increasing the bandwidth usually requires greater static power consumption.
[0039] The traditional technical solutions have the following disadvantages: 1. When a class AB amplifier uses PMOS and NMOS tubes as driver tubes, it consumes more chip area than when it uses two NMOS tubes as driver tubes; 2. It is difficult for a class AB amplifier to achieve a larger power supply rejection ratio PSRR while ensuring a small number of amplification poles and using a small quiescent current.
[0040] The audio driving circuit provided in this application can effectively solve the above problems.
[0041] In one embodiment, Figure 1 As shown, an audio driving circuit is provided, including an input stage circuit, an amplifier stage circuit, an output control circuit and an output stage circuit;
[0042] The first input terminal VIN of the input stage circuit is used to connect to the audio source circuit, and the output terminal is connected to the input terminal of the amplifier stage circuit; the output terminal Vout of the output stage circuit is respectively connected to the second input terminal VIP of the input stage circuit and the load;
[0043] The output control circuit includes MOS tube M1, MOS tube M2, MOS tube M3, MOS tube M4, MOS tube M5, MOS tube M6, MOS tube M7, MOS tube M8 and current source I0; the source of MOS tube M1 is grounded to AVSS, the drain of MOS tube M1 is respectively connected to the gate of MOS tube M1, the signal feedback terminal C of the amplifier stage circuit and the drain of MOS tube M2; the source of MOS tube M2 is connected to the drain of MOS tube M3, and the gate is respectively connected to the gate and drain of MOS tube M5; the gate of MOS tube M3 is respectively connected to the gate of MOS tube M4 and the drain of MOS tube M4, and the source is connected to the external power supply AVDD33 ; The source of the MOS tube M4 is connected to the external power supply AVDD33, and the drain is connected to the drain of the MOS tube M8; the source of the MOS tube M5 is connected to the external power supply AVDD33, and the drain is connected to the drain of the MOS tube M7; the gate of the MOS tube M6 is connected to the first output terminal A of the amplifier stage circuit, and the drain is connected to the positive electrode of the current source I0; the negative electrode of the current source I0 is grounded to AVSS; the gate of the MOS tube M7 is connected to the first input terminal of the output stage circuit and the drain of the MOS tube M6, and the source is connected to the output terminal of the output stage circuit; the gate of the MOS tube M8 is respectively connected to the second output terminal B of the amplifier stage circuit and the second input terminal of the output stage circuit, and the source is grounded to AVSS.
[0044] The input stage circuit can be any circuit in the art that converts a differential voltage signal into a current signal; the amplifier stage circuit can be any circuit in the art that provides a large signal gain; the output control circuit is used to control the output current of the output stage circuit; and the output stage circuit is used to provide greater power to the load. The load can be any audio playback device in the art.
[0045] Specifically, the input stage circuit is used to convert the differential voltage signal output by the audio source circuit into a current signal as the input signal of the amplifier stage circuit. The amplifier stage circuit amplifies the input signal (current signal) and outputs it to the output control circuit at two output ends (i.e., the first output end and the second output end).
[0046] When the voltage of the first input terminal VIN of the input stage circuit is less than the voltage of the second input terminal VIP, the output stage circuit outputs a large current. The specific output current control path is as follows: When the voltage of the first input terminal VIN is less than the voltage of the second input terminal VIP, the voltages of the first output terminal A and the second output terminal B of the amplifier stage circuit will become lower. The voltage at point A becomes lower, that is, the gate of M6 is at a low level, M6 is in a common source wiring mode, the drain of M6 is at a high level, the gate potential of M7 and the potential of the first input terminal of the output stage circuit are pulled high, and the M7 tube outputs a large current, so that the drain voltage of M7 becomes lower, causing the gate of M2 to also become lower, and the source voltage of M2 becomes lower, so M3 starts to enter the saturation region from the linear region in static state, and then M3 and M4 satisfy the mirror relationship. Point B becomes lower, that is, the gate voltage of M8 becomes lower, so the current flowing through M4 becomes smaller. Because the width-to-length ratio of M3 and M4 is the same, point B is adjusted to a high level. It can be clearly seen that the negative feedback loop in the circuit adjusts the current of M1 tube to remain stable, and through the mirror relationship of M3 and M4, the current of M8 remains constant, thereby stabilizing the static current of the second input terminal of the output stage circuit.
[0047] When the voltage of the first input terminal VIN of the input stage circuit is greater than the voltage of the second input terminal VIP, the output stage circuit absorbs a large current, that is, a large current flows through the M10 tube. The specific output current control path is as follows: when the voltage of the first input terminal VIN is greater than the voltage of the second input terminal VIP, the voltage of the first output terminal A and the second output terminal B of the amplifier stage circuit will become higher. The voltage at point A becomes higher, that is, the gate of M6 is at a high level, M6 is in a homologous wiring mode, and the drain voltage of M6 becomes lower. As a result, the drain voltage of M7 becomes higher, and the gate of M2 also becomes higher. At this time, because the voltage at point B becomes higher, the current flowing through M8 becomes larger, and the gate voltage of M4 becomes lower, which in turn causes the M3 tube to pull up the voltage of the M2 tube to the power supply ACDD33 voltage. The gate voltage of M2 becomes higher, which reduces the current of M1, which equivalently makes the voltage at point A lower. It can be seen that the current of M1 is adjusted to remain stable in the circuit, thereby stabilizing the static current of the second input terminal of the output stage circuit.
[0048] The above audio driving circuit, through the above output control circuit, can realize that when the first output end of the output stage circuit outputs a large current, the second output end can maintain a static current, and when the second output end absorbs a large current, the first output end can maintain a static current. When the output stage circuit adopts a dual NMOS driving tube, the above output control circuit can realize class AB output. The class AB amplifier using dual NMOS tubes as driving tubes can achieve a larger power supply rejection ratio when the number of amplification poles is small and a smaller static current is used.
[0049] In one embodiment, Figure 2 As shown, the output stage circuit includes an NMOS tube M9 and an NMOS tube M10;
[0050] The gate of the NMOS tube M9 is connected to the gate of the MOS tube M7, the source is connected to the source of the MOS tube M7, and the drain is connected to the external power supply AVDD12; the gate of the NMOS tube M10 is connected to the gate of the MOS tube M8, the source is grounded, and the drain is respectively connected to the second input terminal of the input stage circuit and the load.
[0051] Specifically, when the voltage of the first input terminal VIN of the input stage circuit is less than the voltage of the second input terminal VIP, the gate potential of M7 is pulled high, resulting in a larger current flowing through M5. M5 is a common source structure, so the gate potentials of M5 and M2 are pulled low, resulting in M3 working in the saturation region. M3 and M4 form a common source and common gate current mirror, and the current of M3 is the same as the current of M4;
[0052] I M3 =I M4 =I M8 =I2
[0053] Moreover, the preset width-to-length ratio of M10 is K times that of M8, so the current of M10 is;
[0054] I M10 =K*I M8 =K*I2
[0055] In summary, when M9 outputs a large current, M10 can maintain a static current.
[0056] When the voltage of the first input terminal VIN of the input stage circuit is less than the voltage of the second input terminal VIP, the potential of the gate of M8 is pulled up, resulting in an increase in the current flowing through M4, so the gate voltage of M4 will decrease, and then M3 will pull up the source voltage of M2 to the power supply voltage. Through the mirror relationship between M2 and M6, the current of M7 remains stable, and the existence of the mirror relationship between M7 and M9 stabilizes the static current of M9, making I M9 The current of M5 remains constant. Since the size of M5 is the same as that of M2, the current of M5 is;
[0057] I M5 =I M2 =I M1 =I2
[0058] It should be noted that because M3 cannot pull the source voltage of M2 completely to the power supply voltage, the current of M5 cannot be completely equal to the current of M1, so the above formula is approximately equal. Since the size ratio of M7 to M9 is K, the current of M9 is;
[0059] I M9 =K*I M7 =K*I M5 =K*I2
[0060] In summary, when M10 outputs a large current, M9 can maintain a static current.
[0061] Furthermore, the waveforms of the output and absorption currents of M9 and M10 are as follows: Figure 3 As shown in Figure 1, (a) is the input signal of the driver, and (b) is the current in the driver tubes M1 and M2. When the input signal is on the positive half axis of the vertical axis, the current of M9 is as follows: Figure 3 (b) The solid line shows that the output current is large, and the current of M10 is a fixed small current at this time to ensure that M10 is still in the on state. Similarly, when the input signal is on the negative half axis of the vertical axis, the current of M10 is as follows Figure 3 As shown by the dotted line in (b), when absorbing a large current, the current in M9 is also a fixed small current to ensure that M9 is in the on state, thereby achieving AB class output.
[0062] The driving tube of the traditional output stage circuit is driven by NMOS tube and PMOS tube. The present application uses an NMOS driving tube to replace the PMOS driving tube to achieve AB output. By using the high and low voltage structure to distinguish, this circuit structure can be fully used in the output pole of the DAC to provide AB class output. Since the driving energy of the NMOS tube is stronger than that of the PMOS tube, under the same driving capacity, if dual NMOS tubes are used as the driving pole, the tube size can be greatly reduced, thereby saving chip area. In addition, since the interference signal on the power supply acts on the drain of the NMOS driving tube instead of the source, the signal impact on the driving tube will also be reduced, thereby increasing the PSRR of the circuit.
[0063] In one embodiment, the output stage circuit further includes a first RC compensation circuit;
[0064] One end of the first RC compensation circuit is connected to the gate of the MOS transistor M6 , and the other end is connected to the source of the NMOS transistor M9 .
[0065] Specifically, RC hysteresis compensation is performed through the first RC compensation circuit to eliminate the self-excited oscillation of the driving tube M9, and the amplitude and phase are adjusted by relying on the RC compensation loop.
[0066] In one embodiment, if Figure 4 As shown, the first RC compensation circuit includes a first resistor R1 and a first capacitor C1; one end of the first resistor R1 is connected to the gate of the MOS tube M6, and the other end is connected to one end of the first capacitor C1; the other end of the first capacitor C1 is connected to the source of the NMOS tube M9.
[0067] Specifically, at high frequencies, the capacitive reactance of C1 decreases, which reduces the amplification factor of the previous stage, thereby destroying the amplitude condition of self-oscillation and making the circuit work stably.
[0068] In one embodiment, the output stage circuit further includes a second RC compensation circuit;
[0069] One end of the second RC compensation circuit is connected to the gate of the NMOS transistor M10 , and the other end is connected to the drain of the NMOS transistor M10 .
[0070] Specifically, the RC hysteresis compensation is performed through the second RC compensation circuit to eliminate the self-excited oscillation of the driving tube M10, and the amplitude and phase are adjusted by relying on the RC compensation loop.
[0071] In one embodiment, if Figure 5 As shown, the second RC compensation circuit includes a second resistor and a second capacitor; one end of the second resistor is connected to the gate of the NMOS tube M10, and the other end is connected to one end of the second capacitor; the other end of the second capacitor is connected to the drain of the NMOS tube M10.
[0072] Specifically, at high frequencies, the capacitive reactance of C2 decreases, which reduces the amplification factor of the previous stage, thereby destroying the amplitude condition of self-oscillation and making the circuit work stably.
[0073] In one embodiment, if Figure 6 As shown, the input stage circuit includes a bias current source I1 and a differential pair of tubes;
[0074] The differential pair tubes include a MOS tube MIP and a MOS tube MIN; the gate of the MOS tube MIN is used to connect to the audio source circuit, the drain is connected to the first input terminal 1 of the amplifier stage circuit, and the source is respectively connected to the source of the MOS tube MIP and the negative electrode of the bias current source I1; the positive electrode I1 of the bias current source is used to connect to the external power supply AVDD33; the gate of the MOS tube MIP is respectively connected to the source of the NMOS tube M9 and the drain of the NMOS tube, and the drain is connected to the second input terminal 2 of the amplifier stage circuit.
[0075] Specifically, the gate of the MIN tube of the amplifier stage circuit serves as the first input terminal of the input stage circuit, and the gate of the MIP tube serves as the second input terminal of the input stage circuit. The input differential voltage signal is converted into a current signal through the differential pair tube.
[0076] In one embodiment, Figure 7 As shown, the amplifier stage circuit includes MOS tube M11, MOS tube M12, MOS tube M13, MOS tube M14, MOS tube M15, MOS tube M16, MOS tube M17, MOS tube M18, MOS tube M19, current source I2, current source I3, current source I4 and bias voltage source VB;
[0077] The gate of MOS tube M11 is connected to the gate of MOS tube M12, the source is grounded, and the drain is connected to the drain of MOS tube MIN and the source of MOS tube M13; the source of MOS tube M12 is grounded, and the drain is respectively connected to the drain of MOS tube MIP, the source of MOS tube M15, and the source of MOS tube M16; the gate of MOS tube M13 is respectively connected to the gate of MOS tube M15, the gate of MOS tube M14, and the drain of MOS tube M14, and the drain is connected to the drain of MOS tube M19; the source of MOS tube M14 is grounded, and the drain is connected to the negative electrode of current source I2; the positive electrode of current source I2 is connected to external power supply AVDD33; MOS The drain of the MOS tube M15 is respectively connected to the gate of the MOS tube M6 and the drain of the MOS tube M17; the gate of the MOS tube M16 is connected to the drain of the MOS tube M1, and the drain is respectively connected to the gate of the MOS tube M10 and the drain of the MOS tube M18; the gate of the MOS tube M17 is respectively connected to the negative electrode of the bias voltage source VB1, the gate of the MOS tube M19 and the gate of the MOS tube M18, and the source is respectively connected to the negative electrode of the current source I4 and the source of the MOS tube M18; the positive electrode of the current source I4 is connected to the external power supply AVDD33; the source of the MOS tube M19 is connected to the negative electrode of the current source I3; the positive electrode of the current source I3 is connected to the external power supply AVDD33.
[0078] Specifically, when the voltage of the first input terminal VIN of the input stage circuit is less than the voltage of the second input terminal VIP, the current flowing through M12 will decrease, and the current flowing through M11 will increase, so that the voltage of the gate of M11 will increase, resulting in the voltage of the gate of M12 to increase and the drain voltage of M12 to decrease. Since M15 and M16 are common gate amplifiers, the voltages at points AB are reduced.
[0079] When the voltage of the first input terminal VIN of the input stage circuit is greater than the voltage of the second input terminal VIP, the current flowing through M12 will increase, and the current flowing through M11 will decrease, so that the voltage of the gate of M11 will decrease, resulting in the voltage of the gate of M12 to decrease and the drain voltage of M12 to increase. Since M15 and M16 are common gate amplifiers, the voltages of the two points AB increase.
[0080] It should be noted that M15, M16, M12, M17, M18, I4, M1, M8, M2, M3, M4, M6, I0, M5, and M7 together form a negative feedback loop, which can clamp the gate voltage of M16, so that the gate voltages of M15 and M16 tend to be the same, that is, the gate voltages of M1 and M14 are the same. When the width-to-length ratio of M1 and M14 is the same, the currents flowing through M1 and M14 can be the same and equal to I1. Among them, M12 is equivalent to a current source.
[0081] In one embodiment, the ratio of the width-to-length ratio of the MOS transistor M9 to the width-to-length ratio of the MOS transistor M7 is the same as the ratio of the width-to-length ratio of the MOS transistor M10 to the width-to-length ratio of the MOS transistor M8.
[0082] Specifically, in static state, the driver does not do work on the load, that is, no current flows out of or into the circuit, then the static current IQ flowing through M9 and M10 is the same, assuming that the ratio of the width-to-length ratio W7 / L7 of M7 and the width-to-length ratio W9 / L9 of M9, the ratio of the width-to-length ratio W8 / L8 of M8 and the width-to-length ratio W10 / L10 of M10 are the same as K;
[0083]
[0084] Because M7 and M9 are mirror images of each other, and M10 and M8 are mirror images of each other, the current flowing through M7 and M8 is approximately;
[0085]
[0086] Since M4, M5 are in the same branch with M8 and M7 respectively, the current remains the same, and the current flowing through M4 and M5 is the same. When the tube sizes (width-to-length ratio) of M2, M5, M3 and M4 are the same, the gate-source voltage of M4 and M5 is the same, then the gate of M2 is equivalently connected to the gate of M4, so M3 and M2 are equivalent to a composite tube MOS, the length of the composite tube is equivalent to twice the length L of a single tube, and the width W of the composite tube remains unchanged. At the same time, M3 works in the linear region, so the current of M4 is twice that of M3, that is;
[0087] I M4 =2I M3 =2I M1
[0088] As mentioned above, the current I M1 =I2, that is, I M4 =2I2. So in static state, the static current of M1 and M2 is:
[0089] I M9 =I M10 =I Q =2*K*I2
[0090] In one embodiment, Figure 8 As shown, an audio processing device is provided, comprising an audio source circuit and two audio driving circuits as described above;
[0091] The audio source circuit includes a first analog-to-digital converter, a second analog-to-digital converter, a processor, a first digital-to-analog converter and a second digital-to-analog converter; the input end of the processor is connected to the first analog-to-digital converter and the second analog-to-digital converter, and the output end is connected to the first digital-to-analog converter and the second digital-to-analog converter respectively; the first digital-to-analog converter is connected to the first input end of the input stage circuit of any audio driving circuit; the second digital-to-analog converter is connected to the first input end of the input stage circuit of another audio driving circuit.
[0092] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0093] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.
Claims
1. An audio driving circuit, characterized in that: It includes an input stage circuit, an amplifier stage circuit, an output control circuit and an output stage circuit; The first input end of the input stage circuit is used to connect to the audio source circuit, and the output end is connected to the input end of the amplifier stage circuit; the output end of the output stage circuit is respectively connected to the second input end of the input stage circuit and the load; The output control circuit comprises MOS tube M1, MOS tube M2, MOS tube M3, MOS tube M4, MOS tube M5, MOS tube M6, MOS tube M7, MOS tube M8 and current source I0; the source of the MOS tube M1 is grounded, and the drain of the MOS tube M1 is respectively connected to the gate of the MOS tube M1, the signal feedback end of the amplifier stage circuit and the drain of the MOS tube M2; the source of the MOS tube M2 is connected to the drain of the MOS tube M3, and the gate is respectively connected to the gate and drain of the MOS tube M5; the gate of the MOS tube M3 is respectively connected to the gate of the MOS tube M4 and the drain of the MOS tube M4, and the source is connected to the external power supply AVDD33; The source of the MOS tube M4 is connected to the external power supply AVDD33, and the drain is connected to the drain of the MOS tube M8; the source of the MOS tube M5 is connected to the external power supply AVDD33, and the drain is connected to the drain of the MOS tube M7; the gate of the MOS tube M6 is connected to the first output end of the amplifier stage circuit, and the drain is connected to the positive electrode of the current source I0; the negative electrode of the current source I0 is grounded; the gate of the MOS tube M7 is connected to the first input end of the output stage circuit and the drain of the MOS tube M6, and the source is connected to the output end of the output stage circuit; the gate of the MOS tube M8 is respectively connected to the second output end of the amplifier stage circuit and the second input end of the output stage circuit, and the source is grounded; Wherein, the output stage circuit includes an NMOS tube M9 and an NMOS tube M10; The gate of the NMOS tube M9 is connected to the gate of the MOS tube M7, the source is connected to the source of the MOS tube M7, and the drain is connected to the external power supply AVDD12; the gate of the NMOS tube M10 is connected to the gate of the MOS tube M8, the source is grounded, and the drain is respectively connected to the second input terminal of the input stage circuit and the load.
2. The audio driving circuit according to claim 1, characterized in that: The output stage circuit also includes a first RC compensation circuit; One end of the first RC compensation circuit is connected to the gate of the MOS transistor M6 , and the other end is connected to the source of the NMOS transistor M9 .
3. The audio driving circuit according to claim 2, characterized in that: The first RC compensation circuit includes a first resistor and a first capacitor; one end of the first resistor is connected to the gate of the MOS tube M6, and the other end is connected to one end of the first capacitor; the other end of the first capacitor is connected to the source of the NMOS tube M9.
4. The audio driving circuit according to claim 1, characterized in that: The output stage circuit also includes a second RC compensation circuit; One end of the second RC compensation circuit is connected to the gate of the NMOS transistor M10 , and the other end is connected to the drain of the NMOS transistor M10 .
5. The audio driving circuit according to claim 4, characterized in that: The second RC compensation circuit includes a second resistor and a second capacitor; one end of the second resistor is connected to the gate of the NMOS tube M10, and the other end is connected to one end of the second capacitor; the other end of the second capacitor is connected to the drain of the NMOS tube M10.
6. The audio driving circuit according to claim 1, characterized in that: The input stage circuit includes a bias current source I1 and a differential pair tube; The differential pair tubes include a MOS tube MIP and a MOS tube MIN; the gate of the MOS tube MIN is used to connect to the audio source circuit, the drain is connected to the first input end of the amplifier stage circuit, and the source is respectively connected to the source of the MOS tube MIP and the negative electrode of the bias current source I1; the positive electrode I1 of the bias current source is used to connect to the external power supply AVDD33; the gate of the MOS tube MIP is respectively connected to the source of the NMOS tube M9 and the drain of the NMOS tube, and the drain is connected to the second input end of the amplifier stage circuit.
7. The audio driving circuit according to claim 6, characterized in that: The amplifier stage circuit includes MOS tube M11, MOS tube M12, MOS tube M13, MOS tube M14, MOS tube M15, MOS tube M16, MOS tube M17, MOS tube M18, MOS tube M19, current source I2, current source I3, current source I4 and bias voltage source VB; The gate of the MOS tube M11 is connected to the gate of the MOS tube M12, the source is grounded, and the drain is connected to the drain of the MOS tube MIN and the source of the MOS tube M13; the source of the MOS tube M12 is grounded, and the drain is respectively connected to the drain of the MOS tube MIP, the source of the MOS tube M15, and the source of the MOS tube M16; the gate of the MOS tube M13 is respectively connected to the gate of the MOS tube M15, the gate of the MOS tube M14, and the drain of the MOS tube M14, and the drain is connected to the drain of the MOS tube M19; the source of the MOS tube M14 is grounded, and the drain is connected to the negative electrode of the current source I2; the positive electrode of the current source I2 is connected to the external power supply AVDD33; The drain of the MOS tube M15 is respectively connected to the gate of the MOS tube M6 and the drain of the MOS tube M17; the gate of the MOS tube M16 is connected to the drain of the MOS tube M1, and the drain is respectively connected to the gate of the MOS tube M10 and the drain of the MOS tube M18; the gate of the MOS tube M17 is respectively connected to the negative electrode of the bias voltage source VB1, the gate of the MOS tube M19 and the gate of the MOS tube M18, and the source is respectively connected to the negative electrode of the current source I4 and the source of the MOS tube M18; the positive electrode of the current source I4 is connected to the external power supply AVDD33; the source of the MOS tube M19 is connected to the negative electrode of the current source I3; the positive electrode of the current source I3 is connected to the external power supply AVDD33.
8. The audio driving circuit according to claim 7, characterized in that: The ratio of the width to length ratio of the MOS tube M9 to the width to length ratio of the MOS tube M7 is the same as the ratio of the width to length ratio of the MOS tube M10 to the width to length ratio of the MOS tube M8.
9. An audio processing device, characterized in that: comprising an audio source circuit and two audio driving circuits as claimed in any one of claims 1 to 8; The audio source circuit includes a first analog-to-digital converter, a second analog-to-digital converter, a processor, a first digital-to-analog converter, and a second digital-to-analog converter; The input end of the processor is connected to the first analog-to-digital converter and the second analog-to-digital converter, and the output end is connected to the first digital-to-analog converter and the second digital-to-analog converter respectively; The first digital-to-analog converter is connected to the first input end of the input stage circuit of any one of the audio driving circuits; the second digital-to-analog converter is connected to the first input end of the input stage circuit of another of the audio driving circuits.
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