Flyback converter and constant current control method thereof

Abstract

The application discloses a flyback converter and a constant current control method thereof. The flyback converter comprises a transformer, a second switch tube, a first capacitor and a first inductor, a first switch tube and a sampling resistor, and a control circuit for providing a first control signal and a second control signal to control switching states of the first switch tube and the second switch tube respectively. The control circuit comprises a first sampling unit for sampling a voltage between two ends of a primary winding to obtain a first sampling signal, a feedback unit for generating a feedback current signal according to an input voltage, the first sampling signal, positive peak voltage and negative peak voltage between two ends of the sampling resistor in each switching period, and generating a compensation signal according to the feedback current signal, and a first driving unit for controlling the first switch tube to be turned off according to the compensation signal. The application can realize constant current control in the primary side of the converter, has high control precision, low cost and high reliability.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of switching power supply, in particular to a flyback converter and a constant current control method thereof. BACKGROUND

[0002] Power converters are essential components in electronic systems. In switching power supply applications, isolated converters are widely used because they can protect the load from high voltage surges and damage from the input bus, and have a wide range of applications in telecommunications wireless networks, automobiles and medical devices. Among various topologies of isolated converters, the flyback converter topology does not require an output filter inductor, has a simple circuit structure, output isolation, and low cost, and occupies a high proportion in terminal equipment applications. However, the existing traditional flyback converter is gradually not used due to low efficiency, serious EMI problems, etc. Compared with the traditional flyback converter, the active clamp flyback converter (ACF) can realize zero-voltage turn-on of the primary side power tube and zero-current turn-off of the secondary side rectifier diode in the full load range, so it can obtain higher working efficiency, lower EMI, higher working frequency and wider input range, and thus has gradually attracted people's attention.

[0003] The active clamp flyback converter (ACF) is evolved on the basis of the traditional flyback converter, and by replacing the passive clamp circuit in the traditional flyback converter with a clamp switch tube and a clamp capacitor, the active clamp flyback converter (ACF) is obtained, as shown in Figure 1 The active clamp flyback converter utilizes the resonance of the clamp capacitor and the transformer leakage inductance to absorb and recycle the leakage energy, and at the same time realizes zero-voltage switching (ZVS) of the switch tube. Therefore, the active clamp flyback converter can realize nearly 0 switching loss, thereby improving system efficiency and reducing switching noise (EMI). At a high switching frequency (MHz level), only relying on leakage energy cannot achieve ZVS of the main switch tube, at which time the magnetizing current needs to be reduced to zero or below to assist the ZVS of the main switch tube.

[0004] The active clamp flyback converter is mainly applied to the constant current field, and like the traditional flyback converter, when the active clamp flyback converter adopts the primary side feedback current control scheme, the use of isolation elements such as optocouplers is reduced, making the circuit structure simpler, easier to design, and lower in cost. However, in the active clamp flyback converter, the reference Figure 1Due to the resonance of the transformer leakage inductance Lk and the first capacitor C1, the output diode current of the active clamp flyback converter presents a nonlinear change, and it is difficult to obtain accurate output voltage and output current through the voltage and current signals collected in the primary side. Meanwhile, in order to realize the zero voltage switching (ZVS) of the first switch Q1 in the primary side, when the second switch Q2 is turned off, the magnetizing inductance current (denoted as I Lm ) has been negative, so from the perspective of the magnetizing current I Lm , the converter is not working in the critical conduction mode at this time, but in the discontinuous mode. Further, the traditional way of obtaining the zero-crossing signal of the magnetizing inductance current according to the voltage Vaux across the auxiliary winding Na or the drain-source voltage and gate voltage of the first switch Q1 is no longer applicable, so the traditional primary-side feedback current control scheme has poor accuracy.

[0005] Therefore, it is necessary to provide an improved technical solution to overcome the above technical problems in the prior art. SUMMARY

[0006] In order to solve the above technical problems, the present application provides a flyback converter and a constant current control method thereof, which can realize constant current control in the primary side of the converter, has high control accuracy, low cost and high reliability.

[0007] According to a first aspect of the present disclosure, a flyback converter is provided, comprising: a transformer comprising a primary winding and a secondary winding;

[0008] a second switch, a first capacitor and a first inductor connected in series with the primary winding;

[0009] a first switch and a sampling resistor connected in series between the primary winding and a reference ground;

[0010] a control circuit configured to provide a first control signal and a second control signal to control the switching states of the first switch and the second switch, respectively,

[0011] wherein the control circuit comprises:

[0012] a first sampling unit configured to sample a voltage across the primary winding to obtain a first sampling signal;

[0013] a feedback unit configured to generate a feedback current signal based on an input voltage, the first sampling signal, a positive peak voltage and a negative peak voltage across the sampling resistor in each switching period, and to generate a compensation signal based on the feedback current signal;

[0014] a first driving unit configured to control the turn-off of the first switch based on the compensation signal.

[0015] Optionally, the feedback unit comprises:

[0016] a gate signal generation unit configured to determine a zero-crossing moment of the excitation current according to the input voltage and the first sampling signal, and generate a first gate signal and a second gate signal according to the zero-crossing moment and the second control signal;

[0017] a first feedback current signal generation unit configured to convert the positive peak voltage across the sampling resistor obtained by sampling during a valid period of the first gate signal to generate a first feedback current signal;

[0018] a second feedback current signal generation unit configured to convert the negative peak voltage across the sampling resistor obtained by sampling during a valid period of the second gate signal to generate a second feedback current signal;

[0019] a compensation signal generation unit configured to generate the compensation signal according to a reference current signal, the first feedback current signal and the second feedback current signal.

[0020] Optionally, the gate signal generation unit comprises:

[0021] a second capacitor;

[0022] a charging unit configured to charge the second capacitor by a first current converted based on the input voltage during a valid period of the first control signal when the voltage signal across the sampling resistor is greater than a reference ground potential;

[0023] a discharging unit configured to discharge the second capacitor by a second current converted based on the first sampling signal during a valid period of the first gate signal;

[0024] a comparison unit configured to generate a reset signal when the voltage across the second capacitor drops to the reference ground potential;

[0025] an RS flip-flop, a reset terminal of which receives the reset signal, a set terminal of which receives the second control signal, and an output terminal of which outputs the first gate signal;

[0026] an exclusive-OR logic circuit, which receives the first gate signal and the second control signal, and outputs the second gate signal.

[0027] Optionally, the feedback unit further comprises:

[0028] a first sample-and-hold unit configured to sample and hold the voltage across the sampling resistor at a turn-off moment of the first switch tube to obtain the positive peak voltage across the sampling resistor;

[0029] a second sample-and-hold unit configured to sample and hold the voltage across the sampling resistor after the second switch is turned off and a predetermined time delay is applied, to obtain a negative peak voltage across the sampling resistor.

[0030] Optionally, the first feedback current signal generation unit comprises:

[0031] a third switch having a first path receiving a positive peak voltage across the sampling resistor and a control terminal receiving the first gate signal;

[0032] a third voltage-controlled current source having a voltage control terminal connected to a second path of the third switch and configured to generate the first feedback current signal according to the positive peak voltage across the sampling resistor.

[0033] Optionally, the second feedback current signal generation unit comprises:

[0034] a fourth switch having a first path receiving a negative peak voltage across the sampling resistor and a control terminal receiving the second gate signal;

[0035] a fourth voltage-controlled current source having a voltage control terminal connected to a second path of the fourth switch and configured to generate the second feedback current signal according to the negative peak voltage across the sampling resistor.

[0036] Optionally, the compensation signal generation unit comprises:

[0037] a third capacitor;

[0038] a reference current source configured to provide the reference current signal to the third capacitor,

[0039] wherein the reference current signal, the first feedback current signal and the second feedback current signal jointly charge the third capacitor, and generate the compensation signal across the third capacitor.

[0040] Optionally, the third voltage-controlled current source and the fourth voltage-controlled current source have the same conversion coefficient.

[0041] Optionally, the first drive unit controls the first switch to be turned off according to whether the voltage signal across the sampling resistor or a preset ramp voltage signal reaches the compensation signal.

[0042] According to a second aspect of the present disclosure, there is provided a constant current control method for a flyback converter, which can be applied to the flyback converter as described above, and the constant current control method comprises:

[0043] sampling a voltage across a primary winding to obtain a first sampling signal;

[0044] obtaining a positive peak voltage and a negative peak voltage across the sampling resistor in each switching period;

[0045] generating a feedback current signal according to the input voltage, the first sampling signal, a positive peak voltage and a negative peak voltage across the sampling resistor;

[0046] generating a compensation signal according to the feedback current signal, the compensation signal being used to control the turn-off of the first switch tube.

[0047] Optionally, the voltage across the sampling resistor is sampled and held at the turn-off moment of the first switch tube to obtain the positive peak voltage across the sampling resistor;

[0048] The voltage across the sampling resistor is sampled and held after the turn-off of the second switch tube and a predetermined time delay to obtain the negative peak voltage across the sampling resistor.

[0049] Optionally, generating a feedback current signal according to the input voltage, the first sampling signal, a positive peak voltage and a negative peak voltage across the sampling resistor comprises:

[0050] determining a zero-crossing moment of the excitation current according to the input voltage and the first sampling signal;

[0051] generating a first gate signal according to the zero-crossing moment and the second control signal;

[0052] performing an exclusive-OR logical operation on the first gate signal and the second control signal to obtain a second gate signal;

[0053] converting the positive peak voltage across the sampling resistor during the effective period of the first gate signal to obtain a first feedback current signal;

[0054] converting the negative peak voltage across the sampling resistor during the effective period of the second gate signal to obtain a second feedback current signal.

[0055] Optionally, the feedback current signal is the first feedback current signal and the second feedback current signal; and

[0056] generating a compensation signal according to the feedback current signal comprises:

[0057] charging a third capacitor according to a reference current signal, the first feedback current signal and the second feedback current signal to generate the compensation signal across the third capacitor.

[0058] The present application has at least the following advantages:

[0059] In the flyback converter of this invention, the first sampling unit can sample the output reflected voltage through the voltage across the primary winding. The feedback unit can introduce the positive and negative parts of the excitation current (where the negative peak voltage across the sampling resistor can compensate for the current loss caused by the reverse charging stage of the excitation inductor) into the current loop for closed-loop feedback and generate a corresponding compensation signal based on the positive and negative peak voltages across the sampling resistor within one switching cycle. Then, the first drive unit compares the compensation signal with the voltage signal across the sampling resistor or a preset ramp voltage signal to determine the turn-off time of the first switch, that is, to determine the conduction time of the first switch within one switching cycle, thereby realizing constant current control of the output current. This invention has high constant current control accuracy, and all signals are sampled in the primary side of the flyback converter, realizing primary side control of the flyback converter, which is low in cost and highly reliable.

[0060] In a preferred embodiment, the integrating capacitor (i.e., the second capacitor) is charged by the input voltage when the first switch is turned on and the voltage signal across the sampling resistor is greater than the reference ground potential. The integrating capacitor is discharged by the first sampling signal when the second switch is turned on. Based on the volt-second balance principle, the zero-crossing time of the excitation inductor current can be obtained. Then, based on the zero-crossing time, the feedback time of the first feedback current signal and the second feedback current signal can be accurately obtained during the second switch's conduction period. The circuit structure is simple and can further improve the control accuracy.

[0061] It should be noted that the above general description and the following detailed description are exemplary and explanatory only, and do not limit the present invention. Attached Figure Description

[0062] Figure 1 This diagram shows the structure of a traditional active clamp flyback converter.

[0063] Figure 2 A schematic diagram of the structure of a flyback converter provided according to an embodiment of the present invention is shown;

[0064] Figure 3 Show Figure 2 A schematic diagram of the structure of the feedback unit;

[0065] Figure 4 Show Figure 3 A schematic diagram of the structure of the strobe signal generation unit;

[0066] Figure 5 The following diagram shows the timing waveforms of each signal in a flyback converter provided according to an embodiment of the present invention;

[0067] Figure 6 A flowchart illustrating a constant current control method for a flyback converter according to an embodiment of the present invention is shown. Detailed Implementation

[0068] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0069] like Figure 2 As shown, the flyback converter in this embodiment of the invention takes an active clamp flyback converter as an example. The active clamp flyback converter includes: a transformer Tr containing a primary winding Np and a secondary winding Ns; a voltage input circuit connected to the primary winding Np; a voltage output circuit connected to the secondary winding Ns; a second switch Q2, a first capacitor C1, and a first inductor Lk connected in series with the primary winding Np in sequence; a first switch Q1 and a sampling resistor Rs connected in series between the primary winding Np and the reference ground potential in sequence; and a control circuit 2. In this embodiment, the end where the primary winding Np is connected to the first inductor Lk is defined as its same-name terminal, and the end where the primary winding Np is connected to the first switch Q1 and the second switch Q2 is defined as its opposite-name terminal.

[0070] The voltage input circuit includes a rectifier circuit 1 and an input capacitor Ci. The rectifier circuit 1 can be connected to a power source through a first connection port, facilitating the supply of electrical energy to the active clamp flyback converter. This power source can be, but is not limited to, a power grid, generator, transformer, battery, solar panel, wind turbine, regenerative braking system, hydraulic or wind turbine, or any other device capable of supplying electrical energy to the active clamp flyback converter. For example, the input of the active clamp flyback converter is alternating current (AC). After passing through the rectifier circuit 1 and the filter capacitor Ci, a low-frequency stable DC input voltage Vin is obtained, which is connected to the common connection node of the first capacitor C1 and the first inductor Lk. The active clamp flyback converter removes the traditional RCD clamping method, using a second switch Q2 instead of a traditional diode. Together with the first capacitor C1, they form a clamping circuit to protect the first switch Q1 and enable information transfer between the primary and secondary sides. In one possible embodiment, the first inductor Lk is the leakage inductance of the primary winding Np, the inductance Lm is the magnetizing inductance of the primary winding Np, and the first capacitor Cr is the resonant capacitor.

[0071] The drain of the first switch Q1 is connected to the non-identical end of the primary winding Np, the source of the first switch Q1 is connected to the reference ground through a sampling resistor Rs, and the gate of the first switch Q1 is connected to the control circuit 2. The drain of the second switch Q2 is connected to the first capacitor C1, the source of the second switch Q2 is connected to the non-identical end of the primary winding Np, and the gate of the second switch Q2 is connected to the control circuit 2. The capacitors C11 and C12 are the junction capacitors of the first switch Q1 and the second switch Q2, respectively. In one possible embodiment, the first switch Q1 is a main power switch, and the input voltage Vin is transmitted from the primary part to the secondary part of the transformer Tr by controlling the conduction and turn-off of the first switch Q1. The second switch Q2 is an auxiliary switch, and the second switch Q2 is used to clamp the peak signal in the power loop. In one possible embodiment, the first switch Q1 and the second switch Q2 are both NMOS field effect transistors.

[0072] The secondary part of the active-clamp flyback converter includes a rectifier diode D1 and an output capacitor Co. The anode of the rectifier diode D1 is connected to the non-identical end of the secondary winding Ns, and the cathode of the rectifier diode D1 is connected to the output of the active-clamp flyback converter. The positive electrode of the output capacitor Co is connected to the output of the active-clamp flyback converter, and the negative electrode of the output capacitor Co is connected to the reference ground. In addition, the identical end of the secondary winding Ns is also connected to the reference ground. Further, the output of the active-clamp flyback converter can be connected to a load, and the load receives the electrical energy (e.g., voltage and current) converted by the active-clamp flyback converter. In some examples, the electrical energy converted by the active-clamp flyback converter is further filtered before reaching the load. In some examples, the filter is a sub-component of the active-clamp flyback converter, an external component of the active-clamp flyback converter, and / or a sub-component of the load. In any case, the load can use the filtered or unfiltered electrical energy from the active-clamp flyback converter to perform a function. Optionally, the load can include, but is not limited to, a computing device and related components, such as a microprocessor, an electrical component, a circuit, a laptop computer, a desktop computer, a tablet computer, a mobile phone, a battery, a speaker, a lighting unit such as an LED, a component related to a car / ship / aircraft / train, a motor, a transformer, or any other type of electrical device and / or circuit that receives voltage or current from the active-clamp flyback converter.

[0073] The control circuit 2 is configured to provide a first control signal Vgs1 and a second control signal Vgs2 to control the switching state of the first switch Q1 and the second switch Q2, respectively.

[0074] Further, the control circuit 2 includes a first sampling unit 21, a feedback unit 22, and a first driving unit 23.

[0075] The first sampling unit 21 is configured to sample the voltage across the primary winding Np during the conduction of the Q2 to obtain a first sampling signal VFB. Based on the working principle of the transformer Tr, the voltage Vi across the primary winding Np and the output voltage Vo of the converter satisfy the following relationship:

[0076] Vi = N*Vo (1),

[0077] where N is the turns ratio of the primary winding Np and the secondary winding Ns of the transformer Tr. That is, the sampling of the voltage across the primary winding Np is equivalent to the sampling of the output reflected voltage.

[0078] The feedback unit 22 is configured to generate a feedback current signal according to the input voltage Vin, the first sampling signal VFB, the positive peak voltage and the negative peak voltage across the sampling resistor Rs in each switching cycle, and generate a compensation signal according to the feedback current signal.

[0079] The first driving unit 23 is configured to control the turn-off of the first switch Q1 according to the compensation signal generated by the feedback unit 22. For example, the first driving unit 23 can turn off the first switch Q1 when the voltage signal V RS across the sampling resistor Rs reaches the compensation signal; or, the first driving unit 23 can also turn off the first switch Q1 when the voltage value of the preset ramp voltage signal reaches the compensation signal. In different control modes of the active-clamp flyback converter, the signal compared with the compensation signal selected by the first driving unit 23 is different, which is not limited by the present application.

[0080] In the embodiment, as shown in Figure 3 , the feedback unit 22 further includes a gate signal generation unit 221, a first sampling holding unit 222, a second sampling holding unit 223, a first feedback current signal generation unit 224, a second feedback current signal generation unit 225, and a compensation signal generation unit 226.

[0081] The gate signal generation unit 221 is configured to determine the zero-crossing moment of the excitation current (denoted as I Lm ) according to the input voltage Vin and the first sampling signal VFB, and generate a first gate signal FB_CSP and a second gate signal FB_CSN according to the zero-crossing moment of the excitation current I Lm and the second control signal Vgs2.

[0082] As shown in Figure 4 and Figure 3 , in the embodiment, the gate signal generation unit 221 includes a second capacitor C2, a charging unit 2211, a discharging unit 2212, a comparison unit U4, an RS flip-flop U5, and an exclusive-OR logic circuit U1.

[0083] The charging unit 2211 is used to charge the second capacitor C2 by a first current generated based on the input voltage Vin during the period when the voltage signal V RS greater than the reference ground potential (for example, zero potential) and the first control signal Vgs1 is effective (for example, high level is effective) to generate the first current based on the input voltage Vin. In the embodiment, the charging unit 2211 includes a first comparison circuit U2, an AND logic circuit U3, a first switch K1 and a first voltage-controlled current source G1. The positive input terminal of the first comparison circuit U2 receives the voltage signal V RS between the sampling resistor, the negative input terminal of the first comparison circuit U2 is connected with the reference ground. The first input terminal of the AND logic circuit U3 receives the first control signal Vgs1, the second input terminal of the AND logic circuit U3 is connected with the output terminal of the first comparison circuit U2. The first path terminal of the first switch K1 receives the input voltage Vin, the control terminal of the first switch K1 is connected with the output terminal of the AND logic circuit U3. The first voltage-controlled current source G1 is connected between the power supply terminal VCC and the first terminal of the second capacitor C2, the second terminal of the second capacitor C2 is connected with the reference ground, and the voltage control terminal of the first voltage-controlled current source G1 is connected with the second path terminal of the first switch K1.

[0084] The discharging unit 2212 is used to discharge the second capacitor C2 by a second current generated based on the first sampling signal VFB during the period when the first strobe signal FB_CSP is effective. In the embodiment, the discharging unit 2212 includes a second switch K2 and a second voltage-controlled current source G2. The first path terminal of the second switch K2 receives the first sampling signal VFB, the control terminal of the second switch K2 receives the first strobe signal FB_CSP. The second voltage-controlled current source G2 is connected in parallel with the second capacitor C2, and the voltage control terminal of the second voltage-controlled current source G2 is connected with the second path terminal of the second switch K2.

[0085] The positive input terminal of the comparison unit U4 is connected with the reference ground, the negative input terminal of the comparison unit U4 is connected with the first terminal of the second capacitor C2, and the comparison unit U4 is used to generate a reset signal when the voltage SX between the second capacitor C2 drops to the reference ground potential. The reset terminal of the RS flip-flop U5 is connected with the output terminal of the comparison unit U4 to receive the reset signal, the set terminal of the RS flip-flop U5 receives the second control signal Vgs2, and the output terminal of the RS flip-flop U5 outputs the first strobe signal FB_CSP. In the embodiment, the second capacitor C2 is an integration capacitor.

[0086] Optionally, if the voltage-current conversion coefficient of the first voltage-controlled current source G1 is denoted as k1, and the voltage-current conversion coefficient of the second voltage-controlled current source G2 is denoted as k2, based on the input-output relationship of the voltage-controlled current source, I G1 = Vin*k1, I G2=VFB*k2, and in this embodiment, the conversion coefficients of the first voltage-controlled current source G1 and the second voltage-controlled current source G2 are the same, that is, k1=k2. Wherein, I G1 is the first current generated by the first voltage-controlled current source G1 based on the input voltage Vin, I G2 is the second current generated by the second voltage-controlled current source G2 based on the first sampling signal VFB.

[0087] Based on the circuit structure of the above-described gating signal generation unit 221, it can be known that, in this embodiment, the voltage signal V RS greater than the reference ground potential and the first control signal Vgs1 is high during the period when the input voltage Vin is provided to the voltage control end of the first voltage-controlled current source G1, and then the first capacitor C2 is charged by the first current; and the first sampling signal VFB is provided to the second voltage-controlled current source G2 during the period when the first gating signal FB_CSP is high, and then the second capacitor C2 is discharged by the second current. Based on the volt-second balance, when the discharging amount of the second capacitor C2 by the second current is equal to the charging amount of the second capacitor C2 by the first current, the voltage SX across the second capacitor C2 decreases to the reference ground potential, at which time the output level of the comparison unit U4 flips, and the reset signal is output to the RS flip-flop U5 to reset it. Further, in this embodiment, the zero-crossing moment of the magnetizing current I Lm in the active clamping flyback converter can be accurately determined based on the input voltage Vin and the first sampling signal VFB representing the reflected voltage of the output voltage on the primary side during the conduction period of the second switch Q2, that is, the moment when the output level of the comparison unit U4 flips from high to low, and the high-level time of the first gating signal FB_CSP represents the time when the peak value of the magnetizing current I Lm decreases from the peak value to zero. The circuit structure is simple, and the accuracy is higher.

[0088] Continuing to refer to Figure 3 , the first input end of the XOR logic circuit U1 receives the first gating signal FB_CSP, the second input end of the XOR logic circuit U1 receives the second control signal Vgs2, and the output of the XOR logic circuit U1 is the second gating signal FB_CSN. Based on the input-output relationship of the XOR logic circuit, it can be known that, in this embodiment, the positive phase and the negative phase of the magnetizing current I Lm can be accurately divided during the conduction period of the second switch Q2, which is helpful for the subsequent realization of accurate current feedback.

[0089] The first sampling and holding unit 222 is connected with the common connection node of the sampling resistor Rs and the first switch Q1, and is used for sampling and holding the voltage V RS across the sampling resistor at the turn-off moment of the first switch Q1 to obtain the positive peak voltage CS_P across the sampling resistor.

[0090] The second sampling and holding unit 223 is connected with the common connection node of the sampling resistor Rs and the first switch tube Q1, and is used for sampling and holding the voltage V RS The sampling and holding is performed to obtain the negative peak voltage CS_N across the sampling resistor. The delay unit 227 can be configured to transmit the level state of the second control signal Vgs2 to the second sampling and holding unit 223 after a delay of a predetermined time, so as to realize the delayed triggering of the second sampling and holding unit 223.

[0091] The first feedback current signal generation unit 224 is used for performing voltage-current conversion on the positive peak voltage CS_P across the sampling resistor obtained by sampling during the effective period (high level period) of the first gate signal FB_CSP, so as to generate the first feedback current signal. Alternatively, the first feedback current signal generation unit 224 realizes the voltage-current conversion based on the voltage-controlled current source, and specifically includes a third switch K3 and a third voltage-controlled current source G3. The first passage of the third switch K3 receives the positive peak voltage CS_P across the sampling resistor, and the control end of the third switch K3 receives the first gate signal FB_CSP. The voltage control end of the third voltage-controlled current source G3 is connected with the second passage of the third switch K3, and the third voltage-controlled current source G3 is used for generating the first feedback current signal according to the positive peak voltage CS_P across the sampling resistor.

[0092] The second feedback current signal generation unit 225 is used for performing voltage-current conversion on the negative peak voltage CS_N across the sampling resistor obtained by sampling during the effective period (high level period) of the second gate signal FB_CSN, so as to generate the second feedback current signal. Alternatively, the second feedback current signal generation unit 225 realizes the voltage-current conversion based on the voltage-controlled current source, and specifically includes a fourth switch K4 and a fourth voltage-controlled current source G4. The first passage of the fourth switch K4 receives the positive peak voltage CS_P across the sampling resistor, and the control end of the fourth switch K4 receives the second gate signal FB_CSN. The voltage control end of the fourth voltage-controlled current source G4 is connected with the second passage of the fourth switch K4, and the fourth voltage-controlled current source G4 is used for generating the second feedback current signal according to the positive peak voltage CS_P across the sampling resistor.

[0093] Alternatively, if the conversion coefficient of the voltage-current of the third voltage-controlled current source G3 is denoted as k3, and the conversion coefficient of the voltage-current of the fourth voltage-controlled current source G4 is denoted as k4, then based on the input-output relationship of the voltage-controlled current source, I G3 =CS_P*k3, I G4 =CS_N*k4, and the conversion coefficients of the third voltage-controlled current source G3 and the fourth voltage-controlled current source G4 are the same in this embodiment, i.e., k3=k4. Wherein, I G3a first feedback current signal generated by a third voltage-controlled current source G3 based on a positive peak voltage CS_P across the sampling resistor G4 a second feedback current signal generated by a fourth voltage-controlled current source G4 based on a negative peak voltage CS_N across the sampling resistor.

[0094] The compensation signal generation unit 226 is configured to generate a compensation signal V COMP based on the reference current signal, the first feedback current signal and the second feedback current signal. REF Optionally, the compensation signal generation unit 226 comprises a third capacitor C3 and a reference current source I Lm .

[0095] With reference Figure 5 to the working principle of the feedback unit 22 in the embodiment of the present application, the following is specifically described:

[0096] Firstly, the strobe signal generation unit 221 is configured to accurately determine the zero-crossing moment of the magnetizing current I Lm in the active clamped flyback converter, i.e. the moment when the voltage across the integration capacitor C2 goes from high level to zero, based on the input voltage Vin and the first sampling signal VFB representing the reflected voltage of the output voltage at the primary side during the on period of the second switch Q2, i.e. the high level period of the second control signal Vgs2, and to represent the time when the magnetizing current I Lm decreases from the peak value to zero based on the high level time of the first strobe signal FB_CSP. Meanwhile, the XOR logic circuit U1 is configured to determine the negative time period of the magnetizing current I Lm , i.e. the high level time of the second strobe signal FB_CSN during the on period of the second switch Q2. Further, the positive peak voltage CS_P across the sampling resistor during the high level period of the first strobe signal FB_CSP is converted into a first feedback current signal, and the negative peak voltage CS_N across the sampling resistor during the high level period of the second strobe signal FB_CSN is converted into a second feedback current signal, and the third capacitor C3 is charged by the reference current signal, the first feedback current signal and the second feedback current signal, so as to generate a compensation signal V COMP across the third capacitor C3. Finally, the compensation signal V COMP is compared with the voltage signal V RS across the sampling resistor or a preset ramp voltage signal, so as to determine the off moment of the first switch Q1, i.e. the on time of the first switch Q1 in a switching period. It should be noted that, Figure 5 in the embodiment of the present application, I FB_CSThe characterization feedback unit 22 generates a total feedback current signal according to the input voltage Vin, the first sampling signal VFB, the positive peak voltage and the negative peak voltage across the sampling resistor Rs in each switching period, wherein the current part of the negative peak voltage CS_N across the sampling resistor is negative, which can be used to compensate the current loss part caused by the reverse charging stage of the magnetizing inductance Lm, i.e. the current part not transmitted to the secondary side of the transformer, to further improve the constant current control accuracy.

[0097] The present application introduces the positive part and the negative part of the magnetizing current I Lm in the current loop in a switching period by the positive peak voltage and the negative peak voltage across the sampling resistor Rs, performs closed-loop feedback, and generates a corresponding compensation signal V COMP , so that high-precision output constant current control can be achieved. Meanwhile, all the signals required in the current loop can be sampled in the primary side part of the active-clamp flyback converter, the primary side control of the active-clamp flyback converter is achieved, the cost is low, and the reliability is high.

[0098] Further, the control circuit 2 in the embodiment further includes other drive units for controlling the first switch Q1 to be turned on, controlling the second switch Q2 to be turned on and turned off, respectively. The control principles of the first switch Q1 and the second switch Q2 can be understood with reference to the prior art, and will not be described in detail in the present application. For example, the second switch Q2 can be controlled to be turned on after the first switch Q1 is turned off for a first dead time, the second switch Q2 can be controlled to be turned off after the zero-crossing moment of the magnetizing current I Lm for a preset time, and the first switch Q1 can be controlled to be turned on after the second switch Q2 is turned off for a second dead time.

[0099] The technical solution of the present application is described by taking the active-clamp flyback converter as an example in the embodiment, but the technical solution of the present application is not limited to be used in the active-clamp flyback converter, and can also be applied to other asymmetric half-bridge flyback converters or other flyback converters with auxiliary switches.

[0100] Further, the present application further discloses a constant current control method of a flyback converter, which can be applied to the flyback converter as shown in Figures 2 to 5 .

[0101] As shown in Figure 6 , in each switching period, the constant current control method includes the following steps:

[0102] In step S1, the voltage across the primary winding is sampled to obtain a first sampling signal.

[0103] Exemplarily, the first sampling unit 21 can be used to sample the voltage across the primary winding Np to obtain the first sampling signal VFB.

[0104] In step S2, the positive peak voltage and the negative peak voltage across the sampling resistor in each switching cycle are obtained.

[0105] In this embodiment, the voltage VFB across the sampling resistor is sampled and held at the turn-off moment of the first switch Q1 to obtain the positive peak voltage across the sampling resistor; and the voltage VFB across the sampling resistor is sampled and held after the second switch Q2 is turned off and a predetermined time delay to obtain the negative peak voltage across the sampling resistor. RS RS In this embodiment, the voltage VFB across the sampling resistor is sampled and held at the turn-off moment of the first switch Q1 to obtain the positive peak voltage across the sampling resistor; and the voltage VFB across the sampling resistor is sampled and held after the second switch Q2 is turned off and a predetermined time delay to obtain the negative peak voltage across the sampling resistor.

[0106] In step S3, the feedback current signal is generated according to the input voltage, the first sampling signal, the positive peak voltage and the negative peak voltage across the sampling resistor.

[0107] In this embodiment, step S3 further includes: determining the zero-crossing moment of the excitation current according to the input voltage and the first sampling signal; generating the first gate signal according to the zero-crossing moment and the second control signal; performing exclusive-OR logical operation on the first gate signal and the second control signal to obtain the second gate signal; converting the positive peak voltage across the sampling resistor during the validity of the first gate signal to obtain the first feedback current signal; and converting the negative peak voltage across the sampling resistor during the validity of the second gate signal to obtain the second feedback current signal.

[0108] In step S4, the compensation signal is generated according to the feedback current signal, and the compensation signal is used to control the turn-off of the first switch.

[0109] In this embodiment, the feedback current signal includes the first feedback current signal and the second feedback current signal. Step S4 further includes: charging the third capacitor according to the reference current signal, the first feedback current signal and the second feedback current signal to generate the compensation signal across the third capacitor. The specific implementation principles of steps S3 and S4 can be understood with reference to the feedback unit 22 and the related description in the foregoing embodiments, which will not be described herein. Figure 3 Figure 4 In this embodiment, the feedback current signal includes the first feedback current signal and the second feedback current signal. Step S4 further includes: charging the third capacitor according to the reference current signal, the first feedback current signal and the second feedback current signal to generate the compensation signal across the third capacitor. The specific implementation principles of steps S3 and S4 can be understood with reference to the feedback unit 22 and the related description in the foregoing embodiments, which will not be described herein.

[0110] Exemplarily, a comparison circuit can be configured to compare the voltage signal across the sampling resistor or the preset ramp voltage signal with the compensation signal, and trigger the turn-off of the first switch when the voltage signal across the sampling resistor or the preset ramp voltage signal reaches the compensation signal.

[0111] ​​In summary, the present application can realize sampling of the output reflected voltage through the voltage at both ends of the primary winding, the positive peak voltage and the negative peak voltage at both ends of the sampling resistor in a switching cycle can introduce the positive part and the negative part of the excitation current into the current loop for closed-loop feedback and generate a corresponding compensation signal, and the compensation signal can be compared with the voltage signal at both ends of the sampling resistor or a preset ramp voltage signal to determine the turn-off time of the first switch tube, that is, to determine the conduction time of the first switch tube in a switching cycle, so as to realize constant current control of the output current, and the control precision is high, and meanwhile, all signals are sampled in the primary part of the active clamping flyback converter, the primary control of the active clamping flyback converter is realized, the cost is low, and the reliability is high.

[0112] In a preferred embodiment, the integral capacitor is charged by the input voltage during the period when the first switch tube is turned on and the voltage at both ends of the sampling resistor is greater than the reference ground potential, the integral capacitor is discharged by the first sampling signal during the period when the second switch tube is turned on, and the zero-crossing time of the excitation inductor current can be obtained based on the volt-second balance principle, and then the feedback time of the first feedback current signal and the second feedback current signal can be accurately obtained during the period when the second switch tube is turned on according to the zero-crossing time, the circuit structure is simple, and the control precision can be further improved.

[0113] Finally, it should be noted that: obviously, the above embodiments are only examples for clearly illustrating the present application, and are not limitations on the embodiments. For ordinary skilled persons in the art, other different forms of changes or variations can be made on the basis of the above description. Here, all the embodiments need not and cannot be exhausted. The obvious changes or variations derived therefrom are still within the protection scope of the present application.

Claims

1. A flyback converter, wherein, The application relates to a transformer, comprising a primary winding and a secondary winding; a first switch tube and a sampling resistor connected in sequence between the primary winding and a reference ground; a second switch tube, a first capacitor and a first inductor connected in sequence in series with the primary winding; a control circuit for providing a first control signal and a second control signal to control the switching state of the first switch tube and the second switch tube respectively, wherein the control circuit comprises: a first sampling unit for sampling the voltage across the primary winding to obtain a first sampling signal; a feedback unit for generating a feedback current signal according to an input voltage, the first sampling signal, the positive peak voltage and the negative peak voltage across the sampling resistor in each switching cycle, and generating a compensation signal according to the feedback current signal; and a first driving unit for controlling the turn-off of the first switch tube according to the compensation signal, wherein the feedback unit comprises: a gate signal generation unit for determining the zero-crossing moment of the excitation current according to the input voltage and the first sampling signal, and generating a first gate signal and a second gate signal according to the zero-crossing moment and the second control signal; a first feedback current signal generation unit for converting the positive peak voltage across the sampling resistor obtained by sampling to generate a first feedback current signal during the validity of the first gate signal; a second feedback current signal generation unit for converting the negative peak voltage across the sampling resistor obtained by sampling to generate a second feedback current signal during the validity of the second gate signal; and a compensation signal generation unit for generating the compensation signal according to a reference current signal, the first feedback current signal and the second feedback current signal. The gate signal generation unit comprises: a charging unit for charging the second capacitor by a first current converted based on the input voltage during the validity of the first control signal when the voltage signal across the sampling resistor is greater than the reference ground potential; a discharging unit for discharging the second capacitor by a second current converted based on the first sampling signal during the validity of the first gate signal; a comparison unit for generating a reset signal when the voltage across the second capacitor drops to the reference ground potential; an RS flip-flop with the reset end receiving the reset signal, the set end receiving the second control signal and the output end outputting the first gate signal; and an XOR logic circuit receiving the first gate signal and the second control signal and outputting the second gate signal. The feedback unit further comprises: a first sample-and-hold unit for sampling and holding the voltage across the sampling resistor at the turn-off moment of the first switch tube to obtain the positive peak voltage across the sampling resistor; and a second sample-and-hold unit for sampling and holding the voltage across the sampling resistor after the second switch tube is turned off and delayed for a predetermined time to obtain the negative peak voltage across the sampling resistor. The first feedback current signal generation unit comprises: a third switch with the first path end receiving the positive peak voltage across the sampling resistor and the control end receiving the first gate signal. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ 2. The flyback converter of claim 1, wherein, ​ ​ ​ ​ ​ ​ 3. The flyback converter of claim 1, wherein, ​ ​ ​ 4. The flyback converter of claim 1, wherein, ​ ​ A third voltage-controlled current source, a voltage control terminal of which is connected with the second passage terminal of the third switch, is configured to generate the first feedback current signal according to the positive peak voltage across the sampling resistor.

5. The flyback converter of claim 4, wherein, The second feedback current signal generation unit comprises: A fourth switch, a first passage terminal of which receives the negative peak voltage across the sampling resistor, and a control terminal of which receives the second gate signal; A fourth voltage-controlled current source, a voltage control terminal of which is connected with the second passage terminal of the fourth switch, is configured to generate the second feedback current signal according to the negative peak voltage across the sampling resistor.

6. The flyback converter of claim 1, wherein, The compensation signal generation unit comprises: A third capacitor; A reference current source configured to provide the reference current signal to the third capacitor, Wherein, the reference current signal, the first feedback current signal and the second feedback current signal jointly charge the third capacitor, and generate the compensation signal across the third capacitor.

7. The flyback converter of claim 5, wherein, The conversion coefficients of the third voltage-controlled current source and the fourth voltage-controlled current source are the same.

8. The flyback converter of claim 1, wherein, The first drive unit controls the turn-off of the first switch according to whether the voltage signal across the sampling resistor or the preset ramp voltage signal reaches the compensation signal.

9. A constant current control method of a flyback converter, applied to the flyback converter of any one of claims 1-8, wherein, The constant current control method comprises: Sampling the voltage across the primary winding to obtain a first sampling signal; Obtaining the positive peak voltage and the negative peak voltage across the sampling resistor in each switching cycle; Generating a feedback current signal according to the input voltage, the first sampling signal, the positive peak voltage and the negative peak voltage across the sampling resistor; Generating a compensation signal according to the feedback current signal, the compensation signal being used to control the turn-off of the first switch.

10. The constant current control method of a flyback converter according to claim 9, wherein, Sampling and holding the voltage across the sampling resistor at the turn-off moment of the first switch to obtain the positive peak voltage across the sampling resistor; Sampling and holding the voltage across the sampling resistor after the second switch is turned off and a predetermined time is delayed to obtain the negative peak voltage across the sampling resistor.

11. The constant current control method of a flyback converter according to claim 9, wherein, Generating a feedback current signal according to the input voltage, the first sampling signal, the positive peak voltage and the negative peak voltage across the sampling resistor comprises: Determining the zero-crossing moment of the excitation current according to the input voltage and the first sampling signal; Generating a first gate signal according to the zero-crossing moment and the second control signal; Performing exclusive-OR logical operation on the first gate signal and the second control signal to obtain a second gate signal; Converting the positive peak voltage across the sampling resistor during the effective period of the first gate signal to obtain a first feedback current signal; Converting the negative peak voltage across the sampling resistor during the effective period of the second gate signal to obtain a second feedback current signal.

12. The constant current control method of a flyback converter according to claim 11, wherein, The feedback current signal comprises the first feedback current signal and the second feedback current signal; and Generating a compensation signal according to the feedback current signal comprises: Jointly charging a third capacitor with a reference current signal, the first feedback current signal and the second feedback current signal to generate the compensation signal across the third capacitor. ​

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