Data verification method and system

Abstract

Disclosed are a data verification method and system. At least a portion of first data obtained from a storage device is divided into at least one data segment; calculations are performed on each of the at least one data segment to obtain at least one calculation result; for each of the at least one calculation result, data that satisfies a constraint relationship with the calculation result is searched from the obtained first data, and the location of the found data in the first data is determined; and the corresponding relationship between the location and the calculation result is stored in an associative manner. Consequently, when the first data in the storage device is subsequently verified, it is no longer necessary to obtain all of the first data from the storage device; rather, only data at a specific location in the first data needs to be obtained from the storage device, thereby improving data verification efficiency.

Description

Technical Field

[0001] The present disclosure relates to the field of data protection, and in particular to a data verification method and system. Background Art

[0002] In order to prevent data from being tampered with, the data needs to be verified to determine whether it has been tampered with.

[0003] Existing verification schemes require reading all the data to be verified (such as firmware data) from the storage device each time a verification is performed, which is time-consuming. In scenarios where frequent verification is required (such as firmware security verification scenarios), existing verification schemes cannot meet the demand for fast verification.

[0004] Therefore, a verification scheme that can improve verification efficiency is needed. Summary of the Invention

[0005] A technical problem to be solved by the present disclosure is to provide a verification solution that can improve verification efficiency.

[0006] According to a first aspect of the present disclosure, a data verification method is provided, comprising: dividing at least part of first data obtained from a storage device into at least one data segment; performing calculations on the at least one data segment respectively to obtain at least one calculation result; for the at least one calculation result, searching for data that meets a constraint relationship with the calculation result from the obtained first data respectively, and determining a position of the found data in the first data; and associatively saving the correspondence between the position and the calculation result.

[0007] Optionally, the method also includes: obtaining second data at the location from a storage device; based on the correspondence, determining whether the obtained second data and the calculation result corresponding to the location conform to a constraint relationship; if there is second data that does not conform to the constraint relationship with the calculation result corresponding to the location, determining that the first data has been tampered with.

[0008] Optionally, the step of separately calculating at least one data segment includes: separately calculating at least one data segment using a digest algorithm to map a first number of bits of data segment to a second number of bits of data, where the second number is smaller than the first number.

[0009] Optionally, the data found and the calculation result are both binary data, the number of bits of the data found is the same as the number of bits of the calculation result, and the constraint relationship is: the values ​​of the bits in the same order in the data found and the calculation result are equal; or the values ​​of the bits in the same order in the data found and the calculation result are not equal; or the data found is equal to a part of the binary data in the calculation result, and the values ​​of the bits in the same order in the other part of the binary data are not equal.

[0010] Optionally, the storage device is a non-volatile storage device, and the first data is firmware data.

[0011] Optionally, the step of calculating at least one data segment separately includes: using a hash algorithm to calculate at least one data segment separately, and / or for the at least one calculation result, searching for data that meets the constraint relationship with the calculation result from the acquired first data, and determining the position of the found data in the first data includes: dividing the calculation result into at least one first data segment; for the at least one first data segment, searching for data that meets the constraint relationship with the first data segment from the acquired first data, and determining the position of the found data in the first data, and the step of associatively saving the correspondence between the position and the calculation result includes: associatively saving the correspondence between the data segment position and the first data segment.

[0012] According to a second aspect of the present disclosure, a data verification method is provided, comprising: obtaining second data at a position recorded in an index from a storage device, the index being used to record a correspondence between the position and a calculation result, the calculation result being a calculation result obtained by calculating a data segment, the data segment being obtained by dividing at least part of the first data stored in the storage device; based on the correspondence, determining whether a constraint relationship exists between the obtained second data and the calculation result corresponding to the position; if there is second data that does not satisfy the constraint relationship with the calculation result corresponding to the position, determining that the first data has been tampered with.

[0013] According to a third aspect of the present disclosure, a data verification method is provided, comprising: acquiring first data from a storage device; generating at least one third data; for the at least one third data, searching for data that satisfies a constraint relationship with the third data from the acquired first data, and determining a position of the found data in the first data; and associatively saving a correspondence between the position and the third data.

[0014] Optionally, the method also includes: obtaining second data at the location from a storage device; based on the correspondence, determining whether the obtained second data and the third data corresponding to the location conform to a constraint relationship; if there is second data that does not conform to the constraint relationship with the third data corresponding to the location, determining that the first data has been tampered with.

[0015] According to a fourth aspect of the present disclosure, a firmware security verification system is provided, comprising: a non-volatile memory for storing firmware data; a trusted platform control module for reading the firmware data from the non-volatile memory by accessing a bus, dividing at least a portion of the read firmware data into at least one data segment, performing calculations on the at least one data segment to obtain at least one calculation result, and for the at least one calculation result, searching the read firmware data for data that meets a constraint relationship with the calculation result, determining a position of the found data in the firmware data, and associatively saving a correspondence between the position and the calculation result.

[0016] According to a fifth aspect of the present disclosure, a firmware security verification system is provided, including: a non-volatile memory and a trusted platform control module, the trusted platform control module reads firmware data at a position from the non-volatile memory by accessing a bus according to the position recorded in an index, the index is used to record the correspondence between the position and the calculation result, the calculation result is a calculation result obtained by calculating a data segment, and the data segment is obtained by dividing at least part of the firmware data stored in the non-volatile memory, and the trusted platform control module also determines whether the read firmware data and the calculation result corresponding to the position conform to a constraint relationship based on the correspondence relationship, and if there is firmware data that does not conform to the constraint relationship with the calculation result corresponding to the position, it is determined that the firmware data stored in the non-volatile memory has been tampered with.

[0017] According to a fifth aspect of the present disclosure, a computing device is provided, comprising: a processor; and a memory on which executable code is stored, and when the executable code is executed by the processor, the processor executes the method described in any one of the first to third aspects above.

[0018] According to a sixth aspect of the present disclosure, a computer program product is provided, comprising an executable code, which, when executed by a processor of an electronic device, causes the processor to execute the method described in the first aspect above.

[0019] According to the seventh aspect of the present disclosure, a non-temporary machine-readable storage medium is provided, on which executable code is stored. When the executable code is executed by a processor of an electronic device, the processor executes the method described in any one of the first to third aspects above.

[0020] The present disclosure divides at least part of the first data into at least one data segment and calculates at least one data segment to obtain at least one calculation result. Then, the present disclosure searches for data that meets the constraint relationship with the calculation result from the obtained first data, and determines the position of the found data in the first data, so as to indirectly save the calculation result in the first data. When the first data in the storage device is subsequently verified, it is no longer necessary to obtain all the first data from the storage device, but only the data at a specific position in the first data needs to be obtained, thereby improving the data verification efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The above and other objects, features and advantages of the present disclosure will become more apparent through a more detailed description of exemplary embodiments of the present disclosure with reference to the accompanying drawings, wherein like reference numerals generally represent like components in the exemplary embodiments of the present disclosure.

[0022] Figure 1 A schematic diagram showing the principle of the data verification method disclosed in the present invention is shown.

[0023] Figure 2 A schematic flowchart of a data verification method according to an embodiment of the present disclosure is shown.

[0024] Figure 3 A schematic flowchart of a data verification method according to another embodiment of the present disclosure is shown.

[0025] Figure 4 A schematic structural diagram of a firmware security verification system according to an embodiment of the present disclosure is shown.

[0026] Figure 5 It shows the mapping relationship between the encryption calculation result, index table entry and Firmware data area.

[0027] Figure 6 A schematic flowchart of the trustworthy verification process of the present disclosure is shown.

[0028] Figure 7 A structural diagram of a data verification device according to an embodiment of the present disclosure is shown.

[0029] Figure 8 A structural schematic diagram of a data verification device according to another embodiment of the present disclosure is shown.

[0030] Figure 9 A schematic structural diagram of a computing device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0031] The preferred embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although preferred embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments described herein. Rather, these embodiments are provided to make the present disclosure more thorough and complete, and to fully convey the scope of the present disclosure to those skilled in the art.

[0032] Figure 1 A schematic diagram showing the principle of the data verification method disclosed in the present invention is shown.

[0033] like Figure 1 As shown, the original data (i.e., the untampered data) is first divided into N data segments, where N is an integer greater than or equal to 1. A calculation is then performed on each of these N data segments to obtain N calculation results. Finally, each of these N calculation results is mapped onto the original data to obtain the mapping of each calculation result onto the original data. The mapping of a calculation result onto the original data can be a continuous data segment or multiple discrete data segments.

[0034] The mapping rule of the calculation result in the data is that the calculation result and the mapping result meet a pre-set constraint relationship. The constraint relationship can mean that the calculation result and the mapping result are equal or opposite to each other.

[0035] Both the calculation result and the mapping result can refer to binary data, with the number of bits in the calculation result being the same as the number of bits in the mapping result. The calculation result being equal to the mapping result means that the values ​​of the bits in the same order in the calculation result and the mapping result are equal. The calculation result being opposite to the mapping result means that the values ​​of the bits in the same order in the calculation result and the mapping result are different. Furthermore, a constraint relationship can also refer to other relationships, for example, the calculation result and the mapping result may be equal for a portion of the binary data, while the values ​​of the bits in the same order in another portion of the binary data are different.

[0036] After the mapping results of the calculation results in the original data are determined, the positions of the mapping results in the original data (ie, the mapping positions) are also determined, which is equivalent to indirectly storing the calculation results in the original data.

[0037] When verifying the data later, if the data has been tampered with, the constraint relationship between the data at the mapped location and the calculation result in the tampered data will generally be broken. Therefore, it is possible to determine whether the data has been tampered with by determining whether the data at the mapped location and the calculation result still conform to the constraint relationship. Therefore, when verifying the data, it is not necessary to obtain all the data again, but only the data at the mapped location.

[0038] The amount of data (number of bits) of the data at the mapping position is comparable to the calculation result. Generally speaking, the data length of the data to be verified (such as firmware data) is relatively large (at least at the M bit level), so the smaller the data length of the calculation result obtained by calculating the data segment, the less data amount needs to be obtained during data verification, and the higher the data verification efficiency. Therefore, the algorithm adopted when calculating the data segment can preferably be a mapping algorithm that can map data with a larger length (such as greater than a first threshold) to data with a smaller length (such as less than a second threshold), such as a digest algorithm. The digest algorithm can also be called a data digest algorithm or a message digest algorithm, which refers to an algorithm that mixes inputs of arbitrary length and generates a pseudo-random output of a fixed length, such as the SHA256 algorithm. Wherein, the data length refers to the number of bits (number of bits) of the data. The algorithm adopted for calculating the data segment can also be other various types of algorithms, such as encryption algorithms or other algorithms set artificially.

[0039] Taking the firmware data to be verified as an example, assuming that the size of the firmware data is 10M bytes, that is, 80M bits. The amount of data read by the traditional security verification method is 80M bits. Assuming that the firmware data is divided into 2 data segments, the calculation result obtained by hashing each data segment using the SHA256 algorithm is 256 bits. Then, according to the scheme disclosed in this disclosure, the amount of data read by the security verification is 2*256bit=512bit, and the amount of data read is approximately 0.0006% of the traditional scheme, which greatly improves the efficiency of security verification. The size of the firmware is generally tens of M or even hundreds of M, and there are multiple firmwares in the server. In this case, the efficiency improvement effect is even more obvious.

[0040] The details involved in this disclosure are further described below.

[0041] Figure 2 A schematic flowchart of a data verification method according to an embodiment of the present disclosure is shown. Figure 2 The method shown may be executed by a data verification device, for example, by a Trusted Platform Control Module (TPCM) for performing security verification on firmware data.

[0042] See also Figure 2 In step S210, at least part of the first data obtained from the storage device is divided into at least one data segment.

[0043] The first data refers to data in the storage device that requires tamper-proof verification. The at least partial data may refer to all of the first data or a portion of the first data. As an example, the storage device may be a non-volatile memory (such as Flash), and the first data may be firmware data stored in the non-volatile memory.

[0044] In step S220, calculations are performed on at least one data segment to obtain at least one calculation result.

[0045] Performing calculations on at least one data segment separately means using an algorithm to change the original information of the data segment to obtain a calculation result different from the data segment. Furthermore, it means using an algorithm to calculate (or map) a longer data segment into (or map) a shorter data segment.

[0046] The calculation performed on a data segment can be called an encryption calculation, the algorithm used can be called an encryption algorithm, and the calculation result obtained can be called an encryption result. It should be noted that the encryption mentioned in this disclosure emphasizes that the encryption result changes the original data in the data segment. Whether the encryption result supports decryption, that is, whether the encryption algorithm used can restore the encryption result to the data segment, is not required by this disclosure.

[0047] Based on the above description of the principles of the data verification method disclosed herein, it can be seen that a digest algorithm can be used to calculate a data segment to map a first number of bits of data segment to a second number of bits of data, where the second number is less than the first number. Taking the SHA256 hash algorithm as an example, the SHA256 hash algorithm allows a data segment of any length to be mapped to a calculation result of 256 bits in length. The calculation result has a short data length and good randomness.

[0048] In step S230, for at least one calculation result, data that meets the constraint relationship with the calculation result is searched from the acquired first data, and the position of the found data in the first data is determined.

[0049] The constraint relationship can be found in the above description and will not be repeated here. By searching the first data for data that meets the constraint relationship with the calculation result and determining the position of the found data in the first data, the calculation result can be mapped to the first data, that is, the calculation result can be stored in the first data.

[0050] Each data segment corresponds to a calculation result. For each calculation result, there may be zero, one, or more data in the first data that meet the constraint relationship with the calculation result. When searching for data that meet the constraint relationship with the calculation result from the acquired first data, if there is no data in the first data that meet the constraint relationship with the calculation result, the calculation result can be ignored, that is, the calculation result is not mapped to the first data, that is, there is no mapping position corresponding to the calculation result in the first data. If there are multiple data in the first data that meet the constraint relationship with the calculation result, one of the data can be selected, and the position of the selected data can be used as the mapping position of the calculation result in the first data, or multiple data can be selected, and the positions of the multiple selected data can all be used as the mapping positions of the calculation result in the first data. Therefore, one calculation result can correspond to zero, one, or more positions.

[0051] When the number of bits in the calculation result is small (e.g., less than or equal to 8 bits), there is a high probability of finding continuous data in the first data that meets the constraint relationship with the entire calculation result. The calculation result can be directly stored in the first data. In this case, the position of the calculation result in the first data is a series of continuous positions.

[0052] When the number of bits in the calculation result is large (e.g., greater than 8 bits, for example, when the SHA256 algorithm is used, each calculation result has 256 bits), the probability of directly finding continuous data in the first data that meets the constraint relationship with the entire calculation result is small, that is, there is no mapping location corresponding to the entire calculation result in the first data. In order to successfully save (i.e., map) the calculation result to the first data, the present disclosure proposes that the calculation result can be segmented and the data that meets the constraint relationship with each segment can be searched in the first data.

[0053] Specifically, the calculation result can be divided into at least one first data segment. For the at least one first data segment, a second data segment that meets the constraint relationship with the first data segment is searched from the acquired first data, and the position of the found second data segment in the first data is determined. In this case, the mapping position of a calculation result in the first data includes multiple data segment positions, and these multiple data segment positions can be multiple scattered positions. Each data segment position corresponds to a part of the calculation result (i.e., the first data segment). In this way, by dividing the calculation result, the calculation result can be indirectly saved in the first data.

[0054] The size (i.e., the number of bits) of the first data segment can be set arbitrarily. The fewer bits used to segment the calculation result, the greater the probability of finding the segmented data (i.e., the first data segment) in the first data, but the more locations that need to be recorded, the longer the index table used to record the locations. Generally speaking, for any binary data with a bit size of 8 bits or less, it can be assumed that there is a high probability or even a certainty that the same data as the binary data can be found in the data to be verified (such as firmware data). Therefore, the size of the first data segment can be less than or equal to 8 bits.

[0055] In step S240 , the corresponding relationship between the position and the calculation result is saved in association.

[0056] As described above, a calculation result can be divided into multiple first data segments, and the mapping position of a calculation result in the first data can include multiple data segment positions, each data segment position corresponding to a first data segment. Thus, for each calculation result, the correspondence between the data segment position and the first data segment can be associated and saved. The data segment position corresponding to the first data segment refers to the position of the second data segment in the first data that meets the constraint relationship with the first data segment. This position can represent the logical position of the data (such as the offset of the data in the first data), rather than the physical storage location of the data.

[0057] In summary, each calculation result may correspond to a series of continuous positions or to multiple scattered positions. In other words, each position may correspond to the entire calculation result or to a portion of the calculation result (ie, the first data segment).

[0058] This correspondence between positions and calculation results can be recorded in an index (table). For example, if the calculation result includes multiple first data segments, after determining the position of each first data segment in the first data, the correspondence between each first data segment and the position can be recorded in the index table generated for the calculation result.

[0059] After the correspondence between the position and the calculation result is stored, when the first data needs to be verified later, it is not necessary to retrieve the entire first data from the storage device. Instead, only the second data at the position within the first data needs to be retrieved from the storage device based on the stored correspondence between the position and the calculation result. Based on the correspondence, a determination is then made as to whether the obtained second data and the calculation result corresponding to the position conform to the constraint relationship. If any second data does not conform to the constraint relationship with the calculation result corresponding to the position, it can be determined that the first data has been tampered with.

[0060] Figure 3 A schematic flowchart of a data verification method according to another embodiment of the present disclosure is shown. Figure 3The method shown may be executed by a data verification device, for example, by a Trusted Platform Control Module (TPCM) for performing security verification on firmware data.

[0061] See also Figure 3 In step S310 , first data is obtained from a storage device.

[0062] In step S320 , at least one third data is generated.

[0063] In step S330, for at least one third data, data that meets the constraint relationship with the third data is searched from the acquired first data respectively, and the position of the found data in the first data is determined.

[0064] In step S340 , the corresponding relationship between the position and the third data is saved in association.

[0065] and Figure 2 The difference between the illustrated method and the embodiment is that, in this embodiment, one or more third data may be randomly generated using a random algorithm, for example, that is, the generation of the third data may not depend on the first data.

[0066] and Figure 2 The verification method shown is similar. When the first data needs to be verified later, it is not necessary to obtain all the first data from the storage device. Instead, it is only necessary to obtain the second data at the location (i.e., part of the first data) from the storage device based on the correspondence between the stored location and the third data. Then, based on the correspondence, it is determined whether the obtained second data and the third data corresponding to the location meet the constraint relationship. If there is second data that does not meet the constraint relationship between the third data corresponding to the location, it can be determined that the first data has been tampered with.

[0067] To ensure that data that meets the constraint relationship with the third data can be found in the first data, the third data can be divided into multiple third data segments, and fourth data segments that meet the constraint relationship with each third data segment can be found from the acquired first data, and the data segment position of the found fourth data segment in the first data can be determined. Therefore, similar to the second data described above, the mapping position of the third data in the first data can also include multiple data segment positions, and these multiple positions can be dispersed. The size of the third data segment can be set arbitrarily, for example, it can be less than or equal to 8 bits.

[0068] Application Examples

[0069] The following further describes the specific implementation process of the present disclosure in the firmware verification scenario.

[0070] A key function of the TPCM is to verify the security of various firmware in the system, preventing tampering that could potentially create security risks. System firmware includes, but is not limited to, BIOS firmware, BMC firmware, and OptionROM firmware. BIOS stands for Basic Input / Output System (BIO). BMC stands for Baseboard Management Controller (BMC). OptionROM stands for Option ROM.

[0071] Firmware verification is performed after reading the firmware via a bus like SPI. Each system startup requires reading various firmware information, which undoubtedly increases system startup time. This solution can significantly reduce firmware verification time while ensuring security, thereby improving system startup efficiency while ensuring the security of the entire system.

[0072] The trusted chip (TPCM) and non-volatile storage such as Flash are interconnected via an access bus. Each time the trusted chip verifies the firmware data area in non-volatile storage such as Flash, it fetches all the firmware data for verification. Firmware data typically ranges from tens to hundreds of megabytes, while the access bus for non-volatile storage such as Flash is typically a low-speed bus like SPI or IIC. Therefore, firmware security verification increases the overall system startup time. In cloud computing scenarios, this conflicts with the requirement for rapid instance delivery.

[0073] The industry uses TPCM to verify firmware. Each verification requires a complete read of all firmware data, which is time-consuming. If there are multiple firmwares in the server, the time consumption problem is particularly obvious in this case.

[0074] The firmware security verification system can include non-volatile memory (such as Flash) and a trusted chip. The non-volatile memory is used to store firmware (such as BIOS, BMC, and other software programs). The trusted chip is used to verify whether the firmware data has been tampered with.

[0075] When the trusted chip performs verification for the first time, it can read all the firmware data to be verified from the non-volatile memory by accessing the bus and Figure 2 The method shown obtains an index for characterizing the correspondence between a position and a calculation result.

[0076] Specifically, the trusted chip can read the firmware data from the non-volatile memory by accessing the bus, divide at least part of the read firmware data into at least one data segment, perform calculations on at least one data segment respectively, obtain at least one calculation result, and for at least one calculation result, search the read firmware data for data that meets the constraint relationship with the calculation result, determine the position of the found data in the firmware data, and associate and save the correspondence between the position and the calculation result.

[0077] The trusted chip no longer needs to read all the firmware data from the non-volatile memory when performing verification subsequently. Instead, it can read part of the firmware data according to the location recorded in the index to achieve verification.

[0078] Specifically, the trusted chip can read the firmware data at a location from the non-volatile memory by accessing the bus based on the location recorded in the index. The index is used to record the correspondence between the location and the calculation result. The calculation result is the result obtained by calculating the data segment. The data segment is obtained by dividing at least part of the firmware data stored in the non-volatile memory. Based on the correspondence, the trusted chip can also determine whether the read firmware data and the calculation result corresponding to the location meet the constraint relationship. If there is firmware data that does not meet the constraint relationship with the calculation result corresponding to the location, the trusted chip determines that the firmware data stored in the non-volatile memory has been tampered with.

[0079] Figure 4 A schematic structural diagram of a firmware verification system according to an embodiment of the present disclosure is shown.

[0080] Figure 5 It shows the mapping relationship between the encryption calculation result, index table entry and Firmware data area.

[0081] Figure 6 A schematic flowchart of the trustworthy verification process of the present disclosure is shown.

[0082] See also Figures 4 to 6 The firmware data area is included in non-volatile memory such as Flash. The trusted chip includes a firmware verification device, which includes a data reading module, an encryption calculation module, a lookup module, and an index table module. The two are connected via an access bus (usually an SPI, IIC, etc.).

[0083] The trusted chip can access the bus to read data in non-volatile storage such as Flash. When the trusted chip performs the firmware security check for the first time, it will read all the firmware data.

[0084] The read data is then divided into several data segments, namely, Segment 1, Segment 2, and Segment N shown in the figure. Encryption calculations are then performed on each of these segments. The encryption calculation module passes the calculation results to the search module. The search module locates the data in the result within the original data stored in the read module and records the offset of the found data within the original data. Finally, all offsets are aggregated in the index table module to generate index entries.

[0085] The encryption calculation can use a hash algorithm (SHA256, etc.), so the length of the calculation result is much smaller than the length of the Firmware data area. The index table records the index table of each data segment, such as Figure 1 Index table entry 1 records the index of data segment 1, index table N records the index of data segment N, and so on.

[0086] The encryption result of each data segment can be segmented. Thus, the encryption calculation result can contain several data (e.g., data 1, data 2, ..., data N). The index table entry contains several indexes (index 1, index 2, ..., index N), and the firmware data area contains several data (data 1, data 2, ..., data N). Each data (data 1, data 2, ..., data N) in the encryption calculation result is identical to each data (data 1, data 2, ..., data N) in the firmware data area. Thus, the trusted chip indirectly saves the encryption calculation result to non-volatile storage such as Flash without changing the original data in the non-volatile storage such as Flash. The index table entry records the offset of the encryption calculation result in the firmware data area. That is, the trusted chip can read data 2 in the firmware data area using index 2 in the index table entry (corresponding to offset 2 in the firmware data area). Data 2 in the firmware data area is identical to data 2 in the encryption calculation result.

[0087] Based on this, the trusted chip only reads all data and derives the index table entries during the first verification of the firmware data area. Subsequent verifications do not require reading all data; instead, it only needs to read the data at the index offset position recorded in the index table entry and compare the read data with the encryption calculation result obtained from the first verification to see if they are equal. This significantly reduces the amount of data read and, consequently, the time required for security verification. Because the encryption calculation results in this scheme are random, the indexes in the index table entries are also randomly distributed in the firmware data area. This randomness ensures that the scheme can confirm whether the firmware data has been tampered with.

[0088] In this solution, the number of data segments in the firmware data area can be 1, that is, the entire firmware data area can be encrypted and then an index table entry can be obtained. The number of data segments in the firmware data area can also be greater than 1.

[0089] In this solution, the offsets recorded in the index entries of the index table can be concentrated in a certain data segment or distributed across multiple data segments. For example, index 1 in index entry 1 can be located in data segment 2 of the firmware data area, and index 2 can be located in data segment 1 of the firmware data area. For another example, all indexes in index entry 2 can be located in data segment 2 of the firmware data area.

[0090] Assuming that the length of the Firmware data area is n bits, divided into m data segments, and the SHA256 encryption algorithm is used, then the amount of data read by the traditional security verification method is n bits, and the amount of data read by the security verification of this solution is m*256 bits.

[0091] The size is generally estimated to be in the tens of megabytes. Assuming the firmware size is 10 megabytes, or 80 megabits, the traditional security verification method reads 80 megabits of data. In this solution, assuming the firmware data area is divided into two segments, the security verification reads 2 * 256 bits = 512 bits of data, which is approximately 0.0006% of the traditional solution, significantly improving security verification efficiency. Firmware sizes are typically tens or even hundreds of megabytes, and servers often have multiple firmware files. In this case, the efficiency improvement is even more significant.

[0092] In summary, this solution indirectly saves the encryption calculation results to the Flash data area, reducing the reading of Flash data and shortening the time consumption of firmware security verification. Specifically, this solution establishes an index table during the first firmware security verification to record the mapping of encryption calculation results to Flash data, which is equivalent to saving the indirect encryption calculation results to the Flash data area; non-first firmware security verification only reads the data recorded in the index table, which greatly reduces the amount of data read; the encryption algorithm can use a hash algorithm, which has high randomness and short data length, ensuring the reliability of firmware verification security and the amount of data read.

[0093] The data verification method disclosed herein can also be implemented as a data verification device. The functional units of the data verification device can be implemented by hardware, software, or a combination of hardware and software that implements the principles of the present disclosure. It will be understood by those skilled in the art that the present disclosure is combined with Figure 7 、 Figure 8The functional units described can be combined or divided into sub-units to implement the principles of the above invention. Therefore, the description herein can support any possible combination, division, or further limitation of the functional units described herein.

[0094] The following is a brief description of the functional units that the data verification device may have and the operations that each functional unit may perform. For the details involved, please refer to the relevant description above and will not be repeated here.

[0095] Figure 7 A structural diagram of a data verification device according to an embodiment of the present disclosure is shown.

[0096] See also Figure 7 The data verification device 700 includes a division module 710, a calculation module 720, a search module 730 and a storage module 740.

[0097] The partitioning module 710 is configured to partition at least a portion of the first data retrieved from the storage device into at least one data segment. The calculation module 720 performs calculations on each of the at least one data segment to obtain at least one calculation result. The search module 730 searches the retrieved first data for data that satisfies a constraint relationship with the calculation result, and determines the location of the retrieved data within the first data. The storage module 740 stores the corresponding relationship between the location and the calculation result.

[0098] The data verification device 700 may further include an acquisition module and a determination module. The acquisition module is configured to acquire second data at a location from a storage device. The determination module is configured to determine, based on the correspondence relationship, whether the acquired second data and the calculation result corresponding to the location conform to a constraint relationship. If there is second data that does not conform to the constraint relationship with the calculation result corresponding to the location, the determination module may determine that the first data has been tampered with.

[0099] Figure 8 A structural schematic diagram of a data verification device according to another embodiment of the present disclosure is shown.

[0100] See also Figure 8 The data verification device 800 includes an acquisition module 810, a generation module 820, a search module 830 and a storage module 840.

[0101] The acquisition module 810 acquires first data from a storage device. The generation module 820 generates at least one third data item. The search module 830 searches for data items that meet a constraint relationship with the at least one third data item from the acquired first data item, and determines the location of the found data item within the first data item. The storage module 840 stores the corresponding relationship between the location and the third data item.

[0102] The data verification device 800 may further include an acquisition module and a judgment module. The acquisition module is configured to acquire second data at a location from a storage device. The judgment module is configured to determine, based on the correspondence relationship, whether the acquired second data and third data corresponding to the location conform to a constraint relationship. If there is second data that does not conform to the constraint relationship between the second data and the third data corresponding to the location, the judgment module may determine that the first data has been tampered with.

[0103] Figure 9 A schematic structural diagram of a computing device that can be used to implement the above-mentioned data verification method according to an embodiment of the present invention is shown.

[0104] See also Figure 9 , the computing device 900 includes a memory 910 and a processor 920 .

[0105] The processor 920 may be a multi-core processor or may include multiple processors. In some embodiments, the processor 920 may include a general-purpose main processor and one or more special coprocessors, such as a graphics processing unit (GPU) or a digital signal processor (DSP). In some embodiments, the processor 920 may be implemented using customized circuits, such as application-specific integrated circuits (ASICs) or field-programmable gate arrays (FPGAs).

[0106] The memory 910 may include various types of storage units, such as system memory, read-only memory (ROM), and permanent storage devices. ROM may store static data or instructions required by the processor 920 or other modules of the computer. The permanent storage device may be a readable and writable storage device. The permanent storage device may be a non-volatile storage device that does not lose stored instructions and data even when the computer is powered off. In some embodiments, the permanent storage device uses a large-capacity storage device (such as a magnetic or optical disk, flash memory) as the permanent storage device. In other embodiments, the permanent storage device may be a removable storage device (such as a floppy disk, optical drive). The system memory may be a readable and writable storage device or a volatile readable and writable storage device, such as dynamic random access memory. The system memory may store some or all instructions and data required by the processor during operation. In addition, the memory 910 may include any combination of computer-readable storage media, including various types of semiconductor memory chips (DRAM, SRAM, SDRAM, flash memory, programmable read-only memory), and magnetic disks and / or optical disks may also be used. In some embodiments, the memory 910 may include a readable and / or writable removable storage device, such as a compact disc (CD), a read-only digital versatile disc (e.g., DVD-ROM, dual-layer DVD-ROM), a read-only Blu-ray disc, an ultra-density optical disc, a flash memory card (e.g., SD card, mini SD card, Micro-SD card, etc.), a magnetic floppy disk, etc. Computer-readable storage media do not include carrier waves and transient electronic signals transmitted wirelessly or wired.

[0107] The memory 910 stores executable codes. When the executable codes are processed by the processor 920 , the processor 920 can execute the data verification method described above.

[0108] The data verification method, system, device, and apparatus according to the present invention have been described above in detail with reference to the accompanying drawings.

[0109] In addition, the method according to the present invention may also be implemented as a computer program or a computer program product, which includes computer program code instructions for executing the above steps defined in the above method of the present invention.

[0110] Alternatively, the present invention can also be implemented as a non-transitory machine-readable storage medium (or computer-readable storage medium, or machine-readable storage medium) on which executable code (or computer program, or computer instruction code) is stored. When the executable code (or computer program, or computer instruction code) is executed by a processor of an electronic device (or computing device, server, etc.), the processor executes the various steps of the above-mentioned method according to the present invention.

[0111] Those skilled in the art will further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both.

[0112] The flowcharts and block diagrams in the accompanying drawings show the possible implementation architecture, functions and operations of the systems and methods according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, program segment or part of code, and the part of the module, program segment or code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order than that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of the boxes in the block diagram and / or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0113] While various embodiments of the present invention have been described above, the foregoing description is intended to be illustrative, non-exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or improvements to existing technologies, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A data verification method, comprising: dividing at least a portion of the first data obtained from the storage device into at least one data segment; performing calculations on the at least one data segment respectively to obtain at least one calculation result; For the at least one calculation result, searching the acquired first data for data that meets the constraint relationship with the calculation result, and determining the position of the found data in the first data; associatively saving the corresponding relationship between the position and the calculation result; acquiring second data at the location from the storage device; Based on the corresponding relationship, determining whether the obtained second data and the calculation result corresponding to the position conform to the constraint relationship; If there is second data that does not comply with the constraint relationship between the calculation result corresponding to the position, it is determined that the first data has been tampered with.

2. The method according to claim 1, wherein The step of separately calculating the at least one data segment includes: separately calculating the at least one data segment using a digest algorithm to map the first number of bits of the data segment to a second number of bits of data, where the second number is smaller than the first number.

3. The method according to claim 1, wherein The data found and the calculation result are both binary data, the number of bits of the data found is the same as the number of bits of the calculation result, and the constraint relationship is: The data found is equal to the values ​​of the bits in the same order as the calculation result; or The data found is not equal to the values ​​of the bits in the same order as those in the calculation result; or The found data is equal to a portion of binary data in the calculation result, and the values ​​of bits in the same order in the other portion of binary data are not equal.

4. The method according to claim 1, wherein The storage device is a non-volatile storage device, and the first data is firmware data.

5. The method according to claim 1, wherein The step of calculating the at least one data segment separately includes: using a hash algorithm to calculate the at least one data segment separately, and / or The steps of searching, for the at least one calculation result, respectively, from the acquired first data for data that meets a constraint relationship with the calculation result, and determining a position of the found data in the first data include: dividing the calculation result into at least one first data segment; for the at least one first data segment, searching, for a second data segment that meets a constraint relationship with the first data segment, respectively, from the acquired first data, and determining a data segment position of the found second data segment in the first data; The step of associatively saving the correspondence between the position and the calculation result includes associatively saving the correspondence between the data segment position and the first data segment.

6. A data verification method, comprising: For a position recorded in an index, second data at the position is obtained from a storage device, the index being used to record a correspondence between the position and a calculation result, the calculation result being a calculation result obtained by calculating a data segment, the data segment being obtained by dividing at least part of the first data stored in the storage device; the position recorded in the index is determined by: for the calculation result, searching the obtained first data for data that meets a constraint relationship with the calculation result, determining a position of the found data in the first data, and using the position as the position in the index record; Based on the corresponding relationship, determining whether the obtained second data and the calculation result corresponding to the position conform to the constraint relationship; If there is second data that does not comply with the constraint relationship between the calculation result corresponding to the position, it is determined that the first data has been tampered with.

7. A data verification method, comprising: Retrieve first data from a storage device; generating at least one third data; For the at least one third data, searching the acquired first data for data that meets a constraint relationship with the third data, and determining a position of the found data in the first data; associatively saving a correspondence between the position and the third data; acquiring second data at the location from the storage device; Based on the corresponding relationship, determining whether the acquired second data and the third data corresponding to the position conform to the constraint relationship; If there is second data that does not comply with the constraint relationship between the third data corresponding to the position, it is determined that the first data has been tampered with.

8. A firmware security verification system, comprising: Non-volatile memory for storing firmware data; a trusted platform control module, configured to read the firmware data from the non-volatile memory via an access bus, divide at least a portion of the read firmware data into at least one data segment, perform calculations on each of the at least one data segment to obtain at least one calculation result, search the read firmware data for data that meets a constraint relationship with the calculation result, determine a position of the found data in the firmware data, and associate and store a correspondence between the position and the calculation result; The trusted platform control module is further configured to obtain second data at the location from a storage device; and based on the corresponding relationship, determine whether the obtained second data and the calculation result corresponding to the location comply with the constraint relationship; If there is second data that does not conform to the constraint relationship between the calculation results corresponding to the positions, it is determined that the firmware data stored in the non-volatile memory has been tampered with.

9. A firmware security verification system, comprising: Non-volatile memory and trusted platform control module, The trusted platform control module reads the firmware data at the position recorded in the index from the non-volatile memory by accessing the bus, wherein the index is used to record a correspondence between the position and a calculation result, the calculation result being a calculation result obtained by calculating a data segment, the data segment being obtained by dividing at least a portion of the firmware data stored in the non-volatile memory, and the position recorded in the index is determined by: searching for data that meets a constraint relationship with the calculation result from the obtained first data, determining a position of the found data in the first data, and using the position as the position in the index record; The trusted platform control module also determines, based on the correspondence, whether the read firmware data and the calculation result corresponding to the position conform to the constraint relationship; if there is firmware data that does not conform to the constraint relationship with the calculation result corresponding to the position, it is determined that the firmware data stored in the non-volatile memory has been tampered with.

10. A computing device comprising: processor; as well as A memory having executable codes stored thereon, which, when executed by the processor, causes the processor to perform the method according to any one of claims 1 to 7.

11. A computer program product comprising executable codes, which, when executed by a processor of an electronic device, causes the processor to perform the method according to any one of claims 1 to 7. 12 . A non-transitory machine-readable storage medium having executable codes stored thereon, which, when executed by a processor of an electronic device, causes the processor to perform the method according to claim 1 .

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