Image sensor and method of manufacturing the same

Abstract

The application provides an image sensor and a manufacturing method thereof, and is applied to the technical field of semiconductors.In a novel manufacturing method of the image sensor provided by the application, a piezoelectric device layer composed of a piezoelectric material layer and a piezoelectric material electrode is arranged in the peripheral semiconductor substrate of a photodiode region, stress is generated on the semiconductor substrate corresponding to the photodiode region of the image sensor by the piezoelectric device layer, the lattice constant of the semiconductor substrate is changed, and the energy range of the absorbed photons is affected, so that the color gamut space of the image sensor is effectively expanded, and the product performance of the CMOS image sensor is finally improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to an image sensor and a manufacturing method thereof. BACKGROUND

[0002] Image sensors are divided into front-illuminated type and back-illuminated type. The back-illuminated type, also known as back-illuminated, has the biggest optimization in that the light-sensitive unit is turned over, so that the incident light enters from the back of the sensor, avoiding the absorption and interference of the incident light by the circuit and transistor part when the light enters from the front in the traditional back-illuminated image sensor structure, affecting the photosensitive performance and imaging quality.

[0003] However, in the traditional CMOS image sensor, a PN junction is used to receive external light, generate electron-hole pairs, and be collected by an applied electric field to generate an electrical signal. The PN junction (photodiode) that receives external light is formed on a silicon substrate with material characteristics of indirect semiconductor material, and the mechanism of light absorption of indirect semiconductor is that the energy of photons is absorbed by the energy band gap and lattice vibration, and the energy band gap between the valence band and the conduction band is fixed. Therefore, the image sensor using indirect semiconductor material as the substrate material of the photodiode will have the problem of affecting the energy range of the photodiode to absorb photons due to the characteristics of the substrate material, thereby reducing the color gamut space of the sensor, and ultimately affecting the performance of the CMOS image sensor. SUMMARY

[0004] The purpose of the present application is to provide an image sensor and a manufacturing method thereof, so as to change the lattice constant of the substrate, thereby changing the energy range of the photodiode to absorb photons, expanding the color gamut space of the CMOS image sensor, and ultimately improving the performance of the product.

[0005] In a first aspect, to solve the above technical problems, the present application provides a manufacturing method of an image sensor, comprising at least the following steps:

[0006] Step S1, providing a semiconductor substrate, wherein a trench isolation structure and at least one photodiode region defined by the trench isolation structure are formed in the semiconductor substrate;

[0007] Step S2, forming a piezoelectric device layer on the surface of the photodiode region, so as to adjust the lattice constant of the semiconductor substrate corresponding to the photodiode region in the direction perpendicular to the semiconductor substrate by using the piezoelectric device layer.

[0008] Further, the semiconductor substrate can be a silicon substrate.

[0009] Further, the piezoelectric device layer can include a piezoelectric material layer and a piezoelectric material electrode layer disposed on both ends of a top surface of the piezoelectric material layer.

[0010] Further, before the step S2 of forming the piezoelectric device layer, the method can further include: forming a first dielectric layer on a surface of the photodiode region.

[0011] Further, the step of forming the piezoelectric device layer in the step S2 can include:

[0012] forming a piezoelectric material layer on a surface of the first dielectric layer, the piezoelectric material layer having openings on both sides of the first dielectric layer respectively with a bottom part of the first dielectric layer exposed;

[0013] forming a second dielectric layer on at least part of a surface of the piezoelectric material layer;

[0014] filling a piezoelectric material electrode layer in each of the openings, so that the piezoelectric material electrode layer at least fills the openings.

[0015] Further, after the piezoelectric material electrode layer fills the openings, the method can further include:

[0016] etching the semiconductor substrate to form a contact hole in the semiconductor substrate corresponding to a top surface of the piezoelectric material electrode layer;

[0017] depositing a conductive material in the contact hole to form a conductive contact plug electrically contacting an external voltage with the piezoelectric material electrode layer.

[0018] Further, the step of forming the trench isolation structure in the step S1 can include:

[0019] providing a semiconductor substrate, and forming a patterned hard mask layer on the semiconductor substrate;

[0020] etching the semiconductor substrate to form a trench for isolating a photodiode region, using the patterned hard mask layer as a mask;

[0021] filling an isolation dielectric layer in the trench to form the trench isolation structure.

[0022] Further, the step of adjusting a lattice constant of the semiconductor substrate corresponding to the photodiode region in the step S2 using the piezoelectric device layer in a direction perpendicular to the semiconductor substrate can include:

[0023] applying an external voltage to the piezoelectric material layer through the conductive contact plug and the piezoelectric material electrode layer, so that the piezoelectric material layer deforms and generates a stress on the semiconductor substrate corresponding to the photodiode region located thereunder.

[0024] Further, the material of the piezoelectric material layer can include CdS or ZnO, and the material of the piezoelectric material electrode layer can include Ga or Ge.

[0025] In a second aspect, based on the same inventive concept as the manufacturing method of the image sensor, the present application further provides an image sensor; specifically, the image sensor can include a plurality of pixel structures, wherein each pixel structure includes at least one photodiode region formed by the manufacturing method of the image sensor as described above.

[0026] Compared with the prior art, the technical scheme of the present application has at least one of the following beneficial effects:

[0027] In the novel manufacturing method of the image sensor provided by the present application, a piezoelectric device layer composed of a piezoelectric material layer and a piezoelectric material electrode layer is arranged in the peripheral semiconductor substrate of the photodiode region, and the piezoelectric device layer is used to generate stress on the semiconductor substrate corresponding to the photodiode region of the image sensor, so as to change the lattice constant thereof and affect the energy range of the absorbed photons, so as to effectively expand the color gamut space of the image sensor and ultimately improve the product performance of the CMOS image sensor. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 Flow chart of the manufacturing method of the image sensor in an embodiment of the present application;

[0029] Figures 2a-2d Structural schematic diagram of an image sensor in the manufacturing process;

[0030] Wherein, the reference signs are as follows:

[0031] 100 - semiconductor; 101 - trench isolation structure;

[0032] 110 - first dielectric layer; 120 - piezoelectric device layer;

[0033] 121 - piezoelectric material layer; 122 - piezoelectric material electrode layer;

[0034] 130 - second dielectric layer; 102 - opening;

[0035] 103 - contact hole; 140 - conductive contact plug;

[0036] PD - photodiode region. DETAILED DESCRIPTION

[0037] As described in the background art, in conventional CMOS image sensors, a PN junction (photodiode) is used to receive external light, generate electron-hole pairs, and collect them by an applied electric field to generate an electrical signal. The PN junction (photodiode) that receives external light is formed on a silicon substrate having a material characteristic of an indirect semiconductor material, and the mechanism of light absorption of the indirect semiconductor is that the energy of a photon is absorbed by a band gap and lattice vibration, and the band gap between the valence band and the conduction band bottom is fixed. Therefore, in the image sensor using the indirect semiconductor material as the substrate material of the photodiode, the energy range of the absorbed photons is affected by the characteristics of the substrate material, thereby reducing the color gamut space of the sensor, and ultimately affecting the performance of the CMOS image sensor.

[0038] To solve this problem, the inventors of the present application found that silicon is an indirect semiconductor material, and the mechanism of light absorption is that the energy of a photon is absorbed by a band gap and lattice vibration, and the band gap between the valence band and the conduction band bottom is fixed. For a conventional semiconductor material, the light absorption corresponds to a minimum energy (frequency) or a maximum wavelength, because in general, the light absorption corresponds to the transition of an electron from the top of the valence band to the bottom of the conduction band, thereby forming a conduction band electron, and the band gap is the forbidden band width of the semiconductor material. For a direct band gap semiconductor, as long as the incident light energy is greater than or equal to the forbidden band width, a valence band electron can be excited to the conduction band, and the efficiency is relatively high. For an indirect (gap) semiconductor, in addition to the condition that the photon energy is greater than or equal to the forbidden band width, an additional phonon (lattice vibration) is required to participate, so the efficiency is relatively low.

[0039] In addition, the forbidden band width is inversely proportional to the lattice constant, and when the atomic spacing is small, the valence bond is strong, that is, the atomic interaction is stronger, and the valence electron needs higher energy to transition to the conduction band, so the forbidden band width is larger. Therefore, the inventors of the present application propose whether the forbidden band width can be adjusted by adjusting the lattice constant, that is, adjusting the minimum absorbed photon energy, thereby affecting the energy range of the absorbed photons, to effectively expand the color gamut space of the CMOS image sensor, and ultimately improve the performance.

[0040] Based on this, the present application provides an image sensor and a manufacturing method thereof, to change the substrate lattice constant, thereby changing the energy range of the absorbed photons of the photodiode, to expand the color gamut space of the CMOS image sensor, and ultimately improve the performance of the product.

[0041] For example, as shown in FIG. 1, Figure 1 The manufacturing method of the image sensor provided by the present application at least includes the following steps:

[0042] Step S1, providing a semiconductor substrate, a trench isolation structure is formed in the semiconductor substrate, and at least one photodiode region is defined by the trench isolation structure;

[0043] Step S2, forming a piezoelectric device layer on the surface of the photodiode region, so as to adjust the lattice constant of the semiconductor substrate corresponding to the photodiode region in the direction perpendicular to the semiconductor substrate by using the piezoelectric device layer.

[0044] That is, in the novel manufacturing method of the image sensor provided by the present application, the piezoelectric device layer composed of the piezoelectric material layer and the piezoelectric material electrode is arranged in the peripheral semiconductor substrate of the photodiode region, and the stress is generated on the semiconductor substrate corresponding to the photodiode region of the image sensor by using the piezoelectric device layer, so as to change the lattice constant of the semiconductor substrate and affect the energy range of the absorbed photons, so as to achieve the purpose of effectively expanding the color gamut space of the image sensor and finally improving the product performance of the CMOS image sensor.

[0045] The image sensor and the manufacturing method thereof provided by the present application will be further described in detail below in combination with the drawings and specific embodiments. According to the following description, the advantages and features of the present application will be more apparent. It should be noted that the drawings are very simplified and non-precise in scale, and are only used to facilitate and clarify the purpose of assisting the description of the embodiments of the present application. In the following description, many specific details are set forth in order to provide a thorough understanding of the present application, but the present application can also be implemented in other ways different from those described herein, and therefore the present application is not limited to the specific embodiments disclosed below.

[0046] As shown in the present application and claims, unless the context clearly indicates otherwise, the words "one", "an", "a", and / or "the" do not specifically refer to the singular, but also include the plural. Generally speaking, the terms "comprise" and "include" only indicate the inclusion of the steps and elements explicitly identified, and these steps and elements do not constitute an exclusive list, and the method or device can also include other steps or elements. In the detailed description of the embodiments of the present application, the cross-sectional view of the device structure will be partially enlarged without general scale, and the schematic view is only an example, which should not limit the scope of protection of the present application. In addition, the three-dimensional spatial dimensions of length, width and depth should be included in actual production.

[0047] Figures 2a-2d The structural schematic diagram of an image sensor in the manufacturing process of an embodiment of the present application.

[0048] In step S1, with reference to Figure 2aAs shown, a semiconductor substrate 100 is provided, in which a trench isolation structure 101 and at least one photodiode region PD defined by the trench isolation structure 101 are formed.

[0049] In the embodiment, the image sensor stack structure can be a semiconductor structure which has completed part of the process in a back-illuminated image sensor process. The semiconductor substrate 100 can be a silicon substrate. Since the substrate material of the back-illuminated CMOS image sensor is a silicon substrate which is an indirect (interstitial) semiconductor, the band gap is inversely proportional to the lattice constant. When the atomic spacing is small, the valence bond is strong, that is, the stronger the atomic interaction, the higher the energy required for the valence electron to transition to the conduction band, so the band gap is larger, thereby affecting the energy range of the absorbed photons, reducing the color gamut space of the sensor, and reducing the performance. Therefore, the present inventors propose a method as follows to solve this problem. Details are described below.

[0050] It should be noted that although the present application does not show other layers or components formed on the back-illuminated CMOS image sensor in the provided drawings, the back-illuminated CMOS image sensor in the embodiment can also form other layers or components, such as gate structures, interlayer dielectric layers, lower metal wires, and vias, etc.

[0051] Further, in the embodiment, a specific implementation of forming a trench isolation structure in step S1 is provided, comprising:

[0052] Step S1.1, providing a semiconductor substrate 100, and forming a patterned hard mask layer (not shown) on the semiconductor substrate 100;

[0053] Step S1.2, etching the semiconductor substrate 100 to form a trench (not shown) for isolating the photodiode region PD, using the patterned hard mask layer as a mask;

[0054] Step S1.3, filling the trench with an isolation medium layer to form the trench isolation structure 101.

[0055] It can be understood that in the embodiment, since the present application forms a back-illuminated CMOS image sensor, the pixel structure (or device layer) composed of photodiodes is located above the metal circuit layer, therefore, the trench isolation structure 101 formed by the present application is also located in the semiconductor substrate 100, and the piezoelectric device layer 120 formed in the following step S2 and the conductive contact plug are both formed in the semiconductor substrate 100, that is, the photodiode region PD with a PN junction is formed in the same layer.

[0056] In step S2, referring to Figures 2b-2dAs shown, a piezoelectric device layer 110 is formed on the surface of the photodiode region PD, so that the lattice constant of the semiconductor substrate 100 corresponding to the photodiode region PD can be adjusted by the piezoelectric device layer 120 in a direction perpendicular to the semiconductor substrate 100.

[0057] In this embodiment, the piezoelectric device layer 120 includes a piezoelectric material layer 121 and piezoelectric material electrode layers 122 disposed at both ends of the top surface of the piezoelectric material layer 121. The material 121 of the piezoelectric material layer includes CdS or ZnO, and the material of the piezoelectric material electrode layer 122 includes Ga or Ge.

[0058] Furthermore, please refer to the specific details. Figure 2b As shown, before forming the piezoelectric device layer 120 in step S2, the method further includes forming a first dielectric layer 110 on the surface of the photodiode region PD. The material of the first dielectric layer 110 can be an insulating material such as silicon dioxide or silicon nitride.

[0059] Specifically, the present invention provides a specific step for forming the piezoelectric device layer 120 in step S2, as follows:

[0060] Step S2.1, please refer to the following for details. Figure 2b As shown, a piezoelectric material layer 121 is formed on the surface of the first dielectric layer 110, with an opening 102 on each side that exposes a portion of the bottom of the first dielectric layer 110.

[0061] Step S2.2, continue to refer to Figure 2b As shown, a second dielectric layer 130 is formed on at least a portion of the surface of the piezoelectric material layer 121;

[0062] Step S2.3, please refer to the following for details. Figure 2c As shown, each of the openings 102 is filled with a piezoelectric material electrode layer 122 such that the piezoelectric material electrode layer 122 at least fills the opening 102.

[0063] In the present embodiment, a semiconductor substrate of silicon substrate is provided first, then a photodiode (PN junction) is formed in the middle portion of the semiconductor substrate by ion implantation process and is isolated by a trench isolation structure, then a first dielectric layer of certain thickness, such as silicon dioxide, is formed on the surface of the photodiode for isolating the photodiode and piezoelectric device layer, then a piezoelectric material layer is formed on the middle portion of the surface of the first dielectric layer and the surface of the both ends of the first dielectric layer is exposed for forming subsequent openings, then a second dielectric layer of certain thickness, such as silicon dioxide, is formed on the middle portion of the surface of the piezoelectric material layer and the piezoelectric material layer under the both ends of the second dielectric layer is exposed to form the openings 102 with stepped surface on the inner side as shown in Figure 2b After that, the piezoelectric device layer 120 process piezoelectric device is formed by filling the piezoelectric material electrode layer in the openings 102.

[0064] After that, referring to Figure 2c and Figure 2d , the semiconductor substrate 100 is etched again to form a contact hole 103 in the semiconductor substrate 100 corresponding to the top surface of the piezoelectric material electrode layer 122; and a conductive material is deposited in the contact hole 103 to form a conductive contact plug 140 electrically connected with the piezoelectric material electrode layer 122.

[0065] In the present embodiment, after the conductive contact plug 140 is formed, an external voltage can be applied on the piezoelectric material layer 121 through the conductive contact plug 140 and the piezoelectric material electrode layer 122 to deform the piezoelectric material layer 121 and generate stress on the semiconductor substrate 100 corresponding to the photodiode region PD under the piezoelectric material layer 121 to adjust the lattice constant of the semiconductor substrate material corresponding to the photodiode region PD in the direction perpendicular to the semiconductor substrate 100, thereby adjusting the energy range of the absorbed photons.

[0066] In addition, based on the same inventive concept as the above-mentioned method for manufacturing image sensor, the present application also provides an image sensor (not shown); specifically, the image sensor comprises a plurality of pixel structures (not shown), and each pixel structure comprises at least one photodiode region PD (not shown) formed by the above-mentioned method for manufacturing image sensor, and the specific forming method is referred to the above embodiment, which will not be repeated here.

[0067] In summary, in the novel manufacturing method of the image sensor provided by the application, a piezoelectric device layer composed of a piezoelectric material layer and a piezoelectric material electrode is arranged in the peripheral semiconductor substrate of the photodiode region, and the piezoelectric device layer is used to generate stress on the semiconductor substrate corresponding to the photodiode region of the image sensor, so as to change the lattice constant thereof and affect the energy range of the absorbed photons, so as to effectively expand the color gamut space of the image sensor, and finally improve the product performance of the CMOS image sensor.

[0068] The above description is only a description of the preferred embodiments of the application, and does not limit the protection scope of the application. Any modification or change made by a person skilled in the art according to the above disclosure is within the protection scope of the application.

[0069] In addition, it should also be understood that although the terms "first", "second", etc. can be used herein to describe different elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, the first element, component, region, layer or part discussed below can also be referred to as the second element, component, region, layer or part without departing from the teachings of the exemplary embodiments according to the application.

[0070] For ease of description, spatial relative terms such as "under", "above", "below", "on", "upper", "lower", etc. can be used herein to describe the spatial positional relationship of one element or feature with respect to other elements or features as shown in the drawings. It should be understood that the spatial relative terms are intended to include different orientations in use or operation in addition to the orientation of the device as depicted in the drawings. For example, if the device in the drawings is inverted, the element described as "below" or "under" other elements or features will be positioned "above" or "on" other elements or features. Thus, the exemplary term "below" can include both "above" and "below" orientations. The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein are interpreted accordingly.

[0071] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments consistent with the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0072] The above merely provides the preferred embodiment of the present application, and does not have any limiting effect on the present application. Any equivalent replacement or modification of the technical scheme and technical content disclosed by the present application, which is made by any person skilled in the art without departing from the scope of the technical scheme of the present application, still belongs to the protection scope of the present application.

Claims

1. A method of manufacturing an image sensor, characterized by, At least comprising the following steps: Step S1, providing a semiconductor substrate, a trench isolation structure is formed in the semiconductor substrate, and at least one photodiode region is defined by the trench isolation structure; Step S2, forming a piezoelectric device layer on the surface of the photodiode region, so as to adjust the lattice constant of the semiconductor substrate corresponding to the photodiode region in the direction perpendicular to the semiconductor substrate by using the piezoelectric device layer; The piezoelectric device layer comprises a piezoelectric material layer and a piezoelectric material electrode layer arranged on both ends of the top surface of the piezoelectric material layer; Before forming the piezoelectric device layer in step S2, the method further comprises: forming a first dielectric layer on the surface of the photodiode region; The step of forming the piezoelectric device layer in step S2 comprises: forming a piezoelectric material layer on the surface of the first dielectric layer, the piezoelectric material layer having openings on both sides of the bottom exposed part of the first dielectric layer; forming a second dielectric layer on at least part of the surface of the piezoelectric material layer; filling the piezoelectric material electrode layer in each of the openings, so that the piezoelectric material electrode layer at least fills the openings; The material of the piezoelectric material layer comprises CdS or ZnO, and the material of the piezoelectric material electrode layer comprises Ga or Ge.

2. The method of manufacturing an image sensor according to claim 1, wherein The semiconductor substrate is a silicon substrate.

3. The method of manufacturing an image sensor according to claim 1, wherein After filling the piezoelectric material electrode layer in the openings, the method further comprises: etching the semiconductor substrate to form a contact hole in the semiconductor substrate corresponding to the top surface of the piezoelectric material electrode layer; depositing a conductive material in the contact hole to form a conductive contact plug electrically connected to the piezoelectric material electrode layer.

4. The method of manufacturing an image sensor according to claim 1, wherein The step of forming the trench isolation structure in step S1 comprises: providing a semiconductor substrate, and forming a patterned hard mask layer on the semiconductor substrate; etching the semiconductor substrate to form a trench for isolating the photodiode region by using the patterned hard mask layer as a mask; filling the trench with an isolation dielectric layer to form the trench isolation structure.

5. The method for manufacturing an image sensor according to claim 3, wherein The step of adjusting the lattice constant of the semiconductor substrate corresponding to the photodiode region in the direction perpendicular to the semiconductor substrate by using the piezoelectric device layer in step S2 comprises: applying an external voltage to the piezoelectric material layer through the conductive contact plug and the piezoelectric material electrode layer, so that the piezoelectric material layer is deformed and stress is generated on the semiconductor substrate corresponding to the photodiode region located below the piezoelectric material layer.

6. An image sensor, comprising: The image sensor comprises a plurality of pixel structures, wherein each of the pixel structures comprises at least one photodiode region formed by using the manufacturing method of the image sensor according to any one of claims 1 to 5.

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