A calibration circuit for audio DAC

Abstract

The present application provides a calibration circuit for an audio DAC. The calibration circuit for an audio DAC includes: a DAC module; an ADC module; a control switch connected between the input of the ADC module and the output of the DAC module; and a processor electrically connected to the output of the ADC module. When the control switch is in a first state, the input of the ADC module is short-circuited, and the processor is used to obtain a first output voltage of the ADC module. When the control switch is in a second state, the output of the DAC module is electrically connected to the input of the ADC module, and the processor is used to obtain a second output voltage of the ADC module. The processor is also used to determine a calibration value of the DAC module based on the first output voltage and the second output voltage. This calibration circuit is used to automatically and accurately calibrate the DC bias voltage of the audio DAC.

Description

Technical Field

[0001] The present application relates to the field of analog circuit technology, and in particular to a calibration circuit for an audio DAC. Background Art

[0002] Due to manufacturing processes or the inherent structure of analog circuits, audio DACs (Digital to Analog Converters) (DACs used in audio equipment) always have an offset voltage. For example, when the DAC plays a silent signal (the DAC input is zero signal), the DAC hardware output is not 0uV, but usually between tens of uV and a few millivolts. The DAC hardware output at this time is called an offset voltage or DC offset voltage. Due to the existence of this offset voltage, when turning the DAC hardware on and off or switching music, a noticeable signal jump will be generated, resulting in noise (commonly known as popping).

[0003] Therefore, DAC calibration is required to offset the effect of the DC bias voltage on the DAC output, or to keep it within a smaller range close to zero to prevent the human ear from hearing noise caused by the DC bias voltage jump.

[0004] In the prior art, calibration is achieved by manually adding a DC offset voltage compensation value to the DAC input, then measuring the DAC output with an instrument to bring the DAC output close to 0. This method cannot achieve automatic and accurate calibration of the DAC's DC offset voltage. Summary of the Invention

[0005] An object of the embodiments of the present application is to provide a calibration circuit for an audio DAC, so as to achieve automatic and accurate calibration of the DC bias voltage of the audio DAC.

[0006] An embodiment of the present application provides a calibration circuit for an audio DAC, comprising: a DAC module; an ADC module; a control switch connected between an input end of the ADC module and an output end of the DAC module; and a processor electrically connected to the output end of the ADC module. When the control switch is in a first state, the input end of the ADC module is short-circuited, and the processor is configured to obtain a first output voltage of the ADC module. When the control switch is in a second state, the output end of the DAC module is electrically connected to the input end of the ADC module, and the processor is configured to obtain a second output voltage of the ADC module. The processor is further configured to determine a calibration value of the DAC module based on the first output voltage and the second output voltage.

[0007] In an embodiment of the present application, an ADC module is used to calibrate a DAC module. When a control switch is in a first state, the input terminal of the ADC module is short-circuited, and the first output voltage measured at this time is the DC bias voltage corresponding to the ADC module. When the control switch is in a second state, the ADC module is electrically connected to the DAC module, and the second output voltage measured at this time is the DC bias voltage generated by the combined action of the DAC module and the ADC module. Furthermore, the first output voltage and the second output voltage can be used to accurately determine the calibration value of the DAC module. Furthermore, the processor and the control switch are used to control the calibration circuit accordingly, achieving automatic determination of the calibration value of the DAC module. Therefore, this circuit can automatically and accurately calibrate the DC bias voltage of an audio DAC.

[0008] As a possible implementation, the control switch includes: a first switch, a second switch, a third switch, a fourth switch, and a fifth switch; wherein one end of the first switch is electrically connected to the first input end of the ADC module, and the second end of the first switch is electrically connected to the second input end of the ADC module; the second switch is connected between the first output end of the DAC module and the second input end of the ADC module; the third switch is connected between the second output end of the DAC module and the first input end of the ADC module; the fourth switch is connected between the second output end of the DAC module and the second input end of the ADC module; and the fifth switch is connected between the first output end of the DAC module and the first input end of the ADC module.

[0009] In an embodiment of the present application, the control switch includes a first switch, a second switch, a third switch, a fourth switch, and a fifth switch. By controlling the on-off states of the switches, the input end of the ADC module can be short-circuited, and the connection between the ADC module and the DAC module can be achieved, thereby achieving automatic detection of the first output voltage and the second output voltage.

[0010] As a possible implementation manner, when the control switch is in the first state, the first switch is closed, and the second switch, the third switch, the fourth switch, and the fifth switch are all opened.

[0011] In the embodiment of the present application, when the first switch is closed and the second switch, the third switch, the fourth switch and the fifth switch are all opened, the input end of the ADC module can be short-circuited.

[0012] As a possible implementation manner, when the control switch is in the first state, the third switch and the fourth switch are closed, and the first switch, the second switch, and the fifth switch are all opened.

[0013] In the embodiment of the present application, when the third switch and the fourth switch are closed and the first switch, the second switch and the fifth switch are all opened, the input end of the ADC module can be short-circuited.

[0014] As a possible implementation manner, when the control switch is in the first state, the second switch and the fifth switch are closed, and the first switch, the third switch, and the fourth switch are opened.

[0015] In the embodiment of the present application, when the second switch and the fifth switch are closed and the first switch, the third switch and the fourth switch are all opened, the input end of the ADC module can be short-circuited.

[0016] As a possible implementation manner, when the control switch is in the second state, the second switch and the third switch are closed, and the first switch, the fourth switch, and the fifth switch are opened.

[0017] In the embodiment of the present application, when the second switch and the third switch are closed and the first switch, the fourth switch and the fifth switch are opened, the connection between the output end of the DAC module and the input end of the ADC module can be achieved.

[0018] As a possible implementation manner, when the control switch is in the second state, the fourth switch and the fifth switch are closed, and the first switch, the second switch, and the third switch are opened.

[0019] In the embodiment of the present application, when the fourth switch and the fifth switch are closed and the first switch, the second switch and the third switch are opened, the connection between the output end of the DAC module and the input end of the ADC module can be achieved.

[0020] As a possible implementation manner, when the control switch is in the second state, the operating point voltage of the DAC module is equal to the operating point voltage of the ADC module.

[0021] In the embodiment of the present application, when the DAC module and the ADC module are electrically connected, line impedance exists in the entire path, which may affect the final calibration result. Therefore, by ensuring that the operating point voltage of the DAC module is equal to the operating point voltage of the ADC module, the influence of this part of the line impedance can be eliminated, thereby improving the calibration accuracy of the DAC module.

[0022] As a possible implementation method, the operating point voltage of the DAC module is the reference voltage of the DAC module, the ADC module includes a voltage divider resistor, the reference voltage of the ADC module is the voltage after being divided by the voltage divider resistor, and the operating point voltage of the ADC module is 1 / 2 of the reference voltage.

[0023] In an embodiment of the present application, the operating point voltage of the DAC module may be the same as its reference voltage, and the operating point voltage of the ADC module is 1 / 2 of the reference voltage.

[0024] As a possible implementation manner, the processor or the ADC module is further used to: adjust the reference voltage of the ADC module by adjusting the resistance value of the voltage divider resistor so that the operating point voltage of the DAC module is equal to the operating point voltage of the ADC module.

[0025] In the embodiment of the present application, by adjusting the resistance of the voltage divider resistor, the reference voltage of the ADC module can be adjusted, thereby adjusting the operating point voltage so that the operating point voltage of the DAC module is equal to the operating point voltage of the ADC module.

[0026] As a possible implementation manner, the first output voltage and the second output voltage are both voltages that have been filtered and down-sampled.

[0027] In the embodiment of the present application, the accuracy of the final calibration result is improved by filtering and down-sampling the first output voltage and the second output voltage.

[0028] As a possible implementation manner, the processor is further configured to determine a gain of the calibration circuit, and determine a calibration value of the DAC module according to the first output voltage, the second output voltage, and the gain.

[0029] In the embodiment of the present application, there may be a gain in the entire calibration circuit, and the gain, the first output voltage, and the second output voltage are combined to improve the accuracy of the calibration value finally determined. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0031] Figure 1 A first structural diagram of a calibration circuit for an audio DAC provided in an embodiment of the present application;

[0032] Figure 2 This is a second structural schematic diagram of the calibration circuit of the audio DAC provided in an embodiment of the present application.

[0033] Icons: 10-audio DAC calibration circuit; 11-DAC module; 12-ADC module; 13-control switch; 14-processor. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0035] The technical solution provided in the embodiments of the present application can be applied to calibrate an audio DAC in an audio device, such as a wireless headset, a speaker, or a mobile phone.

[0036] In some embodiments, through the technical solution provided in the embodiments of the present application, a precise calibration value (also called a compensation value) of the DAC's DC bias voltage is determined. During the application of the audio DAC module, by setting this calibration value, the effect of the DC bias voltage on the output voltage of the audio DAC module can be offset, or it can be kept within a smaller range close to zero to prevent the human ear from hearing noise caused by the DC bias voltage.

[0037] In some embodiments, the calibration value determination process can be performed synchronously with the calibration of the audio DAC module, that is, the calibration of the audio DAC module is completed during the determination process. In other embodiments, the calibration value is predetermined and then applied during the application process of the audio DAC module. In such embodiments, the predetermined calibration value needs to be continuously updated, that is, the calibration value is not fixed.

[0038] Combined with the introduction of the above application scenarios, please refer to Figure 1 , is a structural diagram of the calibration circuit 10 of the audio DAC provided in an embodiment of the present application. Figure 1 As shown, the calibration circuit includes: a DAC module 11, an ADC module 12 (Analog to Digital Converter), a control switch 13 and a processor 14. The control switch 13 is connected between the input end of the ADC module 12 and the output end of the DAC module 11, and the processor 14 is electrically connected to the output end of the ADC module 12.

[0039] In this calibration circuit, when the control switch 13 is in the first state, the input end of the ADC module 12 is short-circuited, and the processor 14 is used to obtain the first output voltage of the ADC module 12; when the control switch 13 is in the second state, the output end of the DAC module 11 is electrically connected to the input end of the ADC module 12, and the processor 14 is used to obtain the second output voltage of the ADC module 12; the processor 14 is also used to determine the calibration value of the DAC module 11 based on the first output voltage and the second output voltage.

[0040] In the embodiment of the present application, the ADC module 12 is used to calibrate the DAC module 11. When the control switch 13 is in the first state, the input terminal of the ADC module 12 is short-circuited, and the first output voltage measured at this time is the DC bias voltage corresponding to the ADC module 12. When the control switch 13 is in the second state, the ADC module 12 is electrically connected to the DAC module 11, and the second output voltage measured at this time is the DC bias voltage generated by the DAC module 11 and the ADC module 12. Furthermore, the first output voltage and the second output voltage can be used to accurately determine the calibration value of the DAC module 11. In addition, the processor 14 and the control switch 13 can realize corresponding control of the calibration circuit to automatically determine the calibration value of the DAC module 11. Therefore, this circuit can automatically and accurately calibrate the DC bias voltage of the audio DAC.

[0041] In some embodiments, the state of the control switch 13 is controlled by the processor 14. For example, the processor 14 generates a control instruction for the control switch 13 and sends it to the control switch 13, and the control switch 13 executes the control instruction.

[0042] In this embodiment, the processor 14 may first adjust the control switch 13 to the first state, and after obtaining the first output voltage, adjust the control switch 13 to the second state and obtain the second output voltage. Of course, the control switch 13 may also be first adjusted to the second state, and after obtaining the second output voltage, adjust the control switch 13 to the first state and obtain the first output voltage.

[0043] Please refer to Figure 2 As an optional implementation, the control switch 13 includes: a first switch S1, a second switch S2, a third switch S3, a fourth switch S4 and a fifth switch S5.

[0044] Among them, one end of the first switch S1 is electrically connected to the first input end of the ADC module 12, and the second end of the first switch S1 is electrically connected to the second input end of the ADC module 12; the second switch S2 is connected between the first output end of the DAC module 11 and the second input end of the ADC module 12; the third switch S3 is connected between the second output end of the DAC module 11 and the first input end of the ADC module 12; the fourth switch S4 is connected between the second output end of the DAC module 11 and the second input end of the ADC module 12; and the fifth switch S5 is connected between the first output end of the DAC module 11 and the first input end of the ADC module 12.

[0045] like Figure 1 and Figure 2As shown, the DAC module 11 includes an input terminal and two output terminals, and the ADC module 12 includes two input terminals and an output terminal. The two input terminals of the ADC module 12 include a P input terminal and an N input terminal. Correspondingly, the two output terminals of the DAC module 11 include a P output terminal and an N output terminal. In addition, the DAC module 11 and the ADC module 12 also each include a reference voltage terminal for inputting a reference voltage.

[0046] In the embodiment of the present application, the control switch 13 includes a first switch S1, a second switch S2, a third switch S3, a fourth switch S4 and a fifth switch S5. By controlling the on-off states of the switches, the input end of the ADC module 12 can be short-circuited, and the connection between the ADC module 12 and the DAC module 11 can be achieved, thereby achieving automatic detection of the first output voltage and the second output voltage.

[0047] In some embodiments, when the control switch 13 is in the first state, the first switch S1 is closed, and the second switch S2 , the third switch S3 , the fourth switch S4 , and the fifth switch S5 are all open.

[0048] It can be understood that after the first switch S1 is closed, the two input terminals of the ADC module 12 are connected, that is, the input terminals of the ADC module 12 are short-circuited.

[0049] In the embodiment of the present application, when the first switch S1 is closed and the second switch S2 , the third switch S3 , the fourth switch S4 and the fifth switch S5 are all opened, the input end of the ADC module 12 can be short-circuited.

[0050] In some embodiments, when the control switch 13 is in the first state, the third switch S3 and the fourth switch S4 are closed, and the first switch S1 , the second switch S2 , and the fifth switch S5 are all open.

[0051] It can be understood that when the third switch S3 and the fourth switch S4 are closed, the two input terminals of the ADC module 12 are also short-circuited. Although they are still connected to the DAC module 11 after the short-circuit, the short-circuit state of the two input terminals is not affected.

[0052] In the embodiment of the present application, when the third switch S3 and the fourth switch S4 are closed, and the first switch S1 , the second switch S2 , and the fifth switch S5 are all opened, the input end of the ADC module 12 can be short-circuited.

[0053] In some embodiments, when the control switch 13 is in the first state, the second switch S2 and the fifth switch S5 are closed, and the first switch S1 , the third switch S3 , and the fourth switch S4 are open.

[0054] It can be understood that when the second switch S2 and the fifth switch S5 are closed, the two input terminals of the ADC module 12 are also short-circuited. Although they are still connected to the DAC module 11 after being short-circuited, the short-circuited state of the two input terminals is not affected.

[0055] In the embodiment of the present application, when the second switch S2 and the fifth switch S5 are closed, and the first switch S1 , the third switch S3 , and the fourth switch S4 are all opened, the input end of the ADC module 12 can be short-circuited.

[0056] In some embodiments, when the control switch 13 is in the second state, the second switch S2 and the third switch S3 are closed, and the first switch S1 , the fourth switch S4 , and the fifth switch S5 are open.

[0057] It can be understood that when the second switch S2 and the third switch S3 are closed, the first output end of the DAC module 11 is connected to the second input end of the ADC module 12, and the second output end of the DAC module 11 is connected to the first input end of the ADC module 12, thereby realizing the electrical connection between the DAC module 11 and the ADC module 12.

[0058] That is, the P output terminal of the DAC module 11 is connected to the P input terminal of the ADC module 12 , and the N output terminal of the DAC module 11 is connected to the N input terminal of the ADC module 12 .

[0059] In the embodiment of the present application, when the second switch S2 and the third switch S3 are closed and the first switch S1, the fourth switch S4 and the fifth switch S5 are open, the output end of the DAC module 11 and the input end of the ADC module 12 can be connected.

[0060] In some embodiments, when the control switch 13 is in the second state, the fourth switch S4 and the fifth switch S5 are closed, and the first switch S1 , the second switch S2 , and the third switch S3 are open.

[0061] It can be understood that when the fourth switch S4 and the fifth switch S5 are closed, the second output end of the DAC module 11 is connected to the first input end of the ADC module 12, and the first output end of the DAC module 11 is connected to the second input end of the ADC module 12, thereby realizing the electrical connection between the DAC module 11 and the ADC module 12.

[0062] That is, the P output terminal of the DAC module 11 is connected to the N input terminal of the ADC module 12, and the N output terminal of the DAC module 11 is connected to the P input terminal of the ADC module 12. However, in this case, the polarity of the DC bias voltage of the DAC is opposite to that of the DC bias voltage in the previous embodiment.

[0063] In the embodiment of the present application, when the fourth switch S4 and the fifth switch S5 are closed and the first switch S1 , the second switch S2 and the third switch S3 are open, the output end of the DAC module 11 and the input end of the ADC module 12 can be connected.

[0064] In some embodiments, when the control switch 13 is in the second state, it is assumed that the reference voltage of the ADC module 12 is unequal to the reference voltage of the DAC module 11. At this point, the operating point voltages of the DAC module 11 and the ADC module 12 are also inconsistent, so current flows through the parasitic resistors R1 and R2 (understood as the parasitic resistance of the circuit), causing a voltage drop across R1 and R2. If R1 and R2 are unequal, the circuit is asymmetric, and the parasitic resistors R1 and R2 produce different voltage drops, introducing a new bias voltage and affecting the second output voltage.

[0065] On the one hand, the bias voltage cannot be measured independently, and on the other hand, the bias voltage generated during calibration of the DAC module 11 is often different from that generated during actual use of the DAC module 11. Therefore, if the reference voltage of the ADC module 12 is not equal to the reference voltage of the DAC module 11, the accuracy of the calibration value will be affected.

[0066] Assuming that the reference voltage of the ADC module 12 is equal to the reference voltage of the DAC module 11, the operating point voltages of the DAC module 11 and the ADC module 12 are the same. Even if R1 and R2 are not equal, no current flows through the parasitic resistors R1 and R2, and the influence of the resistance difference is avoided. Therefore, the above-mentioned bias voltage will not be generated, or the bias voltage is zero.

[0067] Therefore, in order to improve the accuracy of the calibration value, the operating point voltage of the DAC module 11 and the operating point voltage of the ADC module 12 are equal.

[0068] In the embodiment of the present application, when the DAC module 11 and the ADC module 12 are electrically connected, line impedance exists in the entire path, which may affect the final calibration result. Therefore, by ensuring that the operating point voltage of the DAC module 11 is equal to the operating point voltage of the ADC module 12, the influence of this part of the line impedance can be eliminated, thereby improving the calibration accuracy of the DAC module 11.

[0069] In the embodiments of the present application, the operating point voltage refers to the static operating point voltage of the analog circuit. The operating point voltage of the ADC module 12 refers to the output voltage of the ADC module 12 when the input is zero. The operating point voltage of the DAC module 11 refers to the output voltage of the DAC module 11 when the input is zero. The operating point voltage of the DAC module 11 refers to the operating point voltage of the PA (power amplifier) ​​behind the DAC, that is, the DAC module 11 also includes the PA behind the DAC, and the operating point voltage of the power amplifier is obtained by a low-noise constant voltage.

[0070] In some embodiments, the operating point voltage of the DAC module 11 is the reference voltage of the DAC module 11, the ADC module 12 includes a voltage divider resistor, the reference voltage of the ADC module 12 is the voltage divided by the voltage divider resistor, and the operating point voltage of the ADC module 12 is 1 / 2 of the reference voltage of the ADC module 12.

[0071] In this embodiment, a constant voltage is divided by a voltage-dividing resistor to obtain a reference voltage of the ADC module 12, and its operating point voltage is a fixed ratio of the reference voltage. Therefore, the operating point voltage can be adjusted by adjusting the reference voltage to ensure that the operating point voltage after voltage division is the same as the operating point voltage of the DAC module 11.

[0072] Furthermore, in some embodiments, the processor 14 or the ADC module 12 is further configured to adjust the reference voltage of the ADC module 12 by adjusting the resistance of the voltage divider resistor so that the operating point voltage of the DAC module 11 is equal to the operating point voltage of the ADC module 12 .

[0073] In this embodiment, when the reference voltage of the DAC module 11 is known, the operating point voltage that the ADC module 12 needs to set is also known. Therefore, the ADC module 12 is correspondingly fixed to the operating point voltage that needs to be set. Then, taking the known operating point voltage as a prerequisite, the resistance value of the voltage divider resistor is adjusted, and the reference voltage of the ADC module 12 is adjusted to achieve the adjustment of the operating point voltage, so that the operating point voltage of the ADC module 12 can be consistent with the operating point voltage of the DAC module 11.

[0074] In addition, in this embodiment, the control of the operating point voltage of the ADC module 12 can be implemented by the ADC module 12 itself or by the processor 14, which is not limited here.

[0075] In the embodiment of the present application, by adjusting the resistance of the voltage divider resistor, the reference voltage of the ADC module 12 can be adjusted to adjust the operating point voltage so that the operating point voltage of the DAC module 11 is equal to the operating point voltage of the ADC module 12.

[0076] To improve the accuracy of data processing by the processor 14, in some embodiments, the processor 14 is further configured to filter and downsample the first and second output voltages. Consequently, the first and second output voltages are both filtered and downsampled. Accordingly, the voltages ultimately used to determine the calibration value are also filtered and downsampled first and second output voltages.

[0077] In the embodiment of the present application, the accuracy of the final calibration result is improved by filtering and down-sampling the first output voltage and the second output voltage.

[0078] For the processor 14 , a calibration value of the DAC module 11 is determined based on the first output voltage and the second output voltage.

[0079] In some embodiments, the calibration value of the DAC module 11 can be the difference between the first output voltage and the second output voltage, i.e., U1 (first output voltage) - U2 (second output voltage). By adding a calibration value equal to the difference between the first output voltage and the second output voltage to the input of the DAC module 11, the DC bias voltage of the DAC module 11 can be calibrated.

[0080] It can be understood that in the calibration circuit, there is a gain in the entire channel from the DAC module 11 to the ADC module 12 and then to the processor 14 , and this gain may affect the calibration of the DC bias voltage.

[0081] Therefore, in one embodiment, the processor 14 is further configured to determine a gain of the calibration circuit, and determine a calibration value of the DAC module 11 according to the first output voltage, the second output voltage, and the gain.

[0082] Specifically, the calibration value of the DAC module 11 may be: (UI-U2) / gain, where U1 is the first output voltage, U2 is the second output voltage, and gain is the gain.

[0083] In the embodiment of the present application, there may be a gain in the entire calibration circuit, and the gain, the first output voltage, and the second output voltage are combined to improve the accuracy of the calibration value finally determined.

[0084] In some embodiments, the above-mentioned gain can be determined by real-time measurement, or by pre-measurement, or by other acquisition methods, which are not limited here.

[0085] In this document, relational terms such as first and second, etc. are used merely to distinguish one entity or operation from another entity or operation, but do not necessarily require or imply any actual relationship or order between these entities or operations.

[0086] The above description is merely an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, various modifications and variations of the present application are possible. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A calibration circuit for an audio DAC, characterized in that: include: DAC module; ADC module; A control switch connected between the input end of the ADC module and the output end of the DAC module; a processor, the processor being electrically connected to an output terminal of the ADC module; Wherein, when the control switch is in a first state, the input end of the ADC module is short-circuited, and the processor is used to obtain a first output voltage of the ADC module; when the control switch is in a second state, the output end of the DAC module is electrically connected to the input end of the ADC module, and the processor is used to obtain a second output voltage of the ADC module; the processor is further used to determine a calibration value of the DAC module based on the first output voltage and the second output voltage; When the control switch is in the second state, the operating point voltage of the DAC module is equal to the operating point voltage of the ADC module.

2. The audio DAC calibration circuit according to claim 1, wherein: The control switch includes: a first switch, a second switch, a third switch, a fourth switch and a fifth switch; Wherein, one end of the first switch is electrically connected to the first input end of the ADC module, and the second end of the first switch is electrically connected to the second input end of the ADC module; The second switch is connected between the first output terminal of the DAC module and the second input terminal of the ADC module; The third switch is connected between the second output terminal of the DAC module and the first input terminal of the ADC module; The fourth switch is connected between the second output terminal of the DAC module and the second input terminal of the ADC module; The fifth switch is connected between the first output terminal of the DAC module and the first input terminal of the ADC module.

3. The audio DAC calibration circuit according to claim 2, wherein: When the control switch is in the first state, the first switch is closed, and the second switch, the third switch, the fourth switch, and the fifth switch are all open.

4. The audio DAC calibration circuit according to claim 2, wherein: When the control switch is in the first state, the third switch and the fourth switch are closed, and the first switch, the second switch, and the fifth switch are all open.

5. The audio DAC calibration circuit according to claim 2, wherein: When the control switch is in the first state, the second switch and the fifth switch are closed, and the first switch, the third switch, and the fourth switch are open.

6. The audio DAC calibration circuit according to claim 2, wherein: When the control switch is in the second state, the second switch and the third switch are closed, and the first switch, the fourth switch, and the fifth switch are open.

7. The audio DAC calibration circuit according to claim 2, wherein: When the control switch is in the second state, the fourth switch and the fifth switch are closed, and the first switch, the second switch, and the third switch are open.

8. The audio DAC calibration circuit according to claim 1, wherein: The operating point voltage of the DAC module is the reference voltage of the DAC module. The ADC module includes a voltage divider resistor. The reference voltage of the ADC module is the voltage divided by the voltage divider resistor. The operating point voltage of the ADC module is 1 / 2 of the reference voltage of the ADC module.

9. The audio DAC calibration circuit according to claim 8, wherein: The processor or the ADC module is further configured to adjust the reference voltage of the ADC module by adjusting the resistance of the voltage divider resistor so that the operating point voltage of the DAC module is equal to the operating point voltage of the ADC module.

10. The audio DAC calibration circuit according to any one of claims 1 to 7, characterized in that: The first output voltage and the second output voltage are both voltages that have been filtered and down-sampled.

11. The audio DAC calibration circuit according to any one of claims 1 to 7, wherein: The processor is further configured to determine a gain of the calibration circuit, and determine a calibration value of the DAC module according to the first output voltage, the second output voltage, and the gain.

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