A charging current detection circuit

Abstract

A charging current detection circuit, characterized in that: an analog circuit consists of a subtractor, a multiplier, an adder and a divider, and is used to measure and calculate the output current of a step-down charging circuit; the non-inverting input terminal of the subtractor is the source-drain current I of a reverse blocking MOS tube AC , the negative input terminal is the drain voltage V of the reverse blocking MOS tube PMID The output end is connected to the input end of the multiplier; one end of the input end of the multiplier is connected to the drain voltage V of the reverse blocking MOS tube PMID The other end is connected to the output of the subtractor, and the output is connected to the divider; the input of the adder is connected to the battery voltage V BAT Connect, connect to the output of the divider and feed back I BAT The output is connected to the other end of the divider; the output end of the divider is the battery current. Using the method of the present invention, the charging current can be accurately detected, saving costs, reducing chip area, and reducing power consumption.

Description

Technical Field

[0001] The present invention relates to an integrated circuit, and more particularly to a charging current detection circuit. Background Art

[0002] Currently, in voltage-drop charging chips, charging current detection is required. This detection is used to adjust the circuit loop and determine the chip's overcurrent protection function. A traditional method involves connecting a high-precision power resistor in series at the board level and detecting the voltage drop across it to measure the charging current. However, this method increases board area, and the high cost of high-precision power resistors makes it difficult to save costs in the detection circuit. Furthermore, the increased impedance of the circuit itself increases power loss, resulting in reduced system efficiency. Another traditional method uses the average current of the power transistor to replace the charging current information. However, due to the reverse recovery current of the power transistor and the presence of a detection dead zone, the sampling accuracy of the power transistor current detection is poor, which in turn affects the accuracy of the detection. In particular, when the power transistor operates in discontinuous conduction mode (DCM), the detection accuracy is further reduced.

[0003] Therefore, there is an urgent need for a new circuit that can accurately detect the charging current, save costs, reduce chip area and not increase power consumption. Summary of the Invention

[0004] To address the deficiencies in the prior art, the present invention aims to provide a charging current detection circuit that samples and detects the drain voltage and current of a reverse blocking MOS tube and the output terminal voltage to obtain an accurately sampled output current, thereby realizing detection of the charging current.

[0005] The present invention adopts the following technical solution. A charging current detection circuit, characterized in that: the analog circuit of the charging current detection circuit is composed of a subtractor, a multiplier, an adder and a divider, and is used to measure and calculate the output current of the step-down charging circuit; wherein the non-inverting input terminal of the subtractor is the source-drain current I of the reverse blocking MOS tube AC , the negative input terminal is the drain voltage V of the reverse blocking MOS tube PMID The output end is connected to the input end of the multiplier; one end of the input end of the multiplier is connected to the drain voltage V of the reverse blocking MOS tube PMID The other end is connected to the output of the subtractor, and the output is connected to the divider; the input of the adder is connected to the battery voltage V BAT Connect, connect to the output of the divider and feed back I BAT, the output is connected to the other end of the divider; the output of the divider is the battery current.

[0006] Preferably, the negative input terminal of the subtractor is the drain voltage V of the reverse blocking MOS tube in the step-down charging circuit. PMID multiples of Among them, f SW is the switching frequency of the first switch tube MH and the second switch tube ML in the step-down charging circuit, C SW is the capacitance value of the parasitic capacitance of the SW node in the buck charging circuit; the input end of the adder is weightedly connected to the output end of the divider, and the weight is (R ON +R ESR ), where R ON R is the source-drain on-resistance of the first switch tube MH and the second switch tube ML in the step-down charging circuit, ESR is the resistance value of the inductor parasitic resistance.

[0007] Preferably, the output current of the charging current detection circuit is: Among them, I AC is the source-drain current of the reverse blocking MOS tube in the step-down charging circuit, V PMID is the drain voltage of the reverse blocking MOS tube, V BAT is the battery voltage.

[0008] Preferably, the circuit power on the drain side of the reverse blocking MOS tube is P PMID =I AC ·V PMID =I BAT V BAT +P ON +P SW Among them, P ON is the conduction loss of the buck charging circuit, P SW is the switching loss of the charging current detection circuit.

[0009] Preferably, the conduction loss of the buck charging circuit is The switching loss of the buck charging circuit is

[0010] Preferably, the step-down charging circuit includes a voltage stabilizer, a reverse blocking MOS tube, an intermediate capacitor C PMID , driving module, first switch tube MH, second switch tube ML, energy storage module; and, voltage regulator, input end and chip power port V BUS Connection, the output end is connected to the drive unit; the reverse blocking MOS tube, the source is connected to the chip power port V BUS The drain is connected to the drain of the first switch tube MH, and the gate is connected to the relevant control circuit; the intermediate capacitor C PMIDOne end is connected to the drain of the reverse blocking MOS tube, and the other end is grounded; the driving module, the power supply end is connected to the voltage regulator, and the output end is respectively connected to the gate of the first switch tube MH and the second switch tube ML; the source of the first switch tube MH is connected to the drain of the second switch tube, and the input end of the energy storage module, and the drain of the second switch tube ML is grounded; the energy storage module, the input end is connected to the source of the first switch tube MH and the drain of the second switch tube, and the output end is connected to the battery voltage V BAT connect.

[0011] The beneficial effect of the present invention is that, compared with the prior art, a charging current detection circuit in the present invention can sample and detect the drain voltage and current of the reverse blocking MOS tube and the output terminal voltage in CCM and DCM working states respectively, and obtain an accurately sampled output current.

[0012] The beneficial effects of the present invention also include:

[0013] 1. The power calculation method of the present invention can accurately obtain current sampling regardless of whether the operating mode of the switching circuit is CCM (Continuous Conduction Mode) or DCM (Discontinuous Conduction Mode).

[0014] 2. Since this solution does not require the use of additional high-precision power resistors, it improves the working efficiency of the system, reduces the board area of ​​the chip, and saves costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a circuit connection diagram of a step-down charging circuit in the prior art of the present invention;

[0016] Figure 2 The figure is a schematic diagram of an analog circuit in a charging current detection circuit of the present invention. DETAILED DESCRIPTION

[0017] The present application will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present application.

[0018] Figure 1 This is a circuit connection diagram of a step-down charging circuit in the prior art of the present invention. Figure 1 As shown, a step-down charging circuit includes a voltage regulator, a reverse blocking MOS tube, and an intermediate capacitor C PMID , driving module, first switch tube MH, second switch tube ML, energy storage module. Among them, the voltage regulator, the input end and the chip power port V BUSConnection, the output end is connected to the drive unit; the reverse blocking MOS tube, the source is connected to the chip power port V BUS The drain is connected to the drain of the first switch tube MH. The intermediate capacitor C PMID One end is connected to the drain of the reverse blocking MOS tube, and the other end is grounded. The driving module, the power supply end is connected to the voltage regulator, and the output end is connected to the gate of the first switch tube MH and the second switch tube ML respectively; the source of the first switch tube MH is connected to the drain of the second switch tube, and the input end of the energy storage module, and the drain of the second switch tube ML is grounded; the energy storage module, the input end is connected to the source of the first switch tube MH and the drain of the second switch tube, and the output end is connected to the battery voltage V BAT connect.

[0019] Figure 2 FIG. 1 is a schematic diagram of an analog circuit in a charging current detection circuit of the present invention. Figure 2 As shown in FIG, the analog circuit of the charging current detection circuit is composed of a subtractor, a multiplier, an adder and a divider, which is used to measure and calculate the output current of the buck charging circuit; wherein the non-inverting input terminal of the subtractor is the source-drain electrode of the reverse blocking MOS tube. AC The negative input terminal is the drain voltage V of the reverse blocking MOS tube. PMID The output end is connected to the input end of the multiplier; one end of the input end of the multiplier is connected to the drain voltage V of the reverse blocking MOS tube PMID The other end is connected to the output of the subtractor, and the output is connected to the divider; the input of the adder is connected to the battery voltage V BAT Connect, connect to the output of the divider and feed back I BAT , the output is connected to the other end of the divider; the output of the divider is the battery current.

[0020] Preferably, the negative input terminal of the subtractor is the drain voltage V of the reverse blocking MOS tube in the step-down charging circuit. PMID multiples of Among them, f SW is the switching frequency of the first switch tube MH and the second switch tube ML in the step-down charging circuit, C SW is the capacitance value of the parasitic capacitance of the SW node in the buck charging circuit. The input of the adder is connected to the output of the divider in a weighted manner, and the weight is (R ON +R ESR ), where R ON R is the source-drain on-resistance of the first switch tube MH and the second switch tube ML in the step-down charging circuit, ESR is the resistance value of the inductor parasitic resistance.

[0021] Through the above circuit, the source-drain current I of the reverse MOS tube in the buck charging circuit can be detected.AC , the voltage at PMID point V PMID , and the battery voltage V BAT , directly calculate the accurate charging current I BAT , improve the accuracy of detection results and output efficiency.

[0022] When V BUS When used as a power supply for a step-down charging chip, the source of system drive loss and chip power consumption is V BUS The circuit power from the PMID point to the BAT port only includes conduction loss and switching loss, and does not include other losses such as chip power loss and drive loss. Therefore, the PMID point can be used as a reference to calculate the accurate charging current I according to the law of conservation of power. BAT .

[0023] Specifically, in the step-down charging circuit, the power at PMID, that is, the drain side of the reverse blocking MOS tube, that is, the circuit power at PMID point is P PMID =I AC ·V PMID =I BAT V BAT +P ON +P SW Wherein, the P ON is the conduction loss of the buck charging circuit, the P SW is the switching loss. Since the inductor coil L is equivalent to the inductor parasitic resistance R ESR A circuit connected in series with an ideal inductor, where the ideal inductor has no loss, and the inductor parasitic resistance R ESR The loss is the total loss of the inductor L.

[0024] Preferably, the conduction loss of the buck charging circuit is composed of the first switch tube MH, the second switch tube ML and the inductor parasitic resistance P ESR The switching loss of the charging current detection circuit is caused by the parasitic capacitance C SW The SW node parasitic capacitance C SW The energy consumption is in addition to the parasitic capacitance C SW In addition to being proportional to the capacitance value, it is also closely related to the switching frequency of the first switch tube MH and the second switch tube ML. Specifically, the conduction loss of the buck charging circuit is The switching loss of the charging current detection circuit is Substitute the above two formulas into P PMID =I AC ·V PMID =I BAT V BAT +P ON +P SWIn the formula, the output current of the buck charging circuit is obtained through calculation.

[0025] According to the above content, the output current of the charging current detection circuit should be: Among them, I AC To reversely block the source-drain current of the MOS tube, V PMID is the drain voltage of the reverse blocking MOS tube, V BAT is the battery voltage.

[0026] According to the above formula, when the system switching frequency is fixed, the is a fixed value, so the term in the formula The value of V PMID By adjusting V PMID Sampling, I AC Sampling, V BAT Sampling and I BAT The output result is fed back, so that the final accurate I BAT results.

[0027] Therefore, the output current formula of the charging current detection circuit can be used as a reference to design the charging current detection circuit. Figure 2 The charging current detection circuit shown.

[0028] The beneficial effect of the present invention is that, compared with the prior art, a charging current detection circuit in the present invention can sample and detect the drain voltage and current of the reverse blocking MOS tube and the output terminal voltage in CCM and DCM working states respectively, and obtain an accurately sampled output current.

[0029] The beneficial effects of the present invention also include:

[0030] 1. The power calculation method of the present invention can accurately obtain current sampling regardless of whether the operating mode of the switching circuit is CCM (Continuous Conduction Mode) or DCM (Discontinuous Conduction Mode).

[0031] 2. Since this solution does not require the use of additional high-precision power resistors, it improves the working efficiency of the system, reduces the board area of ​​the chip, and saves costs.

[0032] The applicant of the present invention has made a detailed explanation and description of the implementation examples of the present invention in conjunction with the drawings in the specification. However, those skilled in the art should understand that the above implementation examples are only preferred implementation plans of the present invention, and the detailed description is only to help readers better understand the spirit of the present invention, and is not a limitation on the scope of protection of the present invention. On the contrary, any improvements or modifications based on the inventive spirit of the present invention should fall within the scope of protection of the present invention.

Claims

1. A charging current detection circuit, characterized in that: The analog circuit of the charging current detection circuit is composed of a subtractor, a multiplier, an adder and a divider, and is used to measure and calculate the output current of the buck charging circuit; the buck charging circuit includes a reverse blocking MOS tube; The non-inverting input terminal of the subtractor is the source-drain current I of the reverse blocking MOS tube. AC , the negative input terminal is the drain voltage V of the reverse blocking MOS tube PMID The output terminal is connected to the input terminal of the multiplier; One end of the input of the multiplier is connected to the drain voltage V of the reverse blocking MOS tube PMID , the other end is connected to the output of the subtractor, and the output is connected to the divider; The input terminals of the adder are respectively connected to the battery voltage V BAT Connect, connect to the output of the divider and feed back I BAT , the output is connected to the other end of the divider; the weight is (R ON +R ESR ), where R ON R is the source-drain on-resistance of the first switch tube MH and the second switch tube ML in the step-down charging circuit. ESR is the resistance value of the inductor parasitic resistance; The output terminal of the divider is the battery current.

2. A charging current detection circuit according to claim 1, characterized in that: The negative input terminal of the subtractor is the drain voltage V of the reverse blocking MOS tube in the step-down charging circuit. PMID multiples of Among them, f SW is the switching frequency of the first switch tube MH and the second switch tube ML in the step-down charging circuit, C SW is the capacitance value of the parasitic capacitance of the SW node in the buck charging circuit.

3. A charging current detection circuit according to claim 2, characterized in that: The output current of the charging current detection circuit is: Among them, I AC is the source-drain current of the reverse blocking MOS tube in the step-down charging circuit, V PMID is the drain voltage of the reverse blocking MOS tube, V BAT is the battery voltage.

4. A charging current detection circuit according to claim 3, characterized in that: The circuit power on the drain side of the reverse blocking MOS tube is P PMID =I AC ·V PMID =I BAT V BAT +P ON +P SW ; Among them, the P ON is the conduction loss of the buck charging circuit, the P SW is the switching loss of the charging current detection circuit.

5. A charging current detection circuit according to claim 4, characterized in that: The conduction loss of the step-down charging circuit is The switching loss of the step-down charging circuit is 6. A charging current detection circuit according to claim 1, characterized in that: The step-down charging circuit also includes a voltage stabilizer, an intermediate capacitor C PMID , a driving module, a first switch tube MH, a second switch tube ML, and an energy storage module; and The voltage regulator, the input terminal and the chip power port V BUS Connecting, the output end is connected to the driving module; The reverse blocking MOS tube, the source and the chip power port V BUS connected, the drain is connected to the drain of the first switch tube MH, and the gate is connected to the relevant control circuit; The intermediate capacitor C PMID One end is connected to the drain of the reverse blocking MOS tube, and the other end is grounded; The driving module has a power supply end connected to the voltage regulator, and an output end connected to the gates of the first switching tube MH and the second switching tube ML respectively; The source of the first switch tube MH is connected to the drain of the second switch tube and the input end of the energy storage module, and the source of the second switch tube ML is grounded; The energy storage module has an input end connected to the source of the first switch tube MH and the drain of the second switch tube, and an output end connected to the battery voltage V BAT connect.

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