Low warpage substrate structure, semiconductor structure and method of making the same

Abstract

The application relates to a low-warp substrate structure, a semiconductor structure and a preparation method thereof. The preparation method of the low-warp substrate structure provided by the application comprises the following steps: providing a gallium nitride substrate; forming a first film layer on the back surface of the gallium nitride substrate under preset growth conditions, so that the first film layer generates a tensile stress opposite to the direction of internal stress in the gallium nitride substrate, and the thermal expansion coefficient of the first film layer is smaller than the thermal expansion coefficient of the gallium nitride substrate; and forming a second film layer on the surface of the first film layer away from the gallium nitride substrate, and the thermal expansion coefficient of the second film layer is greater than the thermal expansion coefficient of the gallium nitride substrate. The preparation method of the low-warp substrate structure provided by the application can offset the warping of the substrate structure caused by the internal stress of the gallium nitride substrate, reduce the bowl-shaped inner recess formed by the warping of the substrate structure, reduce the difficulty of subsequent device processing and / or chip processing, and make the substrate structure not be affected by temperature in subsequent process steps.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a low-warpage substrate structure, a semiconductor structure, and a method for fabricating the same. Background Technology

[0002] Compared to traditional substrate materials, gallium nitride (GaN) possesses superior properties such as a large bandgap, high breakdown voltage, high thermal conductivity, high electron saturation drift velocity, strong radiation resistance, and good chemical stability, making it theoretically the material system with the highest electro-optic and photoelectric conversion efficiency to date. However, dislocations (lattice mismatch) formed during the growth of GaN single-crystal substrates create internal stress, leading to warping. This warping results in a bowl-shaped concavity (bow < 0) in the GaN single-crystal substrate, introducing difficulties into the fabrication processes of devices and chips using GaN single-crystal substrates.

[0003] Therefore, how to reduce the warpage of gallium nitride single-crystal substrates is an urgent problem to be solved. Summary of the Invention

[0004] Therefore, it is necessary to address the shortcomings of the existing technology by providing a low-warpage substrate structure, semiconductor structure, and its fabrication method.

[0005] To achieve the above objectives, this application provides a method for fabricating a low-warpage substrate structure according to some embodiments, comprising:

[0006] Provide gallium nitride substrates;

[0007] A first film layer is formed on the back side of the gallium nitride substrate, wherein the coefficient of thermal expansion of the first film layer is less than the coefficient of thermal expansion of the gallium nitride substrate;

[0008] A second film layer is formed on the surface of the first film layer away from the gallium nitride substrate, and the coefficient of thermal expansion of the second film layer is greater than the coefficient of thermal expansion of the gallium nitride substrate.

[0009] The method for fabricating a low-warpage substrate structure provided in this application can form a first film layer on the back side of a gallium nitride substrate with the tensile stress direction opposite to the internal stress direction of the gallium nitride substrate by controlling the growth conditions of the first film layer. Since the tensile stress of the first film layer can counteract the internal stress of the gallium nitride substrate, it can offset the warpage of the substrate structure caused by the internal stress of the gallium nitride substrate. This not only reduces the bowl-shaped concavity formed by the warpage of the substrate structure, but also reduces the difficulty of subsequent device fabrication and / or chip fabrication processes.

[0010] Meanwhile, since the thermal expansion coefficient of the first film layer is less than that of the gallium nitride substrate, the method for fabricating the low warp substrate structure provided in this application also forms a second film layer with a thermal expansion coefficient greater than that of the gallium nitride substrate on the surface of the first film layer away from the gallium nitride substrate. This makes the overall thermal expansion coefficient of the first and second film layers similar to that of the gallium nitride substrate, ensuring that the prepared substrate structure is not affected by temperature in subsequent process steps.

[0011] In one embodiment, the first film layer is formed on the back side of the gallium nitride substrate using a chemical vapor deposition process;

[0012] The growth conditions for forming the first film layer on the back side of the gallium nitride substrate include:

[0013] The growth pressure is 1 mTorr to 10 mTorr, the growth power is 10 W to 100 W, and the growth temperature is 100℃ to 400℃.

[0014] In one embodiment, the first film layer includes at least one of a zinc nitride layer, an aluminum nitride layer, an aluminum oxide layer, a silicon carbide layer, a gallium arsenide layer, a zinc oxide layer, a silicon oxide layer, and a silicon nitride layer.

[0015] In one embodiment, the first film layer includes a silicon nitride layer; the reaction gas for forming the first film layer on the back side of the gallium nitride substrate includes at least silane and chlorine; wherein the flow rate of the silane is 1 sccm to 30 sccm, and the flow rate of the ammonia is 50 sccm to 150 sccm.

[0016] In one embodiment, the second film layer is formed on the surface of the first film layer away from the gallium nitride substrate using a vapor deposition process;

[0017] The growth conditions for forming the second film layer on the surface of the first film layer away from the gallium nitride substrate include:

[0018] The growth pressure is 0.001 mTorr to 0.008 mTorr, and the growth power is 100 W to 300 W.

[0019] In one embodiment, the second film layer comprises an aluminum oxide layer or a metal layer.

[0020] Based on the same inventive concept, this application also provides a low-warpage substrate structure, comprising:

[0021] Gallium nitride substrate;

[0022] A first film layer is located on the back side of the gallium nitride substrate, and the coefficient of thermal expansion of the first film layer is smaller than the coefficient of thermal expansion of the gallium nitride substrate;

[0023] The second film layer is located on the surface of the first film layer away from the gallium nitride substrate, and the coefficient of thermal expansion of the second film layer is greater than the coefficient of thermal expansion of the gallium nitride substrate.

[0024] In one embodiment, the first film layer includes at least one of a zinc nitride layer, an aluminum nitride layer, an aluminum oxide layer, a silicon carbide layer, a gallium arsenide layer, a zinc oxide layer, a silicon oxide layer, and a silicon nitride layer; the second film layer includes an aluminum oxide layer or a metal layer.

[0025] In one embodiment, the total thickness of the first film layer and the second film layer is 0.1 nm to 5 μm.

[0026] In one embodiment, the overall coefficient of thermal expansion of the first film layer and the second film layer is 5 × 10⁻⁶. -6 / K~6×10 -6 / K.

[0027] Based on the same inventive concept, this application also provides a method for fabricating a semiconductor structure, comprising:

[0028] The substrate structure is prepared using the method for preparing a low-warpage substrate structure as provided in any of the above embodiments;

[0029] The semiconductor structure is formed on the surface of the substrate structure.

[0030] The semiconductor structure preparation method provided in the above embodiments includes the step of preparing a substrate structure using the substrate structure preparation method provided in the foregoing embodiments. Therefore, the technical effects that can be achieved by the substrate structure preparation method provided in the foregoing embodiments can also be achieved by the semiconductor structure preparation method, and will not be described in detail here.

[0031] Based on the same inventive concept, this application also provides a semiconductor structure, which is prepared by the semiconductor structure preparation method provided in the above embodiments.

[0032] The semiconductor structure provided in the above embodiments is prepared by the semiconductor structure preparation method provided in the foregoing embodiments. Therefore, the semiconductor structure can also achieve the technical effects that the semiconductor structure preparation method provided in the foregoing embodiments can achieve, and will not be described in detail here. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 A flowchart illustrating a method for fabricating a low-warpage substrate structure according to one embodiment of this application;

[0035] Figure 2 A schematic diagram of the cross-sectional structure of the structure obtained in step S11 in the method for preparing a low-warpage substrate structure according to one embodiment of this application;

[0036] Figure 3 A schematic diagram of the cross-sectional structure of the structure obtained in step S12 in the method for preparing a low-warpage substrate structure according to one embodiment of this application;

[0037] Figure 4 A schematic diagram of the cross-sectional structure of the structure obtained in step S13 in the method for preparing a low-warpage substrate structure according to one embodiment of this application; Figure 4 This is also a schematic cross-sectional view of a low-warpage substrate structure provided in one embodiment of this application;

[0038] Figure 5 This is a flowchart illustrating a method for fabricating a semiconductor structure according to one embodiment of this application.

[0039] Explanation of reference numerals in the attached figures:

[0040] 10. Gallium nitride substrate; 201. First film layer; 202. Second film layer. Detailed Implementation

[0041] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0043] It should be understood that when an element or layer is referred to as "on the front" or "on the back" of another element or layer, it may be directly on the front or back of the other element or layer, or there may be an intervening element or layer.

[0044] Spatial relation terms such as "on the front" or "on the back" are used herein to describe the relationship between one element or feature shown in the figures and other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, being described as being on the "back" side of an element or feature would be oriented as being on the "front" side of another element or feature. Therefore, the exemplary terms "on the front" and "on the back" can include both front and back orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0045] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0046] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of preferred embodiments (and intermediate structures) of this application, thus allowing for the anticipation of variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of this application should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques; the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device, nor do they limit the scope of this application.

[0047] Generally, gallium nitride (GaN) single-crystal substrates cannot form perfect crystals during growth. Dislocations (lattice mismatch) formed during GaN growth create internal stress, leading to warping. This warping results in a bowl-shaped concavity (bow < 0) in the GaN single-crystal substrate, introducing difficulties into the fabrication of devices and chips using GaN single-crystal substrates. The greater the lattice mismatch, the more severe the bowl-shaped concavity. Furthermore, if different epitaxial layers are epitaxially grown on the GaN single-crystal substrate, the different coefficients of thermal expansion between the materials cause warping. Under the influence of thermal mismatch, the direction of warping is controlled by the coefficients of thermal expansion of the two materials. Excessive warping introduces difficulties into the fabrication of devices and chips using GaN single-crystal substrates; for example, during mask fabrication on GaN single-crystal substrates, the presence of warping causes inconsistent exposure conditions at the center and edges of the GaN single-crystal substrate, severely affecting the precision of exposure. Other process technologies also impose specific constraints on the flatness of the GaN single-crystal substrate. Furthermore, the larger the size of the gallium nitride single crystal substrate, the greater the impact of warping.

[0048] Therefore, how to reduce the warpage of gallium nitride single-crystal substrates is an urgent problem to be solved.

[0049] In view of the above-mentioned shortcomings in the prior art, this application provides a method for preparing a low-warpage substrate structure according to some embodiments.

[0050] Please see Figure 1 In one embodiment, the method for fabricating the low-warpage substrate structure may specifically include the following steps:

[0051] S11: Provides a gallium nitride substrate.

[0052] S12: A first film layer is formed on the back side of the gallium nitride substrate, wherein the coefficient of thermal expansion of the first film layer is less than the coefficient of thermal expansion of the gallium nitride substrate.

[0053] S13: A second film layer is formed on the surface of the first film layer away from the gallium nitride substrate, and the coefficient of thermal expansion of the second film layer is greater than the coefficient of thermal expansion of the gallium nitride substrate.

[0054] In the above-described method for fabricating a low-warpage substrate structure, since the coefficient of thermal expansion of the first film layer is less than that of the gallium nitride substrate, tensile stress can be generated in the first film layer. The tensile stress of the first film layer can counteract the internal stress of the gallium nitride substrate, thereby offsetting the warpage of the substrate structure caused by the internal stress of the gallium nitride substrate. This not only reduces the bowl-shaped concavity formed by the warpage of the substrate structure, but also reduces the difficulty of subsequent device fabrication and / or chip fabrication processes.

[0055] Meanwhile, since the thermal expansion coefficient of the first film layer is less than that of the gallium nitride substrate, the above-mentioned method for preparing a low-warpage substrate structure also forms a second film layer with a thermal expansion coefficient greater than that of the gallium nitride substrate on the surface of the first film layer away from the gallium nitride substrate. This makes the overall thermal expansion coefficient of the first and second film layers similar to that of the gallium nitride substrate, ensuring that the prepared substrate structure is not affected by temperature in subsequent process steps.

[0056] The following, in conjunction with 1 to 3, provides a more detailed description of the fabrication methods for low-warpage substrate structures provided by some possible embodiments of this application.

[0057] For step S11, please refer to Figure 1 Step S11 and Figure 2 A gallium nitride substrate 10 is provided.

[0058] It should be noted that the gallium nitride substrate 10 itself should have internal stress.

[0059] This application does not specifically limit the thickness of the gallium nitride substrate 10; in one embodiment, the thickness of the gallium nitride substrate 10 can be 100μm to 10000μm, for example, the thickness of the gallium nitride substrate 10 can be 100μm, 150μm, 200μm, 1000μm, 3000μm, 5000μm or 10000μm, etc.

[0060] In a preferred embodiment, the gallium nitride substrate 10 is a gallium nitride single crystal substrate, and the thickness of the gallium nitride substrate 10 is preferably 200μm to 3000μm. For example, the thickness of the gallium nitride substrate 10 can be 200μm, 500μm, 1000μm, 1500μm, 2000μm, 2500μm or 3000μm, etc.

[0061] This application does not specifically limit the size of the gallium nitride substrate 10; in one embodiment, the size of the gallium nitride substrate 10 can be 2 inches to 8 inches, for example, the size of the gallium nitride substrate 10 can be 2 inches, 3 inches, 4 inches, 5 inches, 6 inches or 8 inches, etc.

[0062] For step S12, please refer to Figure 1 Step S12 and Figure 3 A first film layer 201 is formed on the back side of the gallium nitride substrate 10, and the coefficient of thermal expansion of the first film layer 201 is less than the coefficient of thermal expansion of the gallium nitride substrate 10.

[0063] The form of the growth conditions for forming the first film layer 201 in this step is not specifically limited; for example, by adjusting the pressure, temperature, airflow and / or other growth conditions when forming the first film layer 201, the first film layer 201 attached to the back side of the gallium nitride substrate 10 can generate tensile stress that counteracts the internal stress of the gallium nitride substrate, thereby offsetting the warping of the substrate structure caused by the internal stress of the gallium nitride substrate and reducing the bowl-shaped concavity formed by the warping of the substrate structure.

[0064] This application does not specifically limit the method of forming the first film layer 201; optionally, the first film layer 201 may be formed by evaporation process, chemical vapor deposition (CVD) process, physical vapor deposition (PVD) process, plasma sputtering process or magnetron sputtering process.

[0065] In one embodiment, a first film layer 201 is formed on the back side of a gallium nitride substrate 10 using a chemical vapor deposition process.

[0066] Based on the above embodiments, the growth conditions for forming the first film layer 201 on the back side of the gallium nitride substrate 10 may include a growth pressure of 1 mTorr to 10 mTorr, a growth power of 10 W to 100 W, and a growth temperature of 100 °C to 400 °C.

[0067] It is understood that the growth conditions for forming the first film layer 201 on the back side of the gallium nitride substrate 10 according to this application can be set according to actual needs. In one embodiment of the growth conditions for forming the first film layer 201 on the back side of the gallium nitride substrate 10, the growth pressure can be 1 mTorr to 10 mTorr, for example, the growth pressure can be 1 mTorr, 3 mTorr, 5 mTorr, 7 mTorr, or 10 mTorr, etc. In one embodiment of the growth conditions for forming the first film layer 201 on the back side of the gallium nitride substrate 10, the growth power can be 10 W to 100 W, for example, the growth power can be 10 W, 30 W, 60 W, 80 W, or 100 W, etc. In one embodiment of the growth conditions for forming the first film layer 201 on the back side of the gallium nitride substrate 10, the growth temperature can be 100°C to 400°C, for example, the growth temperature can be 100°C, 200°C, 300°C, or 400°C, etc.

[0068] In a preferred embodiment, the growth pressure can be 3 mTorr to 5 mTorr, the growth power can be 30 W to 60 W, and the growth temperature can be 200 °C to 300 °C.

[0069] This application does not specifically limit the structure and material of the first film layer 201. In one embodiment, the first film layer 201 may be a stacked structure composed of any one or more of zinc nitride (Zn3N2) layer, aluminum nitride (AlN) layer, aluminum oxide (Al3O2) layer, silicon carbide (SiC) layer, gallium arsenide (GaAs) layer, zinc oxide (ZnO) layer, silicon oxide (SiO2) layer, and silicon nitride (SiN) layer; that is, the first film layer 201 may be a single-layer structure including zinc nitride layer, aluminum nitride layer, aluminum oxide layer, silicon carbide layer, gallium arsenide layer, zinc oxide layer, silicon oxide layer, or silicon nitride layer, or it may be a stacked structure including at least two of zinc nitride layer, aluminum nitride layer, aluminum oxide layer, silicon carbide layer, gallium arsenide layer, zinc oxide layer, silicon oxide layer, and silicon nitride layer. In another embodiment, the material of the first film layer 201 may include, but is not limited to, at least two of zinc nitride, aluminum nitride, aluminum oxide, silicon carbide, gallium arsenide, zinc oxide, silicon oxide and silicon nitride, etc., that is, the first film layer 201 is a composite film layer including at least two of zinc nitride, aluminum nitride, aluminum oxide, silicon carbide, gallium arsenide, zinc oxide, silicon oxide and silicon nitride, etc.

[0070] In one embodiment, the first film layer 201 includes a silicon nitride layer.

[0071] Based on the above embodiments, the reaction gas for forming the first film layer 201 on the back side of the gallium nitride substrate 10 includes at least silane (Si). n H 2n+2 ) and chlorine (Cl2).

[0072] This application does not specifically limit the flow rate of silane; in one embodiment, the flow rate of silane can be from 1 sccm (Stard liter per minute) to 30 sccm, for example, the flow rate of silane can be 1 sccm, 10 sccm, 20 sccm or 30 sccm, etc.

[0073] This application does not specifically limit the flow rate of ammonia; in one embodiment, the flow rate of ammonia can be 1 sccm to 200 sccm, for example, the flow rate of ammonia can be 1 sccm, 50 sccm, 100 sccm, 150 sccm or 200 sccm, etc.

[0074] In a preferred embodiment, the flow rate of silane can be 10-20 sccm, and the flow rate of ammonia can be 50-150 sccm.

[0075] This application does not specifically limit the thickness of the first film layer 201; in one embodiment, the thickness of the first film layer 201 is 0.1nm to 100μm, and in a preferred embodiment, the thickness of the first film layer 201 can be 1nm to 10μm. For example, the thickness of the first film layer 201 can be 1nm, 5nm, 10nm, 50nm, 70nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 800nm, 900nm, 1000nm, 5μm or 10μm, etc. In a more preferred embodiment, the thickness of the first film layer 201 can be from 10nm to 10000nm. For example, the thickness of the first film layer 201 can be 10nm, 20nm, 50nm, 70nm, 100nm, 15nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 800nm, 900nm, 1000nm, 2000nm, 3000nm, 4000nm, 5000nm, 6000nm, 7000nm, 8000nm, 9000nm, or 10000nm, etc.

[0076] For step S13, please refer to Figure 1 Step S13 and Figure 4 A second film layer 202 is formed on the surface of the first film layer 201 away from the gallium nitride substrate 10, and the coefficient of thermal expansion of the second film layer 202 is greater than the coefficient of thermal expansion of the gallium nitride substrate 10.

[0077] Since the gallium nitride substrate 10 is the raw material for fabricating the substrate structure, there will be a large number of complex processes in the subsequent process. Some of these processes will be carried out at high temperatures. For example, the active layer of the metal-organic chemical vapor deposition (MOCVD) process needs to reach a temperature of over 1000°C. Step S13 forms a second film layer 202 on the surface of the first film layer 201 away from the gallium nitride substrate 10, with a coefficient of thermal expansion greater than that of the gallium nitride substrate 10. This ensures that the overall coefficient of thermal expansion of the first film layer 201 and the second film layer 202 is close to that of the gallium nitride substrate 10, so that the prepared substrate structure is not affected by temperature in subsequent process steps.

[0078] This application does not specifically limit the coefficient of thermal expansion of the first film layer 201 and the second film layer 202; optionally, the overall coefficient of thermal expansion of the first film layer 201 and the second film layer 202 can be 5×10.-6 / K~6×10 -6 For example, the overall coefficient of thermal expansion of the first film layer 201 and the second film layer 202 can be 5 × 10⁻⁶. -6 / K, 5.1×10 -6 / K, 5.2×10 -6 / K, 5.3×10 -6 / K, 5.4×10 -6 / K, 5.5×10 -6 / K, 5.6×10 -6 / K, 5.7×10 -6 / K, 5.8×10 -6 / K, 5.9×10 -6 / K or 6.0×10 -6 / K etc.

[0079] This application does not specifically limit the thickness of the second film layer 202; in one embodiment, the thickness of the second film layer 202 is 0.1nm to 100μm, for example, the thickness of the second film layer 202 can be 0.1nm, 5nm, 10nm, 20nm, 50nm, 70nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 800nm, 900nm, 1000nm, 5μm or 10μm, etc.

[0080] In a preferred embodiment, the thickness of the second film layer 202 can be 10 nm to 10 μm. In a more preferred embodiment, the thickness of the second film layer 202 can be 5 nm to 1000 nm. For example, the thickness of the second film layer 202 can be 5 nm, 100 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, or 1000 nm, etc.

[0081] In one embodiment, the total thickness of the first film layer 201 and the second film layer 202 can be 1nm to 5μm. For example, the total thickness of the first film layer 201 and the second film layer 202 can be 1nm, 5nm, 10nm, 20nm, 50nm, 70nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 800nm, 900nm, 1μm, 3μm, or 5μm, etc.

[0082] In a preferred embodiment, the total thickness of the first film layer 201 and the second film layer 202 can be 5nm to 3000nm. In a more preferred embodiment, the total thickness of the first film layer 201 and the second film layer 202 can be 10nm to 1000nm. For example, the total thickness of the first film layer 201 and the second film layer 202 can be 10nm, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, or 1000nm, etc.

[0083] It should be noted that the overall thickness of the first film layer 201 and the second film layer 202 should be as thin as possible. The thermal expansion coefficient of the first film layer 201 and the second film layer 202 as a whole can be adjusted to be close to that of the gallium nitride substrate 10.

[0084] Regarding step S13, it should be noted that this application does not specifically limit the method of forming the second film layer 202; optionally, but not limited to vapor deposition, chemical vapor deposition, physical vapor deposition, plasma sputtering or magnetron sputtering processes can be used to form the second film layer 202.

[0085] In one embodiment, a second film layer 202 is formed on the surface of the first film layer 201 away from the gallium nitride substrate 10 using a vapor deposition process.

[0086] Based on the above embodiments, the growth conditions for forming the second film layer 202 on the surface of the first film layer 201 away from the gallium nitride substrate 10 may include:

[0087] The growth pressure is 0.001 mTorr to 0.008 mTorr, and the growth power is 100 W to 300 W.

[0088] In one embodiment, the growth pressure of the second film layer 202 can be 0.001 mTorr to 0.08 mTorr, for example, the growth pressure of the second film layer 202 can be 0.001 mTorr, 0.005 mTorr, 0.01 mTorr, 0.02 mTorr, 0.03 mTorr, 0.04 mTorr, 0.05 mTorr, 0.06 mTorr, 0.07 mTorr, or 0.08 mTorr, etc. In a preferred embodiment, the growth pressure of the second film layer 202 can be 0.001 mTorr to 0.05 mTorr.

[0089] In one embodiment, the growth power of the second film layer 202 can be 100W to 300W, for example, the growth power of the second film layer 202 can be 100W, 150W, 200W, 250W or 300W, etc. In a preferred embodiment, the growth power of the second film layer 202 can be 150W to 250W.

[0090] This application does not specifically limit the structure and material of the second film layer 202; in one embodiment, the second film layer 202 may include, but is not limited to, an aluminum oxide layer or a metal layer.

[0091] In one embodiment, the second film layer 202 includes a metal layer. Specifically, the metal layer may be a stacked structure composed of any one or more of the following: copper (Cu), aluminum (Al), iron (Fe), zinc (Zn), lead (Pb), magnesium (Mg), tin (Sn), gold (Au), silver (Ag), chromium (Cr), nickel (Ni), cobalt (Co), titanium (Ti), and palladium (Pd); that is, the material of the metal layer may be any one or more of the following: copper, aluminum, iron, zinc, lead, magnesium, tin, gold, silver, chromium, nickel, cobalt, titanium, and palladium. The metal layer may be a single-layer film composed of any one of the above metals, a single-layer film composed of an alloy of any of the above metals, a stacked structure composed of any of the above metals, or a stacked structure composed of an alloy of any of the above metals.

[0092] In one embodiment, the second film layer 202 includes an alumina layer. Preparing an alumina layer as the second film layer 202 facilitates subsequent fabrication of devices and / or chips.

[0093] In one embodiment, the second film layer 202 comprises a titanium layer.

[0094] Please continue reading. Figure 4 This application also provides a low-warpage substrate structure, which may be, but is not limited to, prepared by the preparation method of the low-warpage substrate structure in the above embodiments. The substrate structure may include: gallium nitride substrate 10, first film layer 201 and second film layer 202.

[0095] The first film layer 201 is located on the back side of the gallium nitride substrate 10, and the coefficient of thermal expansion of the first film layer 201 is less than that of the gallium nitride substrate 10; the second film layer 202 is located on the surface of the first film layer 201 away from the gallium nitride substrate 10, and the coefficient of thermal expansion of the second film layer 202 is greater than that of the gallium nitride substrate 10.

[0096] In the low-warpage substrate structure provided in the above embodiments, since the coefficient of thermal expansion of the first film layer 201 is less than that of the gallium nitride substrate 10, tensile stress can be formed in the first film layer 201. The tensile stress of the first film layer 201 can counteract the internal stress of the gallium nitride substrate 10, thereby offsetting the warpage of the substrate structure caused by the internal stress of the gallium nitride substrate 10. This not only reduces the bowl-shaped concavity formed by the warpage of the substrate structure, but also reduces the difficulty of subsequent device fabrication and / or chip fabrication processes.

[0097] Meanwhile, since the coefficient of thermal expansion of the first film layer 201 is less than that of the gallium nitride substrate 10, the low warpage substrate structure in the above embodiment also has a second film layer 202 with a coefficient of thermal expansion greater than that of the gallium nitride substrate 10, so that the overall coefficient of thermal expansion of the first film layer 201 and the second film layer 202 is close to that of the gallium nitride substrate 10, so as to ensure that the substrate structure is not affected by temperature in subsequent process steps.

[0098] This application does not specifically limit the thickness of the gallium nitride substrate 10; in one embodiment, the thickness of the gallium nitride substrate 10 is preferably 200μm to 3000μm, for example, the thickness of the gallium nitride substrate 10 can be 200μm, 500μm, 1000μm, 1500μm, 2000μm, 2500μm or 3000μm, etc.

[0099] This application does not specifically limit the size of the gallium nitride substrate 10; in one embodiment, the size of the gallium nitride substrate 10 can be 2 inches to 8 inches, for example, the size of the gallium nitride substrate 10 can be 2 inches, 3 inches, 4 inches, 5 inches, 6 inches or 8 inches, etc.

[0100] This application does not specifically limit the structure and material of the first film layer 201. In one embodiment, the first film layer 201 may be a stacked structure composed of any one or more of zinc nitride (Zn3N2) layer, aluminum nitride (AlN) layer, aluminum oxide (Al3O2) layer, silicon carbide (SiC) layer, gallium arsenide (GaAs) layer, zinc oxide (ZnO) layer, silicon oxide (SiO2) layer, and silicon nitride (SiN) layer; that is, the first film layer 201 may be a single-layer structure including zinc nitride layer, aluminum nitride layer, aluminum oxide layer, silicon carbide layer, gallium arsenide layer, zinc oxide layer, silicon oxide layer, or silicon nitride layer, or it may be a stacked structure including at least two of zinc nitride layer, aluminum nitride layer, aluminum oxide layer, silicon carbide layer, gallium arsenide layer, zinc oxide layer, silicon oxide layer, and silicon nitride layer. In another embodiment, the material of the first film layer 201 may include, but is not limited to, at least two of zinc nitride, aluminum nitride, aluminum oxide, silicon carbide, gallium arsenide, zinc oxide, silicon oxide and silicon nitride, etc., that is, the first film layer 201 is a composite film layer including at least two of zinc nitride, aluminum nitride, aluminum oxide, silicon carbide, gallium arsenide, zinc oxide, silicon oxide and silicon nitride, etc.

[0101] In one embodiment, the first film layer 201 includes a silicon nitride layer.

[0102] This application does not specifically limit the thickness of the first film layer 201; in one embodiment, the thickness of the first film layer 201 is 0.1nm to 100μm, and in a preferred embodiment, the thickness of the first film layer 201 can be 1nm to 10μm. For example, the thickness of the first film layer 201 can be 1nm, 5nm, 10nm, 50nm, 70nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 800nm, 900nm, 1000nm, 5μm or 10μm, etc. In a more preferred embodiment, the thickness of the first film layer 201 can be from 10nm to 10000nm. For example, the thickness of the first film layer 201 can be 10nm, 20nm, 50nm, 70nm, 100nm, 15nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 800nm, 900nm, 1000nm, 2000nm, 3000nm, 4000nm, 5000nm, 6000nm, 7000nm, 8000nm, 9000nm, or 10000nm, etc.

[0103] This application does not specifically limit the coefficient of thermal expansion of the first film layer 201 and the second film layer 202; optionally, the overall coefficient of thermal expansion of the first film layer 201 and the second film layer 202 can be 5×10. -6 / K~6×10 -6 For example, the overall coefficient of thermal expansion of the first film layer 201 and the second film layer 202 can be 5 × 10⁻⁶. -6 / K, 5.1×10 -6 / K, 5.2×10 -6 / K, 5.3×10 -6 / K, 5.4×10 -6 / K, 5.5×10 -6 / K, 5.6×10 -6 / K, 5.7×10 -6 / K, 5.8×10 -6 / K, 5.9×10 -6 / K or 6.0×10 -6 / K etc.

[0104] This application does not specifically limit the thickness of the second film layer 202; in one embodiment, the thickness of the second film layer 202 is 0.1nm to 100μm, for example, the thickness of the second film layer 202 can be 0.1nm, 5nm, 10nm, 20nm, 50nm, 70nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 800nm, 900nm, 1000nm, 5μm or 10μm, etc.

[0105] In a preferred embodiment, the thickness of the second film layer 202 can be 10 nm to 10 μm. In a more preferred embodiment, the thickness of the second film layer 202 can be 5 nm to 1000 nm. For example, the thickness of the second film layer 202 can be 5 nm, 100 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, or 1000 nm, etc.

[0106] In one embodiment, the total thickness of the first film layer 201 and the second film layer 202 can be 1 nm to 5 μm. For example, the total thickness of the first film layer 201 and the second film layer 202 can be 1 nm, 5 nm, 10 nm, 20 nm, 50 nm, 70 nm, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 800 nm, 900 nm, 1 μm, 3 μm, or 5 μm, etc.

[0107] In a preferred embodiment, the total thickness of the first film layer 201 and the second film layer 202 can be 5nm to 3000nm. In a more preferred embodiment, the total thickness of the first film layer 201 and the second film layer 202 can be 10nm to 1000nm. For example, the total thickness of the first film layer 201 and the second film layer 202 can be 10nm, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, or 1000nm, etc.

[0108] It should be noted that the overall thickness of the first film layer 201 and the second film layer 202 should be as thin as possible. The thermal expansion coefficient of the first film layer 201 and the second film layer 202 as a whole can be adjusted to be close to that of the gallium nitride substrate 10.

[0109] This application does not specifically limit the structure and material of the second film layer 202; in one embodiment, the second film layer 202 may include, but is not limited to, an aluminum oxide layer or a metal layer.

[0110] In one embodiment, the second film layer 202 includes a metal layer. Specifically, the metal layer may be a stacked structure composed of any one or more of the following: copper (Cu), aluminum (Al), iron (Fe), zinc (Zn), lead (Pb), magnesium (Mg), tin (Sn), gold (Au), silver (Ag), chromium (Cr), nickel (Ni), cobalt (Co), titanium (Ti), and palladium (Pd); that is, the material of the metal layer may be any one or more of the following: copper, aluminum, iron, zinc, lead, magnesium, tin, gold, silver, chromium, nickel, cobalt, titanium, and palladium. The metal layer may be a single-layer film composed of any one of the above metals, a single-layer film composed of an alloy of any of the above metals, a stacked structure composed of any of the above metals, or a stacked structure composed of an alloy of any of the above metals.

[0111] In one embodiment, the second film layer 202 includes an alumina layer. Preparing an alumina layer as the second film layer 202 facilitates subsequent fabrication of devices and / or chips.

[0112] Based on the same inventive concept, this application also provides a method for preparing a semiconductor structure.

[0113] Please see Figure 5 In one embodiment, the method for fabricating the semiconductor structure may specifically include the following steps:

[0114] S1: The substrate structure is prepared using the low warpage substrate structure preparation method provided in any of the foregoing embodiments.

[0115] S2: Epitaxial growth is performed on the substrate structure to form a semiconductor structure.

[0116] The semiconductor structure fabrication method provided in the above embodiments includes the step of fabricating a substrate structure using the low warpage substrate structure fabrication method provided in the foregoing embodiments. Therefore, the technical effects that the low warpage substrate structure fabrication method provided in the foregoing embodiments can achieve can also be achieved by this semiconductor structure fabrication method, and will not be described in detail here.

[0117] Based on the same inventive concept, this application also provides a semiconductor structure. This semiconductor structure is prepared using the method described in any of the foregoing embodiments.

[0118] The semiconductor structure provided in the above embodiments is prepared by the semiconductor structure preparation method provided in the foregoing embodiments. Therefore, the semiconductor structure can also achieve the technical effects that the semiconductor structure preparation method provided in the foregoing embodiments can achieve, and will not be described in detail here.

[0119] It is understood that the semiconductor structure involved in this application may include, but is not limited to, gallium nitride layers or gallium nitride devices; for example, it may include gallium nitride-based light-emitting diode (LED) devices.

[0120] It should be understood that, although Figure 1 and Figure 5 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1 and Figure 5At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0121] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0122] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for fabricating a low-warpage substrate structure, characterized in that, include: A gallium nitride substrate is provided, wherein the internal stress formed by dislocations during the growth of the gallium nitride substrate causes the gallium nitride substrate to warp and form a bowl-shaped concavity; A first film layer is formed on the back side of the gallium nitride substrate, wherein the tensile stress direction of the first film layer is opposite to the internal stress direction of the gallium nitride substrate, and the coefficient of thermal expansion of the first film layer is smaller than the coefficient of thermal expansion of the gallium nitride substrate. A second film layer is formed on the surface of the first film layer away from the gallium nitride substrate. The coefficient of thermal expansion of the second film layer is greater than that of the gallium nitride substrate, so that the coefficient of thermal expansion of the first film layer and the second film layer as a whole is similar to that of the gallium nitride substrate, thereby ensuring that the prepared substrate structure is not affected by temperature in subsequent process steps.

2. The method according to claim 1, characterized in that, The first film layer is formed on the back side of the gallium nitride substrate using a chemical vapor deposition process; The growth conditions for forming the first film layer on the back side of the gallium nitride substrate include: The growth pressure is 1 mTorr to 10 mTorr, the growth power is 10 W to 100 W, and the growth temperature is 100℃ to 400℃.

3. The method according to claim 2, characterized in that, The first film layer includes at least one of zinc nitride, aluminum nitride, aluminum oxide, silicon carbide, gallium arsenide, zinc oxide, silicon oxide, and silicon nitride.

4. The method according to claim 3, characterized in that, The first film layer includes a silicon nitride layer; the reaction gas for forming the first film layer on the back side of the gallium nitride substrate includes at least silane and ammonia; wherein the flow rate of the silane is 1 sccm to 30 sccm, and the flow rate of the ammonia is 50 sccm to 150 sccm.

5. The method according to claim 2, characterized in that, The second film layer is formed on the surface of the first film layer away from the gallium nitride substrate using a vapor deposition process; The growth conditions for forming the second film layer on the surface of the first film layer away from the gallium nitride substrate include: The growth pressure is 0.001 mTorr to 0.008 mTorr, and the growth power is 100 W to 300 W.

6. The method according to claim 5, characterized in that, The second film layer includes an aluminum oxide layer or a metal layer.

7. A low-warpage substrate structure, characterized in that, The substrate structure is prepared using the method for preparing a low-warpage substrate structure as described in any one of claims 1 to 6, wherein the substrate structure comprises: Gallium nitride substrate, wherein the internal stress formed by dislocations during the growth of the gallium nitride substrate causes the gallium nitride substrate to warp and form a bowl-shaped concavity; A first film layer is located on the back side of the gallium nitride substrate. The tensile stress direction of the first film layer is opposite to the internal stress direction of the gallium nitride substrate. The coefficient of thermal expansion of the first film layer is smaller than that of the gallium nitride substrate. The second film layer is located on the surface of the first film layer away from the gallium nitride substrate. The coefficient of thermal expansion of the second film layer is greater than that of the gallium nitride substrate, so that the coefficient of thermal expansion of the first film layer and the second film layer as a whole is similar to that of the gallium nitride substrate, thereby ensuring that the prepared substrate structure is not affected by temperature in subsequent process steps.

8. The substrate structure according to claim 7, characterized in that, The first film layer includes at least one of zinc nitride, aluminum nitride, aluminum oxide, silicon carbide, gallium arsenide, zinc oxide, silicon oxide, and silicon nitride; the second film layer includes an aluminum oxide layer or a metal layer.

9. The substrate structure according to claim 7, characterized in that, The total thickness of the first film layer and the second film layer is 0.1 nm to 5 μm.

10. The substrate structure according to claim 7, characterized in that, The overall coefficient of thermal expansion of the first film layer and the second film layer is / K~ / K.

11. A method for fabricating a semiconductor structure, characterized in that, include: The substrate structure is prepared using the method for preparing a low-warpage substrate structure as described in any one of claims 1 to 6; The semiconductor structure is formed on the surface of the substrate structure.

12. A semiconductor structure, characterized in that, The semiconductor structure is prepared by the semiconductor structure preparation method as described in claim 11.

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