Leakage current blocking circuit and leakage current blocking method of decoupling capacitor

Abstract

The present invention discloses a leakage current blocking circuit and a leakage current blocking method of a decoupling capacitor. The first end of the decoupling capacitor is coupled to a power supply voltage, and the leakage current blocking circuit is coupled between the second end of the decoupling capacitor and a ground voltage, and includes at least one switch. The at least one switch is used to provide a channel to allow the decoupling capacitor to couple to the ground voltage when the decoupling capacitor is not damaged, and when the decoupling capacitor is damaged, the at least one switch is closed to block the leakage current of the decoupling capacitor.

Description

Technical Field

[0001] The present invention relates to a leakage current blocking circuit and a leakage current blocking method, and in particular to a leakage current blocking circuit and a leakage current blocking method of a decoupling capacitor. Background Art

[0002] A decoupling capacitor is a capacitor installed at the power supply terminal of a component in a circuit, and is usually implemented using a metal oxide semiconductor field effect transistor (MOSFET). However, when a decoupling capacitor is damaged and generates leakage current, additional power loss will be increased. Therefore, how to provide a leakage current blocking circuit and leakage current blocking method for a decoupling capacitor has become an important topic in the art. Summary of the invention

[0003] In view of this, an embodiment of the present invention provides a leakage current blocking circuit of a decoupling capacitor. The first end of the decoupling capacitor is coupled to a power supply voltage, and the leakage current blocking circuit is coupled between the second end of the decoupling capacitor and a ground voltage, and includes at least one switch. The at least one switch is used to provide a channel to allow the decoupling capacitor to couple to the ground voltage when the decoupling capacitor is not damaged, and when the decoupling capacitor is damaged, the at least one switch is closed to block the leakage current of the decoupling capacitor.

[0004] In addition, an embodiment of the present invention provides a leakage current blocking method for a decoupling capacitor. The first end of the decoupling capacitor is coupled to a power supply voltage, and the leakage current blocking method includes the following steps. First, a leakage current blocking circuit is provided, coupled between the second end of the decoupling capacitor and a ground voltage. When the decoupling capacitor is not damaged, at least one switch of the leakage current blocking circuit is used to provide a channel to allow the decoupling capacitor to couple to the ground voltage. When the decoupling capacitor is damaged, the at least one switch is closed to block the leakage current of the decoupling capacitor.

[0005] To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and description and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 It is a block diagram of a leakage current blocking circuit provided by an embodiment of the present invention.

[0007] Figure 2 yes Figure 1 Circuit diagram of a leakage current blocking circuit.

[0008] Figure 3 It is a flow chart of the steps of the leakage current blocking method provided by an embodiment of the present invention.

[0009] Explanation of symbols

[0010] 1: Decoupling capacitor

[0011] 2: Leakage current blocking circuit

[0012] 21: The first N-type metal oxide semiconductor field effect transistor

[0013] 22: Second N-channel depletion metal oxide semiconductor field effect transistor

[0014] 23: Inverter

[0015] 24: Capacitor

[0016] 25: Third N-channel depletion metal oxide semiconductor field effect transistor

[0017] VDD: power supply voltage

[0018] GND: Ground voltage

[0019] 3: Internal application circuit

[0020] P1: First Node

[0021] P2: Second Node

[0022] I1: First current

[0023] I2: Second current

[0024] S310~S320:Process steps DETAILED DESCRIPTION

[0025] The following is an explanation of the implementation of the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the content provided in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual dimensions. It is stated in advance. The following implementations will further explain the relevant technical content of the present invention in detail, but the content provided is not intended to limit the scope of protection of the present invention.

[0026] It should be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are mainly used to distinguish one component from another component, or one signal from another signal. In addition, the term "or" used herein may include any one or more combinations of the associated listed items depending on the actual situation.

[0027] See also Figure 1 , Figure 1 is a block diagram of a leakage current blocking circuit provided by an embodiment of the present invention. Figure 1 As shown, the first end of the decoupling capacitor 1 is coupled to the power supply voltage VDD, and the leakage current blocking circuit 2 is coupled between the second end of the decoupling capacitor 1 and the ground voltage GND. In addition, the present embodiment may also include an internal application circuit 3 coupled between the first end of the decoupling capacitor 1 and the ground voltage GND, but the present invention does not limit the specific implementation of the internal application circuit 3, and technicians in this technical field should be able to design the internal application circuit 3 according to actual needs or applications.

[0028] The present invention does not limit the specific implementation of the leakage current blocking circuit 2. In summary, the leakage current blocking circuit 2 may include at least one switch ( Figure 1 The at least one switch is used to provide a channel for coupling the decoupling capacitor 1 to the ground voltage GND when the decoupling capacitor 1 is not damaged, and when the decoupling capacitor 1 is damaged, the at least one switch is closed to block the leakage current of the decoupling capacitor 1. In order to explain the operation of the at least one switch in detail, the present invention further provides an implementation of the leakage current blocking circuit 2. Please refer to Figure 2 , Figure 2 yes Figure 1 A circuit diagram of a leakage current blocking circuit 2.

[0029] like Figure 2 As shown, the at least one switch may be a first N-type metal oxide semiconductor field effect transistor 21. The drain of the first N-type metal oxide semiconductor field effect transistor 21 is coupled to the second end of the decoupling capacitor 1, and the source of the first N-type metal oxide semiconductor field effect transistor 21 is coupled to the ground voltage GND. In other words, when the first N-type metal oxide semiconductor field effect transistor 21 is turned on, a channel is formed between the drain and the source of the first N-type metal oxide semiconductor field effect transistor 21 to allow the decoupling capacitor 1 to be coupled to the ground voltage GND, and this embodiment uses the control of the gate voltage of the first N-type metal oxide semiconductor field effect transistor 21 to turn on or off the first N-type metal oxide semiconductor field effect transistor 21.

[0030] In order to automatically control the gate voltage of the first N-type metal oxide semiconductor field effect transistor 21 when the decoupling capacitor 1 is not damaged, so as to turn on the first N-type metal oxide semiconductor field effect transistor 21 to couple the decoupling capacitor 1 to the ground voltage GND, Figure 2The leakage current blocking circuit 2 may further include a second N-channel depletion type metal oxide semiconductor field effect transistor 22, an inverter 23, a capacitor 24 and a third N-channel depletion type metal oxide semiconductor field effect transistor 25. The drain of the second N-channel depletion type metal oxide semiconductor field effect transistor 22 and the drain of the first N-type metal oxide semiconductor field effect transistor 21 are commonly coupled to the second end of the decoupling capacitor 1 through the first node P1, and the source of the second N-channel depletion type metal oxide semiconductor field effect transistor 22 and the gate of the second N-channel depletion type metal oxide semiconductor field effect transistor 22 are commonly coupled to the second node P2.

[0031] The input terminal of the inverter 23 is coupled to the second node P2, and the output terminal of the inverter 23 is coupled to the gate of the first N-type metal oxide semiconductor field effect transistor 21. In addition, the first terminal of the capacitor 24 is coupled to the second node P2, and the second terminal of the capacitor 24 is coupled to the ground voltage GND. The drain of the third N-channel depletion type metal oxide semiconductor field effect transistor 25 and the first terminal of the capacitor 24 are commonly coupled to the second node P2, and the source of the third N-channel depletion type metal oxide semiconductor field effect transistor 25 and the gate of the third N-channel depletion type metal oxide semiconductor field effect transistor 25 are commonly coupled to the ground voltage GND.

[0032] It can be seen that when the decoupling capacitor 1 is not damaged, the first current I1 to pass through the second N-type metal oxide semiconductor field effect transistor 22 will be smaller than the second current I2 to pass through the third N-type metal oxide semiconductor field effect transistor 25 because the DC current of the decoupling capacitor 1 is zero, and the inverter 23 will output a high voltage signal at the output end due to the input of a low voltage signal at the input end, so that the first N-type metal oxide semiconductor field effect transistor 21 is turned on to allow the decoupling capacitor 1 to be coupled to the ground voltage GND through the drain of the first N-type metal oxide semiconductor field effect transistor 21 and the source of the first N-type metal oxide semiconductor field effect transistor 21. In other words, the decoupling capacitor 1 is in a normal working state at this time.

[0033] In contrast, when the decoupling capacitor 1 is damaged, the first current I1 to be passed through the second N-channel depletion type metal oxide semiconductor field effect transistor 22 will be greater than the second current I2 to be passed through the third N-channel depletion type metal oxide semiconductor field effect transistor 25, and the inverter 23 will output a low voltage signal at the output end due to the input of a high voltage signal at the input end, so that the first N-type metal oxide semiconductor field effect transistor 21 is turned off to block the leakage current of the decoupling capacitor 1. In other words, when the decoupling capacitor 1 is damaged, the path connecting the decoupling capacitor 1 to the ground voltage GND will be blocked by the first N-type metal oxide semiconductor field effect transistor 21. It should be noted that Figure 1The leakage current blocking circuit 2 is implemented by using the first N-type metal oxide semiconductor field effect transistor 21, the second N-channel depletion metal oxide semiconductor field effect transistor 22, the inverter 23, the capacitor 24 and the third N-channel depletion metal oxide semiconductor field effect transistor 25 for example only and is not intended to limit the present invention.

[0034] Finally, please also refer to Figure 3 , Figure 3 1 is a flow chart of the steps of the leakage current blocking method provided by an embodiment of the present invention. Figure 3 As shown, in step S310, the present embodiment provides a leakage current blocking circuit 2, which is coupled between the second end of the decoupling capacitor 1 and the ground voltage GND. Therefore, when the decoupling capacitor 1 is not damaged, at least one switch of the leakage current blocking circuit 2, such as Figure 2 The first N-type metal oxide semiconductor field effect transistor 21 is used to provide a channel to couple the decoupling capacitor 1 to the ground voltage GND. Then, in step S320, when the decoupling capacitor 1 is damaged, the at least one switch is turned off to block the leakage current of the decoupling capacitor 1. Since the details have been described in the above content, they will not be repeated here.

[0035] In summary, when the decoupling capacitor is not damaged, the decoupling capacitor will be coupled to the ground voltage through at least one switch of the leakage current blocking circuit, such as an N-type metal oxide semiconductor field effect transistor, and when the decoupling capacitor is damaged, the path of the decoupling capacitor connecting to the ground voltage will be blocked by the at least one switch. In other words, the leakage current of the decoupling capacitor will be blocked by the at least one switch. Therefore, the leakage current blocking circuit and the leakage current blocking method of the embodiment of the present invention can effectively avoid the shortening of the life of the component due to the temperature rise caused by the heat generated by the leakage current, and avoid additional power loss.

[0036] The contents provided above are only preferred feasible embodiments of the present invention, and are not intended to limit the claims of the present invention. Therefore, all equivalent technical changes made using the contents of the present invention's specification and drawings are included in the claims of the present invention.

Claims

1. A leakage current blocking circuit of a decoupling capacitor, wherein a first terminal of the decoupling capacitor is coupled to a power supply voltage, and the leakage current blocking circuit is coupled between a second terminal of the decoupling capacitor and a ground voltage, and the leakage current blocking circuit comprises: at least one switch, used for providing a channel for coupling the decoupling capacitor to the ground voltage when the decoupling capacitor is not damaged, and when the decoupling capacitor is damaged, the at least one switch is closed to block the leakage current of the decoupling capacitor, wherein the at least one switch is a first N-type metal oxide semiconductor field effect transistor, the drain of the first N-type metal oxide semiconductor field effect transistor is coupled to the second end of the decoupling capacitor, and the source of the first N-type metal oxide semiconductor field effect transistor is coupled to the ground voltage, The leakage current blocking circuit further comprises: a second N-channel depletion metal oxide semiconductor field effect transistor, wherein a drain of the second N-channel depletion metal oxide semiconductor field effect transistor and the drain of the first N-type metal oxide semiconductor field effect transistor are commonly coupled to the second end of the decoupling capacitor via a first node, and a source of the second N-channel depletion metal oxide semiconductor field effect transistor and a gate of the second N-channel depletion metal oxide semiconductor field effect transistor are commonly coupled to a second node; and An inverter has an input terminal coupled to the second node and an output terminal coupled to the gate of the first N-type metal oxide semiconductor field effect transistor.

2. The leakage current blocking circuit according to claim 1, further comprising: a capacitor, a first terminal of the capacitor is coupled to the second node, and a second terminal of the capacitor is coupled to the ground voltage; as well as a third N-channel depletion metal oxide semiconductor field effect transistor, wherein a drain of the third N-channel depletion metal oxide semiconductor field effect transistor and the first end of the capacitor are commonly coupled to the second node, and a source of the third N-channel depletion metal oxide semiconductor field effect transistor and a gate of the third N-channel depletion metal oxide semiconductor field effect transistor are commonly coupled to the ground voltage.

3. The leakage current blocking circuit as described in claim 2, wherein when the decoupling capacitor is not damaged, the first current to be passed through the second N-channel depletion-type metal oxide semiconductor field effect transistor will be smaller than the second current to be passed through the third N-channel depletion-type metal oxide semiconductor field effect transistor, and the inverter will output a high voltage signal at the output end due to the input of a low voltage signal at the input end, so that the first N-type metal oxide semiconductor field effect transistor is turned on to allow the decoupling capacitor to be coupled to the ground voltage through the drain of the first N-type metal oxide semiconductor field effect transistor and the source of the first N-type metal oxide semiconductor field effect transistor.

4. The leakage current blocking circuit as described in claim 2, wherein when the decoupling capacitor is damaged, the first current to be passed through the second N-channel depletion-type metal oxide semiconductor field effect transistor will be greater than the second current to be passed through the third N-channel depletion-type metal oxide semiconductor field effect transistor, and the inverter will output a low voltage signal at the output end due to the high voltage signal input to the input end, thereby turning off the first N-type metal oxide semiconductor field effect transistor to block the leakage current of the decoupling capacitor.

5. A method for blocking leakage current of a decoupling capacitor, wherein a first terminal of the decoupling capacitor is coupled to a power supply voltage, and the method for blocking leakage current comprises: Providing a leakage current blocking circuit coupled between a second end of the decoupling capacitor and a ground voltage, wherein when the decoupling capacitor is not damaged, at least one switch of the leakage current blocking circuit is used to provide a channel to allow the decoupling capacitor to be coupled to the ground voltage; and When the decoupling capacitor is damaged, the at least one switch is closed to block the leakage current of the decoupling capacitor, wherein the at least one switch is a first N-type metal oxide semiconductor field effect transistor, the drain of the first N-type metal oxide semiconductor field effect transistor is coupled to the second end of the decoupling capacitor, and the source of the first N-type metal oxide semiconductor field effect transistor is coupled to the ground voltage, The leakage current blocking circuit further comprises: a second N-channel depletion metal oxide semiconductor field effect transistor, wherein a drain of the second N-channel depletion metal oxide semiconductor field effect transistor and the drain of the first N-type metal oxide semiconductor field effect transistor are commonly coupled to the second end of the decoupling capacitor via a first node, and a source of the second N-channel depletion metal oxide semiconductor field effect transistor and a gate of the second N-channel depletion metal oxide semiconductor field effect transistor are commonly coupled to a second node; and An inverter has an input terminal coupled to the second node and an output terminal coupled to the gate of the first N-type metal oxide semiconductor field effect transistor.

6. The leakage current blocking method as claimed in claim 5, wherein the leakage current blocking circuit further comprises: a capacitor, a first terminal of the capacitor is coupled to the second node, and a second terminal of the capacitor is coupled to the ground voltage; as well as a third N-channel depletion metal oxide semiconductor field effect transistor, wherein a drain of the third N-channel depletion metal oxide semiconductor field effect transistor and the first end of the capacitor are commonly coupled to the second node, and a source of the third N-channel depletion metal oxide semiconductor field effect transistor and a gate of the third N-channel depletion metal oxide semiconductor field effect transistor are commonly coupled to the ground voltage.

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