Photodetector, solid-state imaging device, and distance measurement device

Abstract

The optical detector includes a plurality of pixels (101) and a common reset line (104) connected to the plurality of pixels (101). Each of the plurality of pixels (101) includes: an avalanche photodiode (102); a quenching transistor (112) whose gate and source are connected to the cathode of the avalanche photodiode (102); and a photodiode reset transistor (103) one of whose source and drain is connected to the drain of the quenching transistor (112) and the other of whose source and drain is connected to the common reset line (104).

Description

Technical Field

[0001] The present invention relates to a photodetector, a solid-state imaging device, and a distance measurement device. Background Art

[0002] Conventionally, a photodetector using an avalanche photodiode has been known (for example, refer to Patent Document 1).

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: International Publication No. 2018 / 216400 Summary of the Invention

[0006] Problems to be Solved by the Invention

[0007] An object of the present disclosure is to provide a photodetector or the like that can accurately reset the potential of the cathode of an avalanche photodiode.

[0008] Means for Solving the Problems

[0009] A photodetector according to an aspect of the present disclosure includes: a plurality of pixels; and a common reset line connected to the plurality of pixels. Each of the plurality of pixels includes: an avalanche photodiode; a quenching transistor whose gate and source are connected to the cathode of the avalanche photodiode; and a photodiode reset transistor, one of the source and drain of which is connected to the drain of the quenching transistor, and the other of the source and drain of which is connected to the common reset line.

[0010] A solid-state imaging device according to an aspect of the present disclosure is a solid-state imaging device including the above photodetector, and includes: a pixel array formed by arranging the plurality of pixels in a matrix; a column circuit that reads signals from the plurality of pixels in row units; a vertical transfer circuit that selects a row that is an object of signal reading by the column circuit; an all-pixel drive driver that drives signal lines common to all of the plurality of pixels; a horizontal transfer circuit that transfers the signals read by the column circuit; and an output amplifier that outputs the signals transferred by the horizontal transfer circuit to the outside.

[0011] A distance measurement device according to an aspect of the present disclosure includes: a light source that emits light to irradiate a subject; the above solid-state imaging device that receives reflected light obtained by reflecting the light emitted from the light source by the subject; and a signal processing device that calculates the distance to the subject based on the signal output from the solid-state imaging device.

[0012] Advantages of the Invention

[0013] According to the present disclosure, the potential of the cathode of the avalanche photodiode can be reset with high precision. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 FIG. is a circuit diagram showing the configuration of a pixel included in the photodetector according to Embodiment 1.

[0015] Figure 2 FIG. is a sequence diagram showing an example of the operation performed by the photodetector according to Embodiment 1.

[0016] Figure 3 FIG. is a circuit diagram showing the configuration of a pixel included in the photodetector according to Embodiment 2.

[0017] Figure 4 FIG. is a sequence diagram showing an example of the operation performed by the photodetector according to Embodiment 2.

[0018] Figure 5 FIG. is a circuit diagram showing the configuration of a pixel included in the photodetector according to Embodiment 3.

[0019] Figure 6 FIG. is a circuit diagram showing the configuration of a pixel included in the photodetector according to Embodiment 4.

[0020] Figure 7 FIG. is a block diagram showing the configuration of the distance measurement device according to Embodiment 5.

[0021] Figure 8 FIG. is a sequence diagram (Part 1) showing an example of the operation of capturing a sub-range image performed by the distance measurement device according to Embodiment 5.

[0022] Figure 9 FIG. is a sequence diagram (Part 2) showing an example of the operation of capturing a sub-range image performed by the distance measurement device according to Embodiment 5.

[0023] Figure 10 FIG. is a circuit diagram showing the configuration of a pixel included in the photodetector according to the comparative example. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] (Process of obtaining one technical solution of the present disclosure)

[0025] In the past, regarding optical detectors, efforts were focused on capturing images with high sensitivity and high precision. However, in recent years, there have also emerged optical detectors that, in addition to this, have the function of being able to obtain distance information from the optical detector. If distance information is added to an image, three-dimensional information about the photographed object of the optical detector can be perceived. For example, when photographing a person, the movement (pose) can be detected three-dimensionally, so it can be used as an input device for various machines. If further exemplified, when mounted on a car, the distance to objects, people, etc. existing around the vehicle can be recognized, so it can be applied to collision prevention and autonomous driving, etc.

[0026] Among many methods used for distance measurement from an optical detector to an object, there is the TOF (Time Of Flight) method. This TOF method measures the time from when light is irradiated from near the optical detector towards the object until it is reflected by the object and returns to the optical detector. According to this method, if the light source is made stronger, the distance to a distant object can be measured with high resolution.

[0027] In order to measure the distance to a distant object, the optical detector needs to have high sensitivity capable of detecting weak reflected light from the object. Furthermore, it is also necessary to be able to detect the timing at which the reflected light reaches the optical detector. To meet these two requirements, for example, an optical detector equipped with an avalanche photodiode having the following-described configuration can be considered.

[0028] Figure 10 It is a circuit diagram showing the configuration of pixel 501 included in the optical detector of the comparative example.

[0029] As Figure 10 shown, the optical detector of the comparative example, in addition to a plurality of pixels 501, also includes a common reset line 504 connected to the plurality of pixels 501, and a readout line 512 connected to the plurality of pixels 501.

[0030] The common reset line 504 is a signal line for applying a reset potential to the cathode of the avalanche photodiode 502 (described later) included in the connected pixel 501, and is connected to a power supply that supplies the reset potential.

[0031] The readout line 512 is a signal line for reading out, to the outside of pixel 501, a signal corresponding to the charge accumulated in the charge accumulation section 505 (described later) included in the connected pixel 501.

[0032] Pixel 501 is composed of an avalanche photodiode 502, a photodiode reset transistor 503, a charge accumulation section 505, a transfer gate transistor 508, a reset transistor 509, an amplification transistor 510, and a selection transistor 511.

[0033] An avalanche photodiode 502 is a photodiode that uses a phenomenon called avalanche multiplication to increase the light reception sensitivity. When there is incident light, the avalanche photodiode 502 multiplies the generated electrons even for weak light, generating a large voltage amplitude at the cathode.

[0034] A photodiode reset transistor 503 is a transistor used to set the cathode of the avalanche photodiode 502 to the reset potential. One of the source and drain of the photodiode reset transistor 503 is connected to the cathode of the avalanche photodiode 502, and the other of the source and drain of the photodiode reset transistor 503 is connected to the common reset line 504. By setting the photodiode reset transistor 503 to the on state, the cathode of the avalanche photodiode 502 can be set to the reset potential.

[0035] The charge storage unit 505 stores the charges generated by the avalanche photodiode 502. The charge storage unit 505 has a capacitance on the order of fF in parallel.

[0036] A transfer gate transistor 508 is a transistor used to transfer the charges generated by the avalanche photodiode 502 to the charge storage unit 505. One of the source and drain of the transfer gate transistor 508 is connected to the cathode of the avalanche photodiode 502, and the other of the source and drain of the transfer gate transistor 508 is connected to the charge storage unit 505. By setting the transfer gate transistor 508 to the on state, the charges generated by the avalanche photodiode 502 can be transferred to the charge storage unit 505.

[0037] A reset transistor 509 is a transistor used to set the charge storage unit 505 to the reset potential. One of the source and drain of the reset transistor 509 is connected to the charge storage unit 505. The other of the source and drain of the reset transistor 509 can be connected to the common reset line 504, or can be connected to a signal line connected to another power supply that supplies the reset potential. By setting the reset transistor 509 to the on state, the charge storage unit 505 can be set to the reset potential.

[0038] An amplification transistor 510 is a transistor used to output a signal corresponding to the potential of the charge storage unit 505 to a selection transistor 511. The gate of the amplification transistor 510 is connected to the charge storage unit 505.

[0039] A selection transistor 511 is a transistor used to output the signal output by the amplification transistor 510 to the readout line 512. One of the source and drain of the selection transistor 511 is connected to one of the source and drain of the amplification transistor, and the other of the source and drain of the selection transistor 511 is connected to the readout line 512. By setting the selection transistor 511 to the on state, the signal output by the amplification transistor 510 can be output to the readout line 512.

[0040] The inventors found that there are the following problems in the photodetector of the comparative example configured as described above.

[0041] When the photodetector of the comparative example configured as described above is applied to a distance measurement device that measures the distance to a subject using the TOF method, it is necessary to simultaneously turn on the photodiode reset transistors 503 of all the pixels 501 immediately before the exposure timing, and set the cathodes of the avalanche photodiodes 502 of all the pixels 501 to the reset potential. During the period when the cathodes of the avalanche photodiodes 502 of all the pixels 501 are set to the reset potential, that is, during the period when the photodiode reset transistors 503 of all the pixels 501 are turned on, if avalanche multiplication occurs in the avalanche photodiode 502 of a certain pixel 501, the multiplied charge reaches the cathode of the avalanche photodiode 502 of an adjacent pixel 501 via the common reset line 504. Therefore, an abnormal condition occurs in which the cathode of the avalanche photodiode 502 of the adjacent pixel 501 cannot be correctly set to the reset potential. Hereinafter, the phenomenon of the above abnormal condition will be referred to as the "charge inflow problem to adjacent pixels".

[0042] Therefore, in order to correctly set the cathodes of the avalanche photodiodes 502 of other pixels 501 even when avalanche multiplication occurs in the avalanche photodiode 502 of a certain pixel 501 during the period when the cathodes of the avalanche photodiodes 502 of multiple pixels 501 are set to the reset potential, the inventors conducted special research, experiments, etc. And a photodetector and the like related to one technical solution of the present disclosure described below were conceived.

[0043] A photodetector according to one technical solution of the present disclosure includes: a plurality of pixels; and a common reset line connected to the plurality of pixels. Each of the plurality of pixels includes: an avalanche photodiode; a quenching transistor whose gate and source are connected to the cathode of the avalanche photodiode; and a photodiode reset transistor, one of the source and drain of the photodiode reset transistor is connected to the drain of the quenching transistor, and the other of the source and drain of the photodiode reset transistor is connected to the common reset line.

[0044] According to the photodetector configured as described above, even when avalanche multiplication occurs in the avalanche photodiode of a certain pixel during the period when the photodiode reset transistors of the plurality of pixels are turned on, the multiplied charge flowing into the common reset line can be suppressed by the quenching transistor. Therefore, according to the photodetector configured as described above, the potential of the cathode of the avalanche photodiode can be reset with high precision.

[0045] In addition, it is also possible that each of the above-mentioned multiple pixels further has: a charge storage section that stores the charge generated by the above-mentioned avalanche photodiode; and a transfer gate transistor, one of the source and drain of the transfer gate transistor is connected to the cathode of the above-mentioned avalanche photodiode, and the other of the source and drain of the transfer gate transistor is connected to the above-mentioned charge storage section.

[0046] Thereby, the charge generated by the avalanche photodiode can be stored in the charge storage section.

[0047] In addition, it is also possible that there is a readout line connected to the above-mentioned multiple pixels, and each of the above-mentioned multiple pixels further has: a reset transistor, one of the source and drain of the reset transistor is connected to the above-mentioned charge storage section; an amplification transistor, the gate of the amplification transistor is connected to the above-mentioned charge storage section; and a selection transistor, one of the source and drain of the selection transistor is connected to one of the source and drain of the above-mentioned amplification transistor, and the other of the source and drain of the selection transistor is connected to the above-mentioned readout line.

[0048] Thereby, a signal corresponding to the charge stored in the charge storage section can be read out to the outside of the pixel.

[0049] In addition, it is also possible that each of the above-mentioned multiple pixels further has between the cathode of the above-mentioned avalanche photodiode and the gate and the source of the above-mentioned quenching transistor: a charge storage section connected to the gate and the source of the above-mentioned quenching transistor and storing the charge generated by the above-mentioned avalanche photodiode; and a transfer gate transistor, one of the source and drain of the transfer gate transistor is connected to the cathode of the above-mentioned avalanche photodiode, and the other of the source and drain of the transfer gate transistor is connected to the above-mentioned charge storage section, and the cathode of the above-mentioned avalanche photodiode is connected to the gate and the source of the above-mentioned quenching transistor via the above-mentioned charge storage section and the above-mentioned transfer gate transistor.

[0050] Thereby, the charge generated by the avalanche photodiode can be stored in the charge storage section.

[0051] In addition, it is also possible that there is a readout line connected to the above-mentioned multiple pixels, and each of the above-mentioned multiple pixels further has: an amplification transistor, the gate of the amplification transistor is connected to the above-mentioned charge storage section; and a selection transistor, one of the source and drain of the selection transistor is connected to one of the source and drain of the above-mentioned amplification transistor, and the other of the source and drain of the selection transistor is connected to the above-mentioned readout line.

[0052] Thereby, a signal corresponding to the charge stored in the charge storage section can be read out to the outside of the pixel.

[0053] In addition, it is also possible that each of the above-mentioned multiple pixels further has: a counting transistor, one of the source and drain of the counting transistor being connected to the above-mentioned charge storage unit; and a counting capacitor, connected to the other of the source and drain of the counting transistor.

[0054] Thereby, the charge stored in the charge storage unit can be transferred to the counting capacitor.

[0055] In addition, it is also possible that when the potential of the cathode of the above-mentioned avalanche photodiode is the potential at which avalanche multiplication stops, the above-mentioned quenching transistor is in a weak inversion state.

[0056] Thereby, the amount of charge flowing between the avalanche photodiode and the common reset line can be made to be equal to or less than the amount of charge flowing through the quenching transistor in the weak inversion state.

[0057] In addition, it is also possible that when the above-mentioned photodiode reset transistor is in the conducting state, the time constant of the electrical circuit from the cathode of the above-mentioned avalanche photodiode to the above-mentioned common reset line is 100 ps or more.

[0058] Thereby, the amount of charge flowing between the avalanche photodiode and the common reset line can be made to be equal to or less than the amount of charge determined by a time constant of 100 ps or more.

[0059] A solid-state imaging device according to one aspect of the present disclosure is a solid-state imaging device including the above-mentioned light detector, and includes: a pixel array formed by arranging the above-mentioned multiple pixels in a matrix; a column circuit for reading signals from the above-mentioned multiple pixels in row units; a vertical transfer circuit for selecting a row to be the object of signal reading by the above-mentioned column circuit; an all-pixel drive driver for driving a signal line common to all of the above-mentioned multiple pixels; a horizontal transfer circuit for transferring the signal read by the above-mentioned column circuit; and an output amplifier for outputting the signal transferred by the above-mentioned horizontal transfer circuit to the outside.

[0060] In the solid-state imaging device configured as described above, even if avalanche multiplication occurs in the avalanche photodiode of a certain pixel during the period when the photodiode reset transistors of multiple pixels are set in the conducting state, the multiplication charge flowing into the common reset line can be suppressed by the quenching transistor. Therefore, in the solid-state imaging device configured as described above, the potential of the cathode of the avalanche photodiode can be reset with high precision.

[0061] A distance measurement device according to one aspect of the present disclosure includes: a light source that emits light for irradiating a subject; the above-mentioned solid-state imaging device that receives reflected light obtained by the subject reflecting the light emitted from the above-mentioned light source; and a signal processing device that calculates the distance to the above-mentioned subject based on the signal output from the above-mentioned solid-state imaging device.

[0062] In the distance measuring device configured as described above, even if avalanche multiplication occurs in the avalanche photodiode of a certain pixel during the period when the photodiode reset transistors of multiple pixels are set to the conducting state, the multiplication charge flowing into the common reset line can be suppressed by the quenching transistor. Therefore, in the distance measuring device configured as described above, the potential of the cathode of the avalanche photodiode can be reset with high precision.

[0063] Hereinafter, a specific example of a photodetector and the like according to one aspect of the present disclosure will be described with reference to the drawings. In addition, all the embodiments described below represent inclusive or specific examples. The numerical values, shapes, materials, constituent elements, arrangement positions of the constituent elements, connection forms, etc. shown in the following embodiments are examples and do not limit the meaning of the present disclosure.

[0064] In addition, each drawing is a schematic diagram and is not necessarily strictly illustrated. In addition, in each drawing, the same reference numerals are given to substantially the same configurations, and there are cases where repeated descriptions are omitted or simplified.

[0065] (Embodiment 1)

[0066] Figure 1 It is a circuit diagram showing the configuration of the photodetector according to Embodiment 1.

[0067] As Figure 1 shown, the photodetector according to the embodiment further includes a common reset line 104 connected to a plurality of pixels 101 and a readout line 113 connected to a plurality of pixels 101 in addition to the plurality of pixels 101.

[0068] The common reset line 104 is a signal line for applying a reset potential to the cathode of the avalanche photodiode 102 (described later) included in the connected pixel 101, and is connected to a power supply for supplying the reset potential.

[0069] The readout line 113 is a signal line for reading out a signal corresponding to the charge accumulated in the charge accumulation unit 105 (described later) included in the connected pixel 101 to the outside of the pixel 101.

[0070] The pixel 101 includes an avalanche photodiode 102, a photodiode reset transistor 103, a charge accumulation unit 105, a transfer gate transistor 108, a reset transistor 109, an amplification transistor 110, a selection transistor 111, and a quenching transistor 112.

[0071] The pixels 101 are arranged in a matrix, for example.

[0072] An avalanche photodiode 102 is a photodiode that increases the light reception sensitivity by utilizing a phenomenon called avalanche multiplication. When there is incident light, the avalanche photodiode 102 multiplies the generated electrons even for weak light through avalanche multiplication, generating a large voltage amplitude at the cathode.

[0073] The photodiode reset transistor 103 is a transistor used to set the cathode of the avalanche photodiode 502 to the reset potential via the quenching transistor 112. One of the source and drain of the photodiode reset transistor 103 is connected to the drain of the quenching transistor, and the other of the source and drain of the photodiode reset transistor 103 is connected to the common reset line 104. By setting the photodiode reset transistor 103 to the conducting state, the cathode of the avalanche photodiode 102 can be set to the reset potential via the quenching transistor 112.

[0074] The charge storage unit 105 stores the charges generated by the avalanche photodiode 102. The charge storage unit 105 has a capacitance on the order of fF in parallel.

[0075] The transfer gate transistor 108 is a transistor used to transfer the charges generated by the avalanche photodiode 102 to the charge storage unit 105. One of the source and drain of the transfer gate transistor 108 is connected to the cathode of the avalanche photodiode 102, and the other of the source and drain of the transfer gate transistor 108 is connected to the charge storage unit 105. By setting the transfer gate transistor 108 to the conducting state, the charges generated by the avalanche photodiode 102 can be transferred to the charge storage unit 105.

[0076] The reset transistor 109 is a transistor used to set the charge storage unit 105 to the reset potential. One of the source and drain of the reset transistor 109 is connected to the charge storage unit 105. The other of the source and drain of the reset transistor 109 can be connected to the common reset line 104, or can be connected to a signal line connected to another power supply that supplies the reset potential. By setting the reset transistor 109 to the conducting state, the charge storage unit 105 can be set to the reset potential.

[0077] The amplifying transistor 110 is a transistor used to output a signal corresponding to the potential of the charge storage unit 105 to the selection transistor 111. The gate of the amplifying transistor 110 is connected to the charge storage unit 105.

[0078] The selection transistor 111 is a transistor for outputting the signal output from the amplification transistor 110 to the readout line 113. One of the source and drain of the selection transistor 111 is connected to one of the source and drain of the amplification transistor, and the other of the source and drain of the selection transistor 111 is connected to the readout line 113. By setting the selection transistor 111 to the conducting state, the signal output from the amplification transistor 110 can be output to the readout line 113.

[0079] The pixel 101 included in the photodetector according to the first embodiment is essentially different from the pixel 501 included in the photodetector according to the comparative example in that the pixel 101 includes the quenching transistor 112.

[0080] The gate and source of the quenching transistor 112 are connected to the cathode of the avalanche photodiode 102.

[0081] Electrons are generated at the cathode of the avalanche photodiode 102 instead of holes, so the potential of the cathode of the avalanche photodiode 102 does not become higher than the potential of the common reset line 104. Therefore, the source-drain current of the quenching transistor 112 is determined substantially by the threshold voltage of the quenching transistor 112.

[0082] In the photodetector according to the first embodiment, the pixel 101 includes the quenching transistor 112, thereby being able to solve the above-described problem of charge inflow to adjacent pixels. Hereinafter, the reason therefor will be described.

[0083] When the photodiode reset transistor 103 is in the conducting state, consider the time when the avalanche multiplication starts in the avalanche photodiode 102.

[0084] Although it varies depending on the size of the avalanche photodiode 102, the avalanche multiplication process generally continues on the order of 100 ps.

[0085] When insufficient current flows through the quenching transistor 112, the charges generated by the avalanche multiplication are accumulated in the PN junction portion inside the avalanche photodiode 102. And the charges applied to the PN junction portion by the accumulated charges are weakened, and if the final electric field becomes lower than the threshold for generating the avalanche multiplication, the avalanche multiplication process stops.

[0086] In contrast, when sufficient current flows through the quenching transistor 112, electrons generated by avalanche multiplication flow out from the avalanche photodiode reset transistor 103 and the quenching transistor 112 to the common reset line 104. Therefore, electrons do not accumulate on the N side of the PN junction portion in the avalanche photodiode 102, and the charge applied to the PN junction portion is not attenuated. Thus, the stop of the above-described avalanche multiplication process does not occur, and electrons continuously flow out from the cathode of the avalanche photodiode 102 to the common reset line 104 during the avalanche multiplication process. The outflow speed is such that it exceeds the charge discharge capacity of the common reset line 104, so the potential of the common reset line 104 drops. In other pixels 101 connected to the common reset line 104, electrons flow into the cathode of the avalanche photodiode 102 of the pixel 101 from the common reset line 104. Then, the photodiode reset transistor 103 becomes in the cut-off state and the reset period ends, but in this pixel 101, due to the inflow of the above electrons, the potential of the cathode of the avalanche photodiode 102 is not correctly reset.

[0087] In the pixel 101 configured as described above, the quenching transistor 112 is set to be in a weak inversion state when the potential of the cathode of the avalanche photodiode 102 is the potential at which avalanche multiplication stops. Then, when the photodiode reset transistor 103 is in the conducting state, even if avalanche multiplication starts in the avalanche photodiode 102, it takes a relatively long time for the charge generated by avalanche multiplication to flow out to the common reset line 104 via the photodiode reset transistor 103 and the quenching transistor 112. As described above, since the multiplication process of the avalanche photodiode 102 ends in the order of 100 ps, almost no charge flows out during this period. That is, it is possible to prevent the occurrence of the problem of charge inflow to adjacent pixels.

[0088] More specifically, as the setting of the quenching transistor 112, almost no current flows during the 100 ps of the avalanche multiplication process of the avalanche photodiode 102. That is, as long as the quenching transistor 112 is set such that when the photodiode reset transistor 103 is in the conducting state, the time constant of the electrical path from the cathode of the avalanche photodiode 102 to the common reset line 104 is 100 ps or more. For example, if the capacitance of the avalanche photodiode 102 is 10 fF, 10 fC of charge is required for the cathode of the avalanche photodiode 102 to change by 1 V. In order to supply this charge in 100 ps, a current of 100 μA is required. Therefore, as long as the quenching transistor 112 is set such that the current flowing when the gate-source voltage of the quenching transistor 112 is 0 V is 100 μA or less.

[0089] On the other hand, when the current flowing through the quenching transistor 112 is too small, conversely, the potential of the cathode of the avalanche photodiode 102 cannot be correctly reset. To correctly reset it, it is necessary to ensure that the reset period for performing the reset process is longer than the period of the avalanche multiplication process of the avalanche photodiode 102. On this basis, the quenching transistor 112 is set so that the potential of the cathode of the avalanche photodiode 102 can be correctly reset during the reset period. For example, assume that the reset period is 1 μs, the amplitude during avalanche multiplication of the avalanche photodiode 102 is 1 V, and the capacitance of the avalanche photodiode 102 is 10 fF. At this time, the quenching transistor 112 is set so that the current flowing when the gate-source voltage of the quenching transistor 112 is 0 V is 0.1 μA or more.

[0090] Hereinafter, the operation of the optical detector according to Embodiment 1 will be described.

[0091] Figure 2 It is a sequence diagram showing an example of the operation of the optical detector according to Embodiment 1.

[0092] As Figure 2 shown, during the global exposure period, the optical detector according to Embodiment 1 sets the signal line PRT connected to the gate of the photodiode reset transistor 103 to a high level for all pixels 101 at the same time, and starts the reset operation of the potential of the cathode of the avalanche photodiode 102 of all pixels 101. At this time, even if avalanche multiplication occurs in the avalanche photodiode 102 of a certain pixel 101, the electrons generated by this avalanche multiplication are restricted by the quenching transistor 112 of that pixel 101 from flowing out to the common reset line 104. Therefore, the inflow of electrons into the cathodes of the avalanche photodiodes 102 of adjacent pixels 101 is prevented. Then, the optical detector according to Embodiment 1 sets the signal line PRT to a low level for all pixels at the same time, and stops the reset operation.

[0093] Then, the optical detector according to Embodiment 1 sets the signal line TRN connected to the gate of the transfer gate transistor 108 to a high level for all pixels 101 at the same time to turn on the transfer gate transistors 108 of all pixels 101. Immediately after that, the multiplied charges generated by the avalanche photodiode 102 are transferred to the charge storage unit 105. Then, the optical detector according to Embodiment 1 sets the signal line TRN to a low level for all pixels at the same time. By making the period during which this signal line TRN is at a high level coincide with the exposure period, the desired exposure operation performed by the optical detector according to Embodiment 1 is achieved.

[0094] After the global exposure period, the photodetector according to Embodiment 1 reads out signals corresponding to the charges accumulated in the charge accumulation section 105 of each pixel 101 by a line-by-line feeding operation (rolling drive operation). In Figure 2 the readout operation of the k-th row is illustrated.

[0095] In the readout operation of each row, the photodetector according to Embodiment 1 sets the signal line SEL connected to the gate of the selection transistor 111 to a high level only for the pixels 101 of the target row at the same time, and sets the selection transistor 111 of the pixels 101 of that row to the conductive state. Then, a signal corresponding to the charge accumulated in the charge accumulation section 105 (this signal is referred to as the "first signal" for convenience) is output from the amplification transistor 110 to the readout line 113.

[0096] Then, the photodetector according to Embodiment 1 sets the signal line RST connected to the gate of the reset transistor 109 to a high level only for the pixels 101 of the target row at the same time, and sets the reset transistor 109 of the pixels 101 of that row to the conductive state. Then, the charge accumulated in the charge accumulation section 105 is discharged. Then, a signal corresponding to the potential of the charge accumulation section 105 in the state after the charge is discharged (this signal is referred to as the "second signal" for convenience) is output from the amplification transistor 110 to the readout line 113.

[0097] Then, the photodetector according to Embodiment 1 sets the signal line RST to a low level only for the pixels 101 of that row at the same time, and sets the signal line SEL to a low level only for the pixels 101 of that row at the same time. Here, the readout operation of each row ends.

[0098] Then, the photodetector according to Embodiment 1 or an external device can obtain information on whether avalanche multiplication has occurred in the avalanche photodiode 102 during the exposure period by performing CDS (Correlated Double Sampling) processing on the output first signal and second signal.

[0099] (Embodiment 2)

[0100] Figure 3 is a circuit diagram showing the configuration of the photodetector according to Embodiment 2. Hereinafter, regarding the photodetector according to Embodiment 2, for the constituent elements that are the same as those of the photodetector according to Embodiment 1, it is considered that they have been described and the same reference numerals are given, and their detailed descriptions are omitted, and the description will be centered on the differences from the photodetector according to Embodiment 1.

[0101] As Figure 3 shown, the photodetector according to Embodiment 2 is different from the photodetector according to Embodiment 1 in that the pixel 101 is changed to the pixel 201.

[0102] The pixel 201 is constituted by adding a counting transistor 206 and a counting capacitor 207 to the pixel 101.

[0103] The counting transistor 206 is a transistor for transferring the charge stored in the charge storage unit 105 to the counting capacitor 207. One of the source and the drain of the counting transistor 206 is connected to the charge storage unit 105. By setting the counting transistor 206 to the on state, the charge stored in the charge storage unit 105 can be transferred to the counting capacitor 207.

[0104] The counting capacitor 207 is connected to the other of the source and the drain of the counting transistor 206 and stores the charge transferred from the charge storage unit 105. The potential of the counting capacitor 207 becomes a potential corresponding to the number of times the charge is transferred from the charge storage unit 105.

[0105] For the same reasons as the photodetector of Embodiment 1, the photodetector of Embodiment 2 configured as described above can solve the problem of charge inflow to adjacent pixels.

[0106] Hereinafter, the operation of the photodetector of Embodiment 2 will be described.

[0107] Figure 4 It is a sequence diagram showing an example of the operation of the photodetector of Embodiment 2. The operation illustrated here is an example of the operation for detecting the distance to the subject using the TOF method. Here, it is assumed that the photodetector of Embodiment 2 includes a light source that emits light (light pulse) irradiated to the subject, and the operation will be described with multiple pixels 201 receiving the reflected light reflected by the subject from the light source.

[0108] As Figure 4 shown, the photodetector of Embodiment 2 emits a light pulse from the light source during the first pulse period, and sets the signal line PRT to a high level for all pixels 201 at the same time to start the reset operation of the potential of the cathode of the avalanche photodiode 102 of all pixels 201.

[0109] Next, at the timing corresponding to the start of the distance region to be measured by the photodetector according to Embodiment 2 (if the distance is d and the speed of light is c, then after 2d / c), the signal line PTR is set to a low level for all pixels 201 simultaneously to stop the reset operation, and the signal line TRN is set to a high level for all pixels 201 simultaneously to turn on the transfer gate transistors 108 of all pixels 201. Immediately after that, the multiplied charges generated by the avalanche photodiode 102 are transferred to the charge storage unit 105. Then, at the timing corresponding to the end of the distance region to be measured by the photodetector according to Embodiment 2, the signal line TRN is set to a low level for all pixels 201 simultaneously to end the transfer of the multiplied charges generated by the avalanche photodiode 102 to the charge storage unit 105.

[0110] Through this series of operations, only the multiplied charges brought by the reflected light reflected by the subject existing in the distance region to be measured are stored in the charge storage unit 105.

[0111] Then, the signal line CNT connected to the gates of the counting transistors 206 is set to a high level for all pixels 201 simultaneously to turn on the counting transistors 206 of all pixels 201. At this time, if there are multiplied charges stored in the charge storage unit 105, the multiplied charges are transferred to the counting capacitor 207, and the potential of the counting capacitor 207 drops. Here, the first pulse period ends.

[0112] Then, by repeatedly performing the same operations as those in the first pulse period, the photodetector according to Embodiment 2 can increase the probability of detecting the subject.

[0113] During each pulse period, if avalanche multiplication occurs in the avalanche photodiode 102 while the signal line TRN is at a high level, the multiplied charges are transferred to the counting capacitor 207, and the potential of the counting capacitor 207 changes. On the other hand, if avalanche multiplication does not occur, the potential of the counting capacitor 207 does not change. That is, the potential of the counting capacitor 207 is a potential corresponding one-to-one to the number of times avalanche multiplication has occurred.

[0114] After repeatedly performing the same operations as those in the first pulse period, the photodetector according to Embodiment 2 reads out signals corresponding to the charges stored in the counting capacitors 207 of each pixel 101 by a progressive feeding operation (rolling drive operation). In Figure 4 FIG., the readout operation of the k-th row is illustrated.

[0115] In the read operation of each row of the photodetector according to Embodiment 2, the signal line SEL connected to the gate of the selection transistor 111 is set to a high level only for the pixels 201 of the target row at the same time, and the selection transistor 111 of the pixels 201 of that row is set to the conducting state. Then, the signal line RST is set to a high level only for the pixels 201 of that row at the same time, and the reset transistor 109 of the pixels 201 of that row is set to the conducting state. Thus, the charge accumulated in the charge accumulation unit 105 is discharged.

[0116] Then, the signal line RST is set to a low level only for the pixels 201 of that row at the same time, and the reset transistor 109 of the pixels 201 of that row is set to the cut-off state. Thus, the second signal corresponding to the potential of the charge accumulation unit 105 in the state where the charge has been discharged is output from the amplification transistor 110 to the readout line 113.

[0117] Then, the signal line CNT is set to a high level only for the pixels 201 of that row at the same time, and the counting transistor 206 of the pixels 201 of that row is set to the conducting state. Thus, the charge accumulated in the counting capacitor 207 is transferred to the charge accumulation unit 105, and a signal corresponding to the charge transferred to the charge accumulation unit 105 (for convenience, this signal is also referred to as the "third signal") is output from the amplification transistor 110 to the readout line 113.

[0118] Then, the photodetector according to Embodiment 2 sets the signal line RST and the signal line CNT to a high level only for the pixels 201 of that row at the same time, and the reset transistor 109 and the counting transistor 206 of the pixels 201 of that row are set to the conducting state. Thus, the charge accumulated in the charge accumulation unit 105 and the counting capacitor 207 is discharged.

[0119] Then, the photodetector according to Embodiment 2 sets the signal line RST, the signal line CNT, and the signal line SEL to a low level only for the pixels 201 of that row in sequence. Here, the read operation of each row is completed.

[0120] Then, the photodetector according to Embodiment 2 or an external device can obtain information indicating the number of times the avalanche photodiode 102 has undergone avalanche multiplication during the period when the signal line TRN is at a high level during multiple repeated pulses by performing CDS processing on the output third signal and second signal.

[0121] (Embodiment 3)

[0122] Figure 5This is a circuit diagram showing the configuration of the optical detector according to Embodiment 3. Hereinafter, regarding the optical detector according to Embodiment 3, for the constituent elements that are the same as those of the optical detector according to Embodiment 1, it is considered that they have been described and the same reference numerals are given, and their detailed descriptions are omitted. The description will be centered on the differences from the optical detector according to Embodiment 1.

[0123] As Figure 5 shown, the optical detector according to Embodiment 3 is different from the optical detector according to Embodiment 1 in that the pixel 101 is changed to the pixel 301.

[0124] In the pixel 301 as compared with the pixel 101, the reset transistor 109 is deleted, and the arrangement positions of the photodiode reset transistor 103 and the quenching transistor 112 are changed so that the avalanche photodiode 102 is connected to the gate and source of the quenching transistor 112 via the charge storage section 105 and the transfer gate transistor 108. Accordingly, the charge storage section 105 is connected to the gate and source of the quenching transistor 112, and the other of the source and drain of the transfer gate transistor 108 is connected to the charge storage section 105.

[0125] With the above configuration of the pixel 301, the photodiode reset transistor 103 can also function as the reset transistor 109 according to Embodiment 1.

[0126] In the pixel 301 having the above configuration, the reset of the potential of the cathode of the avalanche photodiode 502 is performed by setting both the photodiode reset transistor 103 and the transfer gate transistor 108 to the conductive state.

[0127] For the same reasons as the optical detector according to Embodiment 1, the optical detector according to Embodiment 3 having the above configuration can solve the problem of charge inflow into adjacent pixels.

[0128] (Embodiment 4)

[0129] Figure 6 This is a circuit diagram showing the configuration of the optical detector according to Embodiment 4. Hereinafter, regarding the optical detector according to Embodiment 4, for the constituent elements that are the same as those of the optical detector according to Embodiment 3, it is considered that they have been described and the same reference numerals are given, and their detailed descriptions are omitted. The description will be centered on the differences from the optical detector according to Embodiment 2.

[0130] As Figure 6 shown, the optical detector according to Embodiment 4 is different from the optical detector according to Embodiment 3 in that the pixel 301 is changed to the pixel 401.

[0131] The pixel 401 is formed by adding a counting transistor 206 and a counting capacitor 207 to the pixel 301.

[0132] One of the source and the drain of the counting transistor 206 is connected to the charge storage unit 105.

[0133] The counting capacitor 207 is connected to the other of the source and the drain of the counting transistor 206.

[0134] The photodetector according to the fourth embodiment configured as described above can set the potential of the counting capacitor 207 to a potential corresponding one-to-one to the number of times of avalanche multiplication by the same operation as the photodetector according to the second embodiment.

[0135] In addition, the photodetector according to the fourth embodiment configured as described above can solve the problem of charge inflow into adjacent pixels for the same reason as the photodetector according to the first embodiment.

[0136] (Embodiment 5)

[0137] Figure 7 FIG. is a block diagram showing the configuration of a distance measuring device 900 according to the fifth embodiment.

[0138] As Figure 7 shown, the distance measuring device 900 includes a solid-state imaging device 801, a signal processing device 809, and a light source 812.

[0139] The light source 812 emits light for irradiating a subject.

[0140] The solid-state imaging device 801 includes the photodetector according to the second embodiment and receives the reflected light of the light emitted from the light source 812 and reflected by the subject.

[0141] The solid-state imaging device 801 includes a pixel array 804, a column circuit 805, a vertical transfer circuit 803, an all-pixel drive driver 808, a horizontal transfer circuit 806, and an output amplifier 807.

[0142] The pixel array 804 is formed by arranging a plurality of pixels 201 according to the first embodiment in a matrix.

[0143] The column circuit 805 reads out signals from the plurality of pixels 201 in units of rows. The column circuit 805 may further include a column amplifier circuit for amplifying the read-out signals and a CDS circuit for performing CDS processing.

[0144] The vertical transfer circuit 803 selects the row to be read out by the column circuit 805.

[0145] The entire pixel driving driver 808 drives all the common signal lines (e.g., signal line RST, signal line PTR, etc.) for a plurality of pixels 201.

[0146] The horizontal transfer circuit 806 transfers the signals read out by the column circuit 805.

[0147] The output amplifier 807 outputs the signals transferred by the horizontal transfer circuit 806 to the outside.

[0148] The signal processing device 809 calculates the distance to the subject based on the signals output from the solid-state imaging device 801. The signal processing device 809 also controls the operations of the light source 812 and the solid-state imaging device 801. The signal processing device 809 may also process the signals output from the solid-state imaging device 801 and transform them into images, etc.

[0149] The signal processing device 809 includes a control circuit 810 and a logic memory circuit 811.

[0150] The control circuit 810 controls the operation of the solid-state imaging device 801 and processes the signals output from the output amplifier 807. For example, the control circuit 810 transforms the output from the output amplifier 807 into a digital signal when it is an analog signal.

[0151] The logic memory circuit 811 controls the light emission timing of the light source 812 and processes the signals output from the control circuit 810 to calculate the distance to the subject. The logic memory circuit 811 may also output the signal processing result to an external computer 813, for example.

[0152] The distance measuring device 900 configured as described above operates by synchronizing the light emission timing of the light source 812 with the exposure timing of the solid-state imaging device 801, and calculates the distance to the subject.

[0153] Hereinafter, the calculation of the distance to the subject performed by the distance measuring device 900 will be described.

[0154] The distance measuring device 900 divides the distance range of the subject to be measured relative to the distance measuring device 900 into a plurality of ranges. Hereinafter, each of the divided distance ranges will be referred to as a "sub-range". And, the solid-state imaging device 801 captures sub-range images of only the subjects in each sub-range. Then, the distance measuring device 900 synthesizes the plurality of sub-range images captured by the solid-state imaging device 801 using the logic memory circuit 811 to calculate a distance image that has both distance information and image information. And, based on the calculated distance image, the distance to the subject to be measured is calculated.

[0155] In the present disclosure, the number of sub - ranges is not limited. Here, as an example, it is assumed that there are two sub - ranges, namely sub - range 1 and sub - range 2, for explanation.

[0156] Sub - range 1 is a distance range from d1 to d1 + dw with respect to the distance from the distance measuring device 900. Sub - range 2 is a distance range from d2 to d2 + dw with respect to the distance from the distance measuring device 900.

[0157] The distance measuring device 900 synthesizes the sub - range image 1 corresponding to sub - range 1 and the sub - range image 2 corresponding to sub - range 2 to achieve a distance resolution of dw and a distance range of d1 to d2 + dw.

[0158] Figure 8 It is a sequence diagram showing an example of the operation of the distance measuring device 900 for capturing the sub - range image 1.

[0159] As Figure 8 shown, the distance measuring device 900 captures the sub - range image 1 by performing the same operation as that of the photodetector in Embodiment 2 shown in Figure 4 shown. Therefore, the detailed description thereof is omitted here. However, the feature here is that at a timing when 2d1 / c has elapsed from the moment when the light source 812 emits a light pulse, the signal line TRN is set to a high level simultaneously for all pixels 201, and the transfer gate transistors 108 of all pixels 201 are set to the conducting state, and exposure starts in the solid - state imaging device 801. And after maintaining this state for dw, the signal line TRN is set to a low level and the transfer gate transistors 108 of all pixels 201 are set to the cut - off state. Thus, the distance measuring device 900 captures the sub - range image 1.

[0160] Figure 9 It is a sequence diagram showing an example of the operation of the distance measuring device 900 for capturing the sub - range image 2.

[0161] As Figure 9 shown, the distance measuring device 900 captures the sub - range image 2 by performing the same operation as that of the photodetector in Embodiment 2 shown in Figure 4 shown. Therefore, the detailed description thereof is omitted here. However, the feature here is that at a timing when 2d2 / c has elapsed from the moment when the light source 812 emits a light pulse, the signal line TRN is set to a high level simultaneously for all pixels 201 and the transfer gate transistors 108 of all pixels 201 are set to the conducting state, and exposure starts in the solid - state imaging device 801. And after maintaining this state for dw, the signal line TRN is set to a low level and the transfer gate transistors 108 of all pixels 201 are set to the cut - off state. Thus, the distance measuring device 900 captures the sub - range image 2.

[0162] If sub-range images 1 and 2 are captured, the logic memory circuit 811 synthesizes these sub-range images 1 and 2 to calculate a distance image, and based on the calculated distance image, calculates the distance to the subject that is the object of distance measurement.

[0163] (Supplementary)

[0164] As described above, as an example of the technology disclosed in the present application, Embodiments 1 to 5 have been described. However, the technology of the present disclosure is not limited to these, and can also be applied to embodiments or modified examples that have been appropriately changed, replaced, added, omitted, etc., as long as the gist of the present disclosure is not deviated from.

[0165] Industrial Applicability

[0166] The photodetector and the like related to the present disclosure can be widely applied to devices for detecting light and the like.

[0167] Reference Numeral Explanation

[0168] 101, 201, 301 pixels

[0169] 102 avalanche photodiode

[0170] 103 photodiode reset transistor

[0171] 104 common reset line

[0172] 105 charge storage section

[0173] 108 transfer gate transistor

[0174] 109 reset transistor

[0175] 110 amplification transistor

[0176] 111 selection transistor

[0177] 112 quenching transistor

[0178] 113 readout line

[0179] 206 counting transistor

[0180] 207 counting capacitor

[0181] 801 solid-state imaging device

[0182] 803 vertical transfer circuit

[0183] 804 pixel array

[0184] 805 column circuit

[0185] 806 horizontal transfer circuit

[0186] 807 Output Amplifier

[0187] 808 All Pixel Driving Driver

[0188] 809 Signal Processing Device

[0189] 810 Control Circuit

[0190] 811 Logic Memory Circuit

[0191] 812 Light Source

[0192] 813 Computer

Claims

1. An optical detector, wherein, Comprising: A plurality of pixels; and A common reset line, connected to the plurality of pixels, The plurality of pixels each have: An avalanche photodiode; A quenching transistor, the gate and source of which are connected to the cathode of the avalanche photodiode; And A photodiode reset transistor, one of the source and drain of which is connected to the drain of the quenching transistor, and the other of the source and drain of which is connected to the common reset line, When the potential of the cathode of the avalanche photodiode is the potential at which avalanche multiplication stops, the quenching transistor is in a weak inversion state, When the photodiode reset transistor is in an on state, the time constant of the electrical circuit from the cathode of the avalanche photodiode to the common reset line is 100 ps or more.

2. The optical detector according to claim 1, wherein The plurality of pixels each further have: A charge storage section for storing the charge generated by the avalanche photodiode; And A transfer gate transistor, one of the source and drain of which is connected to the cathode of the avalanche photodiode, and the other of the source and drain of which is connected to the charge storage section.

3. The optical detector according to claim 2, wherein It further comprises a readout line connected to the plurality of pixels, The plurality of pixels each further have: A reset transistor, one of the source and drain of which is connected to the charge storage section; An amplifying transistor, the gate of which is connected to the charge storage section; And A selection transistor, one of the source and drain of which is connected to one of the source and drain of the amplifying transistor, and the other of the source and drain of which is connected to the readout line.

4. The optical detector according to claim 1, wherein The plurality of pixels each further have between the cathode of the avalanche photodiode and the gate and source of the quenching transistor: A charge storage section, connected to the gate and source of the quenching transistor, for storing the charge generated by the avalanche photodiode; And A transfer gate transistor, one of the source and drain of which is connected to the cathode of the avalanche photodiode, and the other of the source and drain of which is connected to the charge storage section, The cathode of the avalanche photodiode is connected to the gate and source of the quenching transistor via the charge storage section and the transfer gate transistor.

5. The optical detector according to claim 4, wherein It further comprises a readout line connected to the plurality of pixels, The plurality of pixels each further have: An amplifying transistor, the gate of which is connected to the charge storage section; and A selection transistor, one of the source and drain of which is connected to one of the source and drain of the amplifying transistor, and the other of the source and drain of which is connected to the readout line.

6. The optical detector according to any one of claims 2 to 5, wherein The plurality of pixels each further have: A counting transistor, one of a source and a drain of the counting transistor being connected to the charge storage unit; and A counting capacitor, connected to the other of the source and the drain of the counting transistor.

7. A solid-state imaging device including the photodetector according to any one of claims 1 to 6, wherein, Comprising: A pixel array formed by arranging the plurality of pixels in a matrix; A column circuit that reads signals from the plurality of pixels in row units; A vertical transfer circuit that selects a row that is an object of signal reading by the column circuit; An all-pixel drive driver that drives signal lines shared by all of the plurality of pixels; A horizontal transfer circuit that transfers signals read by the column circuit; And An output amplifier that outputs signals transferred by the horizontal transfer circuit to the outside.

8. A distance measuring device, wherein, Comprising: A light source that emits light for irradiating a subject; The solid-state imaging device according to claim 7, which receives reflected light obtained by reflecting light emitted from the light source by the subject; and A signal processing device that calculates a distance to the subject based on signals output from the solid-state imaging device.

Images