Method of manufacturing a semiconductor device, semiconductor device, and power conversion device

Abstract

A semiconductor element (19) is mounted on a ceramic substrate (5). The ceramic substrate (5) on which the semiconductor element (19) is mounted is housed in a housing (13). A solution of a silane coupling agent is caused to flow into the housing (13). The solution in the housing (13) is removed. Treatment is applied to the solution adhering to the semiconductor element (19) etc. in the process of causing the solution to flow into the housing (13), thereby forming a primer layer (35) on the surfaces of the semiconductor element (19) etc. The semiconductor element (19) etc. on which the primer layer (35) is formed is sealed by filling a sealing material (37) in the housing (13).

Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing a semiconductor device, a semiconductor device, and a power conversion device. Background Art

[0002] Semiconductor devices for electric power (power modules) are used in a wide range of fields such as industrial equipment, automobiles, and railways. In recent years, as the performance of equipment equipped with semiconductor devices has become more advanced, the rated voltage and rated current have been increased, and the operating temperature has been increased.

[0003] In a semiconductor device in which a semiconductor element or the like is sealed by a sealing material, it is required to improve the adhesion strength between the sealed semiconductor element or the like and the sealing material, especially in order to cope with operation at high temperatures. For example, in Patent Document 1, the following method is proposed: an aqueous solution of a silane coupling agent is applied to a semiconductor element or the like and dried to form a primer layer (Japanese: プライマ層) on the surface of the semiconductor element or the like, and then the semiconductor element or the like is sealed with a sealing material.

[0004] Prior Art Literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Publication No. 2018-39211 Summary of the invention

[0007] Problems to be solved by the invention

[0008] Among semiconductor devices, there is a semiconductor device in which an insulating substrate carrying a semiconductor element is housed in a housing, and the insulating substrate housed in the housing is sealed by a sealing material. In such a semiconductor device, it is required to selectively form a primer layer to achieve close contact between the semiconductor element sealed by the sealing material and the sealing material.

[0009] The present disclosure was completed under such development, and one of its purposes is to provide a method for manufacturing a semiconductor device, which method can selectively form a primer layer in order to improve the sealing strength between a sealing material and a sealed component such as a semiconductor element sealed by the sealing material. Another purpose is to provide such a semiconductor device, and yet another purpose is to provide a power conversion device having such a semiconductor device.

[0010] Means for solving problems

[0011] The manufacturing method of the semiconductor device of the present disclosure is a manufacturing method of a semiconductor device in which a semiconductor element is sealed with a sealing material, and includes the following steps. A sealed member including a semiconductor element to be sealed with the sealing material is formed. The sealed member is housed in a housing. A solution of a silane coupling agent is caused to flow into the housing. The solution in the housing is removed. Treatment is applied to the solution adhering to the sealed member in the step of causing the solution to flow into the housing, thereby forming a primer layer on the surface of the sealed member. The sealed member having the primer layer formed thereon is sealed by filling the housing with the sealing material. The step of forming the primer layer includes a step of forming a primer layer on the surface of the semiconductor element.

[0012] The semiconductor device of the present disclosure is a semiconductor device in which a semiconductor element is sealed with a sealing material, and includes a sealed member, a housing, a primer layer, and a sealing material. The sealed member includes an insulating substrate on which a semiconductor element is mounted and which is sealed with the sealing material. The housing houses the sealed member. The primer layer is formed on the surface of the sealed member. The sealing material is filled in the housing to seal the sealed member having the primer layer formed thereon. The primer layer is interposed between the sealed member and the sealing material to bond the sealed member and the sealing material. The primer layer is formed between the inner wall surface of the housing including the sealed member and the sealing material.

[0013] The power conversion device of the present disclosure includes: a main conversion circuit having the above semiconductor device, which converts input power and outputs it; and a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

[0014] Effects of the Invention

[0015] According to the manufacturing method of the semiconductor device of the present disclosure, in a housing that houses a sealed member including a semiconductor element, a solution of a silane coupling agent is caused to flow into the housing. After removing the solution in the housing, treatment is applied to the solution adhering to the sealed member, thereby forming a primer layer on the surface of the sealed member. Thereby, a primer layer can be selectively formed between the inner wall surface of the housing including the sealed member and the sealing material. By selectively forming a primer layer at a required portion, the bonding strength between the sealed member and the sealing material can be improved, and operation can be performed at a higher temperature.

[0016] According to the semiconductor device of the present disclosure, the primer layer is selectively formed between the inner wall surface of the housing including the sealed member and the sealing material. By selectively forming a primer layer at a required portion, the bonding strength between the sealed member and the sealing material can be improved, and operation can be performed at a higher temperature.

[0017] The power conversion device according to the present disclosure includes a semiconductor device having a primer layer selectively formed at a required portion, so that the power conversion device can operate at a higher temperature. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a top view of the semiconductor device of Embodiment 1.

[0019] Figure 2 In this embodiment Figure 1 It is a cross-sectional view of the semiconductor device taken along the sectional line II-II shown in the figure.

[0020] Figure 3 It is a cross-sectional view showing one step of the manufacturing method of the semiconductor device in this embodiment.

[0021] Figure 4 It is a cross-sectional view showing the step performed after the step shown in Figure 3 this embodiment.

[0022] Figure 5 It is a cross-sectional view showing the step performed after the step shown in Figure 4 this embodiment.

[0023] Figure 6 It is a cross-sectional view showing the step performed after the step shown in Figure 5 this embodiment.

[0024] Figure 7 It is a cross-sectional view showing the step performed after the step shown in Figure 6 this embodiment.

[0025] Figure 8 It is a cross-sectional view showing the step performed after the step shown in Figure 7 this embodiment.

[0026] Figure 9 It is a cross-sectional view showing the step performed after the step shown in Figure 8 this embodiment.

[0027] Figure 10 It is a top view more specifically showing the step shown in Figure 7 this embodiment.

[0028] Figure 11 It is a cross-sectional view showing one step of the manufacturing method of the semiconductor device of Embodiment 2.

[0029] Figure 12 It is a cross-sectional view showing the step performed after the step shown in Figure 11 this embodiment.

[0030] Figure 13 It is a cross-sectional view of the process performed after the process shown in Figure 12 this embodiment.

[0031] Figure 14 More specifically, it is a top view of the process shown in Figure 12 this embodiment.

[0032] Figure 15 More specifically, it is a cross-sectional view of the process performed after the process shown in Figure 12 this embodiment.

[0033] Figure 16 It is a cross-sectional view showing a first example of the semiconductor device of Embodiment 3.

[0034] Figure 17 It is a cross-sectional view showing a second example of the semiconductor device in this embodiment.

[0035] Figure 18 It is a cross-sectional view showing a third example of the semiconductor device in this embodiment.

[0036] Figure 19 It is a cross-sectional view of the semiconductor device of Embodiment 4.

[0037] Figure 20 It is a cross-sectional view of a process in the manufacturing method of the semiconductor device in this embodiment.

[0038] Figure 21 It is a cross-sectional view of the process performed after the process shown in Figure 20 this embodiment.

[0039] Figure 22 It is a cross-sectional view of the process performed after the process shown in Figure 21 this embodiment.

[0040] Figure 23 It is a block diagram of the power conversion device of Embodiment 5. Detailed Embodiments

[0041] Embodiment 1

[0042] An example of the semiconductor device of Embodiment 1 will be described. As shown in Figure 1 and Figure 2As shown, in the semiconductor device 1, a power semiconductor element 21 and an IC element 24 are mounted on a ceramic substrate 5 serving as an insulating substrate as the semiconductor element 19. The power semiconductor element 21 includes, for example, an IGBT (Insulated Gate Bipolar Transistor) that controls electric power and a diode. The IC element 24 includes, for example, a switching element.

[0043] The ceramic substrate 5 includes a substrate body 7, a conductor layer 9, and a conductor layer 11. The conductor layer 9 is formed on one main surface side of the substrate body 7. The conductor layer 11 is formed on the other main surface side of the substrate body 7. The power semiconductor element 21 is joined to the conductor layer 11 by solder 17a. The IC element 24 is joined to the conductor layer 11 by solder 17b. The substrate body 7 is formed of aluminum nitride (AlN), for example.

[0044] A housing 13 is fixed to the ceramic substrate 5 on which the semiconductor element 19 is mounted by an adhesive 15. External electrode terminals 31 and signal electrode terminals 33 are assembled in the housing 13. The housing 13 is formed of polyphenylene sulfide resin (PPS: Poly Phenylene Sulfide Resin), for example.

[0045] External electrode terminals 31 and signal electrode terminals 33, which are conductive members for external electrical connection, are mounted on the housing 13. As the external electrode terminals 31, external electrode terminals 31a and external electrode terminals 31b are provided. The external electrode terminal 31a becomes a source electrode terminal, for example. The external electrode terminal 31b becomes a drain electrode terminal, for example. The external electrode terminal 31a and the surface electrode 23 of the power semiconductor element 21 are electrically connected by a plurality of wires 25. The external electrode terminal 31b and the conductor layer 11 are electrically connected by a plurality of wires 29.

[0046] The signal electrode terminal 33 becomes a gate electrode terminal or a temperature sensor electrode terminal, etc., for example. The signal electrode terminal 33 and the signal electrode 26 of the IC element 24 are electrically connected by a wire 27. The wire 25 is made of aluminum with a diameter of about 100 to 500 μm, for example.

[0047] The ceramic substrate 5 on which the semiconductor element 19 is mounted is sealed by a sealing material 37 filled in the housing 13 as a sealed member. Also, in this semiconductor device 1, the wires 25, 27, 29, etc. are also sealed by the sealing material 37 as part of the sealed member. An undercoat layer 35 is interposed between the ceramic substrate 5 on which the semiconductor element 19 is mounted and the sealing material 37. An undercoat layer 35 is interposed between the wires 25, 27, 29, etc. and the sealing material 37.

[0048] The undercoat layer 35 is formed to cover the surface of the ceramic substrate 5 on which the semiconductor element 19 is mounted. The undercoat layer 35 is formed to cover the surfaces of the wires 25, 27, and 29. Further, the undercoat layer 35 is formed to cover the inner wall surface of the housing 13 from the bottom of the housing 13 to a position between the bottom of the housing 13 and the upper end of the housing 13.

[0049] As described later, the undercoat layer 35 is formed by immersing the ceramic substrate 5 on which the semiconductor element 19 is mounted, etc. in a solution of, for example, a silane coupling agent. The silane coupling agent has a functional group that binds to an organic material and a functional group that binds to an inorganic material. As a solvent for the silane coupling agent, for example, water or ethanol can be cited. The concentration (by weight) of the silane coupling agent in the solution of the silane coupling agent is preferably 1 to 10%. When the concentration of the silane coupling agent is less than 1%, a sufficient undercoat layer 35 cannot be formed. On the other hand, when the concentration of the silane coupling agent is higher than 10%, the undercoat layer 35 becomes too thick.

[0050] The undercoat layer 35 is interposed between the ceramic substrate 5 on which the semiconductor element 19 is mounted, etc. and the sealing material 37. The undercoat layer 35 has a function of binding to the inorganic material of the ceramic substrate 5 on which the semiconductor element 19 is mounted, etc. and binding to the organic material of the sealing material 37. Thereby, the bonding strength between the sealing material 37 and the ceramic substrate 5 on which the semiconductor element 19 is mounted, etc. can be improved.

[0051] For example, between aluminum as an inorganic material and epoxy resin as an organic material, by interposing an undercoat layer 35 having a thickness of about 30 nm to 500 nm, the bonding strength can be increased by about 3 times compared with the case where the undercoat layer 35 is not interposed. When the thickness of the undercoat layer 35 is less than 30 nm, it is difficult to obtain sufficient bonding strength.

[0052] Further, between copper and epoxy resin, by interposing an undercoat layer 35 having a thickness of about 100 nm to 500 nm, the bonding strength can be increased by about 3 times compared with the case where the undercoat layer 35 is not interposed. When the thickness of the undercoat layer 35 is less than 100 nm, it is difficult to obtain sufficient bonding strength.

[0053] In addition, in any case, when the thickness of the undercoat layer 35 is greater than 500 nm, there is no significant difference in the bonding strength and the consumption of the undercoat solution increases. Therefore, from the viewpoint of suppressing production costs, it is preferable that the thickness of the undercoat layer 35 does not exceed 500 nm.

[0054] The semiconductor device 1 sealed by the sealing material 37 is mounted on the cooling mechanism 39. Further, in Figure 1In the figure, the state where the conductor layer 9 of the ceramic substrate 5 is mounted on the cooling mechanism 39 is schematically shown. However, as the semiconductor device 1, it may also be a semiconductor device in a form where a base plate (both not shown) is mounted on the ceramic substrate 5 with an insulating layer interposed therebetween. In this case, the base plate is sandwiched between the ceramic substrate 5 and the cooling mechanism 39. The semiconductor device 1 of Embodiment 1 is configured as described above.

[0055] Next, an example of the manufacturing method of the above-described semiconductor device 1 will be described. As Figure 3 shown, a ceramic substrate 5 is prepared. In the ceramic substrate 5, a conductor layer 9 is formed on one main surface side of the substrate body 7, and a conductor layer 11 is formed on the other main surface side. A plate-shaped solder is placed on the conductor layer 11. A semiconductor element 19 including a power semiconductor element 21 and an IC element 24 is disposed on the solder, and the assembly is put into a reflow furnace. In the reflow furnace, the plate-shaped solder is melted, and the semiconductor element 19 is joined to the conductor layer 11 (ceramic substrate 5). As a result, the back electrode (for example, drain electrode (not shown)) of the power semiconductor element 21 is electrically connected to the conductor layer 11.

[0056] Then, as Figure 4 shown, the housing 13 is bonded to the ceramic substrate 5 on which the semiconductor element 19 is mounted by an adhesive 15. External electrode terminals 31 and signal electrode terminals 33 (insert molding) are pre-assembled in the housing 13. An adhesive 15 made of silicon, for example, is applied to the inner peripheral portion of the housing 13. The ceramic substrate 5 on which the semiconductor element 19 is mounted is aligned with the housing 13, and the ceramic substrate 5 is placed on the housing 13. Then, the housing 13 on which the ceramic substrate 5 is placed is put into a furnace (not shown). In the furnace, it is heated at a temperature condition of, for example, 50°C to 150°C for about 30 minutes to cure the adhesive 15.

[0057] Then, as Figure 5 shown, the external electrode terminals 31 and the signal electrode terminals 33 are electrically connected to the semiconductor element 19, respectively. Here, for example, a wire bonding device (not shown) is used. The external electrode terminal 31a and the surface electrode 23 (for example, source electrode) of the power semiconductor element 21 are electrically connected by a plurality of wires 25. The external electrode terminal 31b and the conductor layer 11 are electrically connected by a wire 29 (refer to Figure 1 )). The signal electrode terminal 33 and the signal electrode 26 of the IC element 24 are electrically connected by a wire 27.

[0058] Then, a process of forming a primer layer is performed. First, a primer solution which is a solution of a silane coupling agent is prepared. Then, as Figure 6As shown, the primer solution 34 is caused to flow into the housing 13. At this time, it is necessary to form a primer layer also on the surfaces of the portions inside the bent portions of the wires 25, 27, and 29. In addition, when observing the inside of the housing 13 from above, it is necessary to form a primer layer also on the surfaces of portions such as the semiconductor element 19 that are dead corners below the wires 25, 27, and 29. Therefore, the primer solution 34 is caused to flow to a position, for example, 0.5 to 5 mm higher than the tops of the wires 25, 27, and 29.

[0059] In addition, at this time, if necessary, only a part of the components may be immersed in the primer solution 34. For example, when immersing the wire 25 and not needing to immerse the wires 27 and 29, it is also possible to immerse up to a position 0.5 to 5 mm higher than the top of the wire 25 in the primer solution 34. In addition, for example, when immersing the portion of the semiconductor element 19 and not needing to immerse the bent portions of the wires 25, 27, and 29, it is also possible to immerse up to a position 0.5 to 5 mm higher than the upper part of the semiconductor element 19 in the primer solution 34.

[0060] And, for example, when wanting to immerse the joint portion of the semiconductor element 19 and the wires 25 and 27, it is also possible to immerse up to a position 0.5 to 5 mm higher than this joint portion in the primer solution 34. In this case, on the inner wall surface of the housing 13, the primer solution 34 adheres from the bottom surface of the housing 13 to a position 0.5 to 5 mm higher than this joint portion, and in the completed semiconductor device 1, it finally remains as the primer layer 35 (refer to Figure 2 ).

[0061] Then, the excess primer solution 34 that has flowed into the housing 13 is removed. As Figure 7 shown, the primer solution 34 is sucked by the nozzle 51. At this time, the nozzle 51 is arranged at a position (above), for example, 1 to 20 mm from the surface of the conductor layer 11 near the center of the ceramic substrate 5 where the components such as the semiconductor element 19 are not mounted, and the primer solution 34 is sucked. Considering sucking the primer solution 34, the viscosity of the primer solution 34 is preferably 10 Pa·s or less.

[0062] It is conceivable that if the primer solution 34 remains, this portion bulges and the uniformity of the thickness of the formed primer layer decreases. Therefore, it is preferable to suck the primer solution 34 so that droplets of the primer solution 34 do not remain as much as possible.

[0063] The thickness of the primer layer formed on the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted can be changed according to the concentration of the silane coupling agent contained in the solution. When the concentration of the silane coupling agent becomes higher, the thickness of the primer layer becomes thicker. By changing the concentration of the silane coupling agent, the amount of the silane coupling agent attached to the ceramic substrate 5 or the like can be changed, and the thickness of the primer layer can be controlled.

[0064] As described above, it is preferable to suck the primer solution 34 so that no droplets of the primer solution 34 remain, but a liquid pool may be provided as needed. For example, in the case where the film thickness of the primer layer formed on the ceramic substrate 5 and the semiconductor element 19 is to be controlled, first, by changing the concentration of the silane coupling agent and the amount of the primer solution 34 sucked from the nozzle 51, a liquid pool of the primer solution 34 is formed in the housing 13.

[0065] Then, by heating to evaporate the moisture such as the liquid pool, the film thickness of the primer layer formed on the ceramic substrate 5 and the semiconductor element 19 can be controlled. For example, according to the relationship with the materials arranged around the semiconductor element 19, the thickness of the primer layer in the central portion of the semiconductor element 19 can be formed to be thicker than the thickness of the primer layer in the peripheral portion of the semiconductor element 19.

[0066] After sucking the primer solution 34, it is put into a furnace for drying treatment, so that Figure 8 as shown, a primer layer 35 is formed on the surface of the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted. Then, a liquid sealing material is filled in the housing 13. Then, as Figure 9 shown, by applying a heat treatment and curing the liquid sealing material, a sealing material 37 is formed. Thus, the main part of the semiconductor device 1 is completed. After that, by mounting the semiconductor device 1 on the cooling mechanism 39, the Figure 1 semiconductor device 1 as shown in etc. is manufactured.

[0067] In the above-described semiconductor device 1, the primer layer 35 can be selectively formed by flowing the primer solution 34 that is to become the primer layer 35 into the housing 13. This will be described.

[0068] In the semiconductor device 1 in which the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted is housed in the housing 13, after bonding the housing 13 to the ceramic substrate 5, if the primer layer 35 is to be formed by the spin coating method, there will be portions where the primer layer 35 cannot be formed, such as the bent portions of the wires 25, 27, and 29.

[0069] In addition, there is a high possibility that the primer solution 34 diffusing outward from near the center inside the housing 13 accumulates at the corners of the housing 13, and droplets of the primer solution 34 adhere to the upper end portion of the housing 13, the external electrode terminal 31, the signal electrode terminal 33, etc. when the primer solution 34 diffuses. The upper end portion of the housing 13 and the like are parts where it is not necessary to form the primer layer 35.

[0070] In addition, after bonding the housing 13 to the ceramic substrate 5, if it is desired to form the primer layer 35 by a bar coater, since the wires 25, 27, 29 are connected, the wires 25, 27, 29 become an obstacle and it is difficult to form the primer layer 35.

[0071] Moreover, when the entire housing 13 to which the ceramic substrate 5 and the like are fixed is immersed in the primer solution 34, parts where it is not necessary to form the primer layer 35 such as the outer wall surface of the housing 13, the external electrode terminal 31, or the signal electrode terminal 33 are immersed in the primer solution 34.

[0072] Compared with these methods, in the above method, the primer solution flows into the housing 13 to which the ceramic substrate 5 etc. on which the semiconductor element 19 is mounted is fixed, and the ceramic substrate 5 etc. is immersed in the primer solution 34. Therefore, it is possible to prevent the primer solution 34 from adhering to parts where it is not necessary to form the primer layer 35 such as the outer wall surface of the housing 13, the external electrode terminal 31, or the signal electrode terminal 33. In this way, it is possible to form the primer layer 35 only at the required parts, and improve the adhesion strength between the ceramic substrate 5 etc. on which the semiconductor element 19 is mounted and the sealing material 37. As a result, operation at a higher temperature can be achieved.

[0073] In addition, since the primer solution 34 flows into the housing 13, the excess primer solution 34 can be removed by the nozzle 51. The attracted primer solution 34 can be reused by cleaning as needed. When attracting the primer solution 34 by the nozzle 51, the nozzle 51 can be moved while attracting.

[0074] From the state where the nozzle 51 is arranged at a position (above) about 1 to 20 mm or so from the surface of the conductor layer 11 near the center on the ceramic substrate 5 where components such as the semiconductor element 19 are not mounted, as Figure 10 shown, for example, while moving the nozzle 51 in one direction shown by the arrow Y1, attraction is performed, so that the primer solution 34 can be efficiently attracted.

[0075] In addition, in addition to one direction, the nozzle 51 can also be moved in other directions intersecting with one direction while attracting the primer solution 34. When the nozzle 51 moves, for example, in the case where it may interfere with the semiconductor element 19 or the wires 25, 27, 29, etc., the nozzle 51 can be lifted to attract the primer solution 34. Also, multiple nozzles 51 can be used to attract the primer solution 34. By using multiple nozzles, the primer solution 34 can be removed more efficiently.

[0076] As the cross-sectional shape of the nozzle 51, it is preferable to apply a nozzle having a cross-sectional shape corresponding to the shape of the semiconductor device 1 as an object, such as a circle, an ellipse, or a quadrilateral. In addition, by setting the front-end shape of the nozzle 51 to an acute front-end shape, it is possible to easily attract the primer solution 34 remaining in a narrower space inside the housing 13. Also, by chamfering the front-end portion of the nozzle 51, even if the nozzle 51 interferes with the semiconductor element 19 or the like, damage to the semiconductor element 19 or the like can be suppressed.

[0077] In addition to attracting the primer solution 34 through the nozzle 51, for example, the primer solution 34 can also be removed by infiltrating it into a sponge or the like. Also, the primer solution 34 inside the housing 13 can be removed by tilting the housing 13. When tilting the housing 13, a jig or the like cover can be installed as needed. Also, a flow path for the primer solution to flow can be provided. The method of tilting the housing 13 will be described later.

[0078] Also, after attracting the primer solution 34 inside the housing 13, vibration can be applied to the housing 13, or the housing 13 can be rotated. Even if the primer solution is concentrated in a certain part inside the housing 13, the primer solution 34 can be dispersed by the vibration or rotation of the housing 13, and the thickness of the primer layer 35 can be made uniform.

[0079] In the completed semiconductor device 1, the primer layer 35 is formed to be sandwiched between the ceramic substrate 5 on which the semiconductor element 19 is mounted and the sealing material 37. The primer layer 35 is formed to be sandwiched between the wires 25, 27, 29 and the sealing material 37. Also, the primer layer 35 is formed to cover the inner wall surface of the housing 13 from the bottom of the housing 13 to a position between the bottom of the housing 13 and the upper end of the housing 13.

[0080] The primer layer 35 can be detected by component analysis. As component analysis, for example, there are EI (Electron Ionization) method, FI (Field Ionization) method, or FTIR (Fourier-Transform Infrared Spectrometer) method, etc.

[0081] The EI method is one of the ionization methods used in gas chromatography-mass spectrometry analysis. According to this analysis, information related to the structure of the undercoat layer 35 can be obtained. The FI method is one of the ionization methods used in gas chromatography-mass spectrometry analysis. According to this analysis, information related to the molecular weight of the undercoat layer 35 can be obtained.

[0082] The FTIR method can obtain information related to the structure of a substance by irradiating the substance with infrared rays and measuring the transmitted or reflected light. During the formation of the undercoat layer 35, a dehydration condensation reaction of Si-OH groups occurs to form Si-O-Si groups. As a result, in the infrared absorption spectrum, a peak of the infrared absorption spectrum based on the Si-O-Si groups is observed.

[0083] In the semiconductor device 1 described above, a peak of the infrared absorption spectrum based on the Si-O-Si groups is observed from inside the housing 13. On the other hand, a peak of the infrared absorption spectrum based on the Si-O-Si groups is not observed from the outer wall surface of the housing 13, the upper end surface of the housing 13, and the part of the inner wall surface located on the upper end side of the housing 13. In addition, a peak of the infrared absorption spectrum based on the Si-O-Si groups is not observed from the back surface of the ceramic substrate 5, that is, the surface of the conductor layer 9.

[0084] In addition, in the semiconductor device 1 described above, the case where the substrate main body 7 of the ceramic substrate 5 is formed of aluminum nitride (AlN) has been described. As the substrate main body 7, in addition to this, for example, it can also be formed of aluminum oxide (Al2O3). In addition, the substrate main body 7 can also be formed of silicon nitride (SiN). And, when the necessity for heat dissipation is low, as the substrate main body 7, for example, a metal base substrate or a glass epoxy substrate can be applied.

[0085] The case where the housing 13 is formed of PPS has been described. As the housing 13, it can also be formed of a liquid crystal polymer (LCP: Liquid Crystal Polymer) with higher heat resistance.

[0086] The case where the semiconductor device 1 includes an IGBT and a diode as the semiconductor element 19 has been described. As the arrangement of the IGBT and the diode, there is a 1in1 type in which, for example, one IGBT and one diode are arranged in one semiconductor device (semiconductor module). In addition, for example, there is a 2in1 type in which two IGBTs and two diodes are arranged. And, for example, there is a 6in1 type in which six IGBTs and six diodes are arranged.

[0087] The case where the semiconductor element 19 is joined to the conductor layer 11 by solder 17a and 17b has been described. As a method for joining the semiconductor element 19 to the conductor layer 11, for example, a conductive adhesive obtained by dispersing silver (Ag) filler in an epoxy resin can be used to join the semiconductor element 19 to the conductor layer 11. Additionally, for example, silver (Ag) nanopowder or copper (Cu) nanopowder that enables low-temperature sintering of nanoparticles can also be used to join the semiconductor element 19 to the conductor layer 11.

[0088] The case where the wires 25, 27, and 29 are aluminum wires has been described. As the wires 25, 27, and 29, copper wires can also be used. Additionally, as the wires 25, 27, and 29, copper wires coated with aluminum can also be used. And, as the wires 25, 27, and 29, gold wires can also be used.

[0089] As the sealing material 37, the case where a liquid sealing body is cured by heating has been described. As the sealing material 37, a method of curing a liquid sealing material at room temperature can also be used. Additionally, a cover can be installed on the housing 13 so as to cover the sealing material 37.

[0090] Embodiment 2

[0091] An example of the semiconductor device according to Embodiment 2 will be described. Here, mainly the manufacturing method of the semiconductor device will be described. In addition, the same reference numerals are assigned to the structures that are the same as those of the above-described semiconductor device 1, and their descriptions will not be repeated unless necessary.

[0092] After going through the same processes as those Figures 3 to 5 shown above, as Figure 11 shown, the primer solution 34 is caused to flow into the housing 13. At this time, the primer solution 34 is caused to flow to a position that is, for example, about 0.5 to 5 mm higher than the tops of the wires 25, 27, and 29. Then, the excess primer solution 34 that has flowed into the housing 13 is removed.

[0093] At this time, as Figure 12 shown, the housing 13 is tilted so that the primer solution 34 in the housing 13 is concentrated in one area. The nozzle 51 is arranged facing the concentrated primer solution 34, and the primer solution 34 is sucked. Additionally, by moving the nozzle 51 within the area where the concentrated primer solution 34 is located, the primer solution 34 can be sucked more efficiently.

[0094] After that, going through the same processes as those Figure 8 and Figure 9 shown above, as Figure 13As shown, a sealing material 37 is formed on the surface of a ceramic substrate 5 or the like on which a semiconductor element 19 is mounted, with a primer layer 35 interposed therebetween. Thus, the main part of the semiconductor device 1 is completed.

[0095] In the completed semiconductor device 1, similar to the semiconductor device 1 shown above Figure 1 and Figure 2 a primer solution 34 flows into a housing 13 in which a ceramic substrate 5 or the like on which a semiconductor element 19 is mounted is fixed, and the ceramic substrate 5 or the like is immersed in the primer solution 34. Accordingly, it is possible to prevent the primer solution 34 from adhering to portions such as the outer wall surface of the housing 13, the external electrode terminals 31, or the signal electrode terminals 33 where the primer layer 35 does not need to be formed.

[0096] In addition, since the primer solution 34 is caused to flow into the housing 13, the excess primer solution 34 can be removed through a nozzle 51. At this time, by tilting the housing 13 and sucking the primer solution 34 concentrated in one portion within the housing 13 using the nozzle 51, the primer solution 34 can be efficiently sucked. As Figure 14 shown, the housing 13 may be tilted, for example, in such a manner that the primer solution 34 accumulates in a portion where there are as few components as possible disposed on the ceramic substrate 5 or the like accommodated in the housing 13 (see the dashed-line frame DC).

[0097] In addition, as Figure 15 shown, when removing droplets 34a of the primer solution 34 remaining within the housing 13, the droplets 34a may be blown off through an air nozzle 52 in a state where a cover jig 53 is assembled, and the cover jig 53 covers portions such as the outer wall surface of the housing 13, the external electrode terminals 31, and the signal electrode terminals 33 where the primer solution 34 is not desired to adhere.

[0098] Embodiment 3

[0099] Here, a modification of the semiconductor device including a cooling mechanism will be described. In addition, structures identical to those of the semiconductor device 1 shown above Figure 1 and Figure 2 are denoted by the same reference numerals, and their descriptions will not be repeated unless necessary.

[0100] (First Example)

[0101] As Figure 16 shown, the semiconductor device 1 of the first example includes a water-cooled fin 41 as a cooling mechanism. A plurality of flow paths 41a through which cooling water 42 flows are provided in the water-cooled fin 41. A ceramic substrate 5 on which a semiconductor element 19 is mounted is disposed on the water-cooled fin 41 with an insulating layer 3 interposed therebetween. The housing 13 is fixed to the water-cooled fin 41 so as to surround the ceramic substrate 5.

[0102] The undercoat layer 35 is formed so as to be interposed not only between the lead wires 25, 27, etc. and the ceramic substrate 5 on which the semiconductor element 19 is mounted and the sealing material 37, but also between a part of the water-cooling fin 41 and the sealing material 37.

[0103] After fixing the ceramic substrate 5 on which the semiconductor element 19 is mounted and the housing 13 to the water-cooling fin 41 in the semiconductor device including the water-cooling fin 41, in the same manner as the method described in the first or second embodiment, by flowing the undercoat agent solution into the housing 13 and sucking the excess undercoat agent solution, the undercoat layer 35 can be formed at the required positions.

[0104] (Second example)

[0105] In the first example, the semiconductor device 1 in which the undercoat layer 35 is interposed between a part of the water-cooling fin 41 as a cooling mechanism and the sealing material 37 has been described. However, as Figure 17 shown, it may also be a semiconductor device 1 in which the undercoat layer is not formed on the cooling fin 43 (air-cooling fin) itself. The semiconductor device 1 of the second example has a structure substantially the same as that of the semiconductor device 1 shown in Figure 1 and Figure 2 and is a semiconductor device 1 in which, in particular, the cooling fin 43 is applied as the cooling mechanism 39.

[0106] (Third example)

[0107] In each of the embodiments, the case where the semiconductor element 19, etc. are electrically connected by the lead wires 25, 27, 29 has been described. In the third example, a semiconductor device in which semiconductor elements, etc. are electrically connected by a lead frame as a conductive member will be described.

[0108] As Figure 18 shown, a power semiconductor element 21 and an IC element 24 are mounted on the conductor layer 16 as the semiconductor element 19. The conductor layer 16 is disposed on the cooling fin 43 with an insulating layer 4 interposed therebetween. The power semiconductor element 21 is joined to the conductor layer 16 by a solder 18a. The IC element 24 is joined to the conductor layer 16 by a solder 18b.

[0109] The lead frame 45 is electrically connected to the power semiconductor element 21 and the IC element 24. The power semiconductor element 21 and the lead frame 45 are joined by a solder 17a. The IC element 24 and the lead frame 45 are joined by a solder 17b. The lead frame 45 is electrically connected to the main terminal 32, for example. The IC element 24 is electrically connected to the signal electrode terminal 33 via the lead wire 27.

[0110] Power semiconductor elements 21, IC elements 24, etc. mounted on the conductor layer 16 are housed in the housing 13 and sealed with a sealing material 37. The housing 13 is fixed to the cooling fins 43. The undercoat layer 35 is interposed between the inner wall surface of the housing 13, the power semiconductor element 21, the IC element 24, the lead wires 27, and the lead frame 45 and the sealing material 37 respectively.

[0111] After the semiconductor device 1 having the lead frame 45 fixes the conductor layer 16 with the semiconductor element 19 mounted thereon and the housing 13 to the cooling fins 43, in the same manner as the method described in Embodiment 1 or 2, by flowing the undercoat solution into the housing 13 and sucking the excess undercoat solution, the undercoat layer 35 can be formed at the required positions.

[0112] Embodiment 4

[0113] An example of the semiconductor device of Embodiment 4 will be described. Here, the structure of the semiconductor device and its manufacturing method will be described. In addition, for the structures identical to the structure of the semiconductor device 1 shown in Figure 1 and Figure 2 , the same reference numerals are given, and the description thereof will not be repeated unless necessary.

[0114] As Figure 19 shown, the semiconductor device 1 has a structure in which the upper surface of the ceramic substrate 5 forming the bottom surface inside the housing 13 is inclined. Specifically, for the ceramic substrate 5, the position (height) of the upper surface of the ceramic substrate 5 is inclined so as to become lower at one of the four corners (refer to Figure 1 ) inside the housing 13. The inclination angle is set to about 1 to 15°, for example. Here, the upper surface of the ceramic substrate 5 is inclined by changing the thickness of the substrate body 7 in the ceramic substrate 5. In addition, as already described, the semiconductor device 1 is mounted on the cooling mechanism 39 (refer to Figure 2 ).

[0115] Next, an example of the manufacturing method of the semiconductor device 1 described above will be described. First, the ceramic substrate 5 is prepared. In this case, the substrate body 7 has a thickness corresponding to the inclination of the upper surface of the ceramic substrate 5 (refer to Figure 19 ). Then, after the same processes as the processes shown in Figures 3 to 5 , as Figure 20 shown, the undercoat solution 34 is caused to flow into the housing 13. At this time, the undercoat solution 34 is caused to flow to a position, for example, 0.5 to 5 mm higher than the tops of the lead wires 25, 27, and 29.

[0116] Then, the excess undercoat solution 34 flowing into the housing 13 is removed. At this time, as Figure 21As shown, the nozzle 51 is disposed at the corner where the position of the upper surface (the bottom surface inside the housing 13) of the ceramic substrate 5 within the housing 13 is at the lowest position. Then, the primer solution 34 is sucked from the nozzle 51. The liquid level of the primer solution 34 gradually drops, and the primer solution 34 that will ultimately remain is sucked at the lowest part (corner) of the upper surface of the ceramic substrate 5 within the housing 13, thereby sucking the excess primer solution 34. After that, through the same processes as those shown in Figure 8 and Figure 9 the main part of the semiconductor device 1 is completed as shown in Figure 22 .

[0117] In the completed semiconductor device 1, similar to the semiconductor device 1 shown in Figure 1 and Figure 2 , the primer solution 34 flows into the housing 13 in which the ceramic substrate 5 on which the semiconductor element 19 is mounted is fixed, etc., and the ceramic substrate 5, etc. are immersed in the primer solution 34. Therefore, it is possible to prevent the primer solution 34 from adhering to the outer wall surface of the housing 13, the external electrode terminals 31, the signal electrode terminals 33, etc., which are parts where the primer layer 35 does not need to be formed.

[0118] In the above semiconductor device 1, with respect to the ceramic substrate 5, the ceramic substrate 5 is inclined in such a way that the height of the ceramic substrate 5 becomes lower at one of the four corners (refer to Figure 1 ) inside the housing 13. Thus, when manufacturing the semiconductor device 1, instead of tilting the housing 13, by sucking the primer solution 34 that will ultimately remain at the lowest part (corner) of the upper surface (the bottom surface inside the housing 13) of the ceramic substrate 5 within the housing 13, it is possible to efficiently suck the excess primer solution 34.

[0119] In order to more efficiently suck the excess primer solution 34 from the nozzle 51, it is preferable to tilt the ceramic substrate 5 in such a way that the corner where as few parts as possible of the semiconductor element 19 mounted on the ceramic substrate 5 are located becomes lower.

[0120] In addition, as already described, when removing the droplets 34a of the primer solution 34 remaining inside the housing 13, it is also possible to blow off the droplets 34a through the air nozzle 52 in a state where the cover jig 53 (refer to Figure 15 ) is assembled, and the cover jig 53 covers the outer wall surface of the housing 13, the external electrode terminals 31, the signal electrode terminals 33, etc., which are parts where the primer solution 34 does not want to adhere.

[0121] Embodiment 5

[0122] Here, a power conversion device using the semiconductor device described in the above Embodiments 1 to 4 is described. The present disclosure is not limited to a specific power conversion device, but hereinafter, as Embodiment 4, an example in which the present disclosure is applied to a three-phase inverter is described.

[0123] Figure 23 FIG. is a block diagram showing the configuration of a power conversion system using the power conversion device of this embodiment. Figure 23 The power conversion system shown is composed of a power supply 100, a power conversion device 200, and a load 300. The power supply 100 is a DC power supply that supplies DC power to the power conversion device 200. The power supply 100 can be composed of various components. For example, it can be composed of a DC system, a solar cell, or a storage battery. In addition, it can also be composed of a rectifier circuit or an AC / DC converter connected to an AC system. Further, the power supply 100 can also be composed of a DC / DC converter that converts the DC power output from the DC system into specified power.

[0124] The power conversion device 200 is a three-phase inverter connected between the power supply 100 and the load 300, which converts the DC power supplied from the power supply 100 into AC power and supplies the AC power to the load 300. As Figure 23 shown, the power conversion device 200 includes: a main conversion circuit 201 that converts DC power into AC power and outputs it; and a control circuit 203 that outputs a control signal for controlling the main conversion circuit 201 to the main conversion circuit 201.

[0125] The load 300 is a three-phase motor driven by the AC power supplied from the power conversion device 200. In addition, the load 300 is not limited to a specific use and is a motor mounted on various electrical devices. For example, it is used as a motor for hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning equipment.

[0126] Hereinafter, the details of the power conversion device 200 will be described. The main conversion circuit 201 includes switching elements and freewheeling diodes (not shown). Through the switching operation of the switching elements, the DC power supplied from the power supply 100 is converted into AC power and supplied to the load 300. There are various specific circuit configurations of the main conversion circuit 201. The main conversion circuit 201 of this embodiment is a two-level three-phase full-bridge circuit and can be composed of six switching elements and six freewheeling diodes connected in anti-parallel with each switching element.

[0127] At least any one of the switching elements and freewheeling diodes of the main conversion circuit 201 is a switching element or a freewheeling diode included in a semiconductor device 202 equivalent to at least any one of the semiconductor devices 1 in the above-described Embodiments 1 to 4. Six switching elements are configured as upper and lower arms each formed by connecting two switching elements in series, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of a full-bridge circuit. Moreover, three output terminals of the main conversion circuit 201, which are output terminals of each upper and lower arm, are connected to a load 300.

[0128] In addition, the main conversion circuit 201 includes a drive circuit (not shown) that drives each switching element. However, the drive circuit may be incorporated in the semiconductor device 202, or may be configured to include a drive circuit outside the semiconductor device 202. The drive circuit generates a drive signal for driving the switching elements of the main conversion circuit 201 and supplies it to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, in accordance with a control signal from a control circuit 203 described later, a drive signal that turns on the switching element and a drive signal that turns off the switching element are output to the control electrodes of each switching element. When the switching element is maintained in the on state, the drive signal is a voltage signal (on signal) equal to or higher than the threshold voltage of the switching element, and when the switching element is maintained in the off state, the drive signal becomes a voltage signal (off signal) lower than the threshold voltage of the switching element.

[0129] The control circuit 203 controls the switching elements of the main conversion circuit 201 so as to supply desired power to the load 300. Specifically, based on the power to be supplied to the load 300, the time (on time) during which each switching element of the main conversion circuit 201 should be in the on state is calculated. For example, the main conversion circuit 201 can be controlled by PWM control that modulates the on time of the switching element according to the voltage to be output. Then, a control command (control signal) is output to the drive circuit included in the main conversion circuit 201 so as to output an on signal to the switching element that should be in the on state and an off signal to the switching element that should be in the off state at each time point. The drive circuit outputs an on signal or an off signal as a drive signal to the control electrodes of each switching element in accordance with this control signal.

[0130] In the power conversion device of the present embodiment, since the semiconductor devices of Embodiments 1 to 3 are applied as the semiconductor device 202 that constitutes the main conversion circuit 201, it is possible to form the undercoat layer 35 only at the required portions, and the adhesion strength between the semiconductor element 19 and the like and the sealing material 37 is improved by this undercoat layer 35. As a result, the power conversion device can operate at a higher temperature.

[0131] In the present embodiment, an example in which the present disclosure is applied to a two-level three-phase inverter has been described. However, the present disclosure is not limited thereto, and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is employed, but it may also be a three-level or multi-level power conversion device. When supplying power to a single-phase load, the present disclosure can also be applied to a single-phase inverter. In addition, when supplying power to a DC load or the like, the present disclosure can also be applied to a DC / DC converter or an AC / DC converter.

[0132] In addition, the power conversion device to which the present disclosure is applied is not limited to the case where the load is a motor as described above. For example, it can also be used as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system. Moreover, it can also be used as a power conditioner for a solar power generation system or a power storage system, etc.

[0133] Furthermore, in the semiconductor devices and the like described in each embodiment, a case has been described in which the adhesion strength between the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted and the sealing material 37 is improved by sandwiching a primer layer 35 formed of an aqueous solution of a silane coupling agent therebetween. As a member for improving the adhesion strength between the ceramic substrate 5 or the like and the sealing material 37, as long as it is a member capable of improving the adhesion strength between the inorganic material of the ceramic substrate 5 and the organic material of the sealing material 37, it is not limited to the primer layer 35 formed of an aqueous solution of a silane coupling agent.

[0134] For the semiconductor devices and the like described in each embodiment, various combinations can be made as needed.

[0135] The embodiments disclosed this time are illustrative and not limited thereto. The present disclosure is shown not by the scope described above but by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

[0136] Industrial Applicability

[0137] The present disclosure is effectively used for a semiconductor device in which an insulating substrate or the like on which a semiconductor element is mounted is housed in a housing and sealed with a sealing material.

[0138] Description of Reference Numerals

[0139] 1 Semiconductor device; 3, 4 Insulating layers; 5 Ceramic substrate; 7 Substrate body; 9, 11, 12 Conductor layers; 13 Housing; 15 Adhesive; 16 Conductor layer; 17a, 17b, 18a, 18b Solder; 19 Semiconductor element; 21 Power semiconductor element; 23 Surface electrode; 24 IC element; 26 Signal electrode; 25, 27, 29 Conductive wires; 31 External electrode terminal; 31a Source electrode terminal; 31b Drain electrode; 32 Main terminal; 33 Signal electrode terminal; 34 Primer solution; 34a Droplet; 35 Primer layer; 37 Sealing material; 39 Cooling mechanism; 41 Water-cooled fin; 41a Flow path; 42 Cooling water; 43 Cooling fin; 45 Lead frame; 51 Suction nozzle; 52 Air nozzle; 53 Cover jig; 100 Power supply; 200 Power conversion device; 201 Main conversion circuit; 202 Semiconductor module; 203 Control circuit; 300 Load; Y1 Arrow; DC Dotted line box.

Claims

1. A method for manufacturing a semiconductor device, wherein a semiconductor element of the semiconductor device is sealed with a sealing material. Wherein, It includes: A step of forming a sealed member including the semiconductor element to be sealed with the sealing material; A step of housing the sealed member in a housing; A step of flowing a solution of a silane coupling agent into the housing; A step of removing the solution in the housing; A step of applying treatment to the solution attached to the sealed member in the step of flowing the solution into the housing, thereby forming a primer layer on the surface of the sealed member; And A step of sealing the sealed member formed with the primer layer by filling the housing with a sealing material. The step of forming the primer layer includes a step of forming the primer layer on the surface of the semiconductor element.

2. The method for manufacturing a semiconductor device according to claim 1, Wherein, As the solvent of the solution of the silane coupling agent, either water or ethanol is used.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, Wherein, The concentration of the silane coupling agent in the solution is 1 to 10%.

4. The method for manufacturing a semiconductor device according to claim 1 or 2, Wherein, The step of forming the sealed member includes a step of mounting the semiconductor element on an insulating substrate, The step of forming the primer layer includes a step of forming the primer layer on the surface of the insulating substrate on which the semiconductor element is mounted.

5. The method for manufacturing a semiconductor device according to claim 1 or 2, Wherein, The step of forming the sealed member includes a step of forming a conductive member for electrically connecting the semiconductor element to the outside, The step of forming the primer layer includes a step of forming the primer layer on the surface of the conductive member.

6. The method for manufacturing a semiconductor device according to claim 1 or 2, Wherein, The step of removing the solution includes a step of sucking the solution through a nozzle.

7. The method for manufacturing a semiconductor device according to claim 6, Wherein, The step of removing the solution includes a step of sucking the solution through the nozzle while concentrating the solution in the housing at one part by tilting the housing.

8. The method for manufacturing a semiconductor device according to claim 6, Wherein, The step of removing the solution includes a step of sucking the solution while moving the nozzle.

9. The method for manufacturing a semiconductor device according to claim 6, Wherein, The step of removing the solution includes a step of sucking the solution that will finally remain through the nozzle at the lowest position on the bottom surface of the housing by providing an inclination on the bottom surface of the housing.

10. The method for manufacturing a semiconductor device according to claim 1 or 2, Wherein, Between the step of removing the solution and the step of forming the primer layer, it includes: A step of covering a part including the outer wall surface of the housing other than the sealed member with a cover member; and A step of blowing air to blow off the solution remaining in the housing in a state where the cover member is disposed.

11. The method of manufacturing a semiconductor device according to claim 1 or 2, wherein, between the step of removing the solution and the step of forming the undercoat layer, a step of applying at least one of vibration and rotation to the housing is included.

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