An iJTAG network module wiring design method

Abstract

The application relates to the technical field of software engineering, in particular to an iJTAG network module wiring design method, which comprises the following steps: analyzing network structure information described in an ICL text; obtaining quantity information and ID information of modules in the network structure, and recording input and output ports of the whole network as preset modules with ID Port; obtaining interconnection constraint information of each module in the network structure, and outputting a position information table according to the interconnection constraint information; encoding position coordinates of each module and the preset modules in the network structure according to the position information table, and numbering each module and the preset modules in the network structure; and automatically wiring according to the interconnection constraint information and the position coordinate coding; according to the traversal algorithm principle of a directed graph, in combination with ICL text analysis, information of the modules and connection relationships among the modules are extracted, automatic wiring of each module of the iJTAG network is realized, and efficiency is improved.

Description

Technical Field

[0001] This invention relates to the field of software engineering technology, and in particular to an iJTAG network module cabling design method. Background Technology

[0002] The IEEE 1687 standard addressed the testing and access issues of reconfigurable scan networks centered around embedded instruments. This standard proposed an embedded instrument-centric solution, unifying the on-chip network architecture of System-on-a-Chip (SoC) and providing methods for connecting various on-chip instruments and devices to the network. This network can be organized into many hierarchical structures, and network accessibility is increased by introducing Scan Insertion Bits (SIBs). SIBs can also bypass some registers not needed in the current test or verification, which helps reduce the overall network testing time and the number of global connections required to route to these registers. Researchers study reconfigurable scan networks by manually drawing network module diagrams. The Instrument Connectivity Language (ICL) defines the connection methods between iJTAG network modules. For iJTAG networks, when the network module locations are determined, researchers always manually route the connections between modules using ICL. With a large number of modules, manual drawing not only increases the routing error rate but also impacts overall R&D efficiency. Summary of the Invention

[0003] The purpose of this invention is to provide an iJTAG network module cabling design method, which combines ICL text parsing to extract module information and the connection relationships between modules, thereby realizing automatic wiring of iJTAG network modules and improving efficiency.

[0004] To achieve the above objectives, the present invention provides an iJTAG network module cabling design method, comprising:

[0005] Parse the network structure information described in the ICL text;

[0006] Obtain the quantity and ID information of the modules in the network structure, and denote the input and output ports of the entire network as preset modules with ID Port;

[0007] Obtain the interconnection constraint information of each module in the network structure, and output a position information table based on the interconnection constraint information;

[0008] The location coordinates of each module in the network structure and the preset module are encoded according to the location information table, and each module in the network structure and the preset module are numbered.

[0009] Automatic routing is performed based on the interconnection constraint information and the location coordinate encoding.

[0010] Specifically, the interconnection constraint information of each module in the network structure is obtained;

[0011] Based on the interconnection constraint information, the distance between modules with interconnection relationships is constrained;

[0012] Determine the corresponding location information for each module and output a location information table.

[0013] The constraint distance between the modules is twice the side length of the module.

[0014] Specifically, numbering the modules in the network structure and the preset modules involves assigning the preset module number 1, and numbering the modules in the network structure in the order of their appearance.

[0015] The automatic routing based on the interconnection constraint information and the location coordinate encoding includes:

[0016] Based on the interconnection constraint information, determine the output module number corresponding to each module, list the adjacency matrix of the module, and output the adjacency matrix of the entire network structure after determining each module.

[0017] The adjacency matrix of the entire network structure is combined with the position coordinates of each module to automatically encode the routing.

[0018] This invention provides an iJTAG network module routing design method. Based on the principle of directed graph traversal algorithm and combined with ICL text parsing, this invention extracts module information and the connection relationships between modules, and realizes the wiring design of each module of iJTAG network. Compared with traditional manual drawing, this method improves the accuracy of routing and the overall research efficiency. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a flowchart of an iJTAG network module cabling design method according to the present invention.

[0021] Figure 2 This is a flowchart of the present invention for obtaining the interconnection constraint information of each module in the network structure and outputting a position information table based on the interconnection constraint information.

[0022] Figure 3 This is a flowchart of the automatic routing based on the interconnection constraint information and the location coordinate encoding of the present invention.

[0023] Figure 4 This is a connection example diagram of the iJTAG network module of the present invention.

[0024] Figure 5 This is a wiring diagram of the iJTAG network module with undetermined location according to the present invention.

[0025] Figure 6 This is a wiring diagram of the fixed-position iJTAG network module of the present invention. Detailed Implementation

[0026] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0027] Please see Figures 1-6 This invention provides an iJTAG network module cabling design method, comprising:

[0028] S1 parses the network structure information described in the ICL text;

[0029] Parsing the ICL text yields the network structure information described within. The iJTAG network described in the ICL text contains many instantiated modules; see [link to relevant documentation]. Figure 4 Such as SIB, TDR, SReg, etc. Among them, SIB is a segment insertion bit introduced in the IEEE 1687 standard. It is the basic structure for the reconfigurable test network. It can act as a switch through internal signal input, thereby controlling the working state of the test data register, i.e., TDR. SReg is a scan register used to access embedded instruments.

[0030] S2 obtains the number and ID information of the modules in the network structure, and records the input and output ports of the entire network as preset modules with ID Port;

[0031] By parsing the ICL, all module information is extracted, such as the ID information of each module. In addition, the input and output ports of the entire network are treated as a module, denoted as the module with the ID "Port". All modules are extracted and formed into a module set M = {m1, m2, ... mn}. n}, where n is the number of modules.

[0032] S3 obtains the interconnection constraint information of each module in the network structure, and outputs a position information table based on the interconnection constraint information;

[0033] The specific steps are as follows:

[0034] S31 Obtain the interconnection constraint information of each module in the network structure;

[0035] ICL is used for parsing to extract the interconnection constraint information between various modules, i.e., the connection information.

[0036] S32 constrains the distance between modules with interconnection relationships based on the interconnection constraint information;

[0037] From the input-output relationship of each module, for example Figure 4 For modules with interconnection constraints between the described SIB and TDR, the position determination of such modules requires vertical or horizontal constraints, with the distance d between the two modules being a fixed value of 2r, i.e., d = 2r. Since this invention assumes that each module is a rigid rectangular module with fixed length and width, the modules in this invention are squares with a fixed side length of r. Simultaneously, for the "Port" preset module, such as... Figure 4 As shown, since this module is a set of pins on the left side of the network, it needs to be fixed at the center of the left side of the layout network when determining its position.

[0038] S33 determines the corresponding location information of each module and outputs a location information table;

[0039] Once the location information for each module is determined, the corresponding location information table is output.

[0040] S4 encodes the position coordinates of each module in the network structure and the preset module according to the position information table, and assigns numbers to each module in the network structure and the preset module.

[0041] After extracting all the above information, it is necessary to perform cabling coding on all network modules. First, the location coordinates of each module are encoded according to the location information table. Then, the modules are numbered according to the order in which each module appears in the ICL. The preset module is numbered 1, and the remaining modules are numbered according to their appearance.

[0042] S5 automatically routes the wiring based on the interconnection constraint information and the position coordinate encoding;

[0043] The specific steps are as follows:

[0044] S51 determines the output module number corresponding to each module based on the interconnection constraint information, lists the adjacency matrix of the module, and outputs the adjacency matrix of the entire network structure after determining each module.

[0045] Based on the connection constraints between modules obtained from ICL parsing, the output module number corresponding to each module is determined and recorded, and the adjacency matrix of the module is listed. After determining each module, the adjacency matrix representation of the entire iJTAG network structure is output.

[0046] S52 automatically routes the network by combining the adjacency matrix of the entire network structure with the position coordinates of each module.

[0047] Automatic routing is performed based on the adjacency matrix of the entire network structure and the location coordinates of each module.

[0048] This invention provides an iJTAG network module routing design method. Since directed graphs can interconnect two units, the key to routing iJTAG network modules lies in parsing the netlist data using ICL (Internal Classification) to route each module in the network. Therefore, this invention, based on the traversal algorithm principle of directed graphs and combined with ICL text parsing, extracts module information and the connection relationships between modules to achieve the wiring design of each iJTAG network module. For example... Figure 4 The diagram shows the iJTAG network module connection diagram in the IEEE 1687 standard. As can be seen, this invention first requires parsing the corresponding ICL text to obtain the number of modules and the connection relationships between them. Furthermore, if the location of each module is unknown beforehand, not only will the modules overlap with the connecting lines, but the overlapping of modules will also make the connecting lines invisible. Figure 5 As shown, the connection lines between SIB2 and SReg2 are "hidden"; therefore, this invention performs wiring operations on each module based on the determined layout positions of each module, such as... Figure 6 The diagram shown is a network cabling diagram implemented according to the IEEE 1687 standard using the above process. Compared to... Figure 5 The method proposed in this design is more in line with the IEEE 1687 standard, and compared with the traditional manual drawing, it improves the accuracy of wiring and the overall research efficiency.

[0049] The above description discloses only one preferred embodiment of the present invention, and should not be construed as limiting the scope of the present invention. Those skilled in the art will understand that all or part of the processes of the above embodiments can be implemented, and equivalent changes made in accordance with the claims of the present invention are still within the scope of the invention.

Claims

1. A method for iJTAG network module wiring design, the method comprising: The method comprises the following steps: Resolving the network structure described in the ICL text; Obtaining the number information and ID information of the modules in the network structure, and taking the input and output ports of the entire network as a preset module with ID Port; Obtaining the interconnection constraint information of each module in the network structure, and outputting a position information table according to the interconnection constraint information; According to the position information table, position coordinate coding is performed on each module in the network structure and the preset module, and numbering is performed on each module in the network structure and the preset module; According to the interconnection constraint information and the position coordinate coding, automatic wiring is performed, which comprises the following steps: According to the interconnection constraint information, the output module number corresponding to each module is determined, and the adjacency matrix of the module is listed. After determining each module, the adjacency matrix of the entire network structure is outputted; The adjacency matrix of the entire network structure is combined with the position coordinate coding of each module to automatically wire.

2. The iJTAG network module wiring design method of claim 1, wherein The step of obtaining the interconnection constraint information of each module in the network structure and outputting a position information table according to the interconnection constraint information comprises the following steps: Obtaining the interconnection constraint information of each module in the network structure; According to the interconnection constraint information, the distance between modules with interconnection relationship is constrained; Determine the corresponding position information of each module, and output the position information table.

3. The iJTAG network module wiring design method of claim 2, wherein The constraint distance between the modules is twice the length of the module side.

4. The iJTAG network module wiring design method of claim 1, wherein The step of numbering each module in the network structure and the preset module is specifically: the preset module is numbered as 1, and each module in the network structure is numbered in order of appearance.

Images