Method for fabricating flexible single-crystalline silicon thin-film semiconductor device and flexible single-crystalline silicon thin film

Abstract

The present invention discloses a method for preparing a flexible single-crystalline silicon thin-film semiconductor device and a flexible single-crystalline silicon thin film. Based on a single-crystalline silicon wafer, a flexible single-crystalline silicon thin-film semiconductor device is formed through processes including stress buffer film deposition, sacrificial layer deposition, sacrificial layer bonding, single-crystalline silicon wafer thinning, protective film deposition, high-temperature preparation of semiconductor chips, polymer coating, and water-soluble wet etching. And a flexible single-crystalline silicon thin film is formed through processes including stress buffer film deposition, sacrificial layer deposition, sacrificial layer bonding, single-crystalline silicon wafer thinning, polymer coating, and water-soluble wet etching. By using a water-soluble GeO-based inorganic compound as the sacrificial layer, it is environmentally friendly, has a fast etching speed, and is compatible with the high-temperature preparation process of semiconductor chips, greatly improving the performance of semiconductor devices, with high production efficiency, high yield rate, and low cost.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductors, and particularly relates to a method for preparing a flexible single-crystalline silicon thin-film semiconductor device and a flexible single-crystalline silicon thin film. Background Art

[0002] With the improvement of technological level and people's living standards, the flexibility, wearability, foldability, etc. of electronic products have become new development requirements, and flexible electronic products are widely used in fields such as electronic communication and medical treatment. Traditional flexible electronic devices use surface mount technology to mount traditional hard-packaged chips on flexible circuit boards. The circuit board in the area of the hard-packaged chip remains rigid after surface mounting, greatly restricting the overall flexibility deformation ability of electronic products. Therefore, flexible semiconductor chips are the key to the overall flexibility of electronic products.

[0003] At present, most flexible chips are fabricated by transferring semiconductor chip devices or directly patterning passive devices on organic polymer material substrates such as polyimide, parylene, and silicone resin. However, the information processing speed of such flexible chips is slow; the melting point of organic semiconductor materials is low, which is not suitable for the preparation of traditional high-performance semiconductor chip devices; some high-temperature materials cannot be directly deposited on these substrates, thus affecting the preparation and utilization of some high-performance sensor devices. Although the bulk material of silicon is generally considered to be a hard and brittle material, when silicon is thinned to the micron or even nanometer scale, the surface stress caused by bending deformation can be greatly reduced, so that mechanical deformation can be easily achieved without fracture, and such a thin film still retains the characteristics of single-crystalline silicon, thus providing a very attractive flexible platform for obtaining high-performance flexible electronic devices and circuits.

[0004] In the prior art, Zhang Canghai et al. (Chinese Physics Letters, Vol. 30(8), 2013, pp. 086201) obtained a flexible substrate by dry etching a silicon-on-insulator (SOI) wafer on the back side. The Chinese patent with the application number 201910927391.4 proposed a method of obtaining a silicon nanomembrane layer by wet HF etching on SOI, and then transferring the silicon nanomembrane to a PET substrate by a transfer technique to obtain a flexible silicon substrate after bonding. S. Mack et al. (Applied Physics Letters, 88, 2006, pp. 213101) obtained a flexible silicon ribbon by anisotropically etching silicon after etching grooves on the front side of a silicon (111) wafer, but these methods have higher costs compared with traditional silicon (100) wafers. Sally M Ahmed et al. (IEEE 27th International Conference on Micro Electro Mechanical Systems, 2014, pp. 548 - 551) obtained a flexible silicon membrane by first deeply etching silicon on the front side of a silicon (100) wafer to form an array of etching holes and then performing anisotropic dry etching.

[0005] Among them, for the technology of dry etching the SOI wafer on the back side, due to the lack of a support layer, the wafer is prone to fragmentation during the etching and thinning process, and there is a problem of difficult retrieval after etching. The technology of obtaining a flexible silicon substrate by wet HF etching of SOI takes a very long time, usually more than 8 hours, and a large amount of corrosive chemical raw materials (HF solution) are used in the process, which is very dangerous and extremely likely to cause environmental pollution. The method of obtaining a flexible silicon membrane by anisotropically etching silicon after etching grooves on the front side of the silicon wafer has a higher cost, and etching holes need to be made on the silicon wafer in advance, occupying the area of the silicon wafer, affecting the utilization efficiency of the silicon wafer surface, and hindering the design flexibility of device circuits on the silicon wafer. And more importantly, the flexible silicon membranes directly obtained by the above methods are very thin and need to be bonded to an additional flexible organic support layer to be used, and the organic support layer has a low melting point, which limits the deposition of some high-temperature materials on the substrate, thereby affecting the preparation of high-performance semiconductor chips. Summary of the Invention

[0006] The object of the present invention is to propose a method for preparing a flexible single-crystalline silicon thin-film semiconductor device and a flexible single-crystalline silicon thin film in view of the above problems. A water-soluble GeO-based inorganic compound is used as a sacrificial layer, which is green and environmentally friendly, has a fast etching speed, is compatible with the high-temperature preparation process of semiconductor chips, can obtain high-performance semiconductor devices, and has high production efficiency, high yield rate, and low cost.

[0007] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0008] A method for preparing a flexible single-crystalline silicon thin-film semiconductor device proposed by the present invention includes the following steps:

[0009] S1. Deposit a stress buffer film on the pre-treated single-crystalline silicon wafer;

[0010] S2. Prepare a sacrificial layer on the stress buffer film to form a first film layer assembly, and the sacrificial layer is a water-soluble GeO-based inorganic compound;

[0011] S3. Bond the sacrificial layers of two first film layer assemblies to form a second film layer assembly;

[0012] S4. Process and thin one of the single-crystalline silicon wafers of the second film layer assembly to a thickness of 0.2 μm to 80 μm;

[0013] S5. Immerse the thinned second film layer assembly in pure water to pre-etch the bonded sacrificial layer;

[0014] S6. Deposit a protective film on the side walls of the pre-etched second film layer assembly, and the protective film covers the bonded sacrificial layer;

[0015] S7. Prepare a semiconductor chip on the thinned single-crystalline silicon wafer, and then sequentially coat a polymer film and a photoresist;

[0016] S8. After lithographic patterning, etch the area where the photoresist is removed to any thickness of the bonded sacrificial layer, and then remove the remaining photoresist;

[0017] S9. Place the second film layer assembly after removing the photoresist in pure water to complete the etching of the bonded sacrificial layer, and obtain a flexible single-crystalline silicon thin-film semiconductor device.

[0018] Preferably, the bonding pressure for sacrificial layer bonding is 0.01 kg to 10 kg, the bonding temperature is 100 °C to 600 °C, and the etching depth for pre-etching is 20 nm to 1 μm.

[0019] Preferably, the thickness of the stress buffer film is 10 nm to 1500 nm, the material is a composite layer composed of one or more of SiO2, Al2O3, and HfO2, and the processing technology is atomic force deposition or thermal oxidation.

[0020] Preferably, the thickness of the sacrificial layer is 10 nm to 10 μm, and the content of GeO is greater than or equal to 30%, and the material is one of GeO, GeO2, GeON, and metal-doped GeO2, and the processing technology is one of sputtering, atomic force deposition, chemical vapor deposition, and physical vapor deposition.

[0021] Preferably, the material of the protective film is one of SiO2, Al2O3, and HfO2, and the thickness is more than 1.5 times the thickness of the sacrificial layer after bonding.

[0022] Preferably, the semiconductor chip is a MOS transistor, a memory, or a memory computing integrated unit composed of MOS transistors and memories.

[0023] Preferably, the material of the polymer film is one of silicone resin, polyimide, parylene, and SU-8 glue, and the thickness is 1 μm to 100 μm.

[0024] A method for preparing a flexible single-crystalline silicon thin film includes the following steps:

[0025] S1. Deposit a stress buffer film on the pretreated single-crystalline silicon wafer;

[0026] S2. Prepare a sacrificial layer on the stress buffer film to form a first film layer assembly, and the sacrificial layer is a water-soluble GeO-based inorganic compound;

[0027] S3. Bond the sacrificial layers of two first film layer assemblies to form a second film layer assembly;

[0028] S4. Thin one of the single-crystalline silicon wafers in the second film layer assembly to a thickness of 0.2 μm to 80 μm;

[0029] S5. Coat a polymer film on the thinned single-crystalline silicon wafer;

[0030] S6. Place the coated second film layer assembly in pure water to etch the bonded sacrificial layer to obtain a flexible single-crystalline silicon thin film.

[0031] Preferably, the bonding pressure of the sacrificial layer bonding is 0.01 kg to 10 kg, the bonding temperature is 100 °C to 600 °C, the thickness of the stress buffer film is 10 nm to 1500 nm, the material is a composite layer composed of one or more of SiO2, Al2O3, and HfO2, the processing technology is atomic force deposition or thermal oxidation, the material of the polymer film is one of silicone resin, polyimide, parylene, and SU-8 glue, and the thickness is 1 μm to 100 μm.

[0032] Preferably, the thickness of the sacrificial layer is 10 nm to 10 μm, and the content of GeO is greater than or equal to 30%, the material is one of GeO, GeO2, GeON, and metal-doped GeO2, and the processing technology is one of sputtering, atomic force deposition, chemical vapor deposition, and physical vapor deposition.

[0033] Compared with the prior art, the beneficial effects of the present invention are:

[0034] (1) This application is based on a single-crystalline silicon wafer and uses a water-soluble GeO-based inorganic compound as the sacrificial layer. The water-soluble etching is green, environmentally friendly, and pollution-free, and the etching speed is fast (500 nm / s), which is much higher than the etching speed of the sacrificial layer by HF solution (10 nm / s). It not only maintains the characteristics of single-crystalline silicon but also is compatible with the high-temperature preparation process of semiconductor chips, enabling the production of high-performance semiconductor devices and flexible single-crystalline silicon thin films with high production efficiency, high yield, low cost, and convenient transfer.

[0035] (2) A stress buffer film is used to achieve stress buffering under the bonding action of the sacrificial layer. The polymer film not only protects the thinned single-crystalline silicon wafer to prevent the semiconductor chips prepared thereon from being corroded by the external environment but also serves as a flexible support to avoid damage. The sacrificial layer is protected by the protective film to isolate it from external air and moisture, preventing damage to the sacrificial layer during subsequent semiconductor chip wet etching and other preparation processes.

[0036] (3) Compared with the prior art, semiconductor chips can be pre-prepared on the surface of the single-crystalline silicon wafer by this method, effectively avoiding the influence of the high-temperature preparation process on the flexible polymer film, and being compatible with microelectronic processes and even MEMS process technologies, providing the possibility for the large-scale application of flexible chips in fields such as electronic communication and medical treatment. Description of the Drawings

[0037] Figure 1 It is a structural cross-sectional view of step S1 in the method for preparing a flexible single-crystalline silicon thin film semiconductor device of the present invention;

[0038] Figure 2 It is a structural cross-sectional view of step S2 in the method for preparing a flexible single-crystalline silicon thin film semiconductor device of the present invention;

[0039] Figure 3 It is a structural cross-sectional view of step S3 in the method for preparing a flexible single-crystalline silicon thin film semiconductor device of the present invention;

[0040] Figure 4 It is a structural cross-sectional view of step S4 in the method for preparing a flexible single-crystalline silicon thin film semiconductor device of the present invention;

[0041] Figure 5 It is a structural cross-sectional view of step S5 in the method for preparing a flexible single-crystalline silicon thin film semiconductor device of the present invention;

[0042] Figure 6 It is a structural cross-sectional view of step S6 in the method for preparing a flexible single-crystalline silicon thin film semiconductor device of the present invention;

[0043] Figure 7 It is a structural cross-sectional view of step S7 for preparing a semiconductor chip in the method for preparing a flexible single-crystalline silicon thin film semiconductor device of the present invention;

[0044] Figure 8 Stereoscopic view of the structure of the semiconductor chip prepared in step S7 in the method for preparing a flexible single-crystalline silicon thin-film semiconductor device of the present invention;

[0045] Figure 9 Cross-sectional view of the structure of the polymer film coated in step S7 in the method for preparing a flexible single-crystalline silicon thin-film semiconductor device of the present invention;

[0046] Figure 10 Cross-sectional view of the structure of the photolithographic patterning in step S8 in the method for preparing a flexible single-crystalline silicon thin-film semiconductor device of the present invention;

[0047] Figure 11 Cross-sectional view of the structure of the sacrificial layer after etching is completed in step S9 after bonding in the method for preparing a flexible single-crystalline silicon thin-film semiconductor device of the present invention;

[0048] Figure 12 Cross-sectional view of the structure of the polymer film coated in step S5 in the method for preparing a flexible single-crystalline silicon thin-film of the present invention;

[0049] Figure 13 Cross-sectional view of the structure of the sacrificial layer after etching is completed in step S6 after bonding in the method for preparing a flexible single-crystalline silicon thin-film of the present invention.

[0050] Explanation of reference numerals: 1, single-crystalline silicon wafer; 2, stress buffer film; 3, sacrificial layer; 4, etching groove; 5, protective film; 6, semiconductor chip; 7, polymer film; 8, effective area; 9, semiconductor device. Detailed implementation manners

[0051] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0052] It should be noted that unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which the present application belongs. The terms used in the specification of the present application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0053] Embodiment 1:

[0054] As Figure 1-11 shown, a method for preparing a flexible single-crystalline silicon thin-film semiconductor device includes the following steps:

[0055] S1. Deposit a stress buffer film 2 on the pre-treated single-crystalline silicon wafer 1;

[0056] S2. Prepare a sacrificial layer 3 on the stress buffer film 2 to form a first film layer assembly, where the sacrificial layer 3 is a water-soluble GeO-based inorganic compound;

[0057] S3. Bond the sacrificial layers 3 of two first film layer assemblies to form a second film layer assembly;

[0058] S4. Process and thin one of the single-crystalline silicon wafers 1 of the second film layer assembly to a thickness of 0.2 μm to 80 μm;

[0059] S5. Immerse the thinned second film layer assembly in pure water to pre-etch the bonded sacrificial layer 3;

[0060] S6. Deposit a protective film 5 on the sidewalls of the pre-etched second film layer assembly, and the protective film 5 covers the bonded sacrificial layer 3;

[0061] S7. Prepare a semiconductor chip 6 on the thinned single-crystalline silicon wafer 1, and then sequentially coat a polymer film 7 and a photoresist;

[0062] S8. After lithographic patterning, etch the area where the photoresist is removed to any thickness of the bonded sacrificial layer, and then remove the remaining photoresist;

[0063] S9. Place the second film layer assembly after removing the photoresist in pure water to complete the etching of the bonded sacrificial layer 3, and obtain a flexible single-crystalline silicon thin-film semiconductor device.

[0064] Among them, the pretreatment of the single-crystal silicon wafer 1 can improve the surface cleanliness and avoid affecting the performance of semiconductor devices. The stress buffer film 2 is used for stress buffering during bonding to protect the single-crystal silicon wafer 1. The sacrificial layer 3 is water-soluble, has a fast etching rate and is not easily affected by high temperatures, which helps to improve the processing efficiency and is compatible with the high-temperature preparation process of semiconductor chips 6, obtaining better film crystallization performance, thus greatly improving the performance of semiconductor devices. Bond the sacrificial layers 3 of the two first film layer assemblies, and one of the first film layer assemblies forms a support layer to support the single-crystal silicon wafer 1 that is subsequently thinned for the other first film layer assembly. The bonded sacrificial layer 3 is twice the thickness of the sacrificial layer 3 of the first film layer assembly. The thinning of the single-crystal silicon wafer 1 can be achieved by processing techniques such as chemical mechanical polishing, ICP dry etching, wet etching with an alkaline solution, and H ion implantation bombardment stripping. Pre-etch the second film layer assembly to deposit a protective film 5 on the sidewalls, which serves to isolate the water-soluble sacrificial layer 3 from the outside air and moisture, and avoid damaging the bonded sacrificial layer 3 during subsequent semiconductor chip 6 wet etching and other preparation processes. The protective film 5 can be formed by processes such as atomic layer deposition and chemical vapor deposition. The polymer film 7 not only plays a protective role to prevent the semiconductor chip 6 from being corroded by the external environment, but also can serve as a flexible support for the thinned single-crystal silicon wafer 1. Photolithographically pattern to any thickness of the bonded sacrificial layer 3, such as penetrating the bonded sacrificial layer 3, which can increase the pure water contact area, thereby improving the etching rate. After etching is completed, the semiconductor device can be obtained and is convenient to pick up. For the remaining annular outer frame, it can not only be used as an effective verification means to realize the visual inspection of the technical barrier of this application, but also can be reused after removing the outer protective film 5.

[0065] This method is based on a single-crystal silicon wafer and uses a water-soluble GeO-based inorganic compound as the sacrificial layer. The water-soluble etching is green, environmentally friendly, and pollution-free, and has a fast etching rate (500 nm / s), which is much higher than the etching rate of the sacrificial layer by HF solution (10 nm / s). It not only maintains the characteristics of single-crystal silicon but also is compatible with the high-temperature preparation process of semiconductor chips, and can obtain high-performance flexible single-crystal silicon thin-film semiconductor devices with high production efficiency, high yield, low cost, and convenient transfer. A stress buffer film is used to achieve stress buffering under the bonding of the sacrificial layer. The polymer film not only plays a protective role to prevent the semiconductor chip prepared thereon from being corroded by the external environment but also can serve as a flexible support to avoid damage, and the sacrificial layer is protected by a protective film to isolate it from the outside air and moisture, avoiding damage to the sacrificial layer during subsequent semiconductor chip wet etching and other preparation processes. Compared with the prior art, this method can pre-prepare semiconductor chips on the surface of the single-crystal silicon wafer, effectively avoiding the influence of the high-temperature preparation process on the flexible polymer film, and can be compatible with microelectronic processes and even MEMS process technologies, providing the possibility for the large-scale application of flexible chips in fields such as electronic communication and medical treatment.

[0066] In one embodiment, the bonding pressure of the sacrificial layer bonding is 0.01 kg to 10 kg, the bonding temperature is 100 °C to 600 °C, and the etching depth of the pre-etching is 20 nm to 1 μm. When the bonding pressure and the bonding temperature are within this condition range, the bonding effect of the two first film layer assemblies is better, with strong bonding strength and low porosity. The etching depth of the pre-etching can also be adjusted according to actual requirements.

[0067] In one embodiment, the thickness of the stress buffer film 2 is 10 nm to 1500 nm, and the material is a composite layer composed of one or more of SiO2, Al2O3, and HfO2. The processing technology is atomic force deposition or thermal oxidation. When the thickness of the stress buffer film 2 is less than 10 nm, it cannot play the role of stress buffering. When it is greater than 1500 nm, the surface roughness increases, which is not conducive to the subsequent deposition of the sacrificial layer 3 and even less conducive to bonding because large roughness will cause a significant increase in stress during the bonding process. The material of the stress buffer film 2 can be one of SiO2, Al2O3, and HfO2, or a composite layer composed of multiple of SiO2, Al2O3, and HfO2, or can also be formed by other processes in the prior art.

[0068] In one embodiment, the thickness of the sacrificial layer 3 is 10 nm to 10 μm, and the content of GeO is greater than or equal to 30%. The material is one of GeO, GeO2, GeON, and metal-doped GeO2, and the processing technology is one of sputtering, atomic force deposition, chemical vapor deposition, and physical vapor deposition. A lower thickness (such as 10 nm) is beneficial for the protective film 5 to completely cover, and a higher thickness (such as 10 μm) is beneficial for bonding, and a compromise can be made within this range. It should be noted that the selection of GeO-based inorganic compound materials and processing technologies is not limited to this. Those skilled in the art can also select other water-soluble GeO-based inorganic compounds and processing technologies according to actual requirements.

[0069] In one embodiment, the material of the protective film 5 is one of SiO2, Al2O3, and HfO2, and the thickness is more than 1.5 times the thickness of the sacrificial layer 3 after bonding, ensuring complete coverage of the sacrificial layer 3 for protection.

[0070] In one embodiment, the semiconductor chip 6 is a MOS transistor, a memory, or a memory-computation integrated unit composed of a MOS transistor and a memory. Among them, the memory can be DRAM, Flash, PCM, MRAM, ReRAM, FeFET, FeRAM, etc. The semiconductor chip 6 is prepared by standard semiconductor processes. For example, on the single-crystal silicon wafer 1, through patterning, doping, dielectric layer deposition, metallization, and a series of heat treatment processes, the preparation of electronic devices is completed, which is the prior art well-known to those skilled in the art and will not be elaborated here.

[0071] In one embodiment, the polymer film 7 is made of one of silicone resin, polyimide, parylene, and SU-8 glue, and has a thickness of 1 μm to 100 μm. The polymer film 7 serves a protective role and a flexible support role.

[0072] The following is a detailed description through specific implementation examples:

[0073] 1) Pretreat the single-crystal silicon wafer 1, and clean and dry the single-crystal silicon wafer 1 using standard processes;

[0074] 2) Deposit a stress buffer film 2 on the single-crystal silicon wafer 1 processed in step 1) for stress buffering during subsequent bonding. The stress buffer film 2 is Al2O3, with a thickness of 1000 nm, and the deposition is carried out using a thermal oxidation process, as Figure 1 shown;

[0075] 3) Prepare a water-soluble sacrificial layer 3 on the stress buffer film 2 to form a first film layer assembly. The sacrificial layer 3 is GeON, with a thickness of 70 μm, and the preparation process is chemical vapor deposition, as Figure 2 shown;

[0076] 4) Bond the sacrificial layers 3 of two first film layer assemblies to form a second film layer assembly. The bonding pressure is 5.6 kg, and the bonding temperature is 500 °C, as Figure 3 shown;

[0077] 5) Thin the upper single-crystal silicon wafer 1 after bonding. The thinning is carried out using chemical mechanical polishing, and the thickness of the thinned upper single-crystal silicon wafer 1 is 50 μm, as Figure 4 shown;

[0078] 6) Immerse the thinned second film layer assembly as a whole in pure water for pre-etching of the water-soluble sacrificial layer 3, and etch away 5 μm of GeON along the edge of the water-soluble sacrificial layer 3, leaving a circular etching groove 4 on the side, as Figure 5 shown;

[0079] 7) Deposit a protective film 5 on the sidewall of the pre-etched second film layer assembly, which serves to isolate the water-soluble sacrificial layer 3 from the outside air and moisture, and prevent damage to the sacrificial layer 3 during subsequent semiconductor chip 6 wet etching and other preparation processes. The protective film 5 is SiO2, with a wall thickness of 4 μm, and ensure that the sacrificial layer 3 is completely covered, such as 1.5 times the thickness of the sacrificial layer 3 after bonding. The deposition is carried out using a chemical vapor deposition process, as Figure 6 shown;

[0080] 8) Prepare a semiconductor chip 6 on the thinned single-crystal silicon wafer 1. The semiconductor chip 6 is a MOS transistor, and is prepared using standard semiconductor processes in the prior art, as Figure 7 、 8 shown;

[0081] 9) A polymer film 7 is coated on the single-crystalline silicon wafer 1 of the semiconductor chip 6, which not only plays a protective role to prevent the semiconductor chip 6 from being corroded by the external environment, but also can serve as a flexible support for the upper silicon thin film. The polymer is SU-8 glue with a thickness of 25 μm, as Figure 9 shown;

[0082] 10) After coating a photoresist (not shown in Figure 9 ) on the polymer film 7 and patterning it by photolithography (as Figure 10 shown), the middle invalid part (the area without the semiconductor chip 6) is etched away, and the effective area 8 where the semiconductor chip 6 is located and the annular sidewall are retained, and then the photoresist is removed;

[0083] 11) The whole is placed in pure water to etch away the water-soluble sacrificial layer 3, and thus a MOS transistor (semiconductor device 9) based on a flexible single-crystalline silicon thin film is obtained. The remaining annular outer frame can be used as an effective verification means to realize visual inspection, as Figure 11 shown.

[0084] Example 2:

[0085] As Figure 1-4 shown in FIGS. 12 - 13, a method for preparing a flexible single-crystalline silicon thin film includes the following steps:

[0086] S1. Deposit a stress buffer film 2 on the pretreated single-crystalline silicon wafer 1;

[0087] S2. Prepare a sacrificial layer 3 on the stress buffer film 2 to form a first film layer assembly. The sacrificial layer 3 is a water-soluble GeO-based inorganic compound;

[0088] S3. Bond the sacrificial layers 3 of two first film layer assemblies to form a second film layer assembly;

[0089] S4. Process and thin one of the single-crystalline silicon wafers 1 of the second film layer assembly to a thickness of 0.2 μm - 80 μm;

[0090] S5. Coat a polymer film 7 on the thinned single-crystalline silicon wafer 1;

[0091]

[0092] ​Among them, the pretreatment of the single-crystalline silicon wafer 1 can improve the surface cleanliness and avoid affecting the performance of semiconductor devices. The stress buffer film 2 is used for stress buffering during bonding to protect the single-crystalline silicon wafer 1. The sacrificial layer 3 is water-soluble, has a fast etching speed and is not easily affected by high temperature, which helps to improve the processing efficiency and is compatible with the high-temperature preparation process of semiconductor chips 6 to obtain better film crystallization performance, thereby greatly improving the performance of semiconductor devices. Bond the sacrificial layers 3 of the two first film layer assemblies to form a support layer for subsequent support of the thinned single-crystalline silicon wafer 1. The thinning of the single-crystalline silicon wafer 1 can be achieved by processing techniques such as chemical mechanical polishing, ICP dry etching, wet etching with an alkaline solution, and H ion implantation bombardment stripping. The polymer film 7 can be used as a flexible support for the thinned single-crystalline silicon wafer 1. After etching the bonded sacrificial layer 3 to obtain a flexible single-crystalline silicon thin film, the remaining single-crystalline silicon wafer 1 and stress buffer film after etching can be reused.

[0093] This method is based on a single-crystalline silicon wafer and uses a water-soluble GeO-based inorganic compound as the sacrificial layer. The water-soluble etching is green, environmentally friendly and pollution-free, and has a fast etching speed (500 nm / s), which is much higher than the etching speed of the sacrificial layer with an HF solution (10 nm / s). It not only maintains the characteristics of single-crystalline silicon but also is compatible with the high-temperature preparation process of semiconductor chips, and can obtain a high-performance flexible single-crystalline silicon thin film with high production efficiency, high yield, low cost and convenient transfer; uses a stress buffer film to achieve stress buffering under the bonding of the sacrificial layer, and uses a polymer film to not only protect the thinned single-crystalline silicon wafer but also serve as a flexible support to avoid damage; it can be compatible with microelectronic processes and even MEMS process technologies, providing the possibility for the large-scale application of flexible chips in fields such as electronic communication and medical treatment.

[0094] In one embodiment, the bonding pressure of the sacrificial layer bonding is 0.01 kg to 10 kg, the bonding temperature is 100 °C to 600 °C, the thickness of the stress buffer film 2 is 10 nm to 1500 nm, and the material is a composite layer composed of one or more of SiO2, Al2O3, and HfO2. The processing process is atomic force deposition or thermal oxidation. The material of the polymer film 7 is one of silicone resin, polyimide, parylene, and SU-8 glue, and the thickness is 1 μm to 100 μm. When the bonding pressure and bonding temperature are within this condition range, the bonding effect of the two first film layer assemblies is better, with strong bonding strength and low porosity. The material of the stress buffer film 2 can be one of SiO2, Al2O3, and HfO2, or a composite layer composed of multiple of SiO2, Al2O3, and HfO2, or other processes in the prior art can also be used for processing and formation. The polymer film 7 plays a protective role and a flexible support role.

[0095] In one embodiment, the thickness of the sacrificial layer 3 is 10 nm to 10 μm, and the content of GeO is greater than or equal to 30%. The material is one of GeO, GeO2, GeON, and metal-doped GeO2, and the processing technology is one of sputtering, atomic force deposition, chemical vapor deposition, and physical vapor deposition. A lower thickness (such as 10 nm) is beneficial for the protective film 5 to completely cover, and a higher thickness (such as 10 μm) is beneficial for bonding. A compromise can be made within this range. It should be noted that the selection of GeO-based inorganic compound materials and processing technologies is not limited to this. Those skilled in the art can also select other water-soluble GeO-based inorganic compounds and processing technologies according to actual needs.

[0096] The following is a detailed description through specific implementation schemes:

[0097] 1) Pretreat the single-crystalline silicon wafer 1, and clean and dry the single-crystalline silicon wafer 1 using standard processes;

[0098] 2) Deposit a stress buffer film 2 on the single-crystalline silicon wafer 1 processed in step 1) for stress buffering during subsequent bonding. The stress buffer film 2 is HfO2 with a thickness of 700 nm, and the deposition is carried out using the atomic force deposition process, as Figure 1 shown;

[0099] 3) Prepare a water-soluble sacrificial layer 3 on the stress buffer film 2 to form a first film layer assembly. The sacrificial layer 3 is GeO2 with a thickness of 2 μm, and the preparation process is sputtering deposition, as Figure 2 shown;

[0100] 4) Bond the sacrificial layers 3 of two first film layer assemblies to form a second film layer assembly. The bonding pressure is 2 kg, and the bonding temperature is 300 °C, as ... Figure 3 shown;

[0101] 5) Thin the upper single-crystalline silicon wafer 1 after bonding. The thinning is carried out using ICP dry etching, and the thickness of the thinned upper single-crystalline silicon wafer 1 is 5 μm, as Figure 4 shown;

[0102] 6) Coat a polymer film 7 on the thinned single-crystalline silicon wafer 1 as a flexible support for the single-crystalline silicon thin film. The polymer film 7 is polyimide with a thickness of 5 μm, as Figure 12 shown;

[0103] 7) Place the whole in pure water to etch away the water-soluble sacrificial layer 3 to obtain a flexible single-crystalline silicon thin film, as Figure 13 shown.

[0104] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0105] The above-described embodiments only express relatively specific and detailed embodiments of the present application, but should not be construed as limiting the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A method for preparing a flexible single-crystalline silicon thin-film semiconductor device, characterized in that: The method for preparing a flexible single-crystalline silicon thin-film semiconductor device includes the following steps: S1. Deposit a stress buffer film on the pretreated single-crystalline silicon wafer; S2. Prepare a sacrificial layer on the stress buffer film to form a first film layer assembly, and the sacrificial layer is a water-soluble GeO-based inorganic compound; S3. Bond the sacrificial layers of two of the first film layer assemblies to form a second film layer assembly; S4. Process and thin one of the single-crystalline silicon wafers of the second film layer assembly to a thickness of 0.2 μm to 80 μm; S5. Immerse the thinned second film layer assembly in pure water to pre-etch the bonded sacrificial layer; S6. Deposit a protective film on the side walls of the pre-etched second film layer assembly, and the protective film covers the bonded sacrificial layer; S7. Fabricate a semiconductor chip on the thinned single-crystalline silicon wafer, and then sequentially coat a polymer film and a photoresist; S8. After lithographic patterning, etch the removed area of the photoresist to any thickness of the bonded sacrificial layer, and then remove the remaining photoresist; S9. Place the second film layer assembly after removing the photoresist in pure water to complete the etching of the bonded sacrificial layer, and obtain a flexible single-crystalline silicon thin-film semiconductor device.

2. The method for preparing a flexible single-crystalline silicon thin-film semiconductor device according to claim 1, characterized in that: The bonding pressure of the sacrificial layer bonding is 0.01 kg to 10 kg, the bonding temperature is 100 °C to 600 °C, and the etching depth of the pre-etching is 20 nm to 1 μm.

3. The method for preparing a flexible single-crystalline silicon thin-film semiconductor device according to claim 1, wherein: The thickness of the stress buffer film is 10 nm to 1500 nm, and the material is a composite layer composed of one or more of SiO2, Al2O3, and HfO2, and the processing technology is atomic layer deposition or thermal oxidation.

4. The method for preparing a flexible single-crystalline silicon thin-film semiconductor device according to claim 1, wherein: The thickness of the sacrificial layer is 10 nm to 10 μm, and the content of GeO is greater than or equal to 30%, and the material is one of GeO, GeO2, GeON, and metal-doped GeO2, and the processing technology is one of sputtering, atomic layer deposition, chemical vapor deposition, and physical vapor deposition.

5. The method for preparing a flexible single-crystalline silicon thin-film semiconductor device according to claim 1, wherein: The material of the protective film is one of SiO2, Al2O3, and HfO2, and the thickness is more than 1.5 times the thickness of the bonded sacrificial layer.

6. The method for preparing a flexible single-crystalline silicon thin-film semiconductor device according to claim 1, characterized in that: The semiconductor chip is a MOS transistor or a memory or a memory-computation integrated unit composed of a MOS transistor and a memory.

7. The method for preparing a flexible single-crystalline silicon thin-film semiconductor device according to claim 1, wherein: The material of the polymer film is one of silicone resin, polyimide, parylene, and SU-8 glue, and the thickness is 1 μm to 100 μm.

8. A method for preparing a flexible single-crystalline silicon thin film, characterized in that: The method for preparing a flexible single-crystalline silicon thin film includes the following steps: S1. Deposit a stress buffer film on the pretreated single-crystalline silicon wafer; S2. Prepare a sacrificial layer on the stress buffer film to form a first film layer assembly, and the sacrificial layer is a water-soluble GeO-based inorganic compound; S3. Bond the sacrificial layers of two of the first film layer assemblies to form a second film layer assembly; S4. Process and thin one of the single-crystalline silicon wafers of the second film layer assembly to a thickness of 0.2 μm to 80 μm; S5. Coat a polymer film on the thinned single-crystalline silicon wafer; S6. Place the coated second film layer assembly in pure water to complete the etching of the bonded sacrificial layer, and obtain a flexible single-crystalline silicon thin film.

9. The method for preparing a flexible single-crystalline silicon thin film according to claim 8, wherein: The bonding pressure of the sacrificial layer bonding is 0.01 kg to 10 kg, and the bonding temperature is 100 °C to 600 °C. The thickness of the stress buffer film is 10 nm to 1500 nm, and the material is a composite layer composed of one or more of SiO2, Al2O3, and HfO2. The processing technology is atomic force deposition or thermal oxidation. The material of the polymer film is one of silicone resin, polyimide, parylene, and SU-8 glue, and the thickness is 1 μm to 100 μm.

10. The method for preparing a flexible single-crystalline silicon thin film according to claim 8, characterized in that: The thickness of the sacrificial layer is 10 nm to 10 μm, and the content of GeO is greater than or equal to 30%. The material is one of GeO, GeO2, GeON, and metal-doped GeO2. The processing technology is one of sputtering, atomic force deposition, chemical vapor deposition, and physical vapor deposition.

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