Methods, devices and computer-readable storage media for mapping between multi-core microcontrollers

Abstract

This invention discloses a method, device, and computer-readable storage medium for mapping between multi-core microcontrollers. The method includes: obtaining key information of the interaction interface by parsing the configuration file of the interaction interface of the multi-core microcontroller; extracting memory mapping information from a preset functional description file based on the key information; determining the validity of the interaction interface based on the key information and the memory mapping information, and generating a source file matching the memory mapping information according to the source code generation rules of the functional description file when the interaction interface is determined to be valid; and, based on a Python script, automatically generating a C language source file defining the pairing of inter-core memory mapping information by adding memory mapping information and source code generation rules from the functional safety description file. This improves the efficiency of checking and managing the configuration file of the interaction interface of the multi-core microcontroller during the domain controller software development process, enhances the reliability of the multi-core interaction interface, and makes inter-core data interaction more intelligent and efficient.

Description

Technical Field

[0001] This invention relates to the field of automotive domain controller technology, and more particularly to a mapping method, device, and computer-readable storage medium for multi-core microcontrollers. Background Technology

[0002] With the rapid development of the automotive industry, especially the new energy vehicle industry, vehicle functions are becoming increasingly rich, and the safety requirements for vehicle functions are gradually becoming clearer. With the rise of domain controllers, traditional vehicle electronic control units / microcontrollers (ECUs) are being integrated into domain controllers. The interaction signals between ECU nodes are thus converted into communication between multiple cores, which poses a challenge to the safety of communication functions between ECU multi-cores.

[0003] Currently, multi-core microcontrollers integrate read-only memory, random access memory, timers, digital input / output, analog-to-digital converters, serial peripheral interfaces, and multiple central processing units (also known as cores) onto a single chip, forming a chip-level computer. Data interaction between the central processing units of a multi-core microcontroller is achieved through spinlocks. In hybrid and pure electric vehicles, multi-core microcontrollers are the standard implementation platform solution for high-performance and high-security domain controllers, serving as controllers for major vehicle components. In the development of automotive domain controller software, defining the interaction signals between cores—the communication interface—is a prerequisite for software development. Furthermore, as the domain controller development progresses, the functions and associated signals between cores often change, requiring iterations of the communication interface version. However, the existing AUTOSAR toolchain only provides data type creation and interaction interface definitions; manual memory mapping still needs to be allocated later, which is inefficient and error-prone. Summary of the Invention

[0004] To address the aforementioned problems, the present invention aims to provide a mapping method, device, and computer-readable storage medium for multi-core microcontrollers, which can effectively improve the efficiency of checking and managing configuration files for the interaction interfaces between multi-core microcontrollers during domain controller software development and improve the reliability of the multi-core interaction interfaces.

[0005] In a first aspect, embodiments of the present invention provide a mapping method between multi-core microcontrollers, including:

[0006] Parse the configuration file of the interaction interface of the multi-core microcontroller to obtain key information of the interaction interface;

[0007] Based on the key information, memory mapping information is extracted from a preset functional description file;

[0008] The validity of the interaction interface is determined based on the key information and the memory mapping information. If the interaction interface is determined to be valid, a source file matching the memory mapping information is generated according to the source code generation rules of the function description file.

[0009] As an improvement to the above solution, the method further includes:

[0010] Based on the functional safety partitioning rules among multi-core microcontrollers, the memory mapping information and source code generation rules of the functional description file are created.

[0011] As an improvement to the above solution, the method further includes:

[0012] Run the Eclipse software to create a Python script;

[0013] The Python script is executed to read the configuration file of the required multi-core microcontroller's interactive interface in text format.

[0014] As an improvement to the above solution, the step of parsing the configuration file of the multi-core microcontroller's interaction interface to obtain key information about the interaction interface includes:

[0015] The configuration file of the interaction interface of the multi-core microcontroller is parsed using regular expressions to obtain key information of the interaction interface; wherein, the key information includes: the interface name, read / write direction, source core number, target core number, data type name, data length, implemented data type, source running entity, target running entity, and cycle.

[0016] As an improvement to the above solution, the step of extracting memory mapping information from a preset functional description file based on the key information includes:

[0017] Using the interface name of the key information as a keyword, memory mapping information is extracted from the function description file.

[0018] As an improvement to the above solution, the step of determining the validity of the interaction interface based on the key information and the memory mapping information includes:

[0019] Using the interface name of the key information as a keyword, analyze whether the key attributes of the interaction interface are missing based on the memory mapping information; wherein, the key attributes include the source core number, target core number, data type name, data length, implementation data type, and source running entity of the interaction interface;

[0020] If any key attribute of the interaction interface is missing, the interaction interface is deemed invalid.

[0021] The interaction interface is considered valid if all key attributes of the interaction interface are present.

[0022] As an improvement to the above scheme, the memory mapping information includes: the variable name of the interaction interface, the reference header file name, the memory partition macro definition, the partition name, and the memory mapping header file; the source code generation rules include: memory mapping, start segment, interaction data buffer definition, and end segment.

[0023] As an improvement to the above solution, after analyzing whether the key attributes of the interaction interface are missing based on the memory mapping information using the interface name of the key information as a keyword, the method further includes:

[0024] Mark the records of missing key attributes of the interactive interface and save the records of missing key attributes to an Excel file;

[0025] When the interactive interface is determined to be invalid, an error message is generated and the EXCEL file is queried.

[0026] In a second aspect, embodiments of the present invention provide a core microcontroller mapping device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor executes the computer program to implement the core microcontroller mapping method as described in any one of the first aspects.

[0027] Thirdly, embodiments of the present invention provide a computer-readable storage medium comprising a stored computer program, wherein, when the computer program is executed, it controls the device where the computer-readable storage medium is located to perform the multi-core microcontroller mapping method as described in any one of the first aspects.

[0028] Compared to existing technologies, the beneficial effects of this invention are as follows: The multi-core microcontroller inter-mapping method includes: obtaining key information of the inter-mapping interface by parsing the configuration file of the multi-core microcontroller's interaction interface; extracting memory mapping information from a preset functional description file based on the key information; determining the validity of the inter-mapping interface based on the key information and the memory mapping information; and generating a source file matching the memory mapping information according to the source code generation rules of the functional description file when the inter-mapping interface is determined to be valid. By adding memory mapping information and source code generation rules to the functional safety description file, the automatic generation of C language source files defining the inter-core memory mapping information pairing is achieved, enabling fast, clear, and accurate delivery of source code. This improves the efficiency of checking and managing configuration files of multi-core microcontroller interaction interfaces during domain controller software development, enhances the reliability of multi-core interaction interfaces, and makes inter-core data interaction more intelligent and efficient. Attached Figure Description

[0029] To more clearly illustrate the technical solution of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a flowchart of a mapping method between multi-core microcontrollers provided in an embodiment of the present invention;

[0031] Figure 2 This is a schematic diagram of the process for generating the multi-core interaction interface provided in an embodiment of the present invention;

[0032] Figure 3 This is a schematic block diagram of a multi-core microcontroller mapping device provided in an embodiment of the present invention. Detailed Implementation

[0033] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] Please see Figure 1 This is a flowchart of a multi-core microcontroller mapping method provided in the first embodiment of the present invention, the multi-core microcontroller mapping method comprising:

[0035] S1: Parse the configuration file of the multi-core microcontroller's interaction interface to obtain key information about the interaction interface.

[0036] In this embodiment of the invention, the configuration file is an Arxml file. Arxml files are currently the standard file used by OEMs or component suppliers to develop multi-core interaction interfaces when developing domain controllers.

[0037] S2: Extract memory mapping information from a preset function description file based on the key information.

[0038] S3: Determine the validity of the interaction interface based on the key information and the memory mapping information, and when the interaction interface is determined to be valid, generate a source file that matches the memory mapping information according to the source code generation rules of the function description file.

[0039] It should be noted that the source code generated by the source code generation rule can be in C language, C++ language, or a mixed encoding of C language and C++ assembly; correspondingly, the source file can be a C language source file, a C++ language source file, or a mixed encoding file of C and C++. In this embodiment of the invention, the source file is a C language source file.

[0040] In this embodiment of the invention, by pre-creating a functional safety description file, key information from the Arxml file of the multi-core microcontroller's interaction interface is extracted. Based on the memory mapping information of the functional safety description file, the memory mapping is associated, and a C language source file defined in conjunction with the memory mapping information is automatically generated. This enables fast, clear, and accurate delivery of source code, improves the efficiency of checking and managing configuration files of the multi-core microcontroller's interaction interface during domain controller software development, enhances the reliability of the multi-core interaction interface, and makes inter-core data interaction more intelligent and efficient.

[0041] In an optional embodiment, the method further includes:

[0042] Based on the functional safety partitioning rules among multi-core microcontrollers, the memory mapping information and source code generation rules of the functional description file are created.

[0043] The functional safety partitioning rules define different memory mapping partitions for components of different functional safety levels or different cores. In this embodiment of the invention, memory mapping information (i.e., memory mapping rules) and source code generation rules for a functional safety description file are pre-created according to the functional safety partitioning rules. Then, combining the functional safety description file and the .arxml file, source files with C language syntax, such as memory mapping, start segment, interactive data buffer definition, and end segment, are automatically generated. This embodiment of the invention supports the generation of C language source files that match the memory mapping information of the one-to-one interaction interface between cores and conform to the functional safety partitioning rules, thus meeting the version management requirements for inter-core communication during domain controller software development.

[0044] Specifically, when adding or modifying data structure names, functional safety partitioning rules are recreated based on the input partitioning rules; when adding or modifying members within a data structure, functional safety partitioning rules do not need to be recreated.

[0045] In an optional embodiment, the method further includes:

[0046] Run the Eclipse software to create a Python script;

[0047] The Python script is executed to read the configuration file of the required multi-core microcontroller's interactive interface in text format.

[0048] In this embodiment of the invention, a custom functional safety description file is first defined and then developed using scripts in Eclipse software. By executing a Python script, information can be automatically extracted from the selected interaction interface's XML file in text format, as well as the memory mapping information (including partitioning rule information) of the functional safety description file. In other embodiments, other script files can also be called to read the configuration file of the required multi-core microcontroller's interaction interface in XML format.

[0049] In one optional embodiment, parsing the configuration file of the multi-core microcontroller's interaction interface to obtain key information about the interaction interface includes:

[0050] The configuration file of the interaction interface of the multi-core microcontroller is parsed using regular expressions to obtain key information of the interaction interface; wherein, the key information includes: the interface name, read / write direction, source core number, target core number, data type name, data length, implemented data type, source running entity, target running entity, and cycle.

[0051] In this embodiment of the invention, a Python script is used to read an Arxml file in text format, and then regular expressions are used to extract key information from the text-formatted Arxml file, thereby achieving automated extraction of key information from the Arxml file.

[0052] In one optional embodiment, the step of extracting memory mapping information from a preset functional description file based on the key information includes:

[0053] Using the interface name of the key information as a keyword, memory mapping information is extracted from the function description file.

[0054] In this embodiment of the invention, the memory mapping information of the description file is extracted using the interface name as a unique keyword.

[0055] In one optional embodiment, the memory mapping information includes: the variable name of the interaction interface, the header file name, the memory partition macro definition, the partition name, and the memory mapping header file.

[0056] The source code generation rules include: memory mapping, start segment, interactive data buffer definition, and end segment.

[0057] In this embodiment of the invention, the newly added functional safety description file defines memory mapping information, including memory mapping rules such as variable names of interactive interfaces, reference header file names, memory partition macro definitions, partition names, and memory mapping header files, as well as source code generation rules, including generation rules such as memory mapping, start segment, interactive data buffer definition, and end segment.

[0058] In an optional embodiment, the step of determining the validity of the interaction interface based on the key information and the memory mapping information includes:

[0059] Using the interface name of the key information as a keyword, analyze whether the key attributes of the interaction interface are missing based on the memory mapping information; wherein, the key attributes include the source core number, target core number, data type name, data length, implementation data type, and source running entity of the interaction interface;

[0060] If any key attribute of the interaction interface is missing, the interaction interface is deemed invalid.

[0061] The interaction interface is considered valid if all key attributes of the interaction interface are present.

[0062] In an optional embodiment, after analyzing whether the key attributes of the interaction interface are missing based on the memory mapping information using the interface name of the key information as a keyword, the method further includes:

[0063] Mark the records of missing key attributes of the interactive interface and save the records of missing key attributes to an Excel file;

[0064] When the interactive interface is determined to be invalid, an error message is generated and the EXCEL file is queried.

[0065] In embodiments of the present invention, such as Figure 2 As shown, using the interface name as the unique keyword, and based on six key attributes of the interaction interface—source core number, target core number, data type name, data length, implementation data type, and source runtime entity—it is analyzed whether any one of these six key attributes is missing to determine the validity of the interaction interface. During this process, the validity of the interaction interface is marked, and records of missing key attributes are highlighted in red. These missing key attributes are then exported to an Excel file. Specifically, when a key attribute of the interaction interface is missing, the interaction interface is deemed invalid, an error message is generated, and the Excel file is queried, allowing R&D engineers to view the specific missing key attribute records through the Excel file for checking the XML file. When no key attribute of the interaction interface is missing, the interaction interface is deemed valid. Memory mapping information is associated, and source files conforming to C language syntax are automatically generated according to source code generation rules such as memory mapping, start segment, interaction data buffer definition, and end segment.

[0066] Compared to existing technologies, the beneficial effects of this invention are as follows: By adding memory mapping information and source code generation rules to the functional safety description file, and developing based on Python scripts, it achieves the automatic generation of source files that accurately match and define memory mapping information such as linker files, start segments, interactive data buffer definitions, and end segments, while ensuring one-to-one matching between cores and in accordance with functional safety partitioning rules. This can adapt to the frequent changes in core communication, greatly saving trial and error costs and manpower costs in the process of changing multi-core interactive interfaces. It enables fast, clear, and accurate delivery of source code, improves the efficiency of checking and managing configuration files of multi-core microcontroller interactive interfaces and the reliability of multi-core interactive interfaces during domain controller software development, and makes inter-core data interaction more intelligent and efficient, which is beneficial to subsequent design work in the domain controller development process.

[0067] See Figure 3 This is a schematic diagram of a device for inter-core interface memory mapping of a multi-core microcontroller provided in the first embodiment of the present invention. Figure 3 As shown, the multi-core microcontroller inter-core interface memory mapping device includes: at least one processor 11, such as a CPU; at least one network interface 14 or other user interface 13; memory 15; and at least one communication bus 12, which is used to enable communication between these components. The user interface 13 may optionally include a USB interface and other standard interfaces, or a wired interface. The network interface 14 may optionally include a Wi-Fi interface and other wireless interfaces. The memory 15 may include high-speed RAM, or it may also include non-volatile memory, such as at least one disk drive. The memory 15 may optionally include at least one storage device located remotely from the aforementioned processor 11.

[0068] In some implementations, memory 15 stores executable modules or data structures, or subsets thereof, or extended sets thereof:

[0069] Operating system 151 contains various system programs used to implement various basic business functions and handle hardware-based tasks;

[0070] Python program 152.

[0071] Specifically, processor 11 is used to call Python program 152 stored in memory 15 to execute the method for generating inter-core interface memory mapping for multi-core microcontrollers as described in the above embodiments, for example... Figure 1 Step S1 is shown.

[0072] For example, the computer program may be divided into one or more modules / units, which are stored in the memory and executed by the processor to complete the present invention. The one or more modules / units may be a series of computer program instruction segments capable of performing specific functions, which describe the execution process of the computer program in the multi-core microcontroller inter-core interface memory mapping device.

[0073] The apparatus required for generating the inter-core interface memory mapping of a multi-core microcontroller can be a computing device such as a desktop computer, laptop, handheld computer, or cloud server. The apparatus may include, but is not limited to, a processor and memory. Those skilled in the art will understand that the schematic diagram is merely an example of the apparatus required for generating the inter-core interface memory mapping of a multi-core microcontroller and does not constitute a limitation on the apparatus required for generating the inter-core interface memory mapping of a multi-core microcontroller. It may include more or fewer components than illustrated, or combine certain components, or use different components.

[0074] The processor 11 may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor. The processor 11 is the control center of the multi-core microcontroller inter-core interface memory mapping device, connecting various parts of the entire multi-core microcontroller inter-core mapping device using various interfaces and lines.

[0075] The memory 15 can be used to store the computer programs and / or modules. The processor 11 implements various functions of the inter-core interface memory mapping of the multi-core microcontroller by running or executing the computer programs and / or modules stored in the memory and calling the data stored in the memory. The memory 15 may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of the mobile phone (such as audio data, phonebook, etc.). In addition, the memory 15 may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0076] Wherein, if the module / unit of the multi-core microcontroller inter-core interface memory mapping integration is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when the computer program is executed by a processor, it can implement the steps of the above method embodiments. Wherein, the computer program includes computer program code, which can be in the form of source code, object code, executable file, or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, portable hard drive, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc. It should be noted that the content contained in the computer-readable medium may be appropriately added to or subtracted from the content as required by the legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium may not include electrical carrier signals and telecommunication signals.

[0077] The third embodiment of this invention provides a computer-readable storage medium, which includes a stored computer program, wherein, when the computer program is executed, it controls the device where the computer-readable storage medium is located to perform the multi-core microcontroller inter-core interface memory mapping generation method as described in any one of the first embodiments.

[0078] It should be noted that the device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Furthermore, in the accompanying drawings of the device embodiments provided by this invention, the connection relationships between modules indicate that they have communication connections, which can be specifically implemented as one or more communication buses or signal lines. Those skilled in the art can understand and implement this without any creative effort.

[0079] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A mapping method between multi-core microcontrollers, characterized in that, include: Parse the configuration file of the interaction interface of the multi-core microcontroller to obtain key information of the interaction interface; wherein, the key information includes: the interface name, read / write direction, source core number, target core number, data type name, data length, implemented data type, source running entity, target running entity, and cycle; Based on the key information, memory mapping information is extracted from a preset functional description file; The validity of the interaction interface is determined based on the key information and the memory mapping information. If the interaction interface is determined to be valid, a source file matching the memory mapping information is generated according to the source code generation rules of the function description file.

2. The mapping method between multi-core microcontrollers as described in claim 1, characterized in that, The method further includes: Based on the functional safety partitioning rules among multi-core microcontrollers, the memory mapping information and source code generation rules of the functional description file are created.

3. The mapping method between multi-core microcontrollers as described in claim 1, characterized in that, The method further includes: Run the Eclipse software to create a Python script; The Python script is executed to read the configuration file of the required multi-core microcontroller's interactive interface in text format.

4. The mapping method between multi-core microcontrollers as described in claim 1, characterized in that, The configuration file of the multi-core microcontroller's interaction interface is parsed to obtain key information about the interaction interface, including: Regular expressions are used to parse the configuration file of the interaction interface of the multi-core microcontroller to obtain key information of the interaction interface.

5. The mapping method between multi-core microcontrollers as described in claim 4, characterized in that, The step of extracting memory mapping information from a preset functional description file based on the key information includes: Using the interface name of the key information as a keyword, memory mapping information is extracted from the function description file.

6. The mapping method between multi-core microcontrollers as described in claim 1, characterized in that, The step of determining the validity of the interaction interface based on the key information and the memory mapping information includes: Using the interface name of the key information as a keyword, analyze whether the key attributes of the interaction interface are missing based on the memory mapping information; wherein, the key attributes include the source core number, target core number, data type name, data length, implementation data type, and source running entity of the interaction interface; If any key attribute of the interaction interface is missing, the interaction interface is deemed invalid. The interaction interface is considered valid if all key attributes of the interaction interface are present.

7. The mapping method between multi-core microcontrollers as described in claim 1, characterized in that, The memory mapping information includes: the variable names of the interaction interface, the reference header file names, the memory partition macro definitions, the partition names, and the memory mapping header files; the source code generation rules include: memory mapping, start segment, interaction data buffer definitions, and end segment.

8. The mapping method between multi-core microcontrollers as described in claim 6, characterized in that, After analyzing whether the key attributes of the interaction interface are missing based on the memory mapping information, using the interface name of the key information as a keyword, the method further includes: Mark the records of missing key attributes of the interactive interface and save the records of missing key attributes to an Excel file; When the interactive interface is determined to be invalid, an error message is generated and the EXCEL file is queried.

9. A mapping device between core microcontrollers, characterized in that, It includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor, when executing the computer program, implements the inter-core microcontroller mapping method as described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored computer program, wherein, when the computer program is executed, it controls the device on which the computer-readable storage medium is located to perform the multi-core microcontroller mapping method as described in any one of claims 1-8.

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