Method for forming a semiconductor structure

Abstract

A method for forming a semiconductor structure includes: providing an etch target layer and an initial sacrificial layer located on the etch target layer; forming a patterned structure on the initial sacrificial layer, the patterned structure having an opening therein that exposes a portion of the surface of the initial sacrificial layer; using the patterned structure as a mask to remove a portion of the initial sacrificial layer and form a groove in the initial sacrificial layer, the depth of the groove being less than the thickness of the initial sacrificial layer; using the patterned structure as a mask to perform a modification treatment on the sidewall surface and the bottom surface of the groove of the initial sacrificial layer to form a modified layer, so that the initial sacrificial layer forms a sacrificial layer; after forming the modified layer, forming a mask structure in the groove, the surface of the mask structure being flush with the surface of the sacrificial layer; after forming the mask structure, removing the sacrificial layer to form a pattern structure on the etch target layer, the pattern structure including the modified layer and the mask structure located on the modified layer. The semiconductor structure formed by the method has a good morphology.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and particularly to a method for forming a semiconductor structure. Background Art

[0002] In the semiconductor field, in order to obtain a semiconductor structure with multiple functions, it is necessary to design a relatively complex mask pattern for pattern transfer. In the front, middle, and back segments of the semiconductor manufacturing process, a combination of one or more of the self-aligned multiple patterning (SAMP), reverse litho-etch-litho-etch (RLELE) process, and etching process is often used to form various semiconductor structures that meet the requirements.

[0003] As the size of semiconductor structures is further reduced, the accuracy of existing lithography technologies cannot meet the dimensional accuracy requirements of semiconductor structures. Therefore, a process of modifying specific materials to serve as a pattern transfer mask has been introduced.

[0004] However, the existing process of modifying specific materials to serve as a pattern transfer mask still needs to be improved. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure to improve the process of modifying specific materials to serve as a pattern transfer mask.

[0006] To solve the above technical problem, the technical solution of the present invention provides a method for forming a semiconductor structure, including: providing an etch target layer and an initial sacrificial layer located on the etch target layer; forming a patterned structure on the initial sacrificial layer, the patterned structure having an opening therein that exposes a part of the surface of the initial sacrificial layer; using the patterned structure as a mask to remove part of the initial sacrificial layer to form a groove in the initial sacrificial layer, the depth of the groove being less than the thickness of the initial sacrificial layer; using the patterned structure as a mask to modify the surface of the sidewall and the bottom surface of the groove of the initial sacrificial layer to form a modified layer, so that the initial sacrificial layer forms a sacrificial layer; after forming the modified layer, forming a mask structure in the groove, the surface of the mask structure being flush with the surface of the sacrificial layer; after forming the mask structure, removing the sacrificial layer to form a pattern structure on the etch target layer, the pattern structure including the modified layer and the mask structure located on the modified layer.

[0007] Optionally, the material of the initial sacrificial layer includes an amorphous material; the amorphous material includes amorphous silicon.

[0008] Optionally, the process for modifying the initial sacrificial layer on the sidewall surface and bottom surface of the groove includes an ion implantation process; the parameters of the ion implantation process include: the implanted ions include indium ions, the implantation energy is 100 keV to 200 keV, the implantation dose is 1E13 per square centimeter to 5E14 per square centimeter, and the implantation angle is 0 degree to 5 degrees.

[0009] Optionally, the implanted ions further include carbon ions.

[0010] Optionally, the depth of the groove is one-third to two-thirds of the thickness of the initial sacrificial layer.

[0011] Optionally, the process for removing part of the initial sacrificial layer includes a dry etching process.

[0012] Optionally, the patterned structure includes: a liner layer, an anti-reflection layer located on the liner layer, and a photoresist layer located on the anti-reflection layer.

[0013] Optionally, the method for forming the mask structure includes: forming a mask material layer in the groove and on the patterned structure; planarizing the mask material layer until the surface of the patterned structure is exposed to form an initial mask structure; after forming the initial mask structure, removing the patterned structure to expose the surface of the sacrificial layer; after removing the patterned structure, planarizing the initial mask structure until it is flush with the surface of the sacrificial layer to form the mask structure.

[0014] Optionally, the process for removing the sacrificial layer includes a dry etching process or a wet etching process.

[0015] Optionally, the etching rates of the materials of the mask structure and the sacrificial layer are different.

[0016] Optionally, the mask structure includes polysilicon or a dielectric material, and the dielectric material includes: one or a combination of more of silicon nitride, silicon carbonitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon carbon oxynitride.

[0017] Optionally, after removing the sacrificial layer, it further includes: etching the layer to be etched using the mask structure and the modified layer as a mask.

[0018] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0019] In the method for forming a semiconductor structure according to the technical solution of the present invention, first, a part of the initial sacrificial layer is removed by using the patterned structure as a mask, and a groove is formed in the initial sacrificial layer. The depth of the groove is less than the thickness of the initial sacrificial layer. Then, the initial sacrificial layer on the sidewall surface and the bottom surface of the groove is modified by using the patterned structure as a mask to form a modified layer, so that the initial sacrificial layer forms a sacrificial layer. The thickness of the initial sacrificial layer at the bottom of the groove is relatively thin, so that the modification degree of the modified layer formed by the modification treatment is uniform. Therefore, the morphology of the modified layer formed after removing the sacrificial layer is good. When the pattern transfer is continued with the pattern structure composed of the mask structure and the modified layer, the size uniformity of the formed semiconductor structure is good.

[0020] Further, the implanted ions include indium ions. The lateral diffusion rate of the indium ions is relatively slow. Therefore, the thickness of the modified layer formed on the sidewall of the groove is relatively thin. When the pattern transfer is continued with the mask structure and the modified layer as a mask, the difference between the size of the formed semiconductor structure and the designed size is relatively small.

[0021] Further, the implanted ions include a mixture of indium ions and carbon ions. The carbon ions can repair the defects generated during the ion implantation process, so that the diffusion effect of the indium ions is weakened. Description of the Drawings

[0022] Figure 1 and Figure 2 is a schematic cross-sectional structure diagram of the semiconductor structure formation process in an embodiment;

[0023] Figures 3 to 9 is a schematic cross-sectional structure diagram of the semiconductor structure formation process in an embodiment of the present invention. Detailed Embodiments

[0024] As described in the background art, the existing process for modifying a specific material to be used as a pattern transfer mask needs to be improved. The following is an analysis and description in combination with specific embodiments.

[0025] Figure 1 and Figure 2 is a schematic cross-sectional structure diagram of the semiconductor structure formation process in an embodiment.

[0026] Please refer to Figure 1 , a layer to be etched 100 is provided; an initial sacrificial layer 101 is formed on the layer to be etched 100; a patterned layer 102 is formed on the initial sacrificial layer 101, and the patterned layer 102 exposes a part of the surface of the initial sacrificial layer 101.

[0027] Please refer to Figure 2 , using the patterned layer 102 as a mask, ion implantation is performed on the initial sacrificial layer 101 to form a modified layer 103 and a sacrificial layer 104.

[0028] In the semiconductor structure, the material of the initial sacrificial layer 101 is usually selected as amorphous silicon, and the ions for ion implantation of the initial sacrificial layer 101 are usually selected as boron ions. The modified layer 103 formed after ion implantation has a large etching selectivity ratio with the sacrificial layer 104. Therefore, during the subsequent process of removing the sacrificial layer 104, the modified layer 103 can be retained as a pattern.

[0029] However, due to the relatively fast lateral diffusion rate of boron ions, on the one hand, the lateral diffusion phenomenon of boron ions in the material of the initial sacrificial layer 101 is relatively serious, so that the size of the formed modified layer 103 is much larger than the size of the initial sacrificial layer 101 exposed by the patterned layer 102. This makes the size of the formed semiconductor structure quite different from the designed size when the pattern of the modified layer 103 is continued to be transferred downward subsequently; on the other hand, the initial sacrificial layer 101 has a certain thickness. After the implanted ions enter the initial sacrificial layer 101, the energy of the implanted ions will decay as the implantation depth increases, resulting in uneven distribution of the implanted ions at the bottom and top of the initial sacrificial layer 101, making the bottom size of the formed modified layer 103 uncontrollable. The top and bottom sizes of the modified layer 103 formed after removing the sacrificial layer 104 are uneven, and then transferring with the pattern of the modified layer 103 makes the size of the formed semiconductor structure uneven, affecting the size of the semiconductor structure.

[0030] To solve the above problems, the technical solution of the present invention provides a method for forming a semiconductor structure. First, part of the initial sacrificial layer is removed with the patterned structure as a mask to form a groove in the initial sacrificial layer, and the depth of the groove is less than the thickness of the initial sacrificial layer. Then, the initial sacrificial layer on the sidewall surface and the bottom surface of the groove is modified with the patterned structure as a mask to form a modified layer, so that the initial sacrificial layer forms a sacrificial layer. The thickness of the initial sacrificial layer at the bottom of the groove is relatively thin, making the modification degree of the modified layer formed by the modification treatment uniform. Therefore, the morphology of the modified layer formed after removing the sacrificial layer is good. When the pattern structure composed of the mask structure and the modified layer is continued to be transferred subsequently, the size uniformity of the formed semiconductor structure is good.

[0031] To make the above objects, features, and beneficial effects of the present invention more obvious and understandable, the following detailed description of the specific embodiments of the present invention will be given with reference to the accompanying drawings.

[0032] Figures 3 to 9 It is a schematic cross-sectional structure diagram of the semiconductor structure formation process in the embodiment of the present invention.

[0033] Please refer to Figure 3 , a layer to be etched 200 and an initial sacrificial layer 201 located on the layer to be etched 200 are provided.

[0034] The material of the initial sacrificial layer 201 includes amorphous materials; the amorphous materials include amorphous silicon.

[0035] The layer 200 to be etched includes: a substrate (not shown); a device layer located on the substrate (not shown), the device layer includes an isolation structure (not shown) and a device structure located within the isolation structure (not shown), and the device structure includes a transistor, a diode, a triode, a capacitor, an inductor, or a conductive structure, etc.

[0036] In this embodiment, the layer 200 to be etched further includes: a dielectric layer (not shown) located on the device layer; a conductive layer (not shown) located within the dielectric layer, and the conductive layer is electrically connected to the device structure.

[0037] In this embodiment, the material of the substrate is silicon.

[0038] In other embodiments, the material of the substrate includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon on insulator (SOI), or germanium on insulator (GOI). Among them, the multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP.

[0039] Please refer to Figure 4 , a patterned structure is formed on the initial sacrificial layer 201, and an opening 204 is formed within the patterned structure, and the opening 204 exposes a part of the surface of the initial sacrificial layer 201.

[0040] The patterned structure includes: a cushion layer 202, an anti-reflection layer 203 located on the cushion layer 202, and a photoresist layer (not shown) located on the anti-reflection layer 203. The photoresist layer is naturally consumed during the formation of the opening 204.

[0041] The method for forming the patterned structure includes: forming a cushion material layer (not shown), an anti-reflection material layer (not shown) located on the cushion material layer, and a photoresist layer (not shown) located on the anti-reflection material layer on the initial sacrificial layer 201, and the photoresist layer exposes a part of the surface of the anti-reflection material layer; etching the anti-reflection material layer and the cushion material layer using the photoresist layer as a mask until the surface of the initial sacrificial layer 201 is exposed, to form the patterned structure and the opening 204 located within the patterned structure.

[0042] The material of the cushion layer 202 includes amorphous materials, and the amorphous materials include amorphous silicon or amorphous carbon; the anti-reflection layer 203 includes a thin silicon anti-reflection layer (Si-ARC), an organic bottom anti-reflection layer (organic BARC), a dielectric anti-reflection layer (DARC), or a combination of an organic bottom anti-reflection layer and a dielectric anti-reflection layer.

[0043] Please refer to Figure 5 , using the patterned structure as a mask, remove part of the initial sacrificial layer 201 to form a groove 205 in the initial sacrificial layer 201, and the depth of the groove 205 is less than the thickness of the initial sacrificial layer 201.

[0044] The depth of the groove 205 is one-third to two-thirds of the thickness of the initial sacrificial layer 201. If the depth of the groove 205 is too deep, it is not easy to obtain a groove 205 with a sidewall plane perpendicular to the bottom plane when etching the initial sacrificial layer 201 to form the groove 205, and it is also not easy to obtain a uniform modified layer when performing a modification treatment on the sidewall surface and the bottom surface of the groove 205 subsequently; if the depth of the groove 205 is too shallow, a larger process condition is required when performing a modification treatment on the sidewall surface and the bottom surface of the groove 205 subsequently, and it is also difficult to obtain a uniform modified layer.

[0045] In this embodiment, the process of removing part of the initial sacrificial layer 201 includes a dry etching process. The dry etching process can form a groove 205 with a good sidewall morphology.

[0046] Please refer to Figure 6 , using the patterned structure as a mask, perform a modification treatment on the sidewall surface and the bottom surface of the groove 205 of the initial sacrificial layer 201 to form a modified layer 206, so that the initial sacrificial layer 201 forms a sacrificial layer 207.

[0047] The materials of the modified layer 206 and the sacrificial layer 207 have a large etching selectivity ratio, so that when the sacrificial layer 207 is removed subsequently, the damage to the modified layer 206 is small.

[0048] In this embodiment, the process of performing a modification treatment on the sidewall surface and the bottom surface of the groove 205 of the initial sacrificial layer 201 includes an ion implantation process; the parameters of the ion implantation process include: the implanted ions include indium ions, the implantation energy is 100 keV to 200 keV, the implantation dose is 1E13 per square centimeter to 5E14 per square centimeter, and the implantation angle is 0 degree to 5 degrees.

[0049] The implanted ions include indium ions. The lateral diffusion rate of the indium ions is slow. Therefore, the thickness of the modified layer 206 formed on the sidewall of the groove 205 is thin. Subsequently, when pattern transfer is continued using the mask structure and the modified layer 206 as a mask, the size of the formed semiconductor structure has a small difference from the designed size.

[0050] In this embodiment, the implanted ions further include carbon ions, and the carbon ions can repair the defects caused by implantation to the modified layer 206, thereby being able to reduce the diffusion degree of the indium ions.

[0051] The initial sacrificial layer 201 at the bottom of the groove 205 has a thin thickness, so that the modification degree of the modified layer 206 formed by the modification treatment is uniform. Therefore, the morphology of the modified layer 206 formed after removing the sacrificial layer 207 subsequently is good. When pattern transfer is continued using the pattern structure composed of the mask structure and the modified layer 206, the size uniformity of the formed semiconductor structure is good.

[0052] Next, after forming the modified layer 206, a mask structure 209 is formed in the groove 205. For the formation process of the mask structure 209, please refer to Figure 7 and Figure 8 .

[0053] Please refer to Figure 7 , a mask material layer (not shown) is formed in the groove 205 and on the patterned structure; the mask material layer is planarized until the surface of the patterned structure is exposed, forming an initial mask structure 208.

[0054] The mask structure includes polysilicon or a dielectric material, and the dielectric material includes one or a combination of more of: silicon nitride, silicon carbonitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon carbon oxynitride.

[0055] Please refer to Figure 8 , after forming the initial mask structure 208, the patterned structure is removed to expose the surface of the sacrificial layer 207; after removing the patterned structure, the initial mask structure 208 is planarized until it is flush with the surface of the sacrificial layer 207, forming the mask structure 209.

[0056] In this embodiment, the process of removing the patterned structure includes a dry etching process. The process of planarizing the initial mask structure 208 includes a chemical mechanical polishing process.

[0057] Please refer to Figure 9 , after forming the mask structure 209, the sacrificial layer 207 is removed, and a pattern structure is formed on the layer to be etched. The pattern structure includes the modified layer 206 and the mask structure 209 located on the modified layer 206.

[0058] The process of removing the sacrificial layer 207 includes a dry etching process or a wet etching process.

[0059] The etching rates of the material of the mask structure 209 and the material of the sacrificial layer 207 are different, and the etching rates of the sacrificial layer 207 and the modified layer 206 are different. Therefore, when the sacrificial layer 207 is removed, the damage to the mask structure 209 and the modified layer 206 is relatively small. Thus, when the pattern transfer is performed with the pattern structure formed by the mask structure 209 and the modified layer 206, the dimensional accuracy and morphology of the formed semiconductor structure are better.

[0060] After removing the sacrificial layer 207, it further includes: etching the layer to be etched with the mask structure 209 and the modified layer 206 as masks. This process is a common process in the semiconductor field and will not be elaborated here.

[0061] So far, since part of the initial sacrificial layer 201 is removed with the patterned structure as a mask, a groove 205 is formed in the initial sacrificial layer 201, and the depth of the groove 205 is less than the thickness of the initial sacrificial layer 201. Then, the initial sacrificial layer 201 on the sidewall surface and the bottom surface of the groove 205 is modified with the patterned structure as a mask to form a modified layer 206, so that the initial sacrificial layer 201 forms a sacrificial layer 207. The thickness of the initial sacrificial layer 201 at the bottom of the groove 205 is relatively thin, so that the modification degree of the modified layer 206 formed by the modification process is uniform. Thus, the morphology of the modified layer formed after removing the sacrificial layer is better, and when the pattern transfer is continued with the pattern structure formed by the mask structure 209 and the modified layer 206, the dimensional uniformity of the formed semiconductor structure is better.

[0062] Furthermore, the implanted ions include indium ions. The lateral diffusion rate of the indium ions is relatively slow. Therefore, the thickness of the modified layer 206 formed on the sidewall of the groove 205 is relatively thin. When the pattern transfer is continued with the mask structure 209 and the modified layer 206 as masks, the size of the formed semiconductor structure has a relatively small difference from the designed size.

[0063] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, Comprising: Providing a layer to be etched and an initial sacrificial layer located on the layer to be etched; Forming a patterned structure on the initial sacrificial layer, the patterned structure having an opening therein, the opening exposing a part of the surface of the initial sacrificial layer; Using the patterned structure as a mask to remove a part of the initial sacrificial layer and form a groove in the initial sacrificial layer, the depth of the groove being less than the thickness of the initial sacrificial layer; Using the patterned structure as a mask to perform a modification process on the sidewall surface and the bottom surface of the groove of the initial sacrificial layer to form a modified layer, so that the initial sacrificial layer forms a sacrificial layer; After forming the modified layer, forming a mask structure in the groove, the surface of the mask structure being flush with the surface of the sacrificial layer; After forming the mask structure, removing the sacrificial layer, the etching rate of the process for removing the sacrificial layer being greater than the etching rate for the modified layer, and forming a patterned structure on the layer to be etched, the patterned structure including the modified layer and the mask structure located on the modified layer.

2. The method for forming a semiconductor structure according to claim 1, wherein, The material of the initial sacrificial layer includes an amorphous material; the amorphous material includes amorphous silicon.

3. The method for forming a semiconductor structure according to claim 2, wherein, The process for performing a modification process on the sidewall surface and the bottom surface of the groove of the initial sacrificial layer includes an ion implantation process; The parameters of the ion implantation process include: the implanted ions include indium ions, the implantation energy is 100 keV to 200 keV, the implantation dose is 1E13 per square centimeter to 5E14 per square centimeter, and the implantation angle is 0 degree to 5 degrees.

4. The method for forming a semiconductor structure according to claim 3, wherein, The implanted ions further include carbon ions.

5. The method for forming a semiconductor structure according to claim 1, wherein, The depth of the groove is one-third to two-thirds of the thickness of the initial sacrificial layer.

6. The method for forming a semiconductor structure according to claim 1, wherein, The process for removing a part of the initial sacrificial layer includes a dry etching process.

7. The method for forming a semiconductor structure according to claim 1, wherein, The patterned structure includes: a buffer layer, an anti-reflection layer located on the buffer layer, and a photoresist layer located on the anti-reflection layer.

8. The method for forming a semiconductor structure according to claim 1, wherein, The method for forming the mask structure includes: forming a mask material layer in the groove and on the patterned structure; planarizing the mask material layer until the surface of the patterned structure is exposed to form an initial mask structure; after forming the initial mask structure, removing the patterned structure to expose the surface of the sacrificial layer; after removing the patterned structure, planarizing the initial mask structure until it is flush with the surface of the sacrificial layer to form the mask structure.

9. The method for forming a semiconductor structure according to claim 1, wherein, The process for removing the sacrificial layer includes a dry etching process or a wet etching process.

10. The method for forming a semiconductor structure according to claim 9, wherein, The etching rates of the materials of the mask structure and the sacrificial layer are different.

11. The method for forming a semiconductor structure according to claim 10, wherein The mask structure includes polysilicon or a dielectric material, and the dielectric material includes one or a combination of more of: silicon nitride, silicon carbonitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon carbon oxynitride.

12. The method for forming a semiconductor structure according to claim 1, wherein After removing the sacrificial layer, further comprising: etching the layer to be etched using the mask structure and the modified layer as a mask.

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