Nanocrystalline silicon active films and their preparation methods and thin-film transistors

Abstract

This application relates to the field of display technology, and more particularly to a nanocrystalline silicon active film, its preparation method, and a thin-film transistor. The preparation method of the nanocrystalline silicon active film includes: providing an insulating material layer; depositing a silicon seed layer on the surface of the insulating material layer at a first deposition rate; depositing a silicon buffer layer on the surface of the silicon seed layer away from the insulating material layer at a second deposition rate; and depositing a silicon bulk layer on the surface of the silicon buffer layer away from the silicon seed layer at a third deposition rate, thereby obtaining the nanocrystalline silicon active film. This method, by preparing a silicon buffer layer between the silicon seed layer and the silicon bulk layer, further gradually increases the crystallinity, ensuring that the silicon bulk layer formed by the third deposition rate has high crystallinity and high mobility. Furthermore, this preparation method is simple, and the nanocrystalline silicon active film can be obtained by controlling three different deposition rates, resulting in high efficiency, controllable conditions, and the potential for mass production.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of display, and particularly relates to a nanocrystalline silicon active film and a preparation method thereof and a thin film transistor. BACKGROUND

[0002] With the development of display technology and the increasing demand of people for high-definition display products, large-size (>=65), high-resolution (8k, 7680x4320) and high refresh rate (>=120HZ) products have become the development direction of display products.

[0003] High-resolution and high-refresh-rate panels will inevitably lead to a decrease in charging rate, and thus the requirements for TFT devices are increasing, and the introduction of high electron mobility TFTs is necessary. However, the mobility of amorphous silicon commonly used in TFTs and LCDs is 0.1-1 cm 2 / Vs, which is too low for high-end products. The commonly used method is to introduce oxide semiconductors such as IGZO and prepare polycrystalline silicon technology to improve the mobility. However, IGZO technology is not mature, and its performance is not as good as that of amorphous silicon. Moreover, it is not compatible with existing amorphous silicon production lines, which is an important factor restricting its development. The commonly used method for polycrystalline silicon is to anneal the prepared amorphous silicon at a high temperature to improve the atomic order of amorphous silicon and improve its mobility. However, this high-temperature processing technology is harmful to the glass substrate and is not conducive to further development. SUMMARY

[0004] The application aims to provide a nanocrystalline silicon active film and a preparation method thereof and a thin film transistor, and aims to solve the problems of low preparation efficiency and low mobility of crystalline silicon material in the active film in the prior art.

[0005] To achieve the above application purposes, the technical solutions adopted by the application are as follows:

[0006] In a first aspect, the application provides a preparation method of a nanocrystalline silicon active film, comprising the following steps:

[0007] providing an insulating material layer, performing first deposition rate nanocrystalline silicon deposition treatment on the surface of the insulating material layer to form a silicon seed layer;

[0008] performing second deposition rate deposition treatment on the surface of the silicon seed layer away from the insulating material layer to form a silicon buffer layer;

[0009] performing third deposition rate deposition treatment on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, thereby obtaining a nanocrystalline silicon active film;

[0010] wherein the first deposition rate and the second deposition rate are less than the third deposition rate.

[0011] In a second aspect, the application provides a nanocrystalline silicon active film, which is prepared by the preparation method of the nanocrystalline silicon active film.

[0012] In a third aspect, the application provides a thin film transistor, which comprises a substrate and a gate electrode, an insulating material layer, an active film, a drain electrode and a source electrode formed on the surface of the substrate in sequence, and the active film is the nanocrystalline silicon active film.

[0013] The preparation method of the nanocrystalline silicon active film provided in the first aspect of the application is to first deposit a silicon seed layer, and then use the silicon seed layer as a guide to prepare the nanocrystalline silicon active film. Since the silicon atom content difference between the silicon seed layer and the silicon bulk layer is large, it is difficult to directly form a nanocrystalline silicon material with high crystallinity by using the silicon seed layer as a guide. By preparing a silicon buffer layer between the silicon seed layer and the silicon bulk layer, the crystallinity of the material is further gradually improved, so that the silicon bulk layer formed by the third deposition rate deposition process has high crystallinity and high mobility. In addition, the preparation method is simple, and different functional layers with different silicon atom contents can be obtained by controlling the deposition rate of the three times, so as to prepare the nanocrystalline silicon active film. The method is efficient, the conditions are controllable, the cost is low, and mass production can be realized.

[0014] The nanocrystalline silicon active film provided in the second aspect of the application has a high crystallinity nanocrystalline silicon bulk layer, so that the obtained nanocrystalline silicon active film has high mobility and stable performance, and can be widely used in high-resolution 8k and high-refresh-rate 120HZ products.

[0015] The thin film transistor provided in the third aspect of the application has an active film which is the nanocrystalline silicon active film prepared according to the preparation method of the nanocrystalline silicon active film, so that the obtained thin film transistor has stable performance and high display quality. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor.

[0017] Figure 1 is the preparation flowchart of the nanocrystalline silicon active film provided in the embodiments of the application.

[0018] Figure 2 is the structural schematic diagram of the nanocrystalline silicon active film provided in the embodiments of the application.

[0019] Figure 3is a structural schematic diagram of a thin film transistor provided by an embodiment of the present application.

[0020] Figure 4 is an analysis diagram of a nanocrystalline silicon active film provided by Embodiment 1 of the present application.

[0021] Figure 5 is an analysis diagram of a nanocrystalline silicon active film provided by Embodiment 2 of the present application.

[0022] In the drawings, various reference signs represent:

[0023] 1 - silicon seed layer, 2 - silicon buffer layer, 3 - silicon bulk layer;

[0024] 4 - substrate, 5 - gate, 6 - insulating material layer, 7 - active film, 8 - drain electrode, 9 - source electrode. DETAILED DESCRIPTION

[0025] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clear and understandable, the present application will be further described in detail below in combination with embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0026] In the present application, the term "and / or" describes the association relationship of the associated objects, which means that there can be three kinds of relationships, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone. Wherein A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after it.

[0027] In the present application, "at least one" means one or more, and "multiple" means two or more. "At least one" or similar expressions mean any combination of these items, including any combination of single item or multiple items. For example, "at least one of a, b, or c", or "at least one of a, b, and c", can mean a, b, c, a-b (i.e. a and b), a-c, b-c, or a-b-c, wherein a, b, and c can be single or multiple.

[0028] It should be understood that in various embodiments of the present application, the size of the sequence number of the above processes does not mean the order of execution, and part or all of the steps can be executed in parallel or in sequence, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0029] The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used in the description of the embodiments of the present application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0030] The weight of the related components mentioned in the embodiments of the present application can not only refer to the specific content of each component, but also represent the proportional relationship between the weights of each component. Therefore, as long as the content of the related components in the embodiments of the present application is proportionally enlarged or reduced, it is within the scope disclosed in the embodiments of the present application. Specifically, the mass in the embodiments of the present application can be μg, mg, g, kg and other mass units commonly known in the chemical field.

[0031] The terms "first", "second", "third" and the like in the description of the embodiments of the present application are used for the purpose of description and are not intended to indicate or imply relative importance or imply a number of indicated technical features. For example, without departing from the scope of the embodiments of the present application, the first XX can also be referred to as the second XX, and similarly, the second XX can also be referred to as the first XX. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more of the features.

[0032] The first aspect of the embodiments of the present application provides a preparation method of a nanocrystalline silicon active film, as shown in the following formula: Figure 1 The preparation method comprises the following steps:

[0033] S01. Providing an insulating material layer, performing a first deposition rate nanocrystalline silicon deposition process on the surface of the insulating material layer to form a silicon seed layer;

[0034] S02. Performing a second deposition rate deposition process on the surface of the silicon seed layer away from the insulating material layer to form a silicon buffer layer;

[0035] S03. Performing a third deposition rate deposition process on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, thereby obtaining a nanocrystalline silicon active film;

[0036] Wherein, the first deposition rate and the second deposition rate are less than the third deposition rate.

[0037] The method for preparing a nanocrystalline silicon active film provided in the first aspect of this application involves first depositing a silicon seed layer, which serves as a guide for the preparation of the nanocrystalline silicon active film. Due to the significant difference in silicon atom content between the silicon seed layer and the silicon bulk layer, it is difficult to directly form a highly crystalline nanocrystalline silicon material guided by the silicon seed layer. Therefore, a silicon buffer layer is prepared between the silicon seed layer and the silicon bulk layer to gradually increase the crystallinity of the material, ensuring that the silicon bulk layer formed by the third deposition rate has high crystallinity and high mobility. Furthermore, this preparation method is simple; functional layers with different silicon atom contents can be obtained by controlling three different deposition rates to prepare the nanocrystalline silicon active film. It is efficient, has controllable conditions, low cost, and can achieve mass production.

[0038] In step S01, an insulating material layer is provided, and a first deposition rate nanocrystalline silicon deposition process is performed on the surface of the insulating material layer to form a silicon seed layer.

[0039] In some embodiments, the provided insulating material layer is selected from insulating compounds such as silicon and nitrogen, and the insulating material layer is selected from conventionally used materials.

[0040] In some embodiments, the silicon atom content of the insulating material layer is Maintaining a moderate silicon atom content in the insulating material layer is beneficial for the deposition and preparation of active films.

[0041] In some embodiments, a first deposition rate nanocrystalline silicon deposition treatment is performed on the surface of the insulating material layer to form a silicon seed layer; wherein, the first deposition rate nanocrystalline silicon deposition treatment is performed by chemical vapor deposition, with a power of 1 to 5 kW, a gas flow ratio of H2:SiH4 = 80 to 120: 1 to 2, and a temperature of 280 to 320°C; the formed silicon seed layer serves as a guiding layer to guide the preparation of the nanocrystalline silicon active film; controlling the preparation conditions of the silicon seed layer to be a low-speed deposition treatment can ensure that the obtained silicon seed layer has a thin silicon atom content and low material crystallinity, while controlling the reaction temperature to be low is beneficial to the reaction and will not affect the production efficiency.

[0042] In some embodiments, the silicon atom content of the silicon seed layer is: Furthermore, the silicon atom content of the silicon seed layer is The silicon atom content of the silicon seed layer is kept thin to ensure that it plays a guiding role and that it is not too thick to affect the preparation of the silicon body layer.

[0043] In some specific embodiments, the silicon atom content of the silicon seed layer is selected from... wait.

[0044] In step S02, a second deposition rate deposition process is performed on the surface of the silicon seed layer away from the insulating material layer to form a silicon buffer layer. Because the silicon atom content difference between the silicon seed layer and the silicon bulk layer is significant, resulting in different silicon atom densities between the layers, it is difficult to directly form highly crystalline nanocrystalline silicon material guided by the silicon seed layer. Therefore, by preparing a silicon buffer layer between the silicon seed layer and the silicon bulk layer, the crystallinity is gradually improved.

[0045] In some embodiments, the silicon buffer layer includes n silicon buffer layers, meaning the silicon buffer layer can be formed by stacking several silicon buffer layers. In the embodiments, n can be selected from 1 ≤ n ≤ 4. To ensure that the provided silicon buffer layer can better connect with the silicon seed layer and the silicon bulk layer, and to ensure that the silicon bulk layer forms a high degree of crystallinity, the provided silicon buffer layer is a multilayer silicon buffer layer. By setting multiple silicon buffer layers, a silicon bulk layer with high crystallinity is ensured. In some specific embodiments, the warm-shrink layer is selected from 1 silicon buffer layer, 2 silicon buffer layers, 3 silicon buffer layers, and 4 silicon buffer layers.

[0046] In some embodiments, the n-layer silicon buffer layer includes n silicon buffer layers with the same silicon atomic content or n silicon buffer layers with increasing silicon atomic content from the silicon seed layer to the silicon bulk layer. In the n-layer silicon buffer layer with increasing silicon atomic content from the silicon seed layer to the silicon bulk layer, the silicon atomic content of each silicon buffer layer is increased compared to the previous silicon buffer layer. By controlling the silicon atom content of each silicon buffer layer to be moderately increased compared to the previous silicon buffer layer, the crystallinity of each layer of the active film increases progressively, ensuring that the final silicon bulk layer has high crystallinity and high mobility.

[0047] In some specific embodiments, among the n silicon buffer layers in which the silicon atom content increases from the silicon seed layer to the silicon bulk layer, the amount by which the silicon atom content of each silicon buffer layer increases compared to the previous silicon buffer layer is selected from...

[0048] In some embodiments, the second deposition rate deposition process is carried out by chemical vapor deposition with a power of 3 to 8 kW, a gas flow ratio of H2:SiH4 = 30 to 80: 1 to 2, and a temperature of 280 to 320°C. The preparation conditions of the silicon buffer layer are controlled to be low-speed deposition, which can ensure that the silicon buffer layer has a thin silicon atom content and appropriate material crystallinity. At the same time, the reaction temperature is controlled to be low, which is conducive to the reaction and will not affect the production efficiency.

[0049] In some specific embodiments, the n-layer silicon buffer layer is selected from the n-layer silicon buffer layer with increasing silicon atom content from the silicon seed layer to the silicon body layer. In the specific preparation process, as the silicon atom content of the silicon buffer layer increases, the gas flow rate ratio and power for chemical vapor deposition also increase.

[0050] In some embodiments, the silicon atom content of the silicon buffer layer is Ensure that the silicon atom content of the silicon buffer layer is moderate enough to ensure that it plays a guiding role and that it does not affect the preparation of the silicon body layer due to being too thick.

[0051] In some specific embodiments, the silicon atom content of the formed monolithic silicon buffer layer is selected from...

[0052] In step S03, a third deposition rate deposition process is performed on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, resulting in a nanocrystalline silicon active film. The silicon bulk layer formed by the third deposition rate deposition process has high crystallinity, high mobility, and stable performance, which is beneficial for its wide range of applications.

[0053] In some embodiments, the third deposition rate deposition process is performed using chemical vapor deposition at a power of 5–20 kW, a gas flow ratio of H2:SiH4 = 5–20:1–2, and a temperature of 280–320 °C. Using the third deposition rate deposition process can, on the one hand, increase production capacity by ensuring a high silicon atomic content in the resulting silicon bulk layer within a short time, thus improving preparation efficiency; on the other hand, it can reduce leakage current and ensure stable product performance.

[0054] In some embodiments, the silicon atom content of the silicon body layer is This ensures a high silicon atom content in the nanocrystalline silicon bulk layer, resulting in a silicon bulk layer with high crystallinity and high mobility.

[0055] In some specific embodiments, the silicon atom content of the silicon buffer layer is selected from...

[0056] The second aspect of this application provides a nanocrystalline silicon active film, which is prepared by a method for preparing nanocrystalline silicon active films.

[0057] The nanocrystalline silicon active film provided in the second aspect of this application has a high mobility and stable performance because it contains a nanocrystalline silicon body layer with high crystallinity. It can be widely used in high-resolution 8k and high-refresh-rate 120Hz products.

[0058] In some embodiments, the structure of the nanocrystalline silicon active film is as follows: Figure 2 As shown, it includes a silicon seed layer 1, a silicon buffer layer 2 stacked on the surface of the silicon seed layer, and a silicon body layer 3 stacked on the surface of the silicon buffer layer 2 facing away from the silicon seed layer 1; wherein the silicon buffer layer includes one or more layers.

[0059] In some embodiments, the mobility of the provided nanocrystalline silicon active film is 2-4 cm. 2 / Vs ensures that the mobility of the obtained nanocrystalline silicon active film is much higher than that of conventionally used amorphous silicon, and meets the requirements for use in large-size screen products.

[0060] A third aspect of the embodiments of this application provides a thin-film transistor, such as Figure 3 As shown, the thin-film transistor includes a substrate 4 and a gate 5, an insulating material layer 6, an active film 7, a drain electrode 8 and a source electrode 9 sequentially formed on the surface of the substrate 4. The active film is a nanocrystalline silicon active film.

[0061] The thin-film transistor provided in the third aspect of this application has an active film that is a nanocrystalline silicon active film prepared according to the preparation method of nanocrystalline silicon active film. Therefore, the thin-film transistor has stable performance and high display quality.

[0062] In some embodiments, the substrate included in the thin-film transistor is selected from conventional substrates, and the choice of substrate material is determined according to actual needs. The substrate is selected from flexible substrates or rigid substrates.

[0063] In some embodiments, the gate, insulating layer, source electrode, and drain electrode of the thin-film transistor are selected from conventional structures and materials, and can be determined according to actual needs.

[0064] The following description is based on specific embodiments.

[0065] Example 1

[0066] Nanocrystalline silicon active films and their preparation methods

[0067] The nanocrystalline silicon active film includes a silicon seed layer, a silicon buffer layer stacked on the surface of the silicon seed layer, and a silicon body layer stacked on the surface of the silicon buffer layer opposite to the silicon seed layer; wherein, the silicon buffer layer is a single-layer silicon buffer layer.

[0068] The preparation method of nanocrystalline silicon active films includes the following steps:

[0069] An insulating material layer is provided, and nanocrystalline silicon is deposited on the surface of the insulating material layer at a first deposition rate to form a silicon seed layer with a silicon atom content of [missing information]. The conditions for the first deposition rate deposition treatment were: power of 1kW, gas flow ratio of H2:SiH4 = 80:1, and temperature of 280℃.

[0070] A second deposition rate is applied to the surface of the silicon seed layer away from the insulating material layer to form a silicon buffer layer with a silicon atomic content of [missing information]. The second deposition rate deposition process was carried out using chemical vapor deposition under the following conditions: power of 6kW, gas flow ratio of H2:SiH4 = 50:1, and temperature of 320℃.

[0071] A third deposition rate deposition process is performed on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, resulting in a nanocrystalline silicon active film with a silicon atom content of [missing information]. The third deposition rate deposition treatment was carried out using chemical vapor deposition under the following conditions: power of 5kW, gas flow ratio of H2:SiH4 = 5:1, and temperature of 280℃.

[0072] Example 2

[0073] Nanocrystalline silicon active films and their preparation methods

[0074] The nanocrystalline silicon active film includes a silicon seed layer, a silicon buffer layer stacked on the surface of the silicon seed layer, and a silicon body layer stacked on the surface of the silicon buffer layer opposite to the silicon seed layer; wherein, the silicon buffer layer consists of two identical silicon buffer layers.

[0075] The preparation method of nanocrystalline silicon active films includes the following steps:

[0076] An insulating material layer is provided, and nanocrystalline silicon is deposited on the surface of the insulating material layer at a first deposition rate to form a silicon seed layer with a silicon atom content of [missing information]. The conditions for the first deposition rate deposition treatment were: power of 2kW, gas flow ratio of H2:SiH4 = 120:1, and temperature of 290℃.

[0077] Two second deposition rate deposition processes are performed on the surface of the silicon seed layer away from the insulating material layer to form two identical silicon buffer layers. The silicon atom content of each silicon buffer layer is as follows: The second deposition rate deposition process was carried out using chemical vapor deposition under the following conditions: power of 6kW, gas flow ratio of H2:SiH4 = 50:1, and temperature of 320℃.

[0078] A third deposition rate deposition process is performed on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, resulting in a nanocrystalline silicon active film with a silicon atom content of [missing information]. The third deposition rate deposition treatment was carried out using chemical vapor deposition under the following conditions: power of 7kW, gas flow ratio of H2:SiH4 = 10:1, and temperature of 290℃.

[0079] Example 3

[0080] Nanocrystalline silicon active films and their preparation methods

[0081] The nanocrystalline silicon active film includes a silicon seed layer, a silicon buffer layer stacked on the surface of the silicon seed layer, and a silicon bulk layer stacked on the surface of the silicon buffer layer facing away from the silicon seed layer. The silicon buffer layer consists of three layers with increasing silicon atom content. Specifically, from the silicon seed layer towards the silicon bulk layer, the silicon atom content of the three buffer layers is sequentially...

[0082] The preparation method of nanocrystalline silicon active films includes the following steps:

[0083] An insulating material layer is provided, and nanocrystalline silicon is deposited on the surface of the insulating material layer at a first deposition rate to form a silicon seed layer with a silicon atom content of [missing information]. The conditions for the first deposition rate deposition treatment were: power of 2kW, gas flow ratio of H2:SiH4 = 90:1, and temperature of 300℃.

[0084] Three deposition processes at a second deposition rate are performed on the surface of the silicon seed layer away from the insulating material layer to form three silicon buffer layers with increasing silicon atom content. The silicon atom content of one layer is [missing information]. The conditions for the silicon buffer layer are as follows: power is 4kW, gas flow ratio is H2:SiH4 = 80:1, temperature is 320℃, and the silicon atomic content is [missing information]. The conditions for the silicon buffer layer are as follows: power of 5kW, gas flow ratio of H2:SiH4 = 60:1, temperature of 320℃, and silicon atomic content of [missing information]. The conditions for the silicon buffer layer are as follows: power is 6kW, gas flow ratio is H2:SiH4=50:1, and temperature is 320℃;

[0085] A third deposition rate deposition process is performed on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, resulting in a nanocrystalline silicon active film with a silicon atom content of [missing information]. The third deposition rate deposition treatment was carried out using chemical vapor deposition under the following conditions: power of 7kW, gas flow ratio of H2:SiH4 = 15:1, and temperature of 300℃.

[0086] Example 4

[0087] Nanocrystalline silicon active films and their preparation methods

[0088] The nanocrystalline silicon active film includes a silicon seed layer, a silicon buffer layer stacked on the surface of the silicon seed layer, and a silicon bulk layer stacked on the surface of the silicon buffer layer facing away from the silicon seed layer. The silicon buffer layer consists of four layers with increasing silicon atom content, wherein the silicon atom content of the four buffer layers provided from the silicon seed layer towards the silicon bulk layer is sequentially...

[0089] The preparation method of nanocrystalline silicon active films includes the following steps:

[0090] An insulating material layer is provided, and nanocrystalline silicon is deposited on the surface of the insulating material layer at a first deposition rate to form a silicon seed layer with a silicon atom content of [missing information]. The conditions for the first deposition rate deposition treatment were: power of 2kW, gas flow ratio of H2:SiH4 = 90:1, and temperature of 310℃.

[0091] Four deposition processes at the second deposition rate were performed on the surface of the silicon seed layer away from the insulating material layer to form four silicon buffer layers with increasing silicon atom content. The silicon atom content of one of these layers was [missing information]. The conditions for the silicon buffer layer are as follows: power is 8kW, gas flow ratio is H2:SiH4 = 80:1, temperature is 320℃, and the silicon atomic content is [missing information]. The conditions for the silicon buffer layer are as follows: power is 6kW, gas flow ratio is H2:SiH4 = 65:1, temperature is 320℃, and the silicon atomic content is [missing information]. The conditions for forming the silicon buffer layer are as follows: power of 5kW, gas flow ratio of H2:SiH4 = 50:1, temperature of 320℃; silicon atomic content of the layer is... The conditions for the silicon buffer layer are as follows: power is 4kW, gas flow ratio is H2:SiH4=30:1, and temperature is 320℃;

[0092] A third deposition rate deposition process is performed on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, resulting in a nanocrystalline silicon active film with a silicon atom content of [missing information]. The third deposition rate deposition treatment was carried out using chemical vapor deposition under the following conditions: power of 15kW, gas flow ratio of H2:SiH4 = 15:1, and temperature of 310℃.

[0093] Example 5

[0094] Nanocrystalline silicon active films and their preparation methods

[0095] The nanocrystalline silicon active film includes a silicon seed layer, a silicon buffer layer stacked on the surface of the silicon seed layer, and a silicon bulk layer stacked on the surface of the silicon buffer layer facing away from the silicon seed layer. The silicon buffer layer consists of five layers with increasing silicon atom content, wherein the silicon atom content of the five buffer layers provided from the silicon seed layer towards the silicon bulk layer is sequentially...

[0096] The preparation method of nanocrystalline silicon active films includes the following steps:

[0097] An insulating material layer is provided, and nanocrystalline silicon is deposited on the surface of the insulating material layer at a first deposition rate to form a silicon seed layer with a silicon atom content of [missing information]. The conditions for the first deposition rate deposition treatment were: power of 2kW, gas flow ratio of H2:SiH4 = 90:1, and temperature of 320℃.

[0098] Five deposition processes at the second deposition rate were performed on the surface of the silicon seed layer away from the insulating material layer to form five silicon buffer layers with increasing silicon atom content. The silicon atom content of one of these layers was [missing information]. The conditions for the silicon buffer layer are as follows: power is 8kW, gas flow ratio is H2:SiH4 = 80:1, temperature is 320℃, and the silicon atomic content is [missing information]. The conditions for the silicon buffer layer are as follows: power is 6kW, gas flow ratio is H2:SiH4 = 70:1, temperature is 320℃, and the silicon atomic content is [missing information]. The conditions for forming the silicon buffer layer are as follows: power of 5kW, gas flow ratio of H2:SiH4 = 55:1, temperature of 320℃; silicon atomic content of the formed layer is... The conditions for forming the silicon buffer layer are as follows: power of 4kW, gas flow ratio of H2:SiH4 = 40:1, temperature of 320℃; silicon atomic content of the layer is... The conditions for the silicon buffer layer are as follows: power is 3kW, gas flow ratio is H2:SiH4=25:1, and temperature is 320℃;

[0099] A third deposition rate deposition process is performed on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, resulting in a nanocrystalline silicon active film with a silicon atom content of [missing information]. The third deposition rate deposition treatment was carried out using chemical vapor deposition under the following conditions: power of 20kW, gas flow ratio of H2:SiH4 = 20:1, and temperature of 320℃.

[0100] Comparative Example 1

[0101] Nanocrystalline silicon active films and their preparation methods

[0102] The nanocrystalline silicon active film includes a silicon seed layer and a silicon body layer stacked on the surface of the silicon seed layer.

[0103] The preparation method of nanocrystalline silicon active films includes the following steps:

[0104] An insulating material layer is provided, and a silicon seed layer is formed by deposition at a first deposition rate on the surface of the insulating material layer, with a silicon atom content of [missing information]. The conditions for the first deposition rate deposition treatment were: power of 1kW, gas flow ratio of H2:SiH4 = 80:1, and temperature of 280℃.

[0105] A second deposition rate is applied to the surface of the silicon seed layer away from the insulating material layer to form a silicon buffer layer with a silicon atomic content of [missing information]. The second deposition rate deposition process was carried out using chemical vapor deposition under the following conditions: power of 6kW, gas flow ratio of H2:SiH4 = 50:1, and temperature of 320℃.

[0106] A third deposition rate deposition process is performed on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, resulting in a nanocrystalline silicon active film with a silicon atom content of [missing information]. The third deposition rate deposition treatment was carried out using chemical vapor deposition under the following conditions: power of 5kW, gas flow ratio of H2:SiH4 = 5:1, and temperature of 280℃.

[0107] Performance test results analysis

[0108] (I) Mobility performance test and analysis: The nanocrystalline silicon active films obtained in Examples 1 to 5 and the nanocrystalline silicon active film obtained in Comparative Example 1 were subjected to mobility tests. The specific test method was as follows: the electron probe method was used for testing, and Vd = 10V (drain voltage) and Vg = -30V to 30V were set to measure the IV transfer characteristic curve of the TFT device. The electron mobility of the TFT device was obtained by formula.

[0109] (II) Deposition time analysis: The deposition time of the nanocrystalline silicon active films obtained in Examples 1 to 5 and the nanocrystalline silicon active film obtained in Comparative Example 1 were tested and analyzed.

[0110] (III) The nanocrystalline silicon active films obtained in Examples 1 and 2 were analyzed by electron microscopy.

[0111] Results Analysis

[0112] (a) The mobility of the nanocrystalline silicon active films obtained in Examples 1-5 and the nanocrystalline silicon active film obtained in Comparative Example 1 was tested, and the results are shown in Table 1:

[0113] Table 1

[0114] Example 1 Example 2 Example 3 Example 4 Example 5 Comparative Example 1 Mobility 0.8-1.5 1.2-3.0 1.3-3.2 1.5-3.5 1.6-3.7 0.2-0.5

[0115] It can be seen that the mobility of the nanocrystalline silicon active films obtained in Examples 1 to 5 is much higher than that of the nanocrystalline silicon active film obtained in Comparative Example 1; and it can also be seen that the mobility of the nanocrystalline silicon active film is higher as the number of silicon buffer layers increases.

[0116] (II) Deposition Time Analysis: The deposition time of the nanocrystalline silicon active films obtained in Examples 1-5 and the nanocrystalline silicon active film obtained in Comparative Example 1 were tested and analyzed. The results are shown in Table 2.

[0117] Table 2

[0118]

[0119] It can be seen that the deposition time of the nanocrystalline silicon active film obtained in Examples 1 to 5 increases with the increase of the number of silicon buffer layers.

[0120] (III) The nanocrystalline silicon active films obtained in Examples 1 and 2 were analyzed by electron microscopy.

[0121] The analytical diagram of the nanocrystalline silicon active film obtained in Example 1 is shown below. Figure 4 As shown, the analytical diagram of the nanocrystalline silicon active film obtained in Example 2 is as follows. Figure 5 As shown, the obtained nanocrystalline silicon active film has a nanocrystalline silicon microstructure.

[0122] In summary, the provided method for preparing nanocrystalline silicon active films involves first depositing a silicon seed layer, which then serves as a guide for the preparation of the nanocrystalline silicon active film. Due to the significant difference in atomic composition between the silicon seed layer and the silicon bulk layer, it is difficult to directly form highly crystalline nanocrystalline silicon material through the guidance of the silicon seed layer. Therefore, a silicon buffer layer is prepared between the silicon seed layer and the silicon bulk layer to gradually increase the crystallinity, ensuring that the silicon bulk layer formed by the third deposition rate treatment has high crystallinity and high mobility. Furthermore, this preparation method is simple, and nanocrystalline silicon active films can be obtained by controlling three deposition methods under different conditions. It is efficient, has controllable conditions, low cost, and can achieve mass production.

[0123] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for producing a nanocrystalline silicon active film, characterized by, The method comprises the following steps: a layer of insulating material is provided, a first deposition rate nanocrystalline silicon deposition process is performed on the surface of the layer of insulating material to form a silicon seed layer; the first deposition rate deposition process is performed by chemical vapor deposition, the power is 1-5 kW, the gas flow ratio is H2:SiH4=80-120:1-2, and the temperature is 280-320℃; a second deposition rate deposition process is performed on the surface of the silicon seed layer away from the layer of insulating material to form a silicon buffer layer; the second deposition rate deposition process is performed by chemical vapor deposition, the power is 3-8 kW, the gas flow ratio is H2:SiH4=30-80:1-2, and the temperature is 280-320℃; a third deposition rate deposition process is performed on the surface of the silicon buffer layer away from the silicon seed layer to form a silicon bulk layer, thereby obtaining a nanocrystalline silicon active film; the third deposition rate deposition process is performed by chemical vapor deposition, the power is 5-20 kW, the gas flow ratio is H2:SiH4=5-20:1-2, and the temperature is 280-320℃.

2. The method of claim 1, wherein the nanocrystalline silicon active layer is formed by a process comprising: depositing a layer of amorphous silicon on a substrate; and annealing the layer of amorphous silicon to form the nanocrystalline silicon active layer. The silicon buffer layer comprises n layers of silicon buffer layers, wherein n is selected from 1≤n≤4.

3. The method of claim 2, wherein the nanocrystalline silicon active layer is formed by a process comprising: depositing a layer of amorphous silicon on a substrate; and annealing the layer of amorphous silicon to form the nanocrystalline silicon active layer. The n layers of silicon buffer layers comprise n layers of silicon buffer layers with the same silicon atom content or n layers of silicon buffer layers with the silicon atom content increasing from the silicon seed layer to the silicon bulk layer.

4. The method of claim 3, wherein the nanocrystalline silicon active layer is formed by a process comprising: depositing a layer of amorphous silicon on a substrate; and annealing the layer of amorphous silicon to form the nanocrystalline silicon active layer. The n layers are silicon buffer layers with increasing silicon atomic content from a silicon seed layer to a silicon bulk layer, each silicon buffer layer having an increasing silicon atomic content compared to the previous silicon buffer layer 5. The method of claim 1, wherein the nanocrystalline silicon active layer is formed by a process comprising: depositing a layer of amorphous silicon on a substrate; and annealing the layer of amorphous silicon to form the nanocrystalline silicon active layer. The silicon seed layer has a silicon atomic content of The silicon buffer layer has a silicon atom content of The silicon bulk layer has a silicon atom content of The silicon atom content of the insulating material layer is 6. A nanocrystalline silicon active film, characterized by, The nanocrystalline silicon active film is prepared by the method for preparing the nanocrystalline silicon active film according to any one of claims 1-5.

7. A thin film transistor comprising a substrate and a gate electrode, an insulating material layer, an active film, a drain electrode and a source electrode formed in this order on the surface of the substrate, characterized in that The active film is the nanocrystalline silicon active film according to claim 6.

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