Heterojunction solar cell, and fabrication method and device therefor

Abstract

Disclosed in the present invention are a heterojunction solar cell, and a fabrication method and device therefor. A front passivation layer and a front doping layer are provided on the front side of a silicon substrate, and a back passivation layer, a back intrinsic layer and a back doping layer are provided on the back side of the silicon substrate. The front passivation layer and the back passivation layer are each made of an intrinsic amorphous silicon-based material. The front doping layer and the back doping layer can each be made of a microcrystalline silicon-based material. The back intrinsic layer is made of a microcrystalline silicon-based material or a nanocrystalline silicon-based material. The back intrinsic layer is formed on the back passivation layer, and the back doping layer is formed on the back intrinsic layer. In the present invention, a microcrystalline silicon film layer having a high quality and a high crystalline fraction can be quickly deposited, thereby improving the conversion efficiency of the cell, and reducing the current leakage at the edge of the silicon substrate.

Description

Heterojunction solar cell and manufacturing method and device thereof TECHNICAL FIELD

[0001] The present application relates to a heterojunction solar cell and manufacturing method and device thereof. BACKGROUND

[0002] Heterojunction solar cells have been widely concerned due to their high open voltage and high conversion efficiency. The cell structure of the heterojunction solar cell usually adopts an N-type silicon wafer, deposits an intrinsic amorphous silicon passivation layer on both sides, deposits an N-type doped amorphous silicon on the front side, and deposits a P-type doped amorphous silicon on the back side. For example, a Chinese patent with publication number CN113302751B discloses a back surface emitter solar cell structure with a heterojunction and a method and device for manufacturing the same. The cell structure specifically comprises: a front surface composed of at least one front surface intrinsic layer of intrinsic amorphous silicon, and at least one front surface doped layer of amorphous silicon on the front surface intrinsic layer; a back surface composed of at least one back surface intrinsic layer of intrinsic amorphous silicon, and at least one back surface doped layer of amorphous silicon on the back surface intrinsic layer, the doping type being opposite to that of the front surface. On the side edge of the back surface emitter solar cell structure with a heterojunction, on the edge region of the semiconductor substrate, the order of the layers exists from inside to outside in the following order: the back surface intrinsic layer, the front surface intrinsic layer, the front surface doped layer, and the back surface doped layer. According to the description in the patent specification, the double-intrinsic layer structure on the edge or side edge of the semiconductor substrate can improve the shunt resistance and reverse current at the edge of the solar cell, and reduce the leakage current on the edge side of the substrate. However, the technical solution still has the following defects:

[0003] Firstly, the double-intrinsic layer structure can improve the shunt resistance and reverse current at the edge of the solar cell to a certain extent, and reduce the leakage current on the edge of the substrate, because the double-intrinsic layer structure completely wraps the substrate. However, there is still a certain leakage current between the front surface doped layer and the back surface doped layer outside the double-intrinsic layer structure on the side edge.

[0004] Secondly, the front surface doped layer and the back surface doped layer both use amorphous silicon material. However, the amorphous silicon material used as the doped layer is limited in breaking through the efficiency of the heterojunction solar cell due to its high light absorption coefficient and extremely low doping efficiency.

[0005] Microcrystalline silicon material has good light transmittance and excellent doping efficiency, and has been reported to replace amorphous silicon doped layer to form better passivation contact. However, how to realize good crystallization rate of microcrystalline silicon in a short deposition time and a thin film layer thickness in large-scale production of heterojunction cells is a big challenge. Especially for P-type microcrystalline silicon, boron doping is usually used to form a doped layer of P-type microcrystalline silicon, but the atomic radius of boron element is small and it is easy to move in the microcrystalline silicon thin film, causing amorphization of the film layer, that is, boron element has obvious inhibition effect on microcrystalline silicon crystallization, and it is usually more difficult to realize high crystallinity. Therefore, P-type microcrystalline silicon has higher requirements for process and equipment, and new process and film structure need to be proposed. Some schemes have been proposed to improve the crystallization rate of P-type microcrystalline silicon, including increasing the hydrogen dilution ratio of the deposition process, or using CO2 or H2 plasma to treat the intrinsic amorphous silicon layer of the substrate before depositing microcrystalline P. However, increasing the hydrogen dilution ratio usually exacerbates etching and reduces the deposition rate of the film layer, affecting the yield of large-scale production of heterojunction cells. And CO2 or H2 plasma treatment usually causes serious damage to passivation, reducing the open-circuit voltage of the heterojunction cell and affecting the conversion efficiency. In addition, the current large-scale production of heterojunction cell equipment usually sets up three deposition chains, that is, the first layer deposition chain is used to deposit at least one back surface intrinsic layer on the back surface of the substrate. The second layer deposition chain is used to deposit at least one front surface intrinsic layer and at least one front surface doped layer on the front surface. The third layer deposition chain is used to deposit at least one back surface doped layer on the back surface intrinsic layer, which directly deposits a back surface doped layer on the back surface amorphous silicon intrinsic layer, that is, p-type doping, which further affects the passivation effect of the back surface amorphous silicon intrinsic layer due to the diffusion of boron.

[0006] Therefore, it is urgent to develop a new process and cell structure to realize fast deposition of high-quality and high-crystallization-rate microcrystalline silicon film layer.

[0007] SUMMARY

[0008] The present application aims to provide a heterojunction solar cell and a manufacturing method and equipment thereof.

[0009] The technical solution for achieving the purpose of the present application is:

[0010] The present application provides a heterojunction solar cell manufacturing method, which comprises the following sequential steps: providing a silicon substrate with a first conductive type doping; forming at least one back surface passivation layer composed of intrinsic amorphous silicon-based material on the back surface of the silicon substrate; forming at least one front surface passivation layer composed of intrinsic amorphous silicon-based material on the front surface of the silicon substrate; forming at least one front surface doped layer on the at least one front surface passivation layer; forming at least one back surface intrinsic layer on the at least one back surface passivation layer; and forming at least one back surface doped layer on the at least one back surface intrinsic layer.

[0011] As an embodiment, the heterojunction solar cell comprises: a silicon substrate with a first conductivity type doping, at least one front passivation layer, at least one front doped layer, at least one transparent front conductive layer and at least one front electrode located on the front side of the silicon substrate; at least one back passivation layer, at least one back intrinsic layer, at least one back doped layer, at least one transparent back conductive layer and at least one back electrode located on the back side of the silicon substrate; in the front doped layer and the back doped layer, one of the doping types is the first conductivity type, and the other doping type is the second conductivity type opposite to the first conductivity type.

[0012] As an embodiment, the sequential steps are such that: on the side edge of the heterojunction solar cell, on the edge area of the silicon substrate, the sequence of layers exists from inside to outside in the following order: at least one back passivation layer, at least one front passivation layer on the at least one back passivation layer, at least one front doped layer on the at least one front passivation layer, at least one back intrinsic layer on the at least one front doped layer, and at least one back doped layer on the at least one back intrinsic layer.

[0013] The present application also proposes another method for manufacturing a heterojunction solar cell, which comprises the following sequential steps: providing a silicon substrate with a first conductivity type doping; forming at least one front passivation layer composed of an intrinsic amorphous silicon-based material on the front side of the silicon substrate; forming at least one back passivation layer composed of an intrinsic amorphous silicon-based material on the back side of the silicon substrate; forming at least one front doped layer on the at least one front passivation layer; forming at least one back intrinsic layer on the at least one back passivation layer; and forming at least one back doped layer on the at least one back intrinsic layer.

[0014] As an embodiment, the heterojunction solar cell comprises: a silicon substrate with a first conductivity type doping, at least one front passivation layer, at least one front doped layer, at least one transparent front conductive layer and at least one front electrode located on the front side of the silicon substrate; at least one back passivation layer, at least one back intrinsic layer, at least one back doped layer, at least one transparent back conductive layer and at least one back electrode located on the back side of the silicon substrate; in the front doped layer and the back doped layer, one of the doping types is the first conductivity type, and the other doping type is the second conductivity type opposite to the first conductivity type.

[0015] As an implementation, the sequential steps are such that, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate, the sequence of layers exists from inside to outside in the following order: at least one front passivation layer, at least one back passivation layer on the at least one front passivation layer, at least one front doped layer on the at least one back passivation layer, at least one back intrinsic layer on the at least one front passivation layer, and at least one back doped layer on the at least one back intrinsic layer.

[0016] As an implementation, the aforementioned methods of the present application further include the following sequential steps: forming at least one transparent back conductive layer on the at least one back doped layer; forming at least one transparent front conductive layer on the at least one front doped layer; forming a back electrode on the at least one transparent back conductive layer; and forming a front electrode on the at least one transparent front conductive layer.

[0017] As an implementation, in the aforementioned methods of the present application, the silicon substrate is an N-type silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type, or the silicon substrate is a P-type silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.

[0018] As an implementation, in the aforementioned methods of the present application, the back intrinsic layer is composed of a microcrystalline silicon-based material.

[0019] As an implementation, in the aforementioned methods of the present application, the back intrinsic layer is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material, is deposited by a PECVD method, the reaction gas includes silane and hydrogen, the power density is 50-250 mW / cm 2 , the silane flow rate is 30-120 sccm, the hydrogen flow rate is 3000-25000 sccm, the film thickness of the back intrinsic layer is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.7. The oxygen source is at least one of carbon dioxide, laughing gas, or oxygen.

[0020] As an embodiment, in the method of the present application, the front doped layer is composed of microcrystalline silicon-based material, the front doped layer is deposited by PECVD method, the reaction gas includes silane, hydrogen, phosphine and oxygen source, the phosphine is the phosphorus source, the oxygen source is at least one of carbon dioxide, laughing gas or oxygen, the film thickness of the front doped layer is in the range of 12-28nm, and the refractive index is in the range of 2.1-3.3; the back doped layer is composed of microcrystalline silicon-based material, the back doped layer is deposited by PECVD method, the reaction gas includes silane, hydrogen, borane and oxygen source, the borane is the boron source, the oxygen source is at least one of carbon dioxide, laughing gas or oxygen, the film thickness of the back doped layer is in the range of 18-36nm, and the refractive index is in the range of 2.6-3.7.

[0021] The present application provides a heterojunction solar cell, the structure of the heterojunction solar cell includes: a silicon substrate with a first conductive type doping; at least one front passivation layer formed on the front side of the silicon substrate, which is composed of intrinsic amorphous silicon-based material; at least one front doped layer formed on the at least one front passivation layer; at least one back passivation layer formed on the back side of the silicon substrate, which is composed of intrinsic amorphous silicon-based material; at least one back intrinsic layer formed on the at least one back passivation layer; at least one back doped layer formed on the at least one back intrinsic layer; at least one transparent front conductive layer formed on the at least one front doped layer; at least one transparent back conductive layer formed on the at least one back doped layer; a front electrode formed on the at least one transparent front conductive layer; a back electrode formed on the at least one transparent back conductive layer; in the at least one front doped layer and the at least one back doped layer, one of the doping types is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type.

[0022] As an embodiment, on the side edge of the heterojunction solar cell, on the edge area of the silicon substrate, the sequence of the layers from inside to outside is: at least one back passivation layer, at least one front passivation layer on the at least one back passivation layer, at least one front doped layer on the at least one front passivation layer, at least one back intrinsic layer on the at least one front doped layer, and at least one back doped layer on the at least one back intrinsic layer.

[0023] As another embodiment, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate, the order of the layers from inside to outside is: at least one front passivation layer, at least one back passivation layer on the at least one front passivation layer, at least one front doped layer on the at least one back passivation layer, at least one back intrinsic layer on the at least one front passivation layer, and at least one back doped layer on the at least one back intrinsic layer.

[0024] As an embodiment, in each of the heterojunction solar cells proposed in the present application, the silicon substrate is an N-type textured silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type; or, the silicon substrate is a P-type textured silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.

[0025] As an embodiment, in each of the heterojunction solar cells proposed in the present application, the back intrinsic layer is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.

[0026] As an embodiment, in each of the heterojunction solar cells proposed in the present application, the front doped layer is composed of a microcrystalline silicon-based material, and the back doped layer is composed of a microcrystalline silicon-based material.

[0027] The present application also proposes an apparatus for manufacturing a heterojunction solar cell, which is used for depositing at least one front passivation layer on the front surface of a silicon substrate, depositing at least one back passivation layer on the back surface of the silicon substrate, depositing at least one front doped layer on the at least one front passivation layer, depositing at least one back intrinsic layer on the at least one back passivation layer, and depositing at least one back doped layer on the at least one back intrinsic layer; in the front doped layer and the back doped layer, one of the doping types is a first conductivity type, and the other doping type is a second conductivity type opposite to the first conductivity type; the apparatus has four layer deposition chains, wherein: a first layer deposition chain is used for depositing at least one front passivation layer on the front surface of the silicon substrate; a second layer deposition chain is used for depositing at least one back passivation layer on the back surface of the silicon substrate; a third layer deposition chain is used for depositing at least one front doped layer on the front passivation layer; a fourth layer deposition chain is used for depositing at least one back intrinsic layer on the back passivation layer; and depositing at least one back doped layer on the at least one back intrinsic layer; and a turnover mechanism is included between the first layer deposition chain and the second layer deposition chain, between the second layer deposition chain and the third layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain.

[0028] The present application also proposes another device for manufacturing a heterojunction solar cell, which is used for depositing at least one back passivation layer on the back surface of a silicon substrate, depositing at least one front passivation layer on the front surface of the silicon substrate, depositing at least one front doped layer on the at least one front passivation layer, depositing at least one back intrinsic layer on the at least one back passivation layer, and depositing at least one back doped layer on the at least one back intrinsic layer; in the at least one front doped layer and the at least one back doped layer, one is of a first conductive type, and the other is of a second conductive type opposite to the first conductive type; the device has four layer deposition chains, wherein: the first layer deposition chain is used for depositing the at least one back passivation layer on the back surface of the silicon substrate; the second layer deposition chain is used for depositing the at least one front passivation layer on the front surface of the silicon substrate; the third layer deposition chain is used for depositing the at least one front doped layer on the front passivation layer; the fourth layer deposition chain is used for depositing the at least one back intrinsic layer on the back passivation layer, and depositing the at least one back doped layer on the at least one back intrinsic layer; and a turnover mechanism is included between the first layer deposition chain and the second layer deposition chain, and between the second layer deposition chain and the third layer deposition chain. As an optimization, a vacuum isolation cavity is arranged between the second layer deposition chain and the third layer deposition chain; or, the cell structure in the process is subjected to a vacuum breaking treatment when being transmitted between the second layer deposition chain and the third layer deposition chain.

[0029] The present application also proposes another device for manufacturing a heterojunction solar cell, which is used for depositing at least one back passivation layer on the back surface of a silicon substrate, depositing at least one front passivation layer on the front surface of the silicon substrate, and depositing at least one front doped layer on the at least one front passivation layer, depositing at least one back intrinsic layer on the at least one back passivation layer, and depositing at least one back doped layer on the at least one back intrinsic layer; in the at least one front doped layer and the at least one back doped layer, one is of a first conductive type, and the other is of a second conductive type opposite to the first conductive type; the device has four layer deposition chains, wherein: the first layer deposition chain is used for depositing the at least one back passivation layer on the back surface of the silicon substrate; the second layer deposition chain is used for depositing the at least one front passivation layer on the front surface of the silicon substrate, and depositing the at least one front doped layer on the front passivation layer; the third layer deposition chain is used for depositing the at least one back intrinsic layer on the back passivation layer; the fourth layer deposition chain is used for depositing the at least one back doped layer on the at least one back intrinsic layer; and a turnover mechanism is included between the first layer deposition chain and the second layer deposition chain, and between the second layer deposition chain and the third layer deposition chain.

[0030] The application further provides another device for manufacturing a heterojunction solar cell, which is used for forming at least one back passivation layer on the back surface of a silicon substrate, depositing at least one front passivation layer on the front surface of the silicon substrate, depositing at least one front doping layer on the at least one front passivation layer, depositing at least one back intrinsic layer on the at least one back passivation layer, and depositing at least one back doping layer on the at least one back intrinsic layer; in the front doping layer and the back doping layer, one is of a first conductive type, and the other is of a second conductive type opposite to the first conductive type; the device has five layer deposition chains, wherein: a first layer deposition chain is used for depositing at least one back passivation layer on the back surface of the silicon substrate; a second layer deposition chain is used for depositing at least one front passivation layer on the front surface of the silicon substrate; a third layer deposition chain is used for depositing at least one front doping layer on the front passivation layer; a fourth layer deposition chain is used for depositing at least one back intrinsic layer on the back passivation layer; a fifth layer deposition chain is used for depositing at least one back doping layer on the at least one back intrinsic layer; and a turnover mechanism is arranged between the first layer deposition chain and the second layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain

[0031] As an implementation form, in each of the devices for manufacturing a heterojunction solar cell provided by the application, the back intrinsic layer is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material, is deposited by a PECVD method, and uses a reaction gas including silane, hydrogen and an oxygen source, wherein the oxygen source is at least one of carbon dioxide, laughing gas or oxygen, and the power density is 50-250 mW / cm 2 , the silane flow rate is 30-120 sccm, and the hydrogen flow rate is 3000-25000 sccm; the film layer thickness of the back intrinsic layer is 3-15 nm, and the refractive index is in the range of 2.4-3.7.

[0032] As an implementation form, in each of the devices for manufacturing a heterojunction solar cell provided by the application, the front doping layer is composed of a microcrystalline silicon-based material, is deposited by a PECVD method, and uses a reaction gas including silane, hydrogen, phosphine and an oxygen source, wherein the phosphine is a phosphorus source, and the oxygen source is at least one of carbon dioxide, laughing gas or oxygen; the film layer thickness of the front doping layer is in the range of 12-28 nm, and the refractive index is in the range of 2.1-3.3; the back doping layer is composed of a microcrystalline silicon-based material, is deposited by a PECVD method, and uses a reaction gas including silane, hydrogen, borane and an oxygen source, wherein the borane is a boron source, and the oxygen source is at least one of carbon dioxide, laughing gas or oxygen; the film layer thickness of the back doping layer is in the range of 18-36 nm, and the refractive index is in the range of 2.6-3.7.

[0033] Compared with the prior art, the application has the following advantages:

[0034] (1) The present application sets a back surface intrinsic layer between the back surface passivation layer and the back surface doping layer, which can isolate the boron element from the back surface passivation layer when the back surface doping layer is formed, and improve the passivation of the heterojunction solar cell.

[0035] (2) The present application sets a back surface intrinsic layer between the back surface passivation layer and the back surface doping layer, which can isolate the boron element from the back surface passivation layer when the back surface doping layer is formed, and improve the passivation of the heterojunction solar cell.

[0036] (3) When boron element is used to form the P-type microcrystalline silicon back surface doping layer, the boron element has an adverse inhibitory effect on the crystallization of microcrystalline silicon, which affects the crystallization rate of P-type microcrystalline silicon. Therefore, the heterojunction solar cell proposed by the present application inserts a back surface intrinsic layer composed of microcrystalline silicon-based material or nanocrystalline silicon-based material between the back surface passivation layer and the P-type microcrystalline silicon, forming an intrinsic microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. The boron element has no adverse effect on the crystallization of the intrinsic microcrystalline silicon-based material layer or the nanocrystalline silicon-based material layer, so that the P-type microcrystalline silicon back surface doping layer is grown on the basis of the intrinsic microcrystalline silicon-based material layer or the nanocrystalline silicon-based material layer, which can crystallize more quickly, reduce the inhibitory effect of boron element on the crystallization of P-type microcrystalline silicon, promote the rapid crystallization of microcrystalline silicon, and further reduce the incubation layer thickness of P-type microcrystalline silicon. At the same time, the intrinsic microcrystalline silicon-based material layer or the nanocrystalline silicon-based material layer can further isolate the boron element from the back surface passivation layer when the back surface doping layer is formed, and improve the passivation of the heterojunction solar cell. In addition, the intrinsic microcrystalline silicon-based material layer or the nanocrystalline silicon-based material layer can further isolate the front surface doping layer and the back surface doping layer of P-type microcrystalline silicon on the side edge of the silicon substrate, further reducing the current leakage on the side edge of the silicon substrate.

[0037] (4) The oxygen doping realized by the present application can increase the stress of the front surface doping layer and the back surface doping layer microcrystalline silicon film layer, which is helpful for the nucleation and rapid crystallization of microcrystalline silicon; at the same time, it can reduce the incubation layer thickness of P-type microcrystalline silicon, and improve the selectivity of hole contact of the heterojunction solar cell.

[0038] (5) The fourth deposition chain equipment of the present application increases the third deposition chain for depositing the back intrinsic layer after the second deposition chain deposits the front passivation layer and the front doped layer, and the fourth deposition chain deposits the back doped layer. In this way, the third deposition chain avoids the pollution of boron element from the carrier plate and the process chamber in the fourth deposition chain, ensures the purity of the back intrinsic layer, and ensures that the process chamber and the carrier plate are free of boron element. In the fifth deposition chain equipment of the present application, the fourth deposition chain is used to deposit the back intrinsic layer, and the fifth deposition chain is used to deposit the back doped layer, which can also avoid the pollution of boron element from the carrier plate and the process chamber in the fifth deposition chain, ensure the purity of the back intrinsic layer, and ensure that the process chamber and the carrier plate are free of boron element.

[0039] (6) The fourth deposition chain equipment of the present application increases the third deposition chain for depositing the intrinsic microcrystalline silicon layer after the front doped microcrystalline silicon is formed, and the fourth deposition chain deposits the back P-type doped microcrystalline silicon layer. In this way, the third deposition chain avoids the pollution of boron element from the carrier plate and the process chamber in the fourth deposition chain, ensures the purity of the intrinsic microcrystalline silicon layer, and ensures that the process chamber and the carrier plate are free of boron element. This is conducive to improving the crystallization rate of the back P-type doped microcrystalline silicon layer, realizing the good selectivity of the heterojunction back hole collection, and improving the conversion efficiency of the cell. In the fifth deposition chain equipment of the present application, the fourth deposition chain is used to deposit the intrinsic microcrystalline silicon layer, and the fifth deposition chain is used to deposit the P-type doped microcrystalline silicon layer, which can also avoid the pollution of boron element from the carrier plate and the process chamber in the fifth deposition chain, ensure the purity of the intrinsic microcrystalline silicon layer, and ensure that the process chamber and the carrier plate are free of boron element.

[0040] Additional features and advantages of the present application are set forth in the following specification, and in part will be apparent from the description or can be learned by practice of the present application. The purposes and other advantages of the present application will be realized and attained by the structures particularly pointed out in the written description and claims hereof as well as the appended drawings. BRIEF DESCRIPTION OF DRAWINGS

[0041] FIG. 1 is a schematic diagram of the structure of the front and back of a solar cell in an embodiment of the present application.

[0042] FIG. 2 is a schematic diagram of one structure of the side edge of a solar cell substrate in an embodiment of the present application.

[0043] FIG. 3 is a schematic diagram of another structure of the side edge of a solar cell substrate in an embodiment of the present application.

[0044] FIG. 4 is a schematic diagram of a deposition chain including at least one process chamber in an embodiment of the present application.

[0045] Figure 5 is a schematic diagram of a deposition chain including at least two process chambers in an embodiment of the present application.

[0046] Figure 6 is a schematic diagram of two deposition chains in front and back of a separation chamber in an embodiment of the present application. DETAILED DESCRIPTION

[0047] It is readily understood that the technical solution according to the present application can be embodied in a variety of ways by those skilled in the art without changing the essential characteristics of the present application. Therefore, the following detailed description and drawings are merely illustrative of the technical solution of the present application and should not be regarded as limiting or restrictive of the technical solution of the present application. On the contrary, the purpose of providing these embodiments is to enable those skilled in the art to have a more thorough understanding of the present application. The preferred embodiments of the present application will be described in detail below with reference to the drawings, which form a part of this application, and which are used to illustrate the novel concepts of the present application together with the embodiments of the present application.

[0048] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. Note that the relative arrangement, numerical expressions, and numerical values of the components and steps set forth in these embodiments are not limiting to the scope of the present application unless otherwise specified.

[0049] The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the application or its application or uses.

[0050] Techniques, methods, and devices known to those of ordinary skill in the relevant art can not be discussed in detail herein, but should be considered as part of the specification, where appropriate.

[0051] In all the examples shown and discussed herein, any specific values should be interpreted as merely illustrative and not as a limitation. Thus, other examples of the exemplary embodiments can have different values.

[0052] In combination with FIG. 1, the heterojunction solar cell described in the present application includes a silicon substrate 10 with a first conductivity type doping. On the front side of the silicon substrate 10, there are at least one front passivation layer 11, at least one front doped layer 12, at least one transparent front conductive layer 13, and at least one front electrode 14. On the back side of the silicon substrate 10, there are at least one back passivation layer 21, at least one back intrinsic layer 22, at least one back doped layer 23, and at least one transparent back conductive layer 24 and at least one back electrode 25. In the front doped layer 12 and the back doped layer 23, one of them is doped with a first conductivity type, and the other is doped with a second conductivity type opposite to the first conductivity type. The present application provides at least one back intrinsic layer 22 between the back passivation layer 21 and the back doped layer 23. The back doped layer 23 serves to isolate the back passivation layer 21 and the back doped layer 23, thereby bringing benefits to the cell structure and processing sequence. For example, it can reduce the edge current leakage of the substrate, and avoid the formation of the back doped layer 23 from contaminating or adversely affecting the back passivation layer 21.

[0053] In combination with FIG. 1, the above describes the basic structure of the front and back of the silicon substrate 10 of the heterojunction solar cell described in the present application. As described in CN113302751B Chinese patent, in each processing step of the heterojunction solar cell, when the silicon substrate 10 or other layers are in the atmosphere, an oxide layer will grow on the surface of the corresponding layer. The oxide layer is a natural oxidation phenomenon that occurs when the silicon substrate 10 or other layers are in the atmosphere, and the specific layer on which the oxide layer grows mainly depends on the timing when the silicon substrate 10 or other layers are in the atmosphere in the processing steps of the heterojunction solar cell. Therefore, in the absence of explicit definition in the present application, for the heterojunction solar cell structure described in the present application, whether there is an oxide layer on each layer, and how many oxide layers exist, are not the contents that need to be defined in the present application, and therefore, the oxide layer is not shown in each schematic diagram.

[0054] As a preferred embodiment, in the heterojunction solar cell, in the front doped layer 12 and the back doped layer 23, one of them is doped with a first conductivity type, and the other is doped with a second conductivity type opposite to the first conductivity type. For example, the silicon substrate 10 uses an N-type silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type. Alternatively, the silicon substrate 10 uses a P-type silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type. In this way, a heterojunction solar cell with an emitter on the back can be formed.

[0055] As a preferred embodiment, at least one front passivation layer 11 is formed on the front side of the silicon substrate 10, which is composed of intrinsic amorphous silicon-based material; at least one back passivation layer 21 is formed on the back side of the silicon substrate 10, which is composed of intrinsic amorphous silicon-based material.

[0056] As an embodiment, the front doped layer 12 and the back doped layer 23 can be composed of amorphous silicon material, which is doped according to the specific conductive type. Generally, N-type doping adopts phosphorus doping, and P-type doping adopts boron doping. As a more preferred embodiment, the front doped layer 12 and the back doped layer 23 are composed of microcrystalline silicon-based material, which is doped according to the specific conductive type. N-type doping can adopt phosphorus doping, and P-type doping can adopt boron doping. The front doped layer 12 and the back doped layer 23 composed of microcrystalline silicon-based material can form better passivation contact.

[0057] As a preferred embodiment, the back intrinsic layer 22 is formed of microcrystalline silicon-based material or nanocrystalline silicon-based material. When the back intrinsic layer 22 is formed of microcrystalline silicon-based material or nanocrystalline silicon-based material, a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer is formed. In this way, when the boron-doped back doped layer 23 is formed after the back intrinsic layer 22, the back intrinsic layer 22 can play a role of isolating the back passivation layer 21 and the back doped layer 23, preventing the pollution of boron element to the back passivation layer, and improving the passivation of the heterojunction cell. When the back doped layer 23 is also composed of microcrystalline silicon-based material, the boron-doped P-type microcrystalline silicon back doped layer is grown on the basis of the back intrinsic layer 22, which can crystallize more quickly, reduce the inhibition of boron element to the crystallization of P-type microcrystalline silicon, and is conducive to the rapid growth of P-type microcrystalline silicon, thereby greatly reducing the incubation layer thickness of P-type microcrystalline silicon.

[0058] With reference to FIG. 2, as an embodiment, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the layers are present in the following order from inside to outside: at least one back passivation layer 21, at least one front passivation layer 11 on the at least one back passivation layer 21, at least one front doped layer 12 on the at least one front passivation layer 11, at least one back intrinsic layer 22 on the at least one front doped layer, and at least one back doped layer 23 on the at least one back intrinsic layer 22. In this way, the back passivation layer 21 and the front passivation layer 11 completely wrap the silicon substrate 10, which can improve the shunt resistance and the reverse current at the edge of the solar cell to a certain extent, and reduce the leakage current at the edge of the substrate. Further, on the side edge of the solar cell, at least one back intrinsic layer 22 is arranged between the front doped layer and the back doped layer 23. The back intrinsic layer 22 serves to isolate the back passivation layer 21 from the back doped layer 23, thereby bringing benefits to the cell structure and the processing sequence. For example, the leakage of the side current at the edge of the substrate can be reduced, and the formation process of the back doped layer 23 can avoid contamination or adverse effects on the back passivation layer 21. The back intrinsic layer 22 is preferably composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material, and forms a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. At this time, the back intrinsic layer 22 composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material serves to isolate the front doped layer 12 from the back doped layer 23 on the side edge of the silicon substrate, and can further reduce the leakage of the current at the side edge of the silicon substrate.

[0059] With reference to FIG. 3, as another embodiment, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the order of the layers from inside to outside is as follows: at least one front passivation layer 11, at least one back passivation layer 21 on the at least one front passivation layer 11, at least one front doped layer 12 on the at least one back passivation layer 21, at least one back intrinsic layer 22 on the at least one front doped layer 12, and at least one back doped layer 23 on the at least one back intrinsic layer 22. In this way, the back passivation layer 21 and the front passivation layer 11 completely wrap the silicon substrate 10, which can improve the shunt resistance and the reverse current at the edge of the solar cell to some extent, and reduce the leakage current at the edge of the substrate. Further, on the side edge of the solar cell, at least one back intrinsic layer 22 is arranged between the front doped layer 12 and the back doped layer 23. The back intrinsic layer 22 serves to isolate the front doped layer 12 from the back doped layer 23, thereby bringing benefits to the cell structure and the processing sequence. For example, the leakage of the side current at the edge of the substrate can be reduced, and the formation process of the back doped layer 23 can avoid contamination or adverse effects on the back passivation layer 21. The back intrinsic layer 22 is preferably composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material, and forms a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. At this time, the back intrinsic layer 22 composed of the microcrystalline silicon-based material or the nanocrystalline silicon-based material has a better isolation effect on the front doped layer 12 and the back doped layer 23, and can further reduce the leakage of the current at the edge of the silicon substrate.

[0060] The embodiments shown in FIGS. 2 and 3 are basically the same in structure on the front and back surfaces of the silicon substrate 10, but differ in structure on the side edge. In the embodiment shown in FIG. 2, the side edge of the silicon substrate 10 is first the back passivation layer 21 from inside to outside, and then the front passivation layer 11. In the embodiment shown in FIG. 3, the side edge of the silicon substrate 10 is first the front passivation layer 21 from inside to outside, and then the back passivation layer 11. This is mainly due to the difference in the sequence of steps in the manufacturing method of the heterojunction solar cell. Next, different manufacturing methods of the heterojunction solar cell applicable to the structure of the embodiment shown in FIG. 2 and the structure of the embodiment shown in FIG. 3, respectively, are described.

[0061] In one embodiment of the method for manufacturing a heterojunction solar cell, the heterojunction solar cell comprises: a silicon substrate 10 having a first conductivity type doping; at least one front passivation layer 11, at least one front doped layer 12, at least one transparent front conductive layer 13, and at least one front electrode 14 on the front side of the silicon substrate 10; at least one back passivation layer 21, at least one back intrinsic layer 22, at least one back doped layer 23, and at least one transparent back conductive layer 24 and at least one back electrode 25 on the back side of the silicon substrate 10; and in the front doped layer 12 and the back doped layer 23, one of the doping types is the first conductivity type and the other of the doping types is the second conductivity type opposite to the first conductivity type. The structure of the heterojunction solar cell on the front side and the back side of the silicon substrate 10 is not limited to this, but also includes other more specific front side structure and back side structure in the preferred embodiments described above, and other front side structure and back side structure that can be obtained by those skilled in the art based on the content disclosed in the present patent document. In this embodiment, the method for manufacturing a heterojunction solar cell comprises the following steps in sequence: providing a silicon substrate 10 having a first conductivity type doping; forming at least one back passivation layer 21 composed of an intrinsic amorphous silicon-based material on the back side of the silicon substrate 10; forming at least one front passivation layer 11 composed of an intrinsic amorphous silicon-based material on the front side of the silicon substrate 10; forming at least one front doped layer 12 on the at least one front passivation layer 11; forming at least one back intrinsic layer 22 on the at least one back passivation layer 21; and forming at least one back doped layer 23 on the at least one back intrinsic layer 22. In the method described in this embodiment, the back passivation layer 21 is formed on the back side of the silicon substrate 10 first, and then the front passivation layer 11 is formed on the front side of the silicon substrate 10. Therefore, it is more suitable for the manufacturing of a heterojunction solar cell having a structure with side edges as shown in FIG. 2. Based on the steps in sequence shown in this embodiment, the layers on the side edges of the heterojunction solar cell and on the edge area of the silicon substrate 10 exist in the following order from inside to outside: at least one back passivation layer 21, at least one front passivation layer 11, at least one front doped layer 12, at least one back intrinsic layer 22, and at least one back doped layer 23. In the method for manufacturing a heterojunction solar cell described in this embodiment, the front passivation layer 11 and the front doped layer 12 can be deposited in the same deposition chain or in different deposition chains. The back intrinsic layer 22 and the back doped layer 23 can be deposited in the same deposition chain or in different deposition chains.

[0062] In another embodiment of the method for fabricating a heterojunction solar cell, the heterojunction solar cell comprises: a silicon substrate 10 with a first conductivity type doping; at least one front passivation layer 11, at least one front doped layer 12, at least one transparent front conductive layer 13, and at least one front electrode 14 on the front side of the silicon substrate 10; at least one back passivation layer 21, at least one back intrinsic layer 22, at least one back doped layer 23, and at least one transparent back conductive layer 24 and at least one back electrode 25 on the back side of the silicon substrate 10; and in the front doped layer 12 and the back doped layer 23, one of the doping types is the first conductivity type, and the other doping type is the second conductivity type opposite to the first conductivity type. The structure of the heterojunction solar cell on the front side and the back side of the silicon substrate 10 is not limited to this, and also includes other more specific front side structures and back side structures in the above-described preferred embodiments, as well as other front side structures and back side structures that can be obtained by those skilled in the art based on the content described in the present patent. In this embodiment, the method for fabricating a heterojunction solar cell comprises the following steps in sequence: providing a silicon substrate 10 with a first conductivity type doping; forming at least one front passivation layer 11 composed of an intrinsic amorphous silicon-based material on the front side of the silicon substrate 10; forming at least one back passivation layer 21 composed of an intrinsic amorphous silicon-based material on the back side of the silicon substrate 10; forming at least one front doped layer 12 on the at least one front passivation layer 11; forming at least one back intrinsic layer 22 on the at least one back passivation layer 21; and forming at least one back doped layer 23 on the at least one back intrinsic layer 22. In the method described in this embodiment, the front passivation layer 11 is first formed on the front side of the silicon substrate 10, and then the back passivation layer 21 is formed on the back side of the silicon substrate 10. Therefore, it is more suitable for the fabrication of a heterojunction solar cell with the structure shown in FIG. 3 having side edges. Based on the steps shown in this embodiment in sequence, the layers on the side edges of the heterojunction solar cell on the edge region of the silicon substrate 10 exist in the following order from the inside to the outside: at least one front passivation layer 11, at least one back passivation layer 21, at least one front doped layer 12, at least one back intrinsic layer 22, and at least one back doped layer 23. In the method for fabricating a heterojunction solar cell described in this embodiment, the back intrinsic layer 22 and the back doped layer 23 can be deposited in the same deposition chain or in different deposition chains.

[0063] For the different methods for fabricating a heterojunction solar cell shown in the above-described embodiments, preferably, the back intrinsic layer 22 is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material to form a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. The front doped layer 12 and the back doped layer 23 can both be composed of a microcrystalline silicon-based material.

[0064] The back passivation layer 21 is deposited by PECVD method, the reaction gas includes silane and hydrogen, the film layer thickness of the back passivation layer 21 is in the range of 1-20nm, the refractive index is in the range of 3.5-4.2.

[0065] The front passivation layer 11 is deposited by PECVD method, the reaction gas includes silane and hydrogen, the film layer thickness of the front passivation layer 11 is in the range of 1-20nm, the refractive index is in the range of 3.5-4.2.

[0066] The front doped layer 12 of microcrystalline silicon-based material is deposited by PECVD method, the reaction gas includes silane, hydrogen, phosphine and oxygen source, wherein the phosphine is used as phosphorus source. Preferably, the reaction gas further includes oxygen source, the oxygen source is at least one of carbon dioxide, laughing gas and oxygen. The laughing gas is preferably used, which is easier to decompose and is beneficial to the crystallization of microcrystalline layer. The film layer thickness of the front doped layer 12 of microcrystalline silicon-based material is in the range of 12-28nm, preferably in the range of 16-25nm, the refractive index is in the range of 2.1-3.3, preferably in the range of 2.5-3.0.

[0067] The back intrinsic layer 22 of microcrystalline silicon-based material or nanocrystalline silicon-based material is deposited by PECVD method, the reaction gas includes silane and hydrogen, the process parameters are: power density is in the range of 50-250mW / cm 2 , the flow rate of silane is in the range of 30-120sccm, the flow rate of hydrogen is in the range of 3000-25000sccm, the formed back intrinsic layer 22 achieves the effect of isolating the back passivation layer 21 and the back doped layer 23, and isolating the front doped layer 12 and the back doped layer 23. Preferably, the reaction gas further includes oxygen source, the oxygen source is at least one of carbon dioxide, laughing gas and oxygen. The laughing gas is preferably used as oxygen source, the flow rate of laughing gas is in the range of 20-100sccm, which is easier to decompose and is beneficial to the crystallization of microcrystalline layer; the film layer thickness of the back intrinsic layer 22 of microcrystalline silicon-based material is in the range of 3-15nm, preferably in the range of 5-12nm, the refractive index is in the range of 2.4-3.7, preferably in the range of 2.8-3.5.

[0068] The back doped layer 23 of microcrystalline silicon-based material is deposited by PECVD method, the reaction gas includes silane, hydrogen and borane, wherein the borane is used as boron source. Preferably, the reaction gas further includes oxygen source, the oxygen source is at least one of carbon dioxide, laughing gas and oxygen. The laughing gas is preferably used as oxygen source, which is easier to decompose and is beneficial to the crystallization of microcrystalline layer; the film layer thickness of the back doped layer 23 of microcrystalline silicon-based material is in the range of 18-36nm, preferably in the range of 24-35nm, the refractive index is in the range of 2.6-3.7, preferably in the range of 3.0-3.6.

[0069] The transparent front conductive layer 13 and the transparent back conductive layer 24 are deposited by a PVD device, and the film thickness of the transparent front conductive layer 13 and the transparent back conductive layer 24 is in the range of 70-100 nm; the front electrode and the back electrode are formed by electroplating or screen printing.

[0070] It should be noted that in the foregoing embodiments, the oxygen doping realized by laughing gas can increase the stress of the microcrystalline silicon film, which is helpful for the nucleation and rapid crystallization of the microcrystalline silicon; at the same time, it can thin the hatching layer thickness of the P-type microcrystalline silicon and improve the selectivity of the hole contact of the heterojunction solar cell.

[0071] For the different heterojunction solar cell manufacturing methods shown in the foregoing embodiments, preferably, the conductive layers and electrodes on the front and back of the silicon substrate 10 are formed in the following order: forming at least one transparent back conductive layer 24 on at least one back doped layer 23; forming at least one transparent front conductive layer 13 on at least one front doped layer 12; forming a back electrode 25 on at least one transparent back conductive layer 24; forming a front electrode 14 on at least one transparent front conductive layer 13. During the manufacturing of the solar cell, the carrier plate will adsorb the water vapor in the air, and the water vapor will also provide oxygen in each deposition step, but the incident light side of the solar cell is sensitive to oxygen, and the oxygen control requirement is high. Therefore, the conductive layers on the back of the silicon substrate 10 are deposited first, and then the conductive layers on the front are deposited. This is conducive to the further control of the water vapor during the deposition process of the front of the solar cell.

[0072] The present application also proposes a device for manufacturing a heterojunction solar cell suitable for manufacturing the heterojunction solar cell structure or manufacturing method shown in the foregoing embodiments.

[0073] In the first embodiment of the device for manufacturing the heterojunction solar cell, the device can be applied to the heterojunction solar cell structure shown in FIG. 1 and FIG. 2, and the manufacturing method of the first deposition of the back passivation layer 21 on the silicon substrate 10. The layers on the edge area of the silicon substrate 10 from inside to outside in the order of: at least one back passivation layer 21, at least one front passivation layer 11, at least one front doped layer 12, at least one back intrinsic layer 22, and at least one back doped layer 23. Specifically, the device in this embodiment is used for: depositing at least one back passivation layer 21 on the back of the silicon substrate 10, depositing at least one front passivation layer 11 on the front of the silicon substrate 10, depositing at least one front doped layer 12 on the at least one front passivation layer 21, depositing at least one back intrinsic layer 22 on the at least one back passivation layer 21, and depositing at least one back doped layer 23 on the at least one back intrinsic layer 22; in the at least one front doped layer 12 and the at least one back doped layer 23, one of the doping types is the first conductive type, and the other is the second conductive type opposite to the first conductive type. The device in this embodiment has four layer deposition chains, wherein: the first layer deposition chain is used for depositing at least one back passivation layer 21 on the back of the silicon substrate 10; the second layer deposition chain is used for depositing at least one front passivation layer 11 on the front of the silicon substrate 10; the third layer deposition chain is used for depositing at least one front doped layer 12 on the front passivation layer 11; the fourth layer deposition chain is used for depositing at least one back intrinsic layer 22 on the back passivation layer 21; and depositing at least one back doped layer 23 on the at least one back intrinsic layer 22; and the turnover mechanism between the first layer deposition chain and the second layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain. As a preferred mode, when the device in this embodiment is used to manufacture the heterojunction solar cell, the at least one front passivation layer 11 is composed of intrinsic amorphous silicon-based material; and the at least one back passivation layer 21 is composed of intrinsic amorphous silicon-based material. The back intrinsic layer 22 is composed of microcrystalline silicon-based material or nanocrystalline silicon-based material. The front doped layer 12 and the back doped layer 23 are both composed of microcrystalline silicon-based material. The effective doping efficiency of microcrystalline silicon is higher than that of amorphous silicon, the light absorption coefficient is low, the light transmission is good, and the conductivity is better.

[0074] As a preferred mode, for the first embodiment of the device, the first layer deposition chain, the second layer deposition chain, and the third layer deposition chain each include at least one reaction chamber. The fourth deposition chain includes at least two reaction chambers for depositing the back intrinsic layer 22 composed of microcrystalline silicon-based material or nanocrystalline silicon-based material, and the back doped layer 23 composed of P-doped (such as boron-doped) microcrystalline silicon-based material. This can further avoid the influence of boron elements on the back intrinsic layer.

[0075] In the above embodiment, a vacuum breaking process can be performed between the second layer deposition chain and the third layer deposition chain, i.e. a vacuum breaking chamber (for example, an unloading chamber is used as the vacuum breaking chamber) is arranged after the second deposition chain and a vacuum pumping chamber (for example, a loading chamber is used as the vacuum pumping chamber) is arranged before the third layer deposition chain, so as to prevent diffusion of the doping gas between the adjacent front passivation layer 11 deposition chamber and the front doping layer 12 deposition chamber, i.e. to prevent the doping in the front doping layer 12 deposition chamber from diffusing into the front passivation layer 11 deposition chamber and affecting the passivation effect of the front passivation layer 11.

[0076] As an optional mode, an isolation chamber can also be arranged between the second layer deposition chain and the third layer deposition chain, i.e. an isolation chamber is arranged between the deposition of the front passivation layer 11 and the front doping layer 12, so as to prevent the doping gas in the reaction chamber for depositing the front doping layer 12 from diffusing into the reaction chamber for depositing the front passivation layer 11 and affecting the passivation effect of the front passivation layer 11.

[0077] In the second embodiment of the device for manufacturing the heterojunction solar cell, the device can be applied to the heterojunction solar cell structure shown in FIG. 1 and FIG. 3, and the manufacturing method of the first deposition of the front passivation layer 11 on the silicon substrate 10. The layer sequence from inside to outside on the edge area of the silicon substrate 10 on the side edge of the heterojunction solar cell is: at least one front passivation layer 11, at least one back passivation layer 21, at least one front doped layer 12, at least one back intrinsic layer 22, and at least one back doped layer 23. Specifically, the device of the present embodiment is used for: depositing at least one front passivation layer 11 on the front surface of the silicon substrate 10, depositing at least one back passivation layer 21 on the back surface of the silicon substrate 10, depositing at least one front doped layer 12 on the at least one front passivation layer 21, depositing at least one back intrinsic layer 22 on the at least one back passivation layer 21, and depositing at least one back doped layer 23 on the at least one back intrinsic layer 22; in the at least one front doped layer 12 and the at least one back doped layer 23, one of the doping types is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type; the device has four layer deposition chains, wherein: the first layer deposition chain is used for depositing at least one front passivation layer 11 on the front surface of the silicon substrate 10; the second layer deposition chain is used for depositing at least one back passivation layer 21 on the back surface of the silicon substrate 10; the third layer deposition chain is used for depositing at least one front doped layer 12 on the front passivation layer 11; the fourth layer deposition chain is used for depositing at least one back intrinsic layer 22 on the back passivation layer 21, and depositing at least one back doped layer 23 on the at least one back intrinsic layer 22; and the device comprises a turnover mechanism between the first layer deposition chain and the second layer deposition chain, between the second layer deposition chain and the third layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain. As a preferred mode, in the application of the device of the present embodiment for manufacturing the heterojunction solar cell, the at least one front passivation layer 11 is composed of intrinsic amorphous silicon-based material; and the at least one back passivation layer 21 is composed of intrinsic amorphous silicon-based material. The back intrinsic layer 22 is composed of microcrystalline silicon-based material or nanocrystalline silicon-based material. Alternatively, the front doped layer 12, the back doped layer 22, and the back intrinsic layer 22 are all composed of microcrystalline silicon-based material. Microcrystalline silicon has higher effective doping efficiency of the element than amorphous silicon, low light absorption coefficient corresponding to good light transmittance, and better conductivity.

[0078] As a preferred mode, for the second embodiment of the device, the first layer deposition chain, the second layer deposition chain, and the third layer deposition chain each comprise at least one reaction chamber. The fourth deposition chain comprises at least two reaction chambers for depositing the back intrinsic layer 22 composed of microcrystalline silicon-based material or nanocrystalline silicon-based material and the back doped layer 23 composed of P-doped (such as boron-doped) microcrystalline silicon-based material. This can further avoid the influence of boron element on the back intrinsic microcrystalline silicon.

[0079] In a third embodiment of the apparatus for manufacturing a heterojunction solar cell, the apparatus can be adapted to the heterojunction solar cell structure shown in FIG. 1, FIG. 2, and the manufacturing method of the first deposition of the back passivation layer 21 on the silicon substrate 10, the order of layers from inside to outside on the edge region of the silicon substrate 10 can be: at least one back passivation layer 21, at least one front passivation layer 11, at least one front doped layer 12, at least one back intrinsic layer 22, and at least one back doped layer 23. Specifically, the apparatus of the present embodiment is used to: deposit at least one back passivation layer 21 on the back surface of the silicon substrate 10, deposit at least one front passivation layer 11 on the front surface of the silicon substrate 10, deposit at least one front doped layer 12 on the at least one front passivation layer 21, deposit at least one back intrinsic layer 22 on the at least one back passivation layer 21, and deposit at least one back doped layer 23 on the at least one back intrinsic layer 22; in the at least one front doped layer 12 and the at least one back doped layer 23, one of the doping types is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type. The apparatus of the present embodiment has four layer deposition chains, wherein: the first layer deposition chain is used to deposit at least one back passivation layer 21 on the back surface of the silicon substrate 10; the second layer deposition chain is used to deposit at least one front passivation layer 11 on the front surface of the silicon substrate 10, and at least one front doped layer 12 on the front passivation layer 11; the third layer deposition chain is used to deposit at least one back intrinsic layer 22 on the back passivation layer 21; the fourth layer deposition chain is used to deposit at least one back doped layer 23 on the at least one back intrinsic layer 22; and the apparatus includes a flipping mechanism between the first layer deposition chain and the second layer deposition chain, and between the second layer deposition chain and the third layer deposition chain. As a preferred mode, in the use of the apparatus of the present embodiment to manufacture a heterojunction solar cell, the at least one front passivation layer 11 is composed of an intrinsic amorphous silicon-based material; the at least one back passivation layer 21 is composed of an intrinsic amorphous silicon-based material. The back intrinsic layer 22 is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material. The front doped layer 12 and the back doped layer 22 are both composed of a microcrystalline silicon-based material. In the present embodiment, the first layer deposition chain, the third layer deposition chain, and the fourth layer deposition chain each include at least one reaction chamber. The second deposition chain includes at least two reaction chambers for depositing the front passivation layer 11 and the front doped layer 12 composed of a microcrystalline silicon-based material, respectively. The apparatus of the present embodiment differs from the apparatus of the first embodiment in that the back intrinsic layer 22 composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material and the back doped layer 23 composed of a microcrystalline silicon-based material and P-doped (such as boron-doped) are deposited in the third layer deposition chain and the fourth layer deposition chain, respectively.The back intrinsic layer 22 and the back doped layer 23 are deposited in one deposition chain, the carrier plate carrying the silicon wafer is transported in two process cavities. Since the doping, for example, boron doping, is carried out in the back doped layer 23, the carrier plate will be contaminated. After one deposition process is completed, the carrier plate adsorbing a small amount of doping gas will be loaded in the reaction cavity to deposit the back intrinsic layer 22, which will affect the passivation effect of the back intrinsic layer 22. Therefore, the above deposition method is selected so that only the back intrinsic layer 22 is deposited in a single deposition chain, and the carrier plate contamination can be excluded.

[0080] In the fourth embodiment of the apparatus for manufacturing the heterojunction solar cell, the apparatus can be applied to the heterojunction solar cell structure shown in FIG. 1 and FIG. 2, and the manufacturing method of the first deposition of the back passivation layer 21 on the silicon substrate 10. The layers on the edge area of the silicon substrate 10 from inside to outside in the following order: at least one back passivation layer 21, at least one front passivation layer 11, at least one front doped layer 12, at least one back intrinsic layer 22, and at least one back doped layer 23. Specifically, the apparatus in this embodiment is used for: depositing at least one back passivation layer 21 on the back of the silicon substrate 10, depositing at least one front passivation layer 11 on the front of the silicon substrate 10, depositing at least one front doped layer 12 on the at least one front passivation layer 21, depositing at least one back intrinsic layer 22 on the at least one back passivation layer 21, and depositing at least one back doped layer 23 on the at least one back intrinsic layer 22; in the at least one front doped layer 12 and the at least one back doped layer 23, one of the doping types is the first conductive type, and the other is the second conductive type opposite to the first conductive type. The apparatus in this embodiment has five deposition chains: the first deposition chain is used for depositing at least one back passivation layer 21 on the back of the silicon substrate 10; the second deposition chain is used for depositing at least one front passivation layer 11 on the front of the silicon substrate 10; the third deposition chain is used for depositing at least one front doped layer 12 on the front passivation layer 11; the fourth deposition chain is used for depositing at least one back intrinsic layer 22 on the back passivation layer 21; the fifth deposition chain is used for depositing at least one back doped layer 23 on the at least one back intrinsic layer 22; and the flipping mechanism is included between the first deposition chain and the second deposition chain, and between the third deposition chain and the fourth deposition chain. As a preferred mode, when the apparatus in this embodiment is used to manufacture the heterojunction solar cell, the at least one front passivation layer 11 is composed of intrinsic amorphous silicon-based material; the at least one back passivation layer 21 is composed of intrinsic amorphous silicon-based material; the back intrinsic layer 22 is composed of intrinsic microcrystalline silicon-based material or nanocrystalline silicon-based material; and the front doped layer 12 and the back doped layer 22 are both composed of microcrystalline silicon-based material. In this embodiment, the back passivation layer 21, the front passivation layer 11, the front doped layer 12, the back intrinsic layer 22, and the back doped layer 23 are all deposited using independent deposition chains, which can maximize the exclusion of carrier plate contamination. In particular, the back intrinsic layer 22 composed of microcrystalline silicon-based material or nanocrystalline silicon-based material and the back doped layer 22 composed of microcrystalline silicon-based material and P-doped such as boron-doped are deposited in the fourth deposition chain and the fifth deposition chain, respectively.The back intrinsic layer 22 and the back doped layer 23 are deposited in one deposition chain, the carrier plate carrying the silicon wafer is transported in two process cavities, since the doping, for example, boron doping, in the back doped layer 23 will contaminate the carrier plate, after one deposition process is completed, the carrier plate adsorbing a small amount of doping gas will be loaded with the silicon wafer to deposit the back intrinsic layer 22 in the reaction cavity, which will affect the passivation effect of the back intrinsic layer 22. Therefore, the above deposition method is selected, so that only the back intrinsic layer 22 is deposited in a single deposition chain, and the carrier plate contamination can be excluded.

[0081] For the different manufacturing heterojunction solar cell devices shown in the above embodiments, preferably, the back intrinsic layer 22 is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material to form a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. The front doped layer 12 and the back doped layer 23 can both be composed of a microcrystalline silicon-based material.

[0082] The front doped layer 12 composed of a microcrystalline silicon-based material is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, and phosphine and an oxygen source, wherein the phosphine serves as a phosphorus source. Preferably, the reaction gas further includes an oxygen source, and the oxygen source is at least one of carbon dioxide, laughing gas, and oxygen. Laughing gas is preferably used, and laughing gas is more easily decomposed, which is beneficial to the crystallization of the microcrystalline layer. The film layer thickness of the front doped layer 12 composed of a microcrystalline silicon-based material is in the range of 12-28 nm, preferably in the range of 16-25 nm, and the refractive index is in the range of 2.1-3.3, preferably in the range of 2.5-3.0.

[0083] The back intrinsic layer 22 composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material is deposited by a PECVD method, and the reaction gas includes silane and hydrogen, and the process parameters are: a power density in the range of 50-250 mW / cm 2 , a silane flow rate in the range of 30-120 sccm, and a hydrogen flow rate in the range of 3000-25000 sccm. The formed back intrinsic layer 22 achieves the effects of isolating the back passivation layer 21 and the back doped layer 23, and isolating the front doped layer 12 and the back doped layer 23. Preferably, the reaction gas further includes an oxygen source, and the oxygen source is at least one of carbon dioxide, laughing gas, and oxygen. Laughing gas is preferably used as the oxygen source, and the laughing gas flow rate is in the range of 20-100 sccm, and laughing gas is more easily decomposed, which is beneficial to the crystallization of the microcrystalline layer. The film layer thickness of the back intrinsic layer 22 composed of a microcrystalline silicon-based material is in the range of 3-15 nm, preferably in the range of 5-12 nm, and the refractive index is in the range of 2.4-3.7, preferably in the range of 2.8-3.5.

[0084] The back surface doped layer 23 is deposited by PECVD method, and the reaction gas includes silane, hydrogen, and borane, wherein the borane is used as the boron source. Preferably, the reaction gas further includes an oxygen source, and the oxygen source is at least one of carbon dioxide, laughing gas, and oxygen. The laughing gas is preferably used as the oxygen source, because the laughing gas is easier to decompose, which is beneficial to the crystallization of the microcrystalline layer. The film thickness of the back surface doped layer 23 is in the range of 18-36 nm, preferably in the range of 24-35 nm, and the refractive index is in the range of 2.6-3.7, preferably in the range of 3.0-3.6.

[0085] Figure 4 is a schematic diagram of a deposition chain including at least one reaction chamber (or process chamber \ deposition chamber). The deposition chain includes a transport device and a carrier plate for placing the silicon substrate. In Figure 4, from left to right, the first chamber is a loading chamber, the second chamber is a reaction chamber \ process chamber \ deposition chamber, and the third chamber is an unloading chamber. The part in the reaction chamber \ process chamber \ deposition chamber connected to the gas source and the radio frequency power supply system is the cathode. The deposition chain shown in Figure 4 can be applied to each of the above-mentioned embodiments. For example, it can be used as a deposition chain for depositing at least one back surface passivation layer; or, it can be used as a deposition chain for depositing at least one front surface passivation layer, or, it can be used as a deposition chain for depositing at least one front surface doped layer, or, it can be used as a deposition chain for depositing at least one back surface intrinsic layer, or, it can be used as a deposition chain for depositing at least one back surface doped layer 22.

[0086] Figure 5 is a schematic diagram of a deposition chain including at least two reaction chambers (or process chambers \ deposition chambers). The deposition chain includes a transport device and a carrier plate for placing the silicon substrate. In Figure 5, from left to right, the first chamber is a loading chamber, the second chamber is a first process chamber \ deposition chamber, the third chamber is a second process chamber \ deposition chamber, and the fourth chamber is an unloading chamber. The part in the process chamber \ deposition chamber connected to the gas source and the radio frequency power supply system is the cathode.

[0087] The deposition chain including at least two reaction chambers (or process chambers \ deposition chambers) shown in Figure 5 can be used to deposit different types of material layers. For example, in the second embodiment of the device for manufacturing a heterojunction solar cell, the fourth layer deposition chain is used to deposit at least one back surface doped layer 23 on the at least one back surface intrinsic layer 22. Alternatively, in the third embodiment, the second layer deposition chain, at this time, the second layer deposition chain can use the deposition chain shown in Figure 5, and the two reaction chambers (or process chambers \ deposition chambers) are used to deposit the front surface passivation layer 11 and the front surface doped layer 12, respectively. In short, according to the actual situation, the reaction chamber can be multiple, at least two or more reaction chambers, and different types of material layers can be deposited.

[0088] In addition, the deposition chains shown in Fig. 5 can also be used to deposit only one deposition chain of two back passivation layers 21, one deposition chain of two front passivation layers 11, one deposition chain of two front doped layers 12, one deposition chain of two back intrinsic layers 22, or one deposition chain of two back doped layers 23, etc. In short, according to the production rhythm and the thickness requirement, the reaction chamber can be multiple, at least two or more reaction chambers, and the same type of material layer is deposited.

[0089] As shown in Fig. 6, when at least two or more reaction chambers are used to deposit different types of material layers, an isolation chamber is arranged between the front and rear deposition chains. In Fig. 6, from left to right, the first chamber is a loading chamber, the second chamber is a first reaction chamber, the third chamber is an isolation chamber, the fourth chamber is a second reaction chamber, and the fifth chamber is an unloading chamber. The components in the reaction chamber connected to the gas source and the radio frequency power supply system are cathodes. Due to the existence of the isolation chamber, the process gas between adjacent process chambers can be prevented from diffusing, for example, the diffusion of the doping gas between the front passivation layer 11 deposition chamber and the front doped layer 12 deposition chamber, that is, the diffusion of the doping in the front doped layer 12 deposition chamber into the front passivation layer 11 deposition chamber is prevented.

[0090] In addition, it should be noted that at least one buffer chamber (not shown in the figure) can be arranged between the loading chamber and the process chamber as needed. The buffer chamber is used for adjusting the gas pressure and atmosphere before film deposition, temperature pretreatment, etc., thereby improving the rhythm of the transmission of the carrier plate between the loading chamber and the process chamber and improving the production efficiency. Similarly, at least one buffer chamber (not shown in the figure) can be arranged between the unloading chamber and the process chamber as needed, which is used for adjusting the gas pressure and atmosphere before film deposition, temperature pretreatment, etc., so that after the deposition process in the process chamber is completed, the carrier plate can be quickly transmitted to the unloading chamber to perform the subsequent process.

[0091] On the basis of the disclosure or teaching of the present application, the deposition chains shown in Figs. 4 to 6 can be used for the heterojunction solar cell and the manufacturing method thereof according to the actual process or process requirement.

[0092] The above description is only a preferred embodiment of the present application, but the protection scope of the present application is not limited thereto. Any changes or replacements within the technical range disclosed by the present application can be easily thought by those skilled in the art, which should be covered within the protection scope of the present application.

[0093] It is to be understood that, in describing the examples of the application above, various features of the application are sometimes grouped together in a single embodiment, or described in a single figure, for the purpose of streamlining the disclosure and aiding in the understanding of various aspects of the application. This is for illustrative purposes only and is not intended to limit the application as claimed.

Claims

1. A method for manufacturing a heterojunction solar cell, characterized in that the method comprises the following sequential steps: - providing a silicon substrate (10) having a first conductivity type doping; - forming at least one back passivation layer (21) consisting of an intrinsic amorphous silicon-based material on the back side of the silicon substrate (10); - forming at least one front passivation layer (11) consisting of an intrinsic amorphous silicon-based material on the front side of the silicon substrate (10); - forming at least one front doped layer (12) on the at least one front passivation layer (11); - forming at least one back intrinsic layer (22) on the at least one back passivation layer (21); - forming at least one back doped layer (23) on the at least one back intrinsic layer (22).

2. The method according to claim 1, characterized in that the heterojunction solar cell comprises: - a silicon substrate (10) having a first conductivity type doping, - at least one front passivation layer (11), at least one front doped layer (12), at least one transparent front conductive layer (13) and at least one front electrode (14) on the front side of the silicon substrate (10), - at least one back passivation layer (21), at least one back intrinsic layer (22), at least one back doped layer (23), and at least one transparent back conductive layer (24) and at least one back electrode (25) on the back side of the silicon substrate (10), - in the front doped layer (12) and in the back doped layer (23), one of them has a first conductivity type doping and the other one has a second conductivity type doping opposite to the first conductivity type.

3. The method according to claim 1, characterized in that the sequential steps are such that: - on the side edges of the heterojunction solar cell, on the edge area of the silicon substrate (10), the sequence of layers exists from inside to outside in the following order: - at least one back passivation layer (21), - at least one front passivation layer (11) on the at least one back passivation layer (21), - at least one front doped layer (12) on the at least one front passivation layer (11), - at least one back intrinsic layer (22) on the at least one front doped layer, - at least one back doped layer (23) on the at least one back intrinsic layer (22). The method further comprises the following sequential steps: - forming at least one transparent back conductive layer (24) on the at least one back doped layer (23); - forming at least one transparent front conductive layer (13) on the at least one front doped layer (12); 4. The method according to any one of claims 1 to 3, characterized in that, - forming a back electrode (25) on the at least one transparent back conductive layer (24); - forming a front electrode (14) on the at least one transparent front conductive layer (13).

5. The method according to any one of claims 1 to 3, characterized in that: - the silicon substrate (10) is an N-type silicon wafer, the first conductivity type is N-type and the second conductivity type is P-type, or - the silicon substrate (10) is a P-type silicon wafer, the first conductivity type is P-type and the second conductivity type is N-type. ​ ​ ​ 6. The method according to any one of claims 1 to 3, characterized in that, The back surface intrinsic layer (22) is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.

7. The method of claim 6, wherein, The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, the power density is 50-250 mW / cm 2 , the silane flow is 30-120 sccm, the hydrogen flow is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.

7.

8. The method of claim 1, wherein, The front surface doped layer (12) is composed of a microcrystalline silicon-based material, is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, and phosphine; the film layer thickness of the front surface doped layer (12) is in a range of 12-28 nm, and the refractive index is in a range of 2.1-3.

3. The back surface doped layer (23) is composed of a microcrystalline silicon-based material, is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, and borane; the film layer thickness of the back surface doped layer (23) is in a range of 18-36 nm, and the refractive index is in a range of 2.6-3.

7.

9. The method of claim 7 or 8, wherein, The reaction gas further includes an oxygen source, which is at least one of carbon dioxide, laughing gas, or oxygen.

10. A method for manufacturing a heterojunction solar cell, comprising the following sequential steps: providing a silicon substrate (10) with a first conductive type doping; forming at least one front surface passivation layer (11) composed of an intrinsic amorphous silicon-based material on a front surface of the silicon substrate (10); forming at least one back surface passivation layer (21) composed of an intrinsic amorphous silicon-based material on a back surface of the silicon substrate (10); forming at least one front surface doped layer (12) on the at least one front surface passivation layer (11); forming at least one back surface intrinsic layer (22) on the at least one back surface passivation layer (21); forming at least one back surface doped layer (23) on the at least one back surface intrinsic layer (22).

11. The method of claim 10, wherein, The heterojunction solar cell comprises: a silicon substrate (10) with a first conductive type doping, at least one front surface passivation layer (11), at least one front surface doped layer (12), at least one transparent front surface conductive layer (13), and at least one front electrode (14) on a front surface side of the silicon substrate (10); at least one back surface passivation layer (21), at least one back surface intrinsic layer (22), at least one back surface doped layer (23), and at least one transparent back surface conductive layer (24) and at least one back electrode (25) on a back surface side of the silicon substrate (10); in the front surface doped layer (12) and the back surface doped layer (23), one of the doping types is the first conductive type, and the other of the doping types is a second conductive type opposite to the first conductive type.

12. The method of claim 10, wherein, The sequential steps are such that: on a side edge of the heterojunction solar cell, on an edge area of the silicon substrate (10), the order of layers exists from inside to outside in the following order: at least one front surface passivation layer (11), at least one back surface passivation layer (21) on the at least one front surface passivation layer (11), ​ at least one front doped layer (12) on the at least one front passivation layer (11), at least one back intrinsic layer (22) on the at least one back passivation layer (21), at least one back doped layer (23) on the at least one back intrinsic layer (22).

13. The method according to any one of claims 10 to 12, characterized in that, The method further comprises the following steps in sequence: forming at least one transparent back conductive layer (24) on the at least one back doped layer (23); forming at least one transparent front conductive layer (13) on the at least one front doped layer (12); forming a back electrode (25) on the at least one transparent back conductive layer (24); forming a front electrode (14) on the at least one transparent front conductive layer (13).

14. The method according to any one of claims 10 to 12, wherein: the silicon substrate (10) is an N-type silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type, or the silicon substrate (10) is a P-type silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.

15. The method according to any one of claims 10 to 12, characterized in that, The back intrinsic layer (22) is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.

16. The method according to claim 15, wherein: The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, the power density is 50-250 mW / cm 2 , the silane flow is 30-120 sccm, the hydrogen flow is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.

7.

17. The method according to claim 10, wherein: the front doped layer (12) is composed of a microcrystalline silicon-based material, the front doped layer (12) is deposited by a PECVD method, the reaction gas includes silane, hydrogen, and phosphine, the film layer thickness of the front doped layer (12) is in a range of 12-28 nm, and the refractive index is in a range of 2.1-3.3; the back doped layer (23) is composed of a microcrystalline silicon-based material, the back doped layer (23) is deposited by a PECVD method, the reaction gas includes silane, hydrogen, and borane, the film layer thickness of the back doped layer (23) is in a range of 18-36 nm, and the refractive index is in a range of 2.6-3.

7.

18. The method according to claim 16 or 17, wherein: the reaction gas further includes an oxygen source, and the oxygen source is at least one of carbon dioxide, laughing gas, or oxygen.

19. A heterojunction solar cell, comprising: a silicon substrate (10) with a first conductivity type doping; at least one front passivation layer (11) composed of an intrinsic amorphous silicon-based material formed on a front surface of the silicon substrate (10); at least one front doped layer (12) formed on the at least one front passivation layer (11); at least one back passivation layer (21) composed of an intrinsic amorphous silicon-based material formed on a back surface of the silicon substrate (10); at least one back intrinsic layer (22) formed on the at least one back passivation layer (21); at least one back doped layer (23) formed on the at least one back intrinsic layer (22); at least one transparent front conductive layer (13) formed on the at least one front doped layer (12); and at least one transparent back conductive layer (24) formed on the at least one back doped layer (23). at least one transparent back conductive layer (24) formed on the at least one back doped layer (23); a front electrode (14) formed on the at least one transparent front conductive layer (13); a back electrode (25) formed on the at least one transparent back conductive layer (24); in said front doped layer (12) and said back doped layer (23), one of them is doped with a first conductivity type, and the other is doped with a second conductivity type opposite to the first conductivity type.

20. The solar cell according to claim 19, wherein on the side edges of the heterojunction solar cell, on the edge region of the silicon substrate (10), the sequence of layers is present from inside to outside in the following order: at least one back passivation layer (21), at least one front passivation layer (11) on said at least one back passivation layer (21), at least one front doped layer (12) on said at least one front passivation layer (11), at least one back intrinsic layer (22) on said at least one front doped layer, at least one back doped layer (23) on said at least one back intrinsic layer (22).

21. The solar cell according to claim 19, wherein on the side edges of the heterojunction solar cell, on the edge region of the silicon substrate (10), the sequence of layers is present from inside to outside in the following order: at least one front passivation layer (11), at least one back passivation layer (21) on said at least one front passivation layer (11), at least one front doped layer (12) on said at least one back passivation layer (21), at least one back intrinsic layer (22) on said at least one front doped layer (12), at least one back doped layer (23) on said at least one back intrinsic layer (22).

22. The solar cell according to any one of claims 19 to 21, wherein said silicon substrate (10) is an N-type silicon wafer, said first conductivity type is N-type, and said second conductivity type is P-type; or said silicon substrate (10) is a P-type silicon wafer, said first conductivity type is P-type, and said second conductivity type is N-type.

23. The solar cell according to any one of claims 19 to 21, wherein, said back intrinsic layer (22) is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.

24. The solar cell according to any one of claims 19 to 21, wherein, said front doped layer (12) is composed of a microcrystalline silicon-based material, and said back doped layer (23) is composed of a microcrystalline silicon-based material.

25. An apparatus for manufacturing a heterojunction solar cell, characterized by comprising: said apparatus is used for depositing at least one front passivation layer (11) on the front side of a silicon substrate (10), depositing at least one back passivation layer (21) on the back side of a silicon substrate (10), depositing at least one front doped layer (12) on said at least one front passivation layer (21), depositing at least one back intrinsic layer (22) on said at least one back passivation layer (21), depositing at least one back doped layer (23) on said at least one back intrinsic layer (22); one of the doping types is a first conductivity type and the other doping type is a second conductivity type opposite to the first conductivity type; the device has four layer deposition chains, wherein: the first layer deposition chain is used for depositing at least one front passivation layer (11) on the front side of the silicon substrate (10); the second layer deposition chain is used for depositing at least one back passivation layer (21) on the back side of the silicon substrate (10); the third layer deposition chain is used for depositing at least one front doped layer (12) on the front passivation layer (11); the fourth layer deposition chain is used for depositing at least one back intrinsic layer (22) on the back passivation layer (21) and at least one back doped layer (23) on the at least one back intrinsic layer (22); and a flipping mechanism is included between the first layer deposition chain and the second layer deposition chain, between the second layer deposition chain and the third layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain.

26. The apparatus of claim 25, wherein, the back intrinsic layer (22) is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.

27. The apparatus of claim 26, wherein, The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, the power density is 50-250 mW / cm 2 , the silane flow is 30-120 sccm, the hydrogen flow is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.

7.

28. The device according to claim 25, wherein: the front doped layer (12) is composed of a microcrystalline silicon-based material, is deposited by a PECVD method, and has a reaction gas including silane, hydrogen, and phosphine, a film layer thickness in a range of 12-28 nm, and a refractive index in a range of 2.1-3.3; the back doped layer (23) is composed of a microcrystalline silicon-based material, is deposited by a PECVD method, and has a reaction gas including silane, hydrogen, and borane, a film layer thickness in a range of 18-36 nm, and a refractive index in a range of 2.6-3.

7.

29. The device according to claim 27 or 28, wherein: the reaction gas further includes an oxygen source, the oxygen source being at least one of carbon dioxide, laughing gas, or oxygen.

30. An apparatus for manufacturing a heterojunction solar cell, characterized by comprising: the device is used for: depositing at least one back passivation layer (21) on the back side of a silicon substrate (10), depositing at least one front passivation layer (11) on the front side of a silicon substrate (10), depositing at least one front doped layer (12) on the at least one front passivation layer (21), depositing at least one back intrinsic layer (22) on the at least one back passivation layer (21), depositing at least one back doped layer (23) on the at least one back intrinsic layer (22); one of the doping types is a first conductivity type and the other doping type is a second conductivity type opposite to the first conductivity type; the device has four layer deposition chains, wherein: the first layer deposition chain is used for depositing at least one back passivation layer (21) on the back side of the silicon substrate (10); the second layer deposition chain is used for depositing at least one front passivation layer (11) on the front side of the silicon substrate (10); the third layer deposition chain is used for depositing at least one front doped layer (12) on the front passivation layer (11); a fourth layer deposition chain for depositing at least one back surface intrinsic layer (22) on the back surface passivation layer (21); and depositing at least one back surface doped layer (23) on the at least one back surface intrinsic layer (22); and a flipping mechanism included between the first layer deposition chain and the second layer deposition chain, and between the second layer deposition chain and the fourth layer deposition chain.

31. The apparatus of claim 30, wherein, The back surface intrinsic layer (22) is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.

32. The apparatus of claim 31, wherein, The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, the power density is 50-250 mW / cm 2 , the silane flow is 30-120 sccm, the hydrogen flow is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.

7.

33. The apparatus of claim 30, wherein, The front surface doped layer (12) is composed of a microcrystalline silicon-based material, and is deposited by a PECVD method, with a reaction gas including silane, hydrogen and phosphine, a film layer thickness of the front surface doped layer (12) being in a range of 12-28 nm, and a refractive index being in a range of 2.1-3.

3. The back surface doped layer (23) is composed of a microcrystalline silicon-based material, and is deposited by a PECVD method, with a reaction gas including silane, hydrogen and borane, a film layer thickness of the back surface doped layer (23) being in a range of 18-36 nm, and a refractive index being in a range of 2.6-3.

7.

34. The apparatus of claim 32 or 33, wherein, The reaction gas further includes an oxygen source, the oxygen source being at least one of carbon dioxide, laughing gas or oxygen.

35. The apparatus of claim 30, wherein, an isolation chamber is arranged between the second layer deposition chain and the third layer deposition chain; or the battery structure in a processing process is subjected to a vacuum breaking treatment when being transmitted between the second layer deposition chain and the third layer deposition chain. The apparatus is used for, 36. An apparatus for manufacturing a heterojunction solar cell, characterized by comprising: depositing at least one back surface passivation layer (21) on a back surface of a silicon substrate (10), depositing at least one front surface passivation layer (11) on a front surface of the silicon substrate (10), and depositing at least one front surface doped layer (12) on the at least one front surface passivation layer (21), depositing at least one back surface intrinsic layer (22) on the at least one back surface passivation layer (21), depositing at least one back surface doped layer (23) on the at least one back surface intrinsic layer (22); in the front surface doped layer (12) and the back surface doped layer (23), one of the doped layers is of a first conductive type, and the other of the doped layers is of a second conductive type opposite to the first conductive type; The apparatus has four layer deposition chains, wherein: a first layer deposition chain is used for depositing at least one back surface passivation layer (21) on the back surface of the silicon substrate (10); a second layer deposition chain is used for depositing at least one front surface passivation layer (11) on the front surface of the silicon substrate (10), and depositing at least one front surface doped layer (12) on the front surface passivation layer (11); a third layer deposition chain is used for depositing at least one back surface intrinsic layer (22) on the back surface passivation layer (21); a fourth layer deposition chain is used for depositing at least one back surface doped layer (23) on the at least one back surface intrinsic layer (22); and a flipping mechanism included between the first layer deposition chain and the second layer deposition chain, and between the second layer deposition chain and the fourth layer deposition chain. ​ 37. The apparatus of claim 36, wherein, The back intrinsic layer (22) is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.

38. The apparatus of claim 37, wherein, The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, the power density is 50-250 mW / cm 2 , the silane flow is 30-120 sccm, the hydrogen flow is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.

7.

39. The apparatus of claim 36, wherein, The front doped layer (12) is composed of a microcrystalline silicon-based material, is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, and phosphine; the film layer thickness of the front doped layer (12) is in a range of 12-28 nm, and the refractive index is in a range of 2.1-3.

3. The back doped layer (23) is composed of a microcrystalline silicon-based material, is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, and borane; the film layer thickness of the back doped layer (23) is in a range of 18-36 nm, and the refractive index is in a range of 2.6-3.

7.

40. The apparatus of claim 38 or 39, wherein, The reaction gas further includes an oxygen source, which is at least one of carbon dioxide, laughing gas, or oxygen.

41. An apparatus for manufacturing a heterojunction solar cell, characterized by comprising: The apparatus is used for, depositing at least one back passivation layer (21) on the back of the silicon substrate (10), depositing at least one front passivation layer (11) on the front of the silicon substrate (10), depositing at least one front doped layer (12) on the at least one front passivation layer (21), depositing at least one back intrinsic layer (22) on the at least one back passivation layer (21), depositing at least one back doped layer (23) on the at least one back intrinsic layer (22); in the front doped layer (12) and the back doped layer (23), one of the doping types is a first conductive type, and the other of the doping types is a second conductive type opposite to the first conductive type; The apparatus has five layer deposition chains, wherein: a first layer deposition chain is used for depositing at least one back passivation layer (21) on the back of the silicon substrate (10); a second layer deposition chain is used for depositing at least one front passivation layer (11) on the front of the silicon substrate (10); a third layer deposition chain is used for depositing at least one front doped layer (12) on the front passivation layer (11); a fourth layer deposition chain is used for depositing at least one back intrinsic layer (22) on the back passivation layer (21); a fifth layer deposition chain is used for depositing at least one back doped layer (23) on the at least one back intrinsic layer (22); and a flipping mechanism included between the first layer deposition chain and the second layer deposition chain, between the third layer deposition chain and the fourth layer deposition chain.

42. The apparatus of claim 41, wherein, The back intrinsic layer (22) is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.

43. The apparatus of claim 42, wherein, The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, the power density is 50-250 mW / cm 2 , the silane flow is 30-120 sccm, the hydrogen flow is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.

7.

44. The apparatus of claim 41, wherein, The front doped layer (12) is composed of a microcrystalline silicon-based material, is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, and phosphine; the film layer thickness of the front doped layer (12) is in a range of 12-28 nm, and the refractive index is in a range of 2.1-3.

3. The back doped layer (23) is made of microcrystalline silicon-based material, the back doped layer (23) is deposited by PECVD method, the reaction gas includes silane, hydrogen and borane, the film layer thickness of the back doped layer (23) is in the range of 18-36 nm, and the refractive index is in the range of 2.6-3.

7.

45. The apparatus of claim 43 or 44, wherein, The reaction gas further includes an oxygen source, and the oxygen source is at least one of carbon dioxide, laughing gas or oxygen.

Images