An Improved Inter-stage Matching Based Doherty Power Amplifier

Abstract

The present invention relates to a Doherty power amplifier based on improved inter-stage matching, belonging to the technical field of radio frequency power amplifiers, and solves the problems of large size and low working efficiency of existing Doherty power amplifiers caused by separating the drive output matching network and the power splitter. The drive power amplification circuit includes a drive power transistor and an improved inter-stage matching network, and the improved inter-stage matching network is connected to the drain of the drive power transistor; a carrier power amplification circuit, connected to an output end of the improved inter-stage matching network, and the carrier power amplification circuit includes a carrier output matching network; a peak power amplification circuit, connected to the other output end of the improved inter-stage matching network, and the peak power amplification circuit includes a peak output matching network and a π-shaped microstrip compensation line. Compact layout is achieved, the size of the entire amplifier is reduced, and the working efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency power amplifiers, and particularly to a Doherty power amplifier based on an improved inter-stage matching. Background Art

[0002] Currently, 5G technology has become a hot topic for numerous scientific research workers. However, the implementation of 5G technology requires excellent hardware infrastructure. Small base stations are one of the hardware infrastructures for realizing 5G technology. Radio frequency power amplifiers are the core components in 5G small base stations and play an important role in small base stations. In order to find a radio frequency power amplifier architecture that can meet the current requirements of 5G small base stations, radio frequency power amplifiers based on the Doherty architecture have gradually come into people's view. The power amplifiers of this architecture have relatively high efficiency and good linearity at the back-off operating point. Therefore, Doherty power amplifiers have become a hot topic in current research.

[0003] Traditional Doherty power amplifiers separate the drive output matching network and the power divider, resulting in a larger size, lower operating efficiency, and waste of resources for Doherty power amplifiers. Therefore, it is necessary to propose a compact Doherty power amplifier with high gain and high efficiency based on an integrated output matching network and power divider. Summary of the Invention

[0004] In view of the above analysis, an embodiment of the present invention aims to provide a Doherty power amplifier based on an improved inter-stage matching to solve the problems of a larger size and lower operating efficiency of existing Doherty power amplifiers caused by separating the drive output matching network and the power divider.

[0005] On the one hand, an embodiment of the present invention provides a Doherty power amplifier based on an improved inter-stage matching, including:

[0006] A drive power amplification circuit, where the drive power amplification circuit includes a drive power transistor and an improved inter-stage matching network, and the improved inter-stage matching network is connected to the drain of the drive power transistor;

[0007] A carrier power amplification circuit, connected to an output end of the improved inter-stage matching network, where the carrier power amplification circuit includes a carrier output matching network;

[0008] A peak power amplification circuit, connected to the other output end of the improved inter-stage matching network, where the peak power amplification circuit includes a peak output matching network and a π-shaped microstrip compensation line.

[0009] Further, when a first power signal is input to the drive power amplifier circuit, the carrier output matching network matches the load impedance of the carrier power transistor to the impedance at the combining point, and the π-shaped microstrip compensation line matches the load impedance of the peak power transistor to infinity, and the first power signal is amplified by the carrier power amplifier circuit;

[0010] When a second power signal is input to the drive power amplifier circuit, the carrier output matching network matches the load impedance of the carrier power transistor to 150 ohms, and the peak output matching network matches the load impedance of the peak power transistor to 75 ohms, and the second power signal is amplified jointly by the carrier power amplifier circuit and the peak power amplifier circuit.

[0011] Further, the improved inter-stage matching network includes a first microstrip line, a first capacitor, a second capacitor, a first resistor, a first inductor, and a second inductor;

[0012] One end of the first microstrip line is the input end of the improved inter-stage matching network and is connected to the drain of the drive power transistor. The other end of the first microstrip line is simultaneously connected to one end of the first capacitor and one end of the second capacitor. The other end of the first capacitor is one output end of the improved inter-stage matching network, and the other end of the second capacitor is the other output end of the improved inter-stage matching network. The first inductor is connected between one output end of the improved inter-stage matching network and the ground, the second inductor is connected between the other output end of the improved inter-stage matching network and the ground, and the first resistor is connected in series between one output end and the other output end of the improved inter-stage matching network.

[0013] Further, the carrier power amplifier circuit further includes a carrier input matching network connected between one output end of the improved inter-stage matching network and the carrier power transistor;

[0014] The carrier input matching network includes a third inductor, a third capacitor, and a fourth capacitor; one end of the third inductor is simultaneously connected to one end of the third capacitor and one end of the fourth capacitor, the other end of the third inductor is connected to the gate of the carrier power transistor, the other end of the third capacitor is the input end of the carrier input matching network, and the other end of the fourth capacitor is grounded.

[0015] Further, the carrier output matching network is connected between the carrier power transistor and the combining point and includes a second microstrip line, a fifth capacitor, and a sixth capacitor. One end of the second microstrip line is connected to one end of the fifth capacitor, the other end of the second microstrip line is the output end of the carrier output matching network, the other end of the fifth capacitor is connected to the drain of the carrier power transistor, and the sixth capacitor is connected between the output end of the carrier output matching network and the ground.

[0016] Furthermore, the carrier power amplification circuit further includes a π-type phase-shifting network connected between an output end of the improved inter-stage matching network and the carrier input matching network;

[0017] The π-type phase compensation network includes a seventh capacitor, a fourth inductor, and a fifth inductor. The fourth inductor and the fifth inductor are respectively connected to both ends of the seventh capacitor; both ends of the seventh capacitor are respectively the input end and the output end of the π-type phase-shifting network.

[0018] Furthermore, the peak power amplification circuit further includes a peak input matching network;

[0019] The peak input matching network includes a third microstrip line, an eighth capacitor, and a ninth capacitor. One end of the third microstrip line is simultaneously connected to one end of the eighth capacitor and one end of the ninth capacitor. The other end of the eighth capacitor is the input end of the peak input matching network. The other end of the ninth capacitor is grounded. The other end of the third microstrip line is the output end of the peak input matching network.

[0020] Furthermore, the peak output matching network includes a fourth microstrip line, a tenth capacitor, and an eleventh capacitor. One end of the fourth microstrip line is connected to one end of the tenth capacitor. The other end of the fourth microstrip line is the output end of the peak output matching network. The other end of the tenth capacitor is the input end of the peak output matching network. The eleventh capacitor is connected in series between the output end of the peak output matching network and the ground.

[0021] Furthermore, the π-type microstrip compensation line includes a fifth microstrip line and a twelfth capacitor, and shares the eleventh capacitor with the peak output matching network; the eleventh capacitor and the twelfth capacitor are respectively connected to both ends of the fifth microstrip line. Both ends of the fifth microstrip line are respectively the input end and the output end of the π-type microstrip compensation line.

[0022] Furthermore, the drive power transistor, the carrier power transistor, and the peak power transistor are all GaN HEMT transistors.

[0023] Compared with the prior art, the present invention can at least achieve one of the following beneficial effects:

[0024] 1. An improved Doherty power amplifier based on inter-stage matching provides driving power for the carrier power amplifier circuit and the peak power amplifier circuit through a driving power amplifier circuit, enhancing the gain of the overall circuit. The improved inter-stage matching network simultaneously functions as a driving output matching network and a power splitter, solving the problem that the existing Doherty power amplifier separates the driving output matching network and the power splitter, resulting in a larger size of the Doherty power amplifier. It reduces the size of the Doherty power amplifier and improves the compactness of the entire power amplifier. Meanwhile, through the mutual cooperation of the carrier output matching network, the peak output matching network, and the π-shaped microstrip compensation line, dual-impedance point matching of the carrier power amplifier is achieved, enhancing the operating efficiency of the carrier power amplifier at the back-off power point and the saturation operating point. When a low-power signal is input, the carrier output matching network matches the load impedance of the carrier power amplifier to the combining point impedance. When a high-power signal is input, the carrier output matching network and the peak output matching network cooperate with each other to achieve the effect of matching the parallel load impedance of the carrier power amplifier circuit and the peak power amplifier circuit to the combining point impedance. Therefore, there is no need to set up a post-matching network at the combining point, reducing the size of the entire amplifier and achieving a compact layout.

[0025] 2. The π-shaped phase-shifting network is composed of a capacitor and two grounded inductors connected together, and the values of the two grounded inductors are the same. The π-shaped phase-shifting network in the carrier power amplifier circuit is used to compensate for the phase difference between the carrier power amplifier circuit and the peak power amplifier circuit, making the entire amplifier circuit more stable and enhancing the gain of the overall circuit.

[0026] 3. Through the π-shaped microstrip compensation line, it is ensured that the output power of the carrier power amplifier circuit does not leak when the peak power amplifier is not turned on, that is, when the carrier power amplifier operates at the back-off point, the load impedance of the peak power transistor is in a high-impedance state. Meanwhile, the π-shaped microstrip compensation line shares the capacitor C13 with the peak output matching network, which can reduce the circuit size and save costs.

[0027] In the present invention, the above technical solutions can also be combined with each other to achieve more preferred combination schemes. Other features and advantages of the present invention will be described in the subsequent specification, and some advantages can be made obvious from the specification or understood by implementing the present invention. The objectives and other advantages of the present invention can be realized and obtained from the content specifically pointed out in the specification and the drawings. Description of the Drawings

[0028] The drawings are only for the purpose of showing specific embodiments and are not considered to be a limitation of the present invention. Throughout the drawings, the same reference signs represent the same components.

[0029] Figure 1Schematic diagram of the overall structure of a Doherty power amplifier based on improved inter-stage matching in an embodiment;

[0030] Figure 2 Schematic diagram of the internal structure of a Doherty power amplifier based on improved inter-stage matching in an embodiment. Detailed implementation manners

[0031] The following describes the preferred embodiments of the present invention in detail with reference to the accompanying drawings. The accompanying drawings form a part of this application and are used together with the embodiments of the present invention to explain the principles of the present invention, rather than to limit the scope of the present invention.

[0032] In the existing Doherty power amplifier, the drive output matching network and the power splitter are separated, resulting in a large size of the Doherty power amplifier and wasting resources. Therefore, this application proposes a Doherty power amplifier based on improved inter-stage matching. The Doherty power amplifier includes a drive power amplification circuit, a carrier power amplification circuit, and a peak power amplification circuit. Among them, the drive power amplification circuit includes a drive power transistor and an improved inter-stage matching network. The improved inter-stage matching network simultaneously functions as a drive output matching network and a power splitter, solving the problem that the drive output matching network and the power splitter are separated in the existing Doherty power amplifier, resulting in a large size of the Doherty power amplifier, reducing the size of the Doherty power amplifier, and improving the compactness of the entire power amplifier.

[0033] A specific embodiment of the present invention discloses a Doherty power amplifier based on improved inter-stage matching, as Figure 1 shown, including: a drive power amplification circuit, the drive power amplification circuit includes a drive power transistor and an improved inter-stage matching network, and the improved inter-stage matching network is connected to the drain of the drive power transistor;

[0034] a carrier power amplification circuit, connected to an output terminal of the improved inter-stage matching network, and the carrier power amplification circuit includes a carrier output matching network;

[0035] a peak power amplification circuit, connected to the other output terminal of the improved inter-stage matching network, and the peak power amplification circuit includes a peak output matching network and a π-type microstrip compensation line.

[0036] When a first power signal is input to the drive power amplification circuit, the carrier output matching network matches the load impedance of the carrier power transistor to the combining point impedance, and the π-type microstrip compensation line matches the load impedance of the peak power transistor to infinity, and the carrier power amplification circuit amplifies the first power signal;

[0037] When a second power signal is input to the drive power amplifier circuit, the carrier output matching network matches the load impedance of the carrier power transistor to 150 ohms, and the peak output matching network matches the load impedance of the peak power transistor to 75 ohms. The amplification of the second power signal is achieved jointly by the carrier power amplifier circuit and the peak power amplifier circuit.

[0038] In implementation, the drive power transistor, the carrier power transistor, and the peak power transistor are all GaN HEMT transistors. Among them, the carrier power transistor operates in class AB, and the peak power transistor operates in class C.

[0039] Specifically, the power of the first power signal is lower than that of the second power signal. The first power signal is a low-power signal, such that the signal when the carrier power transistor is turned on is a low-power signal. The second power signal is a high-power signal, such that the signal when the peak power transistor is turned on is a high-power signal. When a low-power signal is input to the drive power amplifier circuit, the carrier power amplifier circuit operates at the power back-off point. At this time, the carrier output matching network matches the load impedance of the carrier power transistor to 50 ohms, and the π-shaped microstrip compensation line matches the load impedance of the peak power transistor to infinity. The amplification of the first power signal is achieved by the carrier power amplifier circuit. When a high-power signal is input to the drive power amplifier circuit, the carrier power amplifier circuit operates at the power saturation point. The carrier output matching network matches the load impedance of the carrier power transistor to 150 ohms, and the peak output matching network matches the load impedance of the peak power transistor to 75 ohms. The parallel load impedance of the carrier power amplifier circuit and the peak power amplifier circuit is 50 ohms. The amplification of the second power signal is achieved jointly by the carrier power amplifier circuit and the peak power amplifier circuit.

[0040] Compared with the prior art, the Doherty power amplifier based on improved inter-stage matching provided in this embodiment uses the drive power amplifier circuit to provide drive power for the carrier power amplifier circuit and the peak power amplifier circuit, improving the gain of the overall circuit. At the same time, through the mutual cooperation of the carrier output matching network, the peak output matching network, and the π-shaped microstrip compensation line, dual-impedance point matching of the carrier power amplifier is achieved, improving the working efficiency of the carrier power amplifier when operating at the back-off power point and the saturation working point. When a low-power signal is input, the carrier output matching network matches the load impedance of the carrier power amplifier to the combining point impedance. When a high-power signal is input, the carrier output matching network and the peak output matching network cooperate with each other to achieve the effect of matching the parallel load impedance of the carrier power amplifier circuit and the peak power amplifier circuit to the combining point impedance. Therefore, there is no need to set a post-matching network at the combining point, reducing the size of the entire amplifier and achieving a compact layout.

[0041] Preferably, as Figure 2As shown, the improved inter-stage matching network includes a first microstrip line Z1, a first capacitor C3, a second capacitor C4, a first resistor R2, a first inductor L1, and a second inductor L2; one end of the first microstrip line Z1 is the input end of the improved inter-stage matching network and is connected to the drain of the driving power transistor, the other end of the first microstrip line Z1 is simultaneously connected to one end of the first capacitor C3 and one end of the second capacitor C4, the other end of the first capacitor C3 is one output end of the improved inter-stage matching network, the other end of the second capacitor C4 is the other output end of the improved inter-stage matching network, the first inductor L1 is connected between one output end of the improved inter-stage matching network and the ground, the second inductor L2 is connected between the other output end of the improved inter-stage matching network and the ground, and the first resistor R2 is connected in series between one output end and the other output end of the improved inter-stage matching network.

[0042] Specifically, the entire improved inter-stage matching network can serve as the driving output matching network of the driving power transistor. At the same time, the combination of the capacitor C3, capacitor C4, resistor R2, inductor L1, and inductor L2 in the improved inter-stage matching network is equivalent to a power divider, where the capacitance values of the capacitor C3 and capacitor C4 are equal, and the inductance values of the inductor L1 and inductor L2 are also equal. In this way, the power division ratio of the two output ports of the improved inter-stage matching network is 1:1. The improved inter-stage matching network simultaneously functions as a driving output matching network and a power divider, solving the problem that the existing Doherty power amplifier separates the driving output matching network and the power divider, resulting in a relatively large size of the Doherty power amplifier, reducing the size of the Doherty power amplifier, and improving the compactness of the entire power amplifier.

[0043] Preferably, the carrier power amplification circuit further includes a carrier input matching network IMN2 connected between one output end of the improved inter-stage matching network and the carrier power transistor. The carrier input matching network IMN2 includes a third inductor L5, a third capacitor C5, and a fourth capacitor C6; one end of the third inductor L5 is simultaneously connected to one end of the third capacitor C5 and one end of the fourth capacitor C6, the other end of the third inductor L5 is connected to the gate of the carrier power transistor, the other end of the third capacitor C5 is the input end of the carrier input matching network, and the other end of the fourth capacitor C6 is grounded.

[0044] The carrier output matching network OMN2 is connected between the carrier power transistor and the combining point, and includes a second microstrip line Z2, a fifth capacitor C7, and a sixth capacitor C8. One end of the second microstrip line Z2 is connected to one end of the fifth capacitor C7, the other end of the second microstrip line Z2 is the output end of the carrier output matching network, the other end of the fifth capacitor C7 is connected to the drain of the carrier power transistor, and the sixth capacitor C8 is connected between the output end of the carrier output matching network and the ground.

[0045] Specifically, the capacitor C7 in the carrier output matching network is a DC-blocking capacitor, which has the function of blocking DC signals and allowing RF signals to pass through. The load impedances corresponding to the carrier power transistor at the back-off operating point and the saturation operating point are different. When the carrier power transistor operates at the back-off operating point, the load impedance of the carrier power transistor can be matched to 50 ohms by adjusting the values of the microstrip line Z2 and the capacitor C8 in the carrier output matching network; when the carrier power transistor operates at the saturation operating point, the load impedance of the carrier power transistor can be matched to 150 ohms by adjusting the values of the microstrip line Z2 and the capacitor C8 in the carrier output matching network, so as to improve the operating efficiency of the carrier power transistor at different operating points without affecting the saturation output power of the Doherty power amplifier.

[0046] Preferably, the carrier power amplifier circuit further includes a π-type phase-shifting network connected between an output end of the improved inter-stage matching network and the carrier input matching network. The π-type phase compensation network includes a seventh capacitor C9, a fourth inductor L3, and a fifth inductor L4. The fourth inductor L3 and the fifth inductor L4 are respectively connected to both ends of the seventh capacitor C9; both ends of the seventh capacitor C9 are respectively the input end and the output end of the π-type phase-shifting network.

[0047] Specifically, the π-type phase-shifting network is composed of a capacitor and two grounded inductors connected together, and the values of the two grounded inductors are the same. The π-type phase-shifting network in the carrier power amplifier circuit is used to compensate for the phase difference between the carrier power amplifier circuit and the peak power amplifier circuit, making the entire amplifier circuit more stable and improving the gain of the overall circuit.

[0048] Preferably, the peak power amplifier circuit further includes a peak input matching network IMN3. The peak input matching network IMN3 includes a third microstrip line Z3, an eighth capacitor C10, and a ninth capacitor C11. One end of the third microstrip line Z3 is connected to one end of the eighth capacitor C10 and one end of the ninth capacitor C11 at the same time. The other end of the eighth capacitor C10 is the input end of the peak input matching network, the other end of the ninth capacitor C11 is grounded, and the other end of the third microstrip line Z3 is the output end of the peak input matching network.

[0049] The peak output matching network OMN3 includes a fourth microstrip line Z4, a tenth capacitor C12, and an eleventh capacitor C13. One end of the fourth microstrip line Z4 is connected to one end of the tenth capacitor C12. The other end of the fourth microstrip line Z4 is the output end of the peak output matching network. The other end of the tenth capacitor C12 is the input end of the peak output matching network. The eleventh capacitor C13 is connected in series between the output end of the peak output matching network and the ground.

[0050] Specifically, the capacitor C12 in the peak output matching network is a DC-blocking capacitor, which has the function of blocking DC signals and passing RF signals. When the drive power amplifier circuit inputs a high-power signal, by adjusting the values of the microstrip line Z2 and the capacitor C8 in the carrier output matching network, the load impedance of the carrier power transistor can be matched to 150 ohms, and by adjusting the values of the microstrip line Z4 and the capacitor C13 in the peak output matching network, the load impedance matching value of the peak power transistor can be set to 75 ohms, so that the parallel load impedance of the carrier power amplifier circuit and the peak power amplifier circuit is 50 ohms, which can be directly connected to the combined load, and the input high-power signal is amplified by the carrier power amplifier circuit and the peak power amplifier circuit together.

[0051] Preferably, the π-type microstrip compensation line includes a fifth microstrip line Z5 and a twelfth capacitor C14, and shares the eleventh capacitor C13 with the peak output matching network. The eleventh capacitor C13 and the twelfth capacitor C14 are respectively connected to both ends of the fifth microstrip line Z5, and both ends of the fifth microstrip line Z5 are respectively the input end and the output end of the π-type microstrip compensation line.

[0052] Specifically, the output end of the peak output matching network is connected to the π-type microstrip compensation line, which ensures that the output power of the carrier power amplifier circuit does not leak when the peak power amplifier is not turned on, that is, when the carrier power amplifier operates at the back-off point, the load impedance of the peak power transistor is in a high-impedance state. The π-type microstrip compensation line is composed of a section of microstrip line and two grounded capacitors with the same capacitance value. In addition, the grounded capacitors in the π-type microstrip compensation line can be combined with the grounded capacitors near the peak output matching network. That is, as shown in the appendix Figure 2 the π-type microstrip compensation line shares the capacitor C13 with the peak output matching network, which can reduce the circuit size and save costs.

[0053] In detail, an input bias circuit is provided at the gates of the carrier power transistor, the peak power transistor, and the drive power transistor, which provides a stable DC voltage for the gate of each transistor and prevents the RF input signal from interfering with the DC power supply. At the same time, an output bias circuit is provided at the drains of the carrier power transistor, the peak power transistor, and the drive power transistor, which provides a stable DC voltage for the drain of each transistor, prevents the RF output signal from interfering with the DC power supply, and improves the stability of the entire circuit.

[0054] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. An improved Doherty power amplifier based on inter-stage matching, characterized in that Comprising: A drive power amplifier circuit, the drive power amplifier circuit including a drive power transistor and an improved inter-stage matching network, the improved inter-stage matching network being connected to the drain of the drive power transistor; A carrier power amplifier circuit, connected to an output terminal of the improved inter-stage matching network, the carrier power amplifier circuit including a carrier output matching network; A peak power amplifier circuit, connected to the other output terminal of the improved inter-stage matching network, the peak power amplifier circuit including a peak output matching network and a π-shaped microstrip compensation line; The improved inter-stage matching network includes a first microstrip line, a first capacitor, a second capacitor, a first resistor, a first inductor, and a second inductor; One end of the first microstrip line is the input terminal of the improved inter-stage matching network, connected to the drain of the drive power transistor, the other end of the first microstrip line is simultaneously connected to one end of the first capacitor and one end of the second capacitor, the other end of the first capacitor is one output terminal of the improved inter-stage matching network, the other end of the second capacitor is the other output terminal of the improved inter-stage matching network, the first inductor is connected between one output terminal of the improved inter-stage matching network and the ground, the second inductor is connected between the other output terminal of the improved inter-stage matching network and the ground, and the first resistor is connected in series between one output terminal and the other output terminal of the improved inter-stage matching network.

2. The Doherty power amplifier based on improved inter-stage matching according to claim 1, characterized in that When a first power signal is input to the drive power amplifier circuit, the carrier output matching network matches the load impedance of the carrier power transistor to the combined point impedance, and the π-shaped microstrip compensation line matches the load impedance of the peak power transistor to infinity, and the first power signal is amplified by the carrier power amplifier circuit; When a second power signal is input to the drive power amplifier circuit, the carrier output matching network matches the load impedance of the carrier power transistor to 150 ohms, the peak output matching network matches the load impedance of the peak power transistor to 75 ohms, and the second power signal is amplified by the carrier power amplifier circuit and the peak power amplifier circuit together.

3. The Doherty power amplifier based on improved inter-stage matching according to claim 1, wherein The carrier power amplifier circuit further includes a carrier input matching network connected between an output terminal of the improved inter-stage matching network and the carrier power transistor; The carrier input matching network includes a third inductor, a third capacitor, and a fourth capacitor; one end of the third inductor is simultaneously connected to one end of the third capacitor and one end of the fourth capacitor, the other end of the third inductor is connected to the gate of the carrier power transistor, the other end of the third capacitor is the input terminal of the carrier input matching network, and the other end of the fourth capacitor is grounded.

4. The Doherty power amplifier based on improved inter-stage matching according to claim 3, wherein The carrier output matching network is connected between the carrier power transistor and the combined point, and includes a second microstrip line, a fifth capacitor, and a sixth capacitor. One end of the second microstrip line is connected to one end of the fifth capacitor, the other end of the second microstrip line is the output terminal of the carrier output matching network, the other end of the fifth capacitor is connected to the drain of the carrier power transistor, and the sixth capacitor is connected between the output terminal of the carrier output matching network and the ground.

5. The Doherty power amplifier based on improved inter-stage matching according to claim 4, characterized in that The carrier power amplifier circuit further includes a π-type phase shift network connected between an output end of the improved inter-stage matching network and the carrier input matching network; The π-type phase shift network includes a seventh capacitor, a fourth inductor, and a fifth inductor. The fourth inductor and the fifth inductor are respectively connected to two ends of the seventh capacitor; two ends of the seventh capacitor are respectively the input end and the output end of the ∑-type phase shift network.

6. The Doherty power amplifier based on improved inter-stage matching according to claim 1, wherein The peak power amplifier circuit further includes a peak input matching network; The peak input matching network includes a third microstrip line, an eighth capacitor, and a ninth capacitor. One end of the third microstrip line is simultaneously connected to one end of the eighth capacitor and one end of the ninth capacitor. The other end of the eighth capacitor is the input end of the peak input matching network. The other end of the ninth capacitor is grounded. The other end of the third microstrip line is the output end of the peak input matching network.

7. The Doherty power amplifier based on improved inter-stage matching according to claim 6, characterized in that, The peak output matching network includes a fourth microstrip line, a tenth capacitor, and an eleventh capacitor. One end of the fourth microstrip line is connected to one end of the tenth capacitor. The other end of the fourth microstrip line is the output end of the peak output matching network. The other end of the tenth capacitor is the input end of the peak output matching network. The eleventh capacitor is connected in series between the output end of the peak output matching network and the ground.

8. The Doherty power amplifier based on improved inter-stage matching according to claim 7, characterized in that, The π-type microstrip compensation line includes a fifth microstrip line and a twelfth capacitor, and shares the eleventh capacitor with the peak output matching network; the eleventh capacitor and the twelfth capacitor are respectively connected to two ends of the fifth microstrip line. Two ends of the fifth microstrip line are respectively the input end and the output end of the π-type microstrip compensation line.

9. The Doherty power amplifier based on improved inter-stage matching according to claim 1, wherein The drive power transistor, the carrier power transistor, and the peak power transistor are all GaN HEMT transistors.

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