A radio frequency transceiver circuit, control method and electronic device

Abstract

This application discloses a radio frequency (RF) transceiver circuit disposed in an electronic device, comprising: a first RF transceiver circuit and a second RF transceiver circuit. The first RF transceiver circuit is of FDD standard, and the second RF transceiver circuit is of TDD standard. The enable terminal of the low-noise amplifier of the second RF transceiver circuit is connected to the first RF transceiver circuit. The first RF transceiver circuit is used to: when it determines that the enable terminal of the low-noise amplifier of the second RF transceiver circuit is a valid signal, control the first RF transceiver circuit to transmit at a second transmit power less than a first transmit power. This application also provides a control method and an electronic device.

Description

Technical Field

[0001] This application relates to anti-interference technology for signals between Long Term Evolution (LTE) and New Radio (NR) in EUTRA NR Dual-Connectivity (ENDC), and particularly to a radio frequency transceiver circuit, control method, and electronic device. Background Technology

[0002] Currently, for ENDC terminal devices, there are situations where LTE and NR operate simultaneously, which can cause interference between them. In related technologies, filters are added to reduce the interference between the two. However, this method has path loss, which affects the RF performance of the RF transceiver circuit. It can be seen that existing RF transceiver circuits have the technical problem of poor RF performance while reducing interference. Summary of the Invention

[0003] This application provides a radio frequency transceiver circuit, a control method, and an electronic device that can improve radio frequency performance while reducing interference in the radio frequency transceiver circuit.

[0004] The technical solution of this application is implemented as follows:

[0005] In a first aspect, embodiments of this application provide a radio frequency (RF) transceiver circuit disposed in an electronic device, comprising: a first RF transceiver circuit and a second RF transceiver circuit, wherein the first RF transceiver circuit is of FDD standard, the second RF transceiver circuit is of TDD standard, and the enable terminal of the low-noise amplifier of the second RF transceiver circuit is connected to the first RF transceiver circuit; wherein...

[0006] The first radio frequency transceiver circuit is configured to: when the enable terminal of the low noise amplifier of the second radio frequency transceiver circuit is a valid signal, control the first radio frequency transceiver circuit to transmit at a second transmission power that is less than the first transmission power;

[0007] Wherein, the first transmit power is the transmit power of the first radio frequency transceiver circuit.

[0008] Secondly, embodiments of this application provide a control method, which is applied to the aforementioned radio frequency transceiver circuit, comprising:

[0009] When the enable signal of the low-noise amplifier of the second radio frequency transceiver circuit is determined to be valid, the first radio frequency transceiver circuit is controlled to transmit at a second transmission power that is less than the first transmission power.

[0010] Wherein, the first transmit power is the transmit power of the first radio frequency transceiver circuit.

[0011] Thirdly, embodiments of this application provide an electronic device, including the radio frequency transceiver circuit as described in one or more of the above embodiments.

[0012] This application provides a radio frequency transceiver circuit, a control method, and an electronic device. The radio frequency transceiver circuit is disposed in the electronic device and includes: a first radio frequency transceiver circuit and a second radio frequency transceiver circuit. The first radio frequency transceiver circuit is of frequency division duplex (FDD) standard, and the second radio frequency transceiver circuit is of time division multiplexing (TimeDivision) standard. In a Duplexer (TDD) system, the enable terminal of the low-noise amplifier of the second RF transceiver circuit is connected to the first RF transceiver circuit. The first RF transceiver circuit is configured to: when the enable terminal of the low-noise amplifier of the second RF transceiver circuit is determined to be a valid signal, control the first RF transceiver circuit to transmit at a second transmit power lower than a first transmit power, where the first transmit power is the transmit power of the first RF transceiver circuit. In other words, in this embodiment, when the enable terminal of the low-noise amplifier of the second RF transceiver circuit is determined to be a valid signal, indicating that the second RF transceiver circuit is in a receiving signal time slot, the first RF transceiver circuit transmits at a second transmit power lower than the first transmit power. Since the second harmonic of the transmitted signal from the first RF transceiver circuit interferes with the received signal of the second RF transceiver circuit, reducing the transmit power of the FDD during the receiving signal time slot of the TDD can reduce the interference of the transmitted signal of the first RF transceiver circuit on the received signal of the second RF transceiver circuit. This reduces the interference between the first and second RF transceiver circuits without introducing path loss, thereby reducing RF transceiver circuit interference while improving RF performance. Attached Figure Description

[0013] Figure 1 A schematic diagram of an optional radio frequency transceiver circuit provided in an embodiment of this application;

[0014] Figure 2 This is a schematic diagram of the structure of a radio frequency transceiver circuit in related technologies;

[0015] Figure 3a A schematic diagram of an example of an optional radio frequency transceiver circuit provided in this application embodiment;

[0016] Figure 3b A schematic diagram of an optional radio frequency transceiver circuit provided in an embodiment of this application, for example two.

[0017] Figure 4 A timing diagram of an optional radio frequency transceiver circuit provided for an embodiment of this application;

[0018] Figure 5 A flowchart illustrating an optional control method provided in an embodiment of this application;

[0019] Figure 6 This is a schematic diagram of an optional electronic device provided in an embodiment of this application. Detailed Implementation

[0020] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0021] This application provides a radio frequency transceiver circuit. Figure 1 A schematic diagram of an optional radio frequency transceiver circuit provided in an embodiment of this application is shown below. Figure 1 As shown, the radio frequency transceiver circuit 100 is disposed in an electronic device and includes: a first radio frequency transceiver circuit 11 and a second radio frequency transceiver circuit 12. The first radio frequency transceiver circuit 11 is of FDD standard, and the second radio frequency transceiver circuit 12 is of TDD standard. The enable terminal 121 of the low noise amplifier of the second radio frequency transceiver circuit 12 is connected to the first radio frequency transceiver circuit 11; wherein,

[0022] The first radio frequency transceiver circuit 11 is used to: when the enable terminal 121 of the low noise amplifier of the second radio frequency transceiver circuit 12 is a valid signal, control the first radio frequency transceiver circuit 11 to transmit with a second transmission power that is less than the first transmission power;

[0023] The first transmit power is the transmit power of the first radio frequency transceiver circuit 11.

[0024] Figure 2 This is a schematic diagram of the structure of a radio frequency transceiver circuit in related technologies, such as... Figure 2As shown, the radio frequency transceiver circuit 200 includes: an LTE radio frequency transceiver circuit section 21, an NR radio frequency transceiver circuit section 22, a radio frequency transceiver 23, an RF power supply 24, and an RF power supply 25; wherein, the LTE radio frequency transceiver circuit 21 includes: a power amplifier (PA) 2101, a switch 2102, a duplexer 2103, a duplexer 2104, a duplexer 2105, a switch 2106, a filter 2107, and a low noise amplifier. Amplifier (LNA) 2108, antenna 2109, and switch 2110; NR radio frequency transceiver circuit 22 includes: PA2201, LNA2202, switch 2203, filter 2204, and antenna 2205; RF power supply 24 supplies power to PA2101, RF power supply 25 supplies power to PA2201, and radio frequency transceiver 23 is connected to the input terminal of PA2101, the output terminal of LNA2108, the input terminal of PA2201, and the output terminal of LNA2202.

[0025] based on Figure 2 The schematic diagram of the radio frequency circuit shows that the radio frequency transceiver circuit 200 reduces signal interference between antennas 2109 and 2205 through filters 2107 and 2204. However, this increases path loss and thus affects the radio frequency performance of the radio frequency transceiver circuit 200.

[0026] To maintain the performance of the RF transceiver circuit while reducing mutual interference, this application provides an RF transceiver circuit 100, including a first RF transceiver circuit 11 with FDD standard and a second RF transceiver circuit 12 with TDD standard. Here, the enable terminal 121 of the low-noise amplifier of the second RF transceiver circuit 12 is connected to the first RF transceiver circuit 11, so that the first RF transceiver circuit 11 can know whether the low-noise amplifier of the second RF transceiver circuit 12 is in a working state. When a valid enable signal is received, it indicates that the low-noise amplifier of the second RF transceiver circuit 12 is in working state. That is, the second RF transceiver circuit 12 of TDD is in the time slot for receiving signals. In order to prevent the transmission signal of the first RF transceiver circuit 11 of FDD from interfering with the reception signal of the second RF transceiver circuit 12 of TDD, the first RF transceiver circuit 11 is used to control the first RF transceiver circuit 11 to transmit with a second transmission power that is less than the first transmission power when the enable terminal 121 of the low-noise amplifier of the second RF transceiver circuit 12 is a valid signal.

[0027] It should be noted that the first transmit power is the transmit power of the first radio frequency transceiver circuit 11. That is, when the radio frequency transceiver circuit 100 is working, the first radio frequency transceiver circuit 11 can transmit using the first transmit power or the second transmit power. When the enable terminal 121 of the low noise amplifier of the second radio frequency transceiver circuit 12 is determined to be a valid signal, the first radio frequency transceiver circuit 11 is controlled to transmit using the second transmit power.

[0028] Understandably, electronic devices must meet the Specific Absorption Rate (SAR) requirement. SAR is directly proportional to radio frequency (RF) transmit power; that is, the higher the RF transmit power, the higher the SAR value. For electronic devices, the concept of average time power can be used to dynamically adjust the transmit power of the electronic device. Within a relatively long time window, this ensures that the average SAR does not exceed the limit. Compared with the traditional fixed backoff RF power approach, the average time power mechanism allows the electronic device to transmit at a power higher than the maximum power (Plimit) required to meet the SAR limit during certain time periods, and at a power lower than the Plimit during certain time periods (but the average power within a certain time window is ≤ Plimit). This ensures that the SAR value of the electronic device meets the regulatory requirements within a preset time period.

[0029] In order to reduce interference between the two antennas in the radio frequency transceiver circuit while enabling the electronic device to meet the regulatory requirements for SAR values, in an optional embodiment, the first radio frequency transceiver circuit is further configured to:

[0030] When the enable signal of the low-noise amplifier in the second RF transceiver circuit is determined to be invalid, the first RF transceiver circuit is controlled to transmit at the first transmit power.

[0031] In other words, when the second RF transceiver circuit is not working, that is, when the second RF transceiver circuit 12 of TDD is in the time slot for transmitting signals, in order to ensure the transmission power of the first RF transceiver circuit, the first RF transceiver circuit is controlled to transmit with the first transmission power. In this way, while ensuring RF quality, interference in the RF transceiver circuit is reduced.

[0032] The SAR value of the first radio frequency transceiver circuit within a preset time period meets the regulatory requirements. In other words, by adjusting the transmission power of the first radio frequency transceiver circuit 11, not only can the interference between the two antennas be reduced, but also the SAR value of the first radio frequency transceiver circuit within a preset time period can be guaranteed to meet the regulatory requirements.

[0033] In the above-described radio frequency transceiver circuit, the connection between the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit and the first radio frequency transceiver circuit can be a direct connection or an indirect connection. Here, the embodiments of this application do not specifically limit this.

[0034] Regarding the aforementioned direct connection method, in one optional embodiment, the enable terminal of the low-noise amplifier of the second RF transceiver circuit is connected to the RF transceiver of the first RF transceiver circuit; wherein,

[0035] The RF transceiver in the first RF transceiver circuit is used for:

[0036] When the enable signal of the low-noise amplifier in the second radio frequency transceiver circuit is confirmed to be valid, the first radio frequency transceiver circuit is controlled to transmit using the second transmit power.

[0037] When the enable signal of the low-noise amplifier in the second RF transceiver circuit is determined to be invalid, the first RF transceiver circuit is controlled to transmit at the first transmit power.

[0038] Understandably, the enable pin of the low-noise amplifier of the second RF transceiver circuit is directly connected to the RF transceiver of the first RF transceiver circuit, allowing the RF transceiver of the first RF transceiver circuit to directly control the transmit power of the first RF transceiver circuit. When the RF transceiver of the first RF transceiver circuit determines that the enable pin of the second RF transceiver circuit is a valid signal, it indicates that the low-noise amplifier of the second RF transceiver circuit is in operation. That is, the second RF transceiver circuit of the TDD is in the signal receiving time slot. To prevent the transmit signal of the first RF transceiver circuit of the FDD from interfering with the receive signal of the second RF transceiver circuit of the TDD, the first RF transceiver circuit, when the enable pin of the low-noise amplifier of the second RF transceiver circuit is a valid signal, directly controls the first RF transceiver circuit to transmit at the second transmit power.

[0039] When the RF transceiver of the first RF transceiver circuit determines that the enable signal of the second RF transceiver circuit is invalid, that is, when the second RF transceiver circuit is not working, i.e. when the second RF transceiver circuit of TDD is in the time slot for transmitting signals, in order to ensure the transmit power of the first RF transceiver circuit, the RF transceiver of the first RF transceiver circuit directly controls the first RF transceiver circuit to transmit with the first transmit power. In this way, while ensuring RF quality, interference in the RF transceiver circuit is reduced.

[0040] Furthermore, when the enable terminal of the low-noise amplifier in the second RF transceiver circuit is directly connected to the first RF transceiver circuit, there may be a situation where the voltage signal at the enable terminal is too high for the first RF transceiver circuit to withstand, thus affecting the reliability of the RF transceiver circuit. To improve the reliability of the RF transceiver circuit, the aforementioned indirect connection method can be adopted. In an optional embodiment, the RF transceiver circuit further includes: a processing device, the input terminal of which is connected to the enable terminal of the low-noise amplifier in the second RF transceiver circuit, and the output terminal of which is connected to the first RF transceiver circuit; wherein,

[0041] The processing device is used to: when it determines that the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit is a valid signal, send a first control command to the first radio frequency transceiver circuit;

[0042] The first radio frequency transceiver circuit is used to: control the first radio frequency transceiver circuit to transmit using the second transmit power according to the first control command.

[0043] In other words, a processing device is set in the radio frequency transceiver circuit, and the processing device is set between the enable terminal of the low noise amplifier of the second radio frequency transceiver circuit and the first radio frequency transceiver circuit. In this way, the processing device determines whether the enable terminal of the low noise amplifier of the second radio frequency transceiver circuit is a valid signal. If it is, it means that the low noise amplifier of the second radio frequency transceiver circuit is in the working state and the second radio frequency transceiver circuit is in the receiving signal time slot. At this time, the transmitting signal of the first radio frequency transceiver circuit interferes with the receiving signal of the second radio frequency transceiver circuit. Therefore, when the processing device determines that the enable terminal of the low noise amplifier of the second radio frequency transceiver circuit is a valid signal, it sends a first control command to the first radio frequency transceiver circuit. After receiving the first control command, the first radio frequency transceiver circuit controls the first radio frequency transceiver circuit to transmit with the second transmitting power according to the first control command.

[0044] In this way, the interference of the transmitted signal of the first radio frequency transceiver circuit to the received signal of the second radio frequency transceiver circuit is reduced, and the SAR value of the first radio frequency transceiver circuit within the preset time period is also reduced.

[0045] In addition, if the transmitting power of the first radio frequency transceiver circuit is kept at the second transmitting power, it will affect the performance of the first radio frequency transceiver circuit. In order to reduce the interference between the two antennas without affecting the performance of the radio frequency transceiver circuit, in an optional embodiment, the processing device is further configured to: send a second control command to the first radio frequency transceiver circuit when it is determined that the enable terminal of the low noise amplifier of the second radio frequency transceiver circuit is an invalid signal.

[0046] The first radio frequency transceiver circuit is used to: control the first radio frequency transceiver circuit to transmit at the first transmit power according to the second control command.

[0047] Understandably, when the processing device determines that the enable signal of the low-noise amplifier of the second RF transceiver circuit is invalid, it indicates that the low-noise amplifier of the second RF transceiver circuit is not working. At this time, the second RF transceiver circuit is in the time slot for transmitting signals. In order to ensure the performance of the first RF transceiver circuit, the processing device sends a second control command to the first RF transceiver circuit. After receiving the second control command, the first RF transceiver circuit controls the transmission power of the first RF transceiver circuit to increase from the second transmission power to the first transmission power, thereby increasing the transmission power of the first RF transceiver circuit to ensure the performance of the first RF transceiver circuit.

[0048] Regarding the connection method of the output terminal of the processing device to the first radio frequency transceiver circuit, it can be that the output terminal of the processing device is connected to the radio frequency transceiver of the first radio frequency transceiver circuit, or it can be that the output terminal of the processing device is connected to the power supply chip of the power amplifier of the first radio frequency transceiver circuit. Of course, it can also be that the enable terminal of the low noise amplifier of the second radio frequency transceiver circuit is connected to the radio frequency transceiver of the first radio frequency transceiver circuit, or it can be that the enable terminal of the low noise amplifier of the second radio frequency transceiver circuit is connected to the power supply chip of the power amplifier of the first radio frequency transceiver circuit. Here, the embodiments of this application do not specifically limit this.

[0049] Regarding one connection method, in one optional embodiment, the output of the processing device is connected to the radio frequency transceiver of the first radio frequency transceiver circuit; wherein,

[0050] The first radio frequency transceiver circuit, according to a first control command, controls itself to transmit using a second transmit power, including:

[0051] The radio frequency transceiver of the first radio frequency transceiver circuit controls the first radio frequency transceiver circuit to transmit using the second transmit power according to the first control command.

[0052] Understandably, when the RF transceiver of the first RF transceiver circuit is connected to the output of the processing device, the RF transceiver of the first RF transceiver circuit, after receiving the first control command, directly controls the transmission power to decrease from the first transmission power to the second transmission power according to the first control command. In other words, the transmission power of the first RF transceiver circuit is directly adjusted by the RF transceiver of the first RF transceiver circuit, thereby reducing the interference between the two antennas.

[0053] Similarly, to ensure the performance of the first radio frequency transceiver circuit, in one optional embodiment, the first radio frequency transceiver circuit controls the second radio frequency transceiver circuit to transmit using the first transmit power according to the second control command, including:

[0054] The radio frequency transceiver of the first radio frequency transceiver circuit controls the first radio frequency transceiver circuit to transmit at the first transmit power according to the second control command.

[0055] Understandably, when the RF transceiver of the first RF transceiver circuit is connected to the output of the processing device, the RF transceiver of the first RF transceiver circuit, upon receiving the second control command, directly controls the transmission power to increase from the second transmission power to the first transmission power according to the second control command. In other words, the transmission power of the first RF transceiver circuit is directly adjusted through its RF transceiver, thereby ensuring the performance of the first RF transceiver circuit.

[0056] In another connection method, in one optional embodiment, the output of the processing device is connected to the power supply chip of the power amplifier of the first radio frequency transceiver circuit; wherein,

[0057] The first radio frequency transceiver circuit, according to a first control command, controls itself to transmit using a second transmit power, including:

[0058] The power supply chip of the power amplifier in the first radio frequency transceiver circuit controls the power supply voltage output to the power amplifier according to the first control command, so that the first radio frequency transceiver circuit transmits with the second transmit power.

[0059] Understandably, when the power supply chip of the power amplifier of the first radio frequency transceiver circuit is connected to the output terminal of the processing device, the power supply chip of the power amplifier of the first radio frequency transceiver circuit, after receiving the first control command, controls the supply voltage of the power amplifier according to the first control command, thereby adjusting the transmission power of the first radio frequency transceiver circuit, so that the transmission power of the first radio frequency transceiver circuit is transmitted with the second transmission power. In other words, by adjusting the supply voltage of the power amplifier of the first radio frequency transceiver circuit through the power supply chip of the power amplifier of the first radio frequency transceiver circuit, the transmission power of the first radio frequency transceiver circuit can be directly adjusted, thereby reducing the interference between the two antennas.

[0060] Similarly, for this connection method, in order to ensure the performance of the first radio frequency transceiver circuit, in an optional embodiment, the first radio frequency transceiver circuit controls the second radio frequency transceiver circuit to transmit at the first transmit power according to the second control command, including:

[0061] The power supply chip of the power amplifier in the first radio frequency transceiver circuit controls the power supply voltage output to the power amplifier according to the second control command, so that the first radio frequency transceiver circuit transmits with the first transmit power.

[0062] Understandably, when the power supply chip of the power amplifier of the first RF transceiver circuit is connected to the output terminal of the processing device, the power supply chip of the power amplifier of the first RF transceiver circuit, upon receiving the second control command, controls the supply voltage to the power amplifier according to the second control command, thereby adjusting the transmission power of the first RF transceiver circuit so that the first RF transceiver circuit transmits at the first transmission power. In other words, the power supply chip of the power amplifier of the first RF transceiver circuit is used to adjust the transmission power of the first RF transceiver circuit, thereby ensuring the performance of the first RF transceiver circuit.

[0063] Furthermore, in order to determine whether the enable signal of the low-noise amplifier in the second RF transceiver circuit is valid or invalid, in an optional embodiment, the first RF transceiver circuit is configured to:

[0064] When the signal at the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit is the power supply voltage of the low-noise amplifier of the second radio frequency transceiver circuit, the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit is determined to be a valid signal.

[0065] When the signal at the enable terminal of the low-noise amplifier in the second RF transceiver circuit is not the supply voltage of the low-noise amplifier in the second RF transceiver circuit, the enable terminal of the low-noise amplifier in the second RF transceiver circuit is determined to be an invalid signal.

[0066] Understandably, the enable terminal of the low-noise amplifier in the second RF transceiver circuit is connected to the power supply of the low-noise amplifier in the second RF transceiver circuit. When the power supply of the low-noise amplifier in the second RF transceiver circuit supplies power to the low-noise amplifier, the signal at the enable terminal of the low-noise amplifier in the second RF transceiver circuit is the power supply voltage of the low-noise amplifier in the second RF transceiver circuit, which makes the low-noise amplifier in the second RF transceiver circuit in a working state. Therefore, it can be determined that the enable terminal of the low-noise amplifier in the second RF transceiver circuit is a valid signal.

[0067] Similarly, when the power supply of the low-noise amplifier in the second RF transceiver circuit is not supplying power to the low-noise amplifier, the signal at the enable terminal of the low-noise amplifier is not the power supply voltage of the low-noise amplifier, causing the low-noise amplifier to be in a non-operating state. Therefore, it can be determined that the enable terminal of the low-noise amplifier in the second RF transceiver circuit is an invalid signal.

[0068] Thus, by observing the relationship between the enable terminal of the low-noise amplifier in the second RF transceiver circuit and its supply voltage, it is possible to determine whether the enable terminal of the low-noise amplifier in the second RF transceiver circuit is a valid signal or an invalid signal. This allows for the reduction of interference in the RF transceiver circuit by adjusting the transmit power of the first RF transceiver circuit.

[0069] The following examples illustrate the radio frequency transceiver circuits described in one or more of the above embodiments.

[0070] Figure 3a A schematic diagram of an example of an optional radio frequency transceiver circuit provided in this application is shown below. Figure 3a As shown, it includes: an RF transceiver 31, an LNA 32, an LTE antenna 34, an LNA 35, a PA 36, a power supply 37, a memory 38, and an NR antenna 39; and Figure 2 compared to, Figure 3a A memory 38 is provided between the enable terminal of the low-noise amplifier 35 of the NR RF transceiver circuit and the RF transceiver 31 of the RF transceiver circuit, wherein...

[0071] When band 2 (NR antenna) starts working in the receive (RX) time slot, power supply 37 supplies power to the enable terminal of LNA35. At the same time, it obtains the signal of the enable terminal of LNA35 as a valid signal from memory 38, indicating that band 2 is working in the RX time slot. Simultaneously, it sends a command to RF transceiver 31, causing RF transceiver 31 to control the transmit (TX) part of band 1 (LTE antenna), that is, to control the transmit power of band 1 to transmit at a second transmit power that is less than the first transmit power, thereby reducing the transmit power of band 1.

[0072] Figure 3b A schematic diagram of an optional radio frequency transceiver circuit provided in this application embodiment is shown below. Figure 3b As shown, it includes: an RF transceiver 31, an LNA 32, an LTE antenna 34, an LNA 35, a PA 36, a power supply 37, a memory 38, and an NR antenna 39; and Figure 3a The difference is that the output of memory 38 is connected to PA33. That is, a memory 38 is set between the enable terminal of the low noise amplifier 35 of the NR radio frequency transceiver circuit and PA33 of the radio frequency transceiver circuit. The transmit power of band 1 can be changed by changing the supply voltage of PA33 or the amplification factor of PA33 through memory 38.

[0073] based on Figure 3a and Figure 3b , Figure 4 A timing diagram of an optional radio frequency transceiver circuit provided for an embodiment of this application, such as... Figure 4 As shown, when two frequency bands operate simultaneously, one band is FDD (assuming the signal comes from the LTE antenna) and the other band is TDD (assuming the signal comes from the NR antenna), Figure 4 The upper figure shows the power behavior of the FDD band, and the lower figure shows the time slot diagrams for TX and RX in the TDD band. Regarding the upper figure, from the perspective of satisfying SAR with average power, periods of high power and periods of low power are allowed, so that the average power meets the power value corresponding to Plimit. Regarding the lower figure, because it is a TDD band, the TX and RX times are distinct. Aligning the time of b (low power) in the upper figure with the RX time period in the lower figure, as shown by the dotted line, this ensures that within each RX time period in the TDD band, the TX power of the FDD band is low. This means that within each RX time period in the TDD band, interference from the FDD band is reduced, thereby reducing interference between the two antennas. This achieves the goal of both reducing SAR values ​​and reducing interference.

[0074] It should be noted that, in addition to using the memory method to respond to the signal of the enable terminal of LNA35, the above-mentioned processing device may also use a processor, which may be a central processing unit (CPU), a neural network processing unit (NPU), etc., or a controller, which may be a combinational logic controller, a CPU controller, etc. Here, the embodiments of this application do not specifically limit this.

[0075] In this example, the electronic device can reduce the SAR value while also reducing the transmission interference under coexistence. By using the average power to reduce the SAR value, the RX synchronization time circuit is introduced to reduce coexistence interference, thus achieving a win-win effect.

[0076] This application provides a radio frequency transceiver circuit disposed in an electronic device, comprising: a first radio frequency transceiver circuit and a second radio frequency transceiver circuit. The first radio frequency transceiver circuit is of FDD standard, and the second radio frequency transceiver circuit is of TDD standard. The enable terminal of the low noise amplifier of the second radio frequency transceiver circuit is connected to the first radio frequency transceiver circuit. The first radio frequency transceiver circuit is used to: when it determines that the enable terminal of the low noise amplifier of the second radio frequency transceiver circuit is a valid signal, control the first radio frequency transceiver circuit to transmit at a second transmission power less than a first transmission power, where the first transmission power is the transmission power of the first radio frequency transceiver circuit; that is, in this application embodiment, when it determines that the low noise amplifier of the second radio frequency transceiver circuit is valid, control the first radio frequency transceiver circuit to transmit at a second transmission power less than a first transmission power. When the enable signal is active, it indicates that the first RF transceiver circuit transmits at a second transmit power lower than the first transmit power when the second RF transceiver circuit is in the receiving signal time slot. Since the second harmonic of the transmitted signal from the first RF transceiver circuit will interfere with the received signal of the second RF transceiver circuit, by reducing the transmit power of the FDD during the receiving signal time slot of the TDD, the interference of the transmitted signal of the first RF transceiver circuit to the received signal of the second RF transceiver circuit can be reduced. Thus, the interference between the first RF transceiver circuit and the second RF transceiver circuit is reduced without introducing path loss, thereby reducing the interference of the RF transceiver circuit and improving the RF performance.

[0077] Based on the same inventive concept, embodiments of this application provide a control method applied to a processor in a radio frequency transceiver circuit as described in one or more of the above embodiments. Figure 5 A flowchart illustrating an optional control method provided in an embodiment of this application is shown below. Figure 5 As shown, the method includes:

[0078] S501: When the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit is determined to be a valid signal, the first radio frequency transceiver circuit is controlled to transmit at a second transmission power that is less than the first transmission power.

[0079] The first transmit power is the transmit power of the first radio frequency transceiver circuit.

[0080] In an optional embodiment, the above method further includes:

[0081] When the enable signal of the low-noise amplifier in the second RF transceiver circuit is determined to be invalid, the first RF transceiver circuit is controlled to transmit at the first transmit power.

[0082] In one optional embodiment, the enable terminal of the low-noise amplifier of the second RF transceiver circuit is connected to the RF transceiver of the first RF transceiver circuit; wherein, the method further includes:

[0083] When the RF transceiver of the first RF transceiver circuit determines that the enable terminal of the low-noise amplifier of the second RF transceiver circuit is a valid signal, it controls the first RF transceiver circuit to transmit with the second transmit power.

[0084] When the enable signal of the low-noise amplifier in the second RF transceiver circuit is determined to be invalid, the first RF transceiver circuit is controlled to transmit at the first transmit power.

[0085] In an optional embodiment, the radio frequency transceiver circuit further includes: a processing device, the input terminal of which is connected to the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit, and the output terminal of which is connected to the first radio frequency transceiver circuit; the method further includes:

[0086] When the processing device determines that the enable signal of the low-noise amplifier in the second radio frequency transceiver circuit is a valid signal, it sends a first control command to the first radio frequency transceiver circuit.

[0087] The first radio frequency transceiver circuit controls the first radio frequency transceiver circuit to transmit using the second transmit power according to the first control command.

[0088] In an optional embodiment, the above method further includes:

[0089] When the processing device determines that the enable signal of the low-noise amplifier in the second radio frequency transceiver circuit is invalid, it sends a second control command to the first radio frequency transceiver circuit.

[0090] The first radio frequency transceiver circuit controls the second radio frequency transceiver circuit to transmit using the first transmit power according to the second control command.

[0091] In an optional embodiment, the above method may further include:

[0092] When the signal at the enable terminal of the low-noise amplifier in the second RF transceiver circuit is the power supply voltage of the low-noise amplifier in the second RF transceiver circuit, the enable terminal of the low-noise amplifier in the second RF transceiver circuit is determined to be a valid signal.

[0093] In one alternative embodiment, the transmit power of the first radio frequency transceiver circuit has an average specific absorption rate (SAR) value within a preset time period that meets the regulatory requirements for SAR value.

[0094] Figure 6 The following is a schematic diagram of an optional electronic device provided as an embodiment of this application, such as... Figure 6 As shown, the electronic device 600 includes the radio frequency transceiver circuit 61 described in one or more of the above embodiments.

[0095] The computer-readable storage medium can be a magnetic random access memory (FRAM), a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM), etc.

[0096] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of hardware embodiments, software embodiments, or embodiments combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage and optical storage) containing computer-usable program code.

[0097] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0098] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0099] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0100] The above description is merely a preferred embodiment of this application and is not intended to limit the scope of protection of this application.

Claims

1. A radio frequency transceiver circuit, characterized in that, The radio frequency transceiver circuit is disposed in the electronic device and includes: a first radio frequency transceiver circuit and a second radio frequency transceiver circuit. The first radio frequency transceiver circuit is of FDD standard, and the second radio frequency transceiver circuit is of TDD standard. The enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit is connected to the first radio frequency transceiver circuit. The first radio frequency transceiver circuit is configured to: when the enable terminal of the low noise amplifier of the second radio frequency transceiver circuit is a valid signal, control the first radio frequency transceiver circuit to transmit at a second transmission power that is less than the first transmission power; Wherein, the first transmission power is the transmission power of the first radio frequency transceiver circuit; The average specific absorption rate (SAR) value of the first radio frequency transceiver circuit within a preset time period meets the SAR value required by regulations. The radio frequency transceiver circuit further includes: a processing device, wherein the input terminal of the processing device is connected to the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit, and the output terminal of the processing device is connected to the power supply chip of the power amplifier of the first radio frequency transceiver circuit; wherein... The processing device is used to: when it determines that the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit is a valid signal, send a first control command to the first radio frequency transceiver circuit; The power supply chip of the power amplifier in the first radio frequency transceiver circuit is used to: control the supply voltage output to the power amplifier according to the first control command, so that the first radio frequency transceiver circuit transmits with the second transmit power; The first radio frequency transceiver circuit is used for: When the signal at the enable terminal of the low-noise amplifier of the second RF transceiver circuit is the power supply voltage of the low-noise amplifier of the second RF transceiver circuit, the enable terminal of the low-noise amplifier of the second RF transceiver circuit is determined to be the valid signal.

2. The circuit according to claim 1, characterized in that, The first radio frequency transceiver circuit is also used for: When it is determined that the enable signal of the low-noise amplifier of the second RF transceiver circuit is invalid, the first RF transceiver circuit is controlled to transmit using the first transmit power.

3. The circuit according to claim 1 or 2, characterized in that, The enable terminal of the low-noise amplifier in the second RF transceiver circuit is connected to the RF transceiver of the first RF transceiver circuit; wherein, The radio frequency transceiver of the first radio frequency transceiver circuit is used for: When the enable signal of the low-noise amplifier of the second radio frequency transceiver circuit is determined to be valid, the first radio frequency transceiver circuit is controlled to transmit using the second transmit power. When it is determined that the enable signal of the low-noise amplifier of the second RF transceiver circuit is invalid, the first RF transceiver circuit is controlled to transmit using the first transmit power.

4. The circuit according to claim 1, characterized in that, The processing device is further configured to: when it is determined that the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit is an invalid signal, send a second control command to the first radio frequency transceiver circuit; The first radio frequency transceiver circuit is used to: control the first radio frequency transceiver circuit to transmit using the first transmit power according to the second control command.

5. A control method, characterized in that, The method is applied to the radio frequency transceiver circuit as described in claim 1, comprising: When the enable signal of the low-noise amplifier of the second radio frequency transceiver circuit is determined to be valid, the first radio frequency transceiver circuit is controlled to transmit at a second transmission power that is less than the first transmission power. Wherein, the first transmission power is the transmission power of the first radio frequency transceiver circuit; The radio frequency transceiver circuit further includes: a processing device, the input terminal of which is connected to the enable terminal of the low-noise amplifier of the second radio frequency transceiver circuit, and the output terminal of which is connected to the power supply chip of the power amplifier of the first radio frequency transceiver circuit; the method further includes: When the processing device determines that the enable signal of the low-noise amplifier of the second radio frequency transceiver circuit is a valid signal, it sends a first control command to the first radio frequency transceiver circuit. The power supply chip of the power amplifier in the first radio frequency transceiver circuit controls the power supply voltage output to the power amplifier according to the first control command, so that the first radio frequency transceiver circuit transmits with the second transmit power; The average specific absorption rate (SAR) value of the first radio frequency transceiver circuit within a preset time period meets the SAR value required by regulations. The method further includes: When the signal at the enable terminal of the low-noise amplifier of the second RF transceiver circuit is the power supply voltage of the low-noise amplifier of the second RF transceiver circuit, the enable terminal of the low-noise amplifier of the second RF transceiver circuit is determined to be the valid signal.

6. The method according to claim 5, characterized in that, The method further includes: When it is determined that the enable signal of the low-noise amplifier of the second RF transceiver circuit is invalid, the first RF transceiver circuit is controlled to transmit using the first transmit power.

7. An electronic device, characterized in that, Includes the radio frequency transceiver circuit as described in any one of claims 1 to 4.

Images