A DAC direct current coupling output circuit

Abstract

The application provides a DAC direct current coupling output circuit, comprising a clamping circuit, a current source circuit, a voltage bias circuit and an impedance matching circuit. The output terminal voltage of the DAC is clamped to its compliance voltage by the clamping circuit, the output current of the adjustable current source is coupled with the high-frequency signal of the DAC to become a direct current coupling current, the bias voltage corresponding to the direct current coupling current is generated by the voltage bias circuit, and finally the impedance matching circuit is used for impedance matching of the output terminal of the DAC, so that the current sink output of the DAC can be converted into the direct current coupling current source output, and the trade-off between the AC / DC performance and the signal-to-noise ratio is not needed, the design difficulty of the DAC direct current coupling output circuit is effectively reduced, and the performance of the DAC direct current coupling output is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of circuit technology, and in particular to a DAC direct current coupling output circuit. BACKGROUND

[0002] In the prior art, the output of most high-speed DACs is a current sink. In applications such as arbitrary waveform generators, a direct current coupled current source is needed to drive an external load. In order to apply such high-speed DACs to applications such as arbitrary waveform generators, a circuit is needed to convert the current sink output of the DAC into a direct current coupled current source output.

[0003] At present, the common implementation is to add a pull-up resistor to the output end of the DAC, and then use an operational amplifier to amplify the differential voltage at the output end of the DAC (as shown in FIG. 1). This method is simple in structure, but each index needs to be weighed and selected, and it is impossible to meet all the index requirements at the same time. Figure 2

[0004] Firstly, when the DAC is working normally, the voltage at the output end of the DAC is approximately the compliance voltage, so the common mode input voltage of the operational amplifier is high, which requires the operational amplifier to have a wide common mode input range and a large power supply voltage range. However, under the current technical conditions, it is difficult to simultaneously achieve a large power supply voltage range and a high bandwidth.

[0005] Secondly, the voltage at the output end of the DAC will change, which requires the size of the pull-up resistor to be weighed. A larger pull-up resistor can generate a larger differential voltage at the output end of the DAC, but a larger voltage change at the output end will cause the AC performance of the DAC to deteriorate. A smaller pull-up resistor can reduce the degree of deterioration of the AC performance of the DAC, but a smaller differential voltage output amplitude will reduce the signal-to-noise ratio of the overall circuit. SUMMARY

[0006] In view of the problems existing in the prior art, the embodiments of the present application provide a DAC direct current coupling output circuit, which can convert the current sink output of the DAC into a direct current coupled current source output without having to make a trade-off between the AC performance and the signal-to-noise ratio.

[0007] The present application provides a DAC direct current coupling output circuit, comprising a clamping circuit, a current source circuit, a voltage biasing circuit and an impedance matching circuit.

[0008] The input end of the clamping circuit is connected with the output end of the DAC, the output end of the clamping circuit is connected in parallel with the output end of the current source circuit, and then connected with the input end of the voltage biasing circuit, and the output end of the voltage biasing circuit is connected with the output end of the DAC direct current coupling output circuit through the impedance matching circuit.

[0009] ​The clamping circuit is used for clamping the output terminal voltage of the DAC to the compliant voltage of the DAC, and is also used for transmitting the high-frequency signal output by the DAC;

[0010] The current source circuit is used for generating a bias current and outputting;

[0011] The voltage bias circuit is used for transmitting the direct current coupling current after the high-frequency signal is coupled with the bias current, and generating a bias voltage corresponding to the direct current coupling current;

[0012] The impedance matching circuit is used for impedance matching the output terminal of the DAC direct current coupling output circuit, and outputting the direct current coupling current transmitted by the voltage bias circuit to the output terminal of the DAC direct current coupling output circuit.

[0013] The DAC direct current coupling output circuit provided by the application further comprises a CMFB module, which is used for adjusting the bias current generated by the current source circuit, so that the common-mode voltage output by the DAC direct current coupling output circuit is 0.

[0014] The DAC direct current coupling output circuit provided by the application, the clamping circuit comprises at least one transistor group, each transistor group comprises a first transistor and a second transistor;

[0015] The first transistor of each transistor group is connected in series with the first pin and the second pin of the first transistor in the first circuit of the clamping circuit, the second transistor of each transistor group is connected in series with the first pin and the second pin of the second transistor in the second circuit of the clamping circuit, the third pin of the first transistor and the third pin of the second transistor of each transistor group are connected to an auxiliary voltage source corresponding to the transistor group;

[0016] The input end of the first circuit of the clamping circuit is connected with the first end of the input end of the clamping circuit, and the input end of the second circuit of the clamping circuit is connected with the second end of the input end of the clamping circuit; the output end of the first circuit of the clamping circuit is connected with the first end of the output end of the clamping circuit, and the output end of the second circuit of the clamping circuit is connected with the second end of the output end of the clamping circuit;

[0017] The first end of the input end of the clamping circuit is connected with the first end of the output end of the DAC, and the second end of the input end of the clamping circuit is connected with the second end of the output end of the DAC.

[0018] The DAC direct current coupling output circuit provided by the application, the first transistor adopts a bipolar transistor or a field effect transistor, the second transistor adopts a bipolar transistor or a field effect transistor, and the first transistor and the second transistor in each transistor group adopt the same kind of transistor.

[0019] The voltage bias circuit of the DAC direct current coupling output circuit provided by the application comprises a voltage bias first circuit and a voltage bias second circuit.

[0020] The input end of the voltage bias first circuit is connected with the first end of the input end of the voltage bias circuit, and the input end of the voltage bias second circuit is connected with the second end of the input end of the voltage bias circuit.

[0021] The output end of the voltage bias first circuit is connected with the first end of the output end of the voltage bias circuit, and the output end of the voltage bias second circuit is connected with the second end of the output end of the voltage bias circuit.

[0022] The first end of the input end of the voltage bias circuit is connected with the first end of the output end of the clamping circuit, and the second end of the input end of the voltage bias circuit is connected with the second end of the output end of the clamping circuit.

[0023] The voltage bias first circuit comprises one or several bias devices connected in series, and the voltage bias second circuit comprises one or several bias devices connected in series.

[0024] The bias device adopts a forward-biased PN junction or a reverse-biased Zener diode.

[0025] The current source circuit of the DAC direct current coupling output circuit provided by the application comprises a voltage source, a first adjustable current source and a second adjustable current source.

[0026] The first output end of the voltage source is connected with the input end of the first adjustable current source, and the output end of the first adjustable current source is connected with the first end of the output end of the current source circuit; the second output end of the voltage source is connected with the input end of the second adjustable current source, and the output end of the second adjustable current source is connected with the second end of the output end of the current source circuit.

[0027] The first end of the output end of the current source circuit is connected with the first end of the output end of the clamping circuit, and the second end of the output end of the current source circuit is connected with the second end of the output end of the clamping circuit.

[0028] The DAC direct current coupling output circuit provided by the application, the current source circuit further comprises a first inductor and a second inductor; the output end of the first current source is connected with the first end of the output end of the current source circuit through the first inductor, and the output end of the second current source is connected with the second end of the output end of the current source circuit through the second inductor.

[0029] The DAC direct current coupling output circuit provided by the application, the impedance matching circuit comprises a bias voltage source, an impedance matching first circuit and an impedance matching second circuit; the impedance matching first circuit comprises a first resistor, and the impedance matching second circuit comprises a second resistor;

[0030] The input end of the impedance matching first circuit is connected with the first end of the input end of the impedance matching circuit, the output end of the impedance matching first circuit is connected with the first end of the output end of the impedance matching circuit, and the connection node between the input end of the impedance matching first circuit and the output end of the impedance matching first circuit is connected with the first output end of the bias voltage source through the first resistor;

[0031] The input end of the impedance matching second circuit is connected with the second end of the input end of the impedance matching circuit, the output end of the impedance matching second circuit is connected with the second end of the output end of the impedance matching circuit, and the connection node between the input end of the impedance matching second circuit and the output end of the impedance matching second circuit is connected with the second output end of the bias voltage source through the second resistor;

[0032] The first end of the output end of the impedance matching circuit is connected with the first end of the output end of the DAC direct current coupling output circuit, and the second end of the output end of the impedance matching circuit is connected with the second end of the output end of the DAC direct current coupling output circuit.

[0033] The DAC direct current coupling output circuit provided by the application, the impedance matching first circuit further comprises a first impedance matching module, and the impedance matching second circuit further comprises a second impedance matching module;

[0034] The input end of the impedance matching first circuit is connected with the connection node of the first resistor through the first impedance matching module and the first end of the output end of the impedance matching circuit;

[0035] The input end of the impedance matching second circuit is connected with the connection node of the second resistor through the second impedance matching module and the first end of the output end of the impedance matching circuit.

[0036] The DAC direct current coupling output circuit provided by the application, the voltage across the voltage bias circuit is greater than the compliance voltage of the DAC and less than the voltage of the voltage source.

[0037] The DAC direct current coupling output circuit provided by the application first clamps the output terminal voltage of the DAC to its compliance voltage through the clamping circuit, couples the output current of the current source and the high-frequency signal of the DAC to become a direct current coupling current through the setting of the current source, generates a bias voltage corresponding to the direct current coupling current through the voltage bias circuit, and finally performs impedance matching on the output terminal of the DAC through the impedance matching circuit, so that the current sink output of the DAC can be converted to the direct current coupling current source output, without making a trade-off between AC and DC performance and signal-to-noise ratio, effectively reducing the design difficulty of the DAC direct current coupling output circuit and improving the performance of the DAC direct current coupling output. BRIEF DESCRIPTION OF DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the application or prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0039] Figure 1 Fig. 1 is a structural schematic diagram of a DAC direct current coupling output circuit provided by an embodiment of the application;

[0040] Figure 2 Fig. 2 is a structural schematic diagram of a DAC direct current coupling output circuit of the prior art;

[0041] Figure 3 Fig. 3 is another structural schematic diagram of a DAC direct current coupling output circuit provided by an embodiment of the application. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of the application more clear, the technical solutions in the application will be clearly and completely described below in combination with the drawings in the application. Obviously, the described embodiments are some embodiments of the application, rather than all the embodiments. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the application.

[0043] As shown in Fig. 1, the application provides a DAC direct current coupling output circuit, which comprises a clamping circuit 1, a current source circuit 2, a voltage bias circuit 3 and an impedance matching circuit. Figure 1

[0044] ​The input end of the clamping circuit 1 is connected with the output end of the DAC, the output end of the clamping circuit 1 is connected with the output end of the current source circuit 2 in parallel and then connected with the input end of the voltage bias circuit 3, and the output end of the voltage bias circuit 3 is connected with the output end of the DAC direct current coupling output circuit through the impedance matching circuit;

[0045] The clamping circuit 1 is used for clamping the output end voltage of the DAC to the compliance voltage of the DAC, and the clamping circuit 1 is also used for transmitting the high-frequency signal output by the DAC;

[0046] The current source circuit 2 is used for generating and outputting a bias current;

[0047] The voltage bias circuit 3 is used for transmitting the direct current coupling current after the high-frequency signal is coupled with the bias current, and generating a bias voltage corresponding to the direct current coupling current;

[0048] The impedance matching circuit is used for impedance matching the output end of the DAC direct current coupling output circuit, and outputting the direct current coupling current transmitted by the voltage bias circuit 3 to the output end of the DAC direct current coupling output circuit.

[0049] It should be noted that the DAC direct current coupling output circuit provided by the application firstly clamps the output end voltage of the DAC to the compliance voltage thereof through the clamping circuit 1, couples the output current of the adjustable current source with the high-frequency signal of the DAC to become a direct current coupling current, generates a bias voltage corresponding to the direct current coupling current through the voltage bias circuit 3, and finally impedance matches the output end of the DAC through the impedance matching circuit, so that the current sink output of the DAC can be converted into the direct current coupling current source output, without making a trade-off between the AC / DC performance and the signal-to-noise ratio, thereby effectively reducing the design difficulty of the DAC direct current coupling output circuit and improving the performance of the DAC direct current coupling output.

[0050] In the embodiment of the application, further, the DAC direct current coupling output circuit further comprises a CMFB module, the CMFB module is used for adjusting the bias current generated by the current source circuit 2, so that the common-mode voltage output by the DAC direct current coupling output circuit is 0.

[0051] It should be noted that the CMFB module provides common-mode feedback for the circuit, so that the common-mode voltage output by the circuit is zero. It can be understood that when the voltage temperature and other external conditions change, the current generated in the DAC and the current source circuit 2 will change slightly, and the CMFB module can eliminate the output common-mode voltage change caused by the above-mentioned current change.

[0052] In the embodiment of the application, further, the clamping circuit 1 comprises at least one transistor group, each transistor group comprises a first transistor and a second transistor;

[0053] The first transistor of each transistor group is connected in series with the first pin and the second pin of the first transistor in the first circuit of the clamping circuit 1, the second transistor of each transistor group is connected in series with the first pin and the second pin of the second transistor in the second circuit of the clamping circuit 1, and the third pin of the first transistor and the third pin of the second transistor of each transistor group are connected to the auxiliary voltage source corresponding to the transistor group;

[0054] The input end of the first circuit of the clamping circuit 1 is connected to the first end of the input end of the clamping circuit 1, and the input end of the second circuit of the clamping circuit 1 is connected to the second end of the input end of the clamping circuit 1; the output end of the first circuit of the clamping circuit 1 is connected to the first end of the output end of the clamping circuit 1, and the output end of the second circuit of the clamping circuit 1 is connected to the second end of the output end of the clamping circuit 1;

[0055] The first end of the input end of the clamping circuit 1 is connected to the first end of the output end of the DAC, and the second end of the input end of the clamping circuit 1 is connected to the second end of the output end of the DAC.

[0056] In the embodiment of the present application, further, the first transistor adopts a bipolar transistor or a field effect transistor, the second transistor adopts a bipolar transistor or a field effect transistor, and the first transistor and the second transistor in each transistor group adopt the same kind of transistor.

[0057] It should be noted that the clamping circuit 1 includes at least two transistors (the number of transistors is double, two as a group), which are arranged on the lines corresponding to the two output ends of the DAC, respectively, and each group of transistors is connected to an auxiliary voltage source, and these auxiliary voltage sources generate fixed and reasonable voltages, so that these transistors can clamp the voltages of the P and N pins of the DAC to the compliance voltage of the DAC. These transistors can be bipolar transistors, field effect transistors or other active devices.

[0058] In the embodiment of the present application, further, the voltage biasing circuit 3 includes a voltage biasing first circuit and a voltage biasing second circuit;

[0059] The input end of the voltage biasing first circuit is connected to the first end of the input end of the voltage biasing circuit 3, and the input end of the voltage biasing second circuit is connected to the second end of the input end of the voltage biasing circuit 3;

[0060] The output end of the voltage biasing first circuit is connected to the first end of the output end of the voltage biasing circuit 3, and the output end of the voltage biasing second circuit is connected to the second end of the output end of the voltage biasing circuit 3;

[0061] The first end of the input end of the voltage biasing circuit 3 is connected to the first end of the output end of the clamping circuit 1, and the second end of the input end of the voltage biasing circuit 3 is connected to the second end of the output end of the clamping circuit 1.

[0062] The voltage biasing first circuit comprises one or several biasing devices connected in series, and the voltage biasing second circuit comprises one or several biasing devices connected in series.

[0063] The biasing device is a forward-biased PN junction or a reverse-biased Zener diode.

[0064] It should be noted that if a reverse-biased Zener diode is used, one is enough, and if a forward-biased PN junction is used, several are needed. In specific embodiments, several forward-biased PN junctions can be connected in series, or a forward-biased PN junction and a reverse-biased Zener diode can be connected in series, etc.

[0065] It should be noted that the voltage biasing first circuit and the voltage biasing second circuit can generate a predictable voltage drop when a current of different sizes flows through them, and this voltage drop will be used as a bias voltage. In addition, the voltage across the voltage biasing first circuit and the voltage across the voltage biasing second circuit do not require strict consistency, absolute accuracy or absolute constancy, but only need to ensure that the voltage across them meets a certain range. This greatly relaxes the selection range of the devices in the circuit. The use of forward-biased PN junctions, reverse-biased Zener diodes or a combination of the two meets the requirements of the characteristics of the voltage biasing circuit 3.

[0066] In the embodiments of the present application, further, the voltage across the voltage biasing circuit 3 is greater than the compliance voltage of the DAC and less than the voltage of the voltage source. It should be noted that the voltage across the voltage biasing first circuit and the voltage biasing second circuit is relatively high, far exceeding the compliance voltage of the DAC, but far less than the voltage of the voltage source.

[0067] In the embodiments of the present application, further, the current source circuit 2 comprises a voltage source, a first adjustable current source and a second adjustable current source.

[0068] The first output end of the voltage source is connected to the input end of the first adjustable current source, and the output end of the first adjustable current source is connected to the first end of the output end of the current source circuit 2. The second output end of the voltage source is connected to the input end of the second adjustable current source, and the output end of the second adjustable current source is connected to the second end of the output end of the current source circuit 2.

[0069] The first end of the output end of the current source circuit 2 is connected to the first end of the output end of the clamping circuit 1, and the second end of the output end of the current source circuit 2 is connected to the second end of the output end of the clamping circuit 1.

[0070] In the embodiments of the present application, further, the current source circuit 2 further comprises a first inductor and a second inductor. The output end of the first current source is connected to the first end of the output end of the current source circuit 2 through the first inductor, and the output end of the second current source is connected to the second end of the output end of the current source circuit 2 through the second inductor.

[0071] It should be noted that the first adjustable current source and the second adjustable current source provide current bias for the circuit, and the output current is greater than the full-scale current I of the DAC OFS In addition, the first inductor and the second inductor isolate the first adjustable current source and the second adjustable current source from the high-frequency channel, respectively. The isolation of the first inductor and the second inductor makes the first adjustable current source and the second adjustable current source not need to work at high frequency, thereby greatly reducing the design difficulty.

[0072] In the embodiment of the present application, further, the impedance matching circuit comprises a bias voltage source, an impedance matching first circuit 41 and an impedance matching second circuit 42; the impedance matching first circuit 41 comprises a first resistor, and the impedance matching second circuit 42 comprises a second resistor;

[0073] The input end of the impedance matching first circuit 41 is connected with the first end of the input end of the impedance matching circuit, the output end of the impedance matching first circuit 41 is connected with the first end of the output end of the impedance matching circuit, and the connection node between the input end of the impedance matching first circuit 41 and the output end of the impedance matching first circuit 41 is connected with the first output end of the bias voltage source through the first resistor;

[0074] The input end of the impedance matching second circuit 42 is connected with the second end of the input end of the impedance matching circuit, the output end of the impedance matching second circuit 42 is connected with the second end of the output end of the impedance matching circuit, and the connection node between the input end of the impedance matching second circuit 42 and the output end of the impedance matching second circuit 42 is connected with the second output end of the bias voltage source through the second resistor;

[0075] The first end of the output end of the impedance matching circuit is connected with the first end of the output end of the DAC direct current coupling output circuit, and the second end of the output end of the impedance matching circuit is connected with the second end of the output end of the DAC direct current coupling output circuit.

[0076] In the embodiment of the present application, further, the impedance matching first circuit 41 further comprises a first impedance matching module, and the impedance matching second circuit 42 further comprises a second impedance matching module;

[0077] The connection node of the input end of the impedance matching first circuit 41 and the first resistor is connected with the first end of the output end of the impedance matching circuit through the first impedance matching module;

[0078] The connection node of the input end of the impedance matching second circuit 42 and the second resistor is connected with the first end of the output end of the impedance matching circuit through the second impedance matching module.

[0079] It should be noted that the first resistor and the second resistor provide bias and partial impedance matching. The first impedance matching module and the second impedance matching module provide impedance matching of the output end. In the embodiment of the application, the module can match the output impedance of the pre-stage circuit to the commonly used 50Ω impedance in the radio frequency system. It should be noted that the output impedance of the pre-stage circuit is mainly determined by the first resistor and the second resistor, and if the resistance values of the first resistor and the second resistor are 50Ω, the impedance matching modules IM1 and IM2 can be omitted.

[0080] Please refer to Figure 3 , based on the scheme of the above embodiment, the following specific circuit structure is described in detail:

[0081] As Figure 3 shown, the embodiment of the application provides a DAC direct current coupling output circuit, which comprises a clamping circuit, a current source circuit, a voltage bias circuit, an impedance matching circuit and a CMFB module. Specifically:

[0082] The Current-Sink DAC in the figure is a digital analog converter with a current sink output form, which is hereinafter referred to as DAC.

[0083] The clamping circuit comprises bipolar transistors Q1, Q2, Q3 and Q4.

[0084] The current source circuit comprises a voltage source VDD, adjustable current sources I1 and I2, and inductors L1 and L2.

[0085] The voltage bias circuit comprises a voltage bias first circuit U1 and a voltage bias second circuit U2.

[0086] The impedance matching circuit comprises impedance matching modules IM1 and IM2, a first resistor R1, a second resistor R2 and a bias voltage source V B3 .

[0087] The output end P pin of the DAC is connected to the emitter of the transistor Q4, the collector of the Q4 is connected to the emitter of the Q3; the output end N pin of the DAC is connected to the emitter of the transistor Q2, the collector of the Q2 is connected to the emitter of the Q1; the bases of the Q2 and Q4 are connected to the auxiliary voltage source V B2 ; the bases of the Q1 and Q3 are connected to the auxiliary voltage source V B1 .

[0088] The first output end of the voltage source VDD is connected to the collector of the transistor Q1 through the adjustable current source I1 and the inductor L1 in sequence; the second output end of the voltage source VDD is connected to the collector of the transistor Q3 through the adjustable current source I2 and the inductor L2 in sequence; the equipotential end of the current source I1 is connected to the equipotential end of the current source I2.

[0089] The collector of the transistor Q1 is also connected with the input end of the voltage biasing first circuit U1, and the collector of the transistor Q3 is also connected with the input end of the voltage biasing second circuit U2;

[0090] The output end of the voltage biasing first circuit U1 is connected with the first end of the first resistor R1 and the first end of the impedance matching module IM1 respectively, the second end of the first resistor R1 is connected to the bias voltage source V B3 , and the second end of the impedance matching module IM1 is connected to the first output end OutN of the DAC direct current coupling output circuit;

[0091] The output end of the voltage biasing second circuit U2 is connected with the first end of the second resistor R2 and the first end of the impedance matching module IM2 respectively, the second end of the second resistor R2 is connected to the bias voltage source V B3 , and the second end of the impedance matching module IM2 is connected to the second output end OutP of the DAC direct current coupling output circuit; the output of the DAC direct current coupling output circuit is OutP and OutN, and the output is connected to an external load; it should be noted that U1 and U2 are certain devices / circuits, which can generate a predictable voltage drop when a current of different sizes flows through. Such devices / circuits include but are not limited to: series-connected positive-biased PN junction, reverse-biased Zener diode, combination of positive-biased PN junction and reverse-biased Zener diode, etc.

[0092] The first input end of the CMFB module is connected with the input end of the impedance matching module IM1, the second input end of the CMFB module is connected with the input end of the impedance matching module IM2, and the control end of the CMFB module is connected with the control end of the adjustable current source I1 and the adjustable current source I2 respectively;

[0093] The high-frequency signal path of the circuit is: DAC→Q1, Q2, Q3, Q4→U1, U2→impedance matching module→load.

[0094] Based on the above DAC direct current coupling output circuit structure, the following is a specific mathematical analysis:

[0095] Assume:

[0096] The external load and R1, R2 are both 50 ohms, so the impedance matching modules IM1 and IM2 can be deleted to simplify the analysis. The input currents of the P and N pins of the DAC are I DACP and I DACN . And I DACP +I DACN =I OFS (Equation 1), I OFS is the full-scale current of the DAC.

[0097] The voltage of the power supply voltage VDD is very high, and the current of the adjustable current sources I1 and I2 is IB , and I B > I OFS .

[0098] V B1 and V B2 is a fixed and reasonable voltage, so that Q1, Q2, Q3, Q4 can clamp the P, N pin output of the DAC to the compliance voltage of the DAC; and the gain of Q1, Q2, Q3, Q4 is very high.

[0099] The voltage across the devices / circuits U1, U2 (voltage biasing circuit) is high, far exceeding the compliance voltage of the DAC, but far less than the power supply voltage VDD.

[0100] Therefore, the current flowing through U1, U2 is I B -I DACP , I B -I DACN .

[0101] The voltage on the external load is U P and U N , respectively, satisfying the following relationships:

[0102] (U P -V B3 ) / 50+U P / 50=I B -I DACN (Equation 2)

[0103] (U N -V B3 ) / 50+U N / 50=I B -I DACP (Equation 3)

[0104] From Equations 1, 2, and 3, the following expressions can be derived:

[0105] U P =25*(I B -I DACN )+V B3 / 2

[0106] U N =25*(I B -I DACP )+V B3 / 2

[0107] U P +U N =50*I B -25*I OFS +V B3 (Equation 4)

[0108] It can be seen that the output voltage U N of the circuit is linearly related to the input current I P of the P and N pins of the DAC output, and thus the circuit can realize the function of direct current coupling output. DACP DACN

[0109] Due to the negative feedback of the CMFB module, U P + U N = 0. According to equation 4, V B3 must be a negative voltage. The fine adjustment of the output common mode voltage can be realized by fine adjustment of I B or V B3 . In the circuit of the embodiment of the present application, the CMFB module realizes the output common mode voltage of zero by fine adjustment of I B .

[0110] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.​​

Claims

1. A DAC DC-coupled output circuit, characterized in that, This includes clamping circuits, current source circuits, voltage biasing circuits, and impedance matching circuits; The input terminal of the clamping circuit is connected to the output terminal of the DAC. The output terminal of the clamping circuit is connected in parallel with the output terminal of the current source circuit and then connected to the input terminal of the voltage bias circuit. The output terminal of the voltage bias circuit is connected to the output terminal of the DC-coupled output circuit of the DAC through the impedance matching circuit. The clamping circuit is used to clamp the output voltage of the DAC to the compliance voltage of the DAC, and the clamping circuit is also used to transmit the high-frequency signal output by the DAC; The current source circuit is used to generate and output a bias current. The voltage bias circuit is used to transmit the DC coupling current after the high-frequency signal is coupled with the bias current, and to generate a bias voltage corresponding to the DC coupling current. The impedance matching circuit is used to perform impedance matching on the output terminal of the DAC DC-coupled output circuit and output the DC-coupled current transmitted by the voltage bias circuit to the output terminal of the DAC DC-coupled output circuit.

2. The DAC DC-coupled output circuit according to claim 1, characterized in that, It also includes a CMFB module, which is used to adjust the bias current generated by the current source circuit so that the common-mode voltage output by the DAC DC-coupled output circuit is 0.

3. The DAC DC-coupled output circuit according to claim 1, characterized in that, The clamping circuit includes at least one transistor group, and each transistor group includes a first transistor and a second transistor. The first transistor of each transistor group is connected in series with the first line of the clamping circuit through its first and second pins, and the second transistor of each transistor group is connected in series with the second line of the clamping circuit through its first and second pins. The third pins of the first transistor and the second transistor of each transistor group are connected to the auxiliary voltage source corresponding to this transistor group. The input terminal of the first line of the clamping circuit is connected to the first terminal of the input terminal of the clamping circuit, and the input terminal of the second line of the clamping circuit is connected to the second terminal of the input terminal of the clamping circuit; the output terminal of the first line of the clamping circuit is connected to the first terminal of the output terminal of the clamping circuit, and the output terminal of the second line of the clamping circuit is connected to the second terminal of the output terminal of the clamping circuit. The first terminal of the input of the clamping circuit is connected to the first terminal of the output of the DAC, and the second terminal of the input of the clamping circuit is connected to the second terminal of the output of the DAC.

4. The DAC DC-coupled output circuit according to claim 3, characterized in that, The first transistor is a bipolar transistor or a field-effect transistor, the second transistor is a bipolar transistor or a field-effect transistor, and the first transistor and the second transistor in each transistor group are of the same type.

5. The DAC DC-coupled output circuit according to claim 3, characterized in that, The voltage bias circuit includes a first voltage bias line and a second voltage bias line; The input terminal of the first voltage bias line is connected to the first terminal of the input terminal of the voltage bias circuit, and the input terminal of the second voltage bias line is connected to the second terminal of the input terminal of the voltage bias circuit. The output terminal of the first voltage bias line is connected to the first terminal of the output terminal of the voltage bias circuit, and the output terminal of the second voltage bias line is connected to the second terminal of the output terminal of the voltage bias circuit. The first terminal of the input of the voltage bias circuit is connected to the first terminal of the output of the clamping circuit, and the second terminal of the input of the voltage bias circuit is connected to the second terminal of the output of the clamping circuit. The first voltage bias line includes one or more bias devices connected in series, and the second voltage bias line includes one or more bias devices connected in series. The biasing device is a forward-biased PN junction or a reverse-biased Zener diode.

6. The DAC DC-coupled output circuit according to claim 3, characterized in that, The current source circuit includes a voltage source, a first adjustable current source, and a second adjustable current source. The first output terminal of the voltage source is connected to the input terminal of the first adjustable current source, and the output terminal of the first adjustable current source is connected to the first terminal of the output terminal of the current source circuit; the second output terminal of the voltage source is connected to the input terminal of the second adjustable current source, and the output terminal of the second adjustable current source is connected to the second terminal of the output terminal of the current source circuit. The first terminal of the current source circuit is connected to the first terminal of the output of the clamping circuit, and the second terminal of the current source circuit is connected to the second terminal of the output of the clamping circuit.

7. The DAC DC-coupled output circuit according to claim 6, characterized in that, The current source circuit further includes a first inductor and a second inductor; the output terminal of the first adjustable current source is connected to the first terminal of the output terminal of the current source circuit through the first inductor, and the output terminal of the second adjustable current source is connected to the second terminal of the output terminal of the current source circuit through the second inductor.

8. The DAC DC-coupled output circuit according to claim 1, characterized in that, The impedance matching circuit includes a bias voltage source, a first impedance matching line, and a second impedance matching line; the first impedance matching line includes a first resistor, and the second impedance matching line includes a second resistor. The input terminal of the first impedance matching line is connected to the first terminal of the input terminal of the impedance matching circuit, the output terminal of the first impedance matching line is connected to the first terminal of the output terminal of the impedance matching circuit, and the connection node between the input terminal and the output terminal of the first impedance matching line is connected to the first output terminal of the bias voltage source through the first resistor. The input terminal of the second impedance matching line is connected to the second terminal of the input terminal of the impedance matching circuit, and the output terminal of the second impedance matching line is connected to the second terminal of the output terminal of the impedance matching circuit. The connection node between the input terminal and the output terminal of the second impedance matching line is connected to the second output terminal of the bias voltage source through the second resistor. The first terminal of the output of the impedance matching circuit is connected to the first terminal of the output of the DAC DC-coupled output circuit, and the second terminal of the output of the impedance matching circuit is connected to the second terminal of the output of the DAC DC-coupled output circuit.

9. The DAC DC-coupled output circuit according to claim 8, characterized in that, The first impedance matching line further includes a first impedance matching module, and the second impedance matching line further includes a second impedance matching module. The connection node between the input terminal of the first impedance matching line and the first resistor is connected to the first terminal of the output terminal of the impedance matching circuit through the first impedance matching module. The connection node between the input terminal of the second impedance matching line and the second resistor is connected to the first terminal of the output terminal of the impedance matching circuit through the second impedance matching module.

10. The DAC DC-coupled output circuit according to claim 1, characterized in that, The voltage across the voltage bias circuit is greater than the compliance voltage of the DAC, but less than the voltage of the voltage source in the current source circuit.

Images