Image Histogram Generation Method, Apparatus, Electronic Device, and Storage Medium

By adopting time division multiplexing on single-port RAM, and the odd and even pixel points are processed separately, the problem of large power consumption in image histogram generation is solved, and image histogram generation with low power consumption and low complexity is achieved.

CN114862659BActive Publication Date: 2025-07-25VIVO MOBILE COMM CO LTD
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Patent Information

Application Number
CN202210392957.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-04-14
Publication Date
2025-07-25
Estimated Expiration
2042-04-14

AI Technical Summary

Technical Problem

The prior art has a problem of large power consumption when generating image histograms, resulting in a large chip area occupancy.

Method used

Using time division multiplexing, a statistical value with odd numbers of pixel points in an image frame is written in a single-port RAM, and a statistical value with even numbers of pixel points in another single-port RAM is written in a single-port RAM to generate an image histogram.

Benefits of technology

This reduces power consumption during image histogram generation process, reduces chip area usage, and reduces the complexity of solution design.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application provides an image histogram generation method, apparatus, electronic device, and storage medium. The method includes: when target image data is acquired, performing separated sampling on each image frame in the target image data to obtain at least one first pixel point and at least one second pixel point corresponding to the image frame; the first pixel point is a pixel point with an odd number of bits on the image frame, and the second pixel point is a pixel point with an even number of bits on the image frame; writing a first statistical value of each first pixel point into a first memory based on a first read / write operation, and writing a second statistical value of each second pixel point into a second memory based on a second read / write operation; both the first read / write operation and the second read / write operation are time-division multiplexed read / write operations, and both the first memory and the second memory are single-port random access memories; obtaining an image histogram corresponding to the target image data based on the first statistical value and the second statistical value.
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Description

Technical Field

[0001] This application belongs to the field of image processing, and particularly relates to an image histogram generation method, apparatus, electronic device, and storage medium. Background Art

[0002] An image histogram is a basic piece of information about an image. The image histogram can represent the distribution of pixel values in the image, and the image histogram is widely used in aspects such as image enhancement, image segmentation, and image matching. In the process of processing an image, the generation of the image histogram is involved.

[0003] Currently, the statistics of the image histogram are usually performed through a dual-port random access memory (RAM) on a chip. However, the above dual-port RAM occupies a large area on the chip, resulting in high power consumption. Summary of the Invention

[0004] The purpose of the embodiments of this application is to provide an image histogram generation method, apparatus, electronic device, and storage medium, which can solve the problem of high power consumption in the process of generating an image histogram.

[0005] In a first aspect, the embodiments of this application provide an image histogram generation method, which includes:

[0006] When the target image data is acquired, perform separate sampling on each image frame in the target image data to obtain at least one first pixel point and at least one second pixel point corresponding to the image frame; the first pixel point is a pixel point with an odd number of bits among the pixel points on the image frame, and the second pixel point is a pixel point with an even number of bits among the pixel points on the image frame;

[0007] Write the first statistical value of each first pixel point into a first memory based on a first read / write operation, and write the second statistical value of each second pixel point into a second memory based on a second read / write operation; both the first read / write operation and the second read / write operation are time-division multiplexed read / write operations, and both the first memory and the second memory are single-port random access memories;

[0008] Based on the first statistical value and the second statistical value, obtain the image histogram corresponding to the target image data.

[0009] In a second aspect, the embodiments of this application provide an image histogram generation apparatus, which includes:

[0010] A sampling module, configured to, when obtaining target image data, perform separate sampling on each image frame in the target image data to obtain at least one first pixel point and at least one second pixel point corresponding to the image frame; the first pixel point is a pixel point with an odd number of bits on the image frame, and the second pixel point is a pixel point with an even number of bits on the image frame;

[0011] A first processing module, configured to write a first statistical value of each first pixel point into a first memory based on a first read / write operation, and write a second statistical value of each second pixel point into a second memory based on a second read / write operation; both the first read / write operation and the second read / write operation are time-division multiplexed read / write operations, and both the first memory and the second memory are single-port random access memories;

[0012] A second processing module, configured to obtain an image histogram corresponding to the target image data based on the first statistical value and the second statistical value.

[0013] In a third aspect, an embodiment of the present application provides an electronic device, which includes a processor, a memory, and a program or instruction stored on the memory and executable on the processor. When the program or instruction is executed by the processor, the steps of the method described in the first aspect are implemented.

[0014] In a fourth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the method described in the first aspect are implemented.

[0015] In a fifth aspect, an embodiment of the present application provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor, and the processor is configured to run a program or instruction to implement the method described in the first aspect.

[0016] In a sixth aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the method described in the first aspect.

[0017] In the embodiments of the present application, based on time-division multiplexed read / write operations, the statistical value of pixel points with an odd number of bits in an image frame is written on one single-port RAM, and the statistical value of pixel points with an even number of bits in the image frame is written on another single-port RAM, so as to obtain the image histogram of the image data. During the statistical process of the above image histogram, only single-port RAMs with a smaller chip area occupation and lower operating power consumption are used, thereby reducing the power consumption generated during the generation of the image histogram and also reducing the complexity of the scheme design. Description of the Drawings

[0018] Figure 1 is the flowchart of the image histogram generation method provided by the embodiments of the present application;

[0019] Figure 2 is one of the application scenario diagrams of the image histogram generation method provided by the embodiments of the present application;

[0020] Figure 3 is the second application scenario diagram of the image histogram generation method provided by the embodiments of the present application;

[0021] Figure 4 is the third application scenario diagram of the image histogram generation method provided by the embodiments of the present application;

[0022] Figure 5 is the fourth application scenario diagram of the image histogram generation method provided by the embodiments of the present application;

[0023] Figure 6 is the fifth application scenario diagram of the image histogram generation method provided by the embodiments of the present application;

[0024] Figure 7 is the application flowchart of the image histogram generation method provided by the embodiments of the present application;

[0025] Figure 8 is the structural diagram of the image histogram generation device provided by the embodiments of the present application;

[0026] Figure 9 is the structural diagram of the electronic device provided by the embodiments of the present application;

[0027] Figure 10 is the hardware structural diagram of the electronic device provided by the embodiments of the present application. Detailed implementation manners

[0028] Next, the technical solutions in the embodiments of the present application will be clearly described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application belong to the scope of protection of the present application.

[0029] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0030] The image histogram statistics method provided by the embodiment of the present application is described in detail below through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0031] See also Figure 1 , Figure 1 : is a flow chart of the image histogram statistics method provided in the embodiment of the present application. The image histogram statistics method provided in the embodiment of the present application comprises the following steps:

[0032] S101, when target image data is acquired, separate sampling is performed on each image frame in the target image data to obtain at least one first pixel point and at least one second pixel point corresponding to the image frame.

[0033] The image histogram generation method provided in the embodiment of the present application is applied to an image histogram generation device, and the above-mentioned target image data can be image data received by the image histogram generation device, or can be image data acquired by the image histogram generation device.

[0034] In this step, when the target image data is acquired, the target image data is subjected to an odd-even separation downsampling process, that is, according to the odd and even pixel positions of each row of pixels in the image frame, the first pixel and the second pixel corresponding to the image frame are obtained, wherein the first pixel is a pixel with an odd number of pixel bits on the image frame, and the second pixel is a pixel with an even number of pixel bits on the image frame. The image frame can be divided into an odd-numbered point data path and an even-numbered point data path through the above-mentioned odd-even separation downsampling process, wherein the above-mentioned odd-numbered point data path includes the pixel value data of all the first pixel points, and the above-mentioned even-numbered point data path includes the pixel value data of all the second pixel points.

[0035] See also Figure 2 ,like Figure 2As shown, assuming that a row in an image frame includes 4 pixel points, after separating and sampling the image frame, the clock interval between adjacent pixel points in the odd-point data path and the even-point data path obtained is greater than or equal to 1 clock cycle. Here, 1 clock cycle can be understood as a processing cycle of a single-port RAM.

[0036] It should be understood that if the target image data is continuously input to the image histogram generation device, the clock interval between adjacent pixel points in each of the above data paths is 1 clock cycle. If the target image data is discretely input to the image histogram generation device, the clock interval between adjacent pixel points in each of the above data paths is greater than 1 clock cycle.

[0037] S102, write the first statistical value of each first pixel point into the first memory based on the first read / write operation, and write the second statistical value of each second pixel point into the second memory based on the second read / write operation.

[0038] The image histogram generation device includes 2 single-port RAMs. One single-port RAM is called the first memory, and the other single-port RAM is called the second memory. Generally, the power consumption of 2 single-port RAMs is less than that of 1 dual-port RAM. And the design complexity of the solution using a single-port RAM is lower than that of the solution using a dual-port RAM.

[0039] In this step, after obtaining the first pixel points and the second pixel points corresponding to the image frame, based on the first read / write operation, the first statistical value of each first pixel point can be written into the first memory, that is, all the first statistical values included in the odd-point data path are written into the first memory.

[0040] Based on the second read / write operation, the second statistical value of each second pixel point can be written into the second memory, that is, all the second statistical values included in the even-point data path are written into the second memory. In this way, the first memory stores half of the image histogram statistical results of the image frame, and the second memory stores the other half of the image histogram statistical results of the image frame.

[0041] For the specific implementation manners of how to write the first statistical value into the first memory and the second statistical value into the second memory, please refer to the subsequent embodiments.

[0042] It should be understood that the above statistical value can be the gray value, brightness value or chroma value of the pixel point. The specific type of the statistical value is related to the type of the image histogram. For example, when the type of the image histogram is a gray-scale image histogram, the above statistical value is set as the gray value of the pixel point. It should be understood that the above first read / write operation and second read / write operation are both time-division multiplexed read / write operations.

[0043] It should be understood that when the height of the image represented by the image frame is H, the width is W, and the data bit width is N, the width of the above single-port RAM is set to log2(H*W / 2), and the depth is 2^N.

[0044] S103. Based on the first statistical value and the second statistical value, obtain the image histogram corresponding to the target image data.

[0045] In this step, after writing the first statistical values of all the first pixel points into the first memory and the second statistical values of all the second pixel points into the second memory, the image histogram corresponding to the target image data can be obtained based on the image histogram statistical results stored in the first memory and the image histogram statistical results stored in the second memory. Optionally, the image histogram statistical results stored in the first memory and the image histogram statistical results stored in the second memory can be combined to obtain the image histogram corresponding to the target image data.

[0046] In the embodiment of the present application, based on the time-division multiplexed read and write operations, the statistical values of the pixel points with an odd number of bits in the image frame are written into one single-port RAM, and the statistical values of the pixel points with an even number of bits in the image frame are written into another single-port RAM, so as to obtain the image histogram of the image data. In the above statistical process of the image histogram, only the single-port RAM with a smaller chip area occupation and lower operating power consumption is used, thereby reducing the power consumption generated in the process of generating the image histogram and also reducing the complexity of the scheme design.

[0047] Hereinafter, a specific description will be given on how to write the first statistical value into the first memory:

[0048] Optionally, the writing of the first statistical value of each first pixel point into the first memory based on the first read and write operation includes:

[0049] In the first clock cycle, read the first statistical value of the first first pixel point, and every N clock cycles, read the first statistical value of a first pixel point in the arrangement order of each first pixel point on the image frame;

[0050] In the first target clock cycle, write the first statistical value of the first first pixel point into the first memory, and every N clock cycles, write the first statistical value of a first pixel point into the first memory.

[0051] In this embodiment, in the first clock cycle of the first memory, the first statistical value of the first first pixel is read, and every N clock cycles, the first statistical value of a first pixel is read, where N is a positive integer greater than or equal to 1. It should be understood that if the target image data is continuously input into the image histogram generation device, the value of N above is 1; if the target image data is discretely input into the image histogram generation device, the value of N above is related to the time when the image histogram generation device obtains the target image data. That is to say, when N is 1, in the third clock cycle, the first statistical value of the second first pixel is read, and in the fifth clock cycle, the first statistical value of the third first pixel is read. Among them, the above arrangement order can be from left to right or from right to left for each row of pixel points, and no specific limitation is made here.

[0052] In this embodiment, in the first target clock cycle of the first memory, the first statistical value of the first first pixel is written. Among them, the above first target clock cycle is the clock cycle after the first statistical value of the second first pixel is read. In an actual application scenario, the above first target clock cycle can be understood as the fourth clock cycle.

[0053] Every N clock cycles, the first statistical value of a first pixel is written. That is to say, when N is 1, in the sixth clock cycle, the first statistical value of the third first pixel is written, and in the eighth clock cycle, the first statistical value of the fourth first pixel is written.

[0054] As described above, since the first pixel is a pixel with an odd number of bits in the image frame, the first first pixel is the first pixel of the image frame, and the second first pixel is the third pixel of the image frame.

[0055] For easy understanding, please refer to Figure 3 As Figure 3 shown, Figure 3 shows an application scenario where N is 1, and in the application scenario shown in Figure 3 the image frame includes 960 first pixels. Among them, Figure 3"data0" in it represents the first first pixel point, "data2" represents the second first pixel point, and "data1918" represents the last first pixel point. The first memory performs a read operation on the first first pixel point in the first clock cycle, that is, reads the first statistical value of the first first pixel point, does not perform a write operation in the second clock cycle, and performs a read operation in the third clock cycle, that is, reads the first statistical value of the second first pixel point. Subsequently, a read operation is performed every other clock cycle to read the first statistical value of the corresponding first pixel point. The first memory performs a write operation in the fourth clock cycle, that is, writes the first statistical value of the second first pixel point. Subsequently, a write operation is performed every other clock cycle to write the first statistical value of the corresponding first pixel point.

[0056] In this embodiment, through the first read and write operation based on time division multiplexing, the statistical values of the pixel points with an odd number of bits in the image frame are written on the first memory, and partial statistical results of the image histogram are stored on the first memory, thereby obtaining the image histogram of the image data.

[0057] Optionally, the writing of the second statistical value of each second pixel point in the second memory based on the second read and write operation includes:

[0058] In the first clock cycle, read the second statistical value of the first second pixel point, and read the second statistical value of a second pixel point every other M clock cycles;

[0059] In the second target clock cycle, write the second statistical value of the first second pixel point in the second memory, and write the second statistical value of a second pixel point in the second memory every other M clock cycles.

[0060] In the first clock cycle of the second memory in this embodiment, read the second statistical value of the first second pixel point, and read the second statistical value of a second pixel point every other M clock cycles, where M is a positive integer greater than or equal to 1. It should be understood that if the target image data is continuously input into the image histogram generation device, the value of M above is 1; if the target image data is discretely input into the image histogram generation device, the value of M above is related to the time when the image histogram generation device obtains the target image data. That is to say, in the case where M is 1, in the third clock cycle, read the second statistical value of the second second pixel point, and in the fifth clock cycle, read the second statistical value of the third second pixel point.

[0061] In this embodiment, in the second target clock cycle of the second memory, the second statistical value of the first second pixel is written. The second target clock cycle is the clock cycle after reading the second statistical value of the second second pixel. In an actual application scenario, the second target clock cycle can be understood as the fourth clock cycle.

[0062] Every M clock cycles, the second statistical value of a second pixel is written. That is, when M is 1, in the sixth clock cycle, the second statistical value of the third second pixel is written, and in the eighth clock cycle, the second statistical value of the fourth second pixel is written.

[0063] As described above, since the second pixel is a pixel with an even number of bits in the image frame, the first second pixel is the second pixel of the image frame, and the second second pixel is the fourth pixel of the image frame.

[0064] In this embodiment, through the second read / write operation based on time-division multiplexing, the statistical values of the pixels with an even number of bits in the image frame are written on the second memory, and part of the statistical results of the image histogram are stored on the second memory, thereby obtaining the image histogram of the image data.

[0065] Optionally, after obtaining the image histogram corresponding to the target image data, the method further includes:

[0066] When a read instruction is received, writing the image histogram into a third memory;

[0067] When the entire image histogram is written into the third memory, reading the image histogram from the third memory to perform image processing on the target image data.

[0068] The image histogram statistical device in this embodiment further includes a third memory, which is a single-port random access memory. In this embodiment, after all the first statistical values corresponding to the first pixels are written in the first memory and all the second statistical values corresponding to the second pixels are written in the second memory to obtain the image histogram, the image histogram can be written into the third memory.

[0069] The above read instruction can be an instruction input by a user to the image histogram device, and the above read instruction is used to represent reading the image histogram written in the third memory. In this embodiment, when the image histogram device receives the read instruction, the third memory performs a write operation to write the image histogram. Specifically, the first statistical value written in the first memory and the second statistical value written in the second memory are merged to generate an image histogram, and the image histogram is written into the third memory. When all of the image histogram is written into the third memory, a software read operation is performed, that is, the image histogram is read from the third memory, so that the application software installed on the image histogram statistical device performs subsequent image processing on the target image data according to the read image histogram.

[0070] For ease of understanding, please refer to Figure 4 , as Figure 4 shown, in the first K clock cycles of the third memory, a "cache write operation" is performed, that is, the image histogram is written into the third memory; after the Kth clock cycle, a "software read operation" is performed, that is, the application software reads the image histogram written into the third memory until, at the 2^(K + 1)th clock cycle, the application software reads all of the image histogram. Wherein, K is a positive integer.

[0071] In this embodiment, the image histogram statistical result is cached using a single-port RAM, and the application software can read all of the image histogram from the single-port RAM after all of the image histogram is cached in the single-port RAM, so that the software can read the image histogram in a more flexible manner.

[0072] Optionally, after obtaining the image histogram corresponding to the target image data, the method further includes:

[0073] When receiving the read instruction, writing the image histogram into the third memory;

[0074] During the process of writing the image histogram into the third memory, every other clock cycle, reading the image histogram data that has been written from the third memory to perform image processing on the target image data.

[0075] The above read instruction can be an instruction input by a user to the image histogram device, and the above read instruction is used to represent reading the image histogram written in the third memory. Wherein, the third memory is a single-port random access memory.

[0076] In this embodiment, when the image histogram device receives a read command, based on the time-division multiplexing read-write method, the image histogram is written into the third memory, and the software is controlled to read the written image histogram data from the third memory, so that the application software installed on the image histogram statistical device performs subsequent image processing on the target image data according to the read image histogram.

[0077] For easy understanding, please refer to Figure 5 , as Figure 5 shown, in the first clock cycle of the third memory, the image histogram data is written, and every other clock cycle, a "cache write operation" is performed, that is, the image histogram data is written; in the second clock cycle of the third memory, a "software read operation" is performed, that is, the image histogram data written into the third memory is read, until in the 2^(K + 1)th clock cycle of the third memory, the application software reads all the image histograms.

[0078] In this embodiment, the time-division multiplexing read-write method is used to write the image histogram into the third memory, and the software is controlled to read the written image histogram data from the third memory, so that the software can read the image histogram in a more flexible way.

[0079] Optionally, before separating and sampling each image frame in the target image data, the method includes:

[0080] Adjust the working state of the register associated with the image histogram corresponding to the image frame to the first state;

[0081] After writing the first statistical value of each first pixel point into the first memory based on the first read-write operation and writing the second statistical value of each second pixel point into the second memory based on the second read-write operation, the method includes:

[0082] Adjust the working state of the register associated with the image histogram corresponding to the image frame to the second state.

[0083] In the related art, after obtaining an image frame, the dual-port RAM first occupies a large number of clock cycles for zero-writing processing. For example, when each row of pixels in the image frame includes 1024 pixel points, 0 needs to be written at 1024 flag positions in the dual-port RAM. After each pixel point statistical value is read from the dual-port RAM, the flag position corresponding to the pixel point is set to 1. In this way, since the dual-port RAM needs to consume a large number of clock cycles for zero-writing processing, the efficiency of image histogram statistics is reduced.

[0084] The image histogram statistical device applied in this embodiment further includes a register. The above register can be a statistical clear flag register. The above register is a single-bit register, and the number of the above registers is the same as the brightness range or gray level of the image frame. For example, for an image with a data bit width of K bits, the number of registers is set to 2^K. Optionally, the above register can be referred to as the first register.

[0085] In this embodiment, before separating and sampling the image frame, it is necessary to clear the register associated with the image histogram corresponding to the image frame, that is, adjust the working state of the register to the first state. Optionally, the register can be set to 0. It should be understood that when the register is in the first state, it means that the statistical value in the image histogram associated with the register has not been read by the single-port RAM.

[0086] In this embodiment, after reading the statistical value of the pixel point, the register associated with the image histogram corresponding to the image frame is adjusted to the second state. Among them, when the register is in the second state, it means that the statistical value of the image histogram associated with the register has been read by the single-port RAM. Optionally, the register can be set to 1. It should be understood that after reading the first statistical value of each first pixel point and the second statistical value corresponding to the second pixel point, the working state of each register is the second state.

[0087] In this embodiment, a register associated with the image histogram corresponding to the image frame is provided. In this way, during the process of using the single-port RAM to read the statistical value, the working state of the register is used to represent the reading state of the statistical value of the associated image histogram, and there is no need to write zero to the flag position of the single-port RAM, thereby improving the efficiency of image histogram statistics.

[0088] Optionally, the image histogram statistical device applied in this embodiment further includes a temporary register. Optionally, the number of the above temporary registers is 1. During the process of the single-port RAM performing read and write operations on the target pixel point, the temporary register corresponding to the target pixel point is used to cache the statistical information of the previous pixel point. The above statistical information includes the statistical value and the address information, where the above previous pixel point is the pixel point associated with the most recent read and write operation performed by the single-port RAM. According to the address information of the previous pixel point and the address information of the target pixel point, it is judged whether the target pixel point and the previous pixel point are the same pixel point, so as to determine whether the single-port RAM has read the statistical value of the target pixel point. If the target pixel point and the previous pixel point are the same pixel point, the single-port RAM does not perform read and write operations; if the target pixel point and the previous pixel point are not the same pixel point, the single-port RAM performs read and write operations on the target pixel point.

[0089] For the convenience of understanding the overall technical solution, please refer to Figure 6 and Figure 7 , asFigure 6 As shown in Figure 6 , the image histogram statistics device includes 4 modules, namely a read-write control module, a statistics module, and a cache module. Figure 7 Shown is a schematic diagram of the working process of each module. The device performs odd-even separation downsampling operations and synchronously performs a clearing operation to obtain odd and even pixel points corresponding to the image frame. The above-mentioned read-write control module performs histogram statistics read-write operations. Specifically, each single-port RAM performs read-write operations based on time-division multiplexing, that is, it performs a read operation in one clock cycle and a write operation in one clock cycle. The above-mentioned statistics module is used to perform histogram statistics. Specifically, one single-port RAM writes the statistical values of odd pixel points to obtain the histogram statistics result of half a frame, and the other single-port RAM writes the statistical values of even pixel points to obtain the histogram statistics result of half a frame. The above-mentioned cache module is used to cache the image histogram, writes the image histogram to the single-port RAM, and responds to the read operation of the software to read the written image histogram from the single-port RAM.

[0090] Next, in conjunction with the accompanying drawings, the image histogram generation device provided by the embodiments of the present application will be described in detail through specific embodiments and their application scenarios.

[0091] As Figure 8 shown, the image histogram generation device 800 includes:

[0092] A sampling module 801, configured to, when obtaining target image data, perform separation sampling on each image frame in the target image data to obtain at least one first pixel point and at least one second pixel point corresponding to the image frame;

[0093] A first processing module 802, configured to write the first statistical value of each first pixel point into a first memory based on a first read-write operation, and write the second statistical value of each second pixel point into a second memory based on a second read-write operation;

[0094] A second processing module 803, configured to obtain an image histogram corresponding to the target image data based on the first statistical value and the second statistical value.

[0095] Optionally, the first processing module 802 is specifically configured to:

[0096] In the first clock cycle, read the first statistical value of the first first pixel point, and every N clock cycles, read the first statistical value of a first pixel point in the arrangement order of each first pixel point on the image frame;

[0097] In the first target clock cycle, write the first statistical value of the first first pixel point into the first memory, and every N clock cycles, write the first statistical value of a first pixel point into the first memory.

[0098] Optionally, the first processing module 802 is further specifically configured to:

[0099] In the first clock cycle, read the second statistical value of the first second pixel point, and every M clock cycles, read the second statistical value of a second pixel point in the arrangement order of each second pixel point on the image frame;

[0100] In the second target clock cycle, write the second statistical value of the first second pixel point into the second memory, and every M clock cycles, write the second statistical value of a second pixel point into the second memory.

[0101] Optionally, the image histogram generation device 800 further includes:

[0102] A first writing module, configured to write the image histogram into a third memory when receiving a read instruction;

[0103] A first reading module, configured to read the image histogram from the third memory when the entire image histogram is written into the third memory, so as to perform image processing on the target image data.

[0104] Optionally, the image histogram generation device 800 further includes:

[0105] A second writing module, configured to write the image histogram into a third memory when receiving a read instruction;

[0106] A second reading module, configured to read the written image histogram data from the third memory every other clock cycle during the process of writing the image histogram into the third memory, so as to perform image processing on the target image data.

[0107] Optionally, the image histogram generation device 800 further includes:

[0108] A first adjustment module, configured to adjust the working state of the register associated with the image histogram corresponding to the image frame to a first state;

[0109] A second adjustment module, configured to adjust the working state of the register associated with the image histogram corresponding to the image frame to a second state.

[0110] In the embodiments of the present application, based on the time-division multiplexing read-write operation, the statistical values of the pixels with an odd number of bits in the image frame are written on one single-port RAM, and the statistical values of the pixels with an even number of bits in the image frame are written on another single-port RAM, so as to obtain the image histogram of the image data. During the statistical process of the above image histogram, only the single-port RAM with a small chip area occupation and low operating power consumption is used, thereby reducing the power consumption generated during the generation of the image histogram and also reducing the complexity of the solution design.

[0111] The image histogram generation device in the embodiments of the present application can be an electronic device or a component in an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices other than the terminal. Exemplarily, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a handheld computer, an in-vehicle electronic device, a Mobile Internet Device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a personal digital assistant (PDA), etc., and can also be a server, a Network Attached Storage (NAS), a personal computer (PC), a television (TV), a teller machine or a self-service machine, etc. The embodiments of the present application do not make specific limitations.

[0112] The image histogram generation device in the embodiments of the present application can be a device with an operating system. The operating system can be an Android operating system, an iOS operating system, or other possible operating systems. The embodiments of the present application do not make specific limitations.

[0113] The image histogram generation device provided by the embodiments of the present application can implement Figure 1 each process implemented by the method embodiments. To avoid repetition, it will not be elaborated here.

[0114] Optionally, as Figure 9As shown in the figure, an embodiment of the present application further provides an electronic device 900, including a processor 901, a memory 902, a program or instruction stored on the memory 902 and executable on the processor 901. When the program or instruction is executed by the processor 901, it implements each process of the above-mentioned embodiment of the image histogram generation method and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0115] It should be noted that the electronic device in the embodiment of the present application includes the above-mentioned mobile electronic device and non-mobile electronic device.

[0116] Figure 10 It is a schematic diagram of the hardware structure of an electronic device for implementing an embodiment of the present application.

[0117] The electronic device 1000 includes but is not limited to: a radio frequency unit 1001, a network module 1002, an audio output unit 1003, an input unit 1004, a sensor 1005, a display unit 1006, a user input unit 1007, an interface unit 1008, a memory 1009, and a processor 1010 and other components.

[0118] Those skilled in the art can understand that the electronic device 1000 may further include a power supply (such as a battery) for supplying power to each component. The power supply can be logically connected to the processor 1010 through a power management system, so as to realize functions such as management of charging, discharging, and power consumption management through the power management system. Figure 10 The structure of the electronic device shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or have different component arrangements, which will not be elaborated here.

[0119] Among them, the processor 1010 is further configured to, when obtaining the target image data, perform separation sampling on each image frame in the target image data to obtain at least one first pixel point and at least one second pixel point corresponding to the image frame;

[0120] Write the first statistical value of each first pixel point into the first memory based on the first read / write operation, and write the second statistical value of each second pixel point into the second memory based on the second read / write operation;

[0121] Based on the first statistical value and the second statistical value, obtain the image histogram corresponding to the target image data.

[0122] Among them, the processor 1010 is further configured to, in the first clock cycle, read the first statistical value of the first first pixel point, and every N clock cycles, read the first statistical value of a first pixel point in the arrangement order of each first pixel point on the image frame;

[0123] In the first target clock cycle, write the first statistical value of the first first pixel point into the first memory, and write the first statistical value of one first pixel point into the first memory every N clock cycles.

[0124] Wherein, the processor 1010 is further configured to, in the first clock cycle, read the second statistical value of the first second pixel point, and read the second statistical value of one second pixel point every M clock cycles according to the arrangement order of each second pixel point on the image frame;

[0125] In the second target clock cycle, write the second statistical value of the first second pixel point into the second memory, and write the second statistical value of one second pixel point into the second memory every M clock cycles.

[0126] Wherein, the processor 1010 is further configured to, when receiving a read instruction, write the image histogram into the third memory;

[0127] When all of the image histogram is written into the third memory, read the image histogram from the third memory to perform image processing on the target image data.

[0128] Wherein, the processor 1010 is further configured to, when receiving a read instruction, write the image histogram into the third memory;

[0129] During the process of writing the image histogram into the third memory, read the written image histogram data from the third memory every other clock cycle to perform image processing on the target image data.

[0130] Wherein, the processor 1010 is further configured to adjust the working state of the register associated with the image histogram corresponding to the image frame to the first state;

[0131] Adjust the working state of the register associated with the image histogram corresponding to the image frame to the second state.

[0132] In the embodiment of the present application, based on the time-division multiplexed read and write operations, the statistical values of the pixel points with an odd number of bits in the image frame are written on one single-port RAM, and the statistical values of the pixel points with an even number of bits in the image frame are written on another single-port RAM, so as to obtain the image histogram of the image data. During the above statistical process of the image histogram, only the single-port RAM with a smaller chip area occupation and lower operating power consumption is used, thereby reducing the power consumption generated during the generation of the image histogram and also reducing the complexity of the scheme design.

[0133] It should be understood that in the embodiments of the present application, the input unit 1004 may include a Graphics Processing Unit (GPU) 10041 and a microphone 10042. The GPU 10041 processes the image data of static pictures or videos obtained by an image capturing device (such as a camera) in a video capturing mode or an image capturing mode. The display unit 1006 may include a display panel 10061, and the display panel 10071 may be configured in the form of, for example, a liquid crystal display, an organic light emitting diode, etc. The user input unit 1007 includes at least one of a touch panel 10071 and other input devices 10072. The touch panel 10071 is also referred to as a touch screen. The touch panel 10071 may include two parts: a touch detection device and a touch controller. The other input devices 10072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, power on / off keys, etc.), a trackball, a mouse, a joystick, which will not be elaborated herein.

[0134] The memory 1009 can be used to store software programs and various data. The memory 1009 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data. Among them, the first storage area can store an operating system, application programs or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 1009 can include volatile memory or non-volatile memory, or the memory 1009 can include both volatile and non-volatile memory. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDR SDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synch link dynamic random access memory (SLDRAM), and a direct rambus random access memory (DRRAM). The memory 1009 in the embodiments of the present application includes but is not limited to these and any other suitable types of memory.

[0135] The processor 1010 may include one or more processing units; optionally, the processor 1010 integrates an application processor and a modem processor. Among them, the application processor mainly processes operations related to the operating system, user interface, and application programs, etc., and the modem processor mainly processes wireless communication signals, such as a baseband processor. It can be understood that the above modem processor may not be integrated into the processor 1010 either.

[0136] The embodiments of the present application also provide a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, it implements each process of the above embodiments of the image histogram generation method and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0137] Among them, the processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media such as computer read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs, etc.

[0138] Another embodiment of the present application provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement each process of the above embodiment of the image histogram generation method, and can achieve the same technical effects. To avoid repetition, it will not be elaborated here.

[0139] It should be understood that the chip mentioned in the embodiments of the present application may also be referred to as a system-on-chip, system chip, chip system, or system-on-chip, etc.

[0140] The embodiments of the present application provide a computer program product. The program product is stored in a storage medium. The program product is executed by at least one processor to implement each process of the above embodiment of the image histogram generation method, and can achieve the same technical effects. To avoid repetition, it will not be elaborated here.

[0141] It should be noted that in this article, the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including one..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed. It may also include performing functions in a substantially simultaneous manner or in a reverse order according to the functions involved. For example, the described methods may be performed in an order different from that described, and various steps may be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0142] Through the description of the above embodiments, those skilled in the art can clearly understand that the above-described example methods can be implemented by means of software plus a necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. The computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions for causing a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in various embodiments of the present application.

[0143] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present application, those of ordinary skill in the art can also make many forms without departing from the purpose of the present application and the scope protected by the claims, and all of them fall within the protection scope of the present application.

Claims

1. An image histogram generation method, characterized in that, Including: When the target image data is obtained, perform separated sampling on each image frame in the target image data to obtain at least one first pixel point and at least one second pixel point corresponding to the image frame; the first pixel point is a pixel point with an odd number of bits on the image frame, and the second pixel point is a pixel point with an even number of bits on the image frame; Write the first statistical value of each first pixel point into the first memory based on the first read / write operation, and write the second statistical value of each second pixel point into the second memory based on the second read / write operation; both the first read / write operation and the second read / write operation are time-division multiplexed read / write operations, and both the first memory and the second memory are single-port random access memories; Based on the first statistical value and the second statistical value, obtain the image histogram corresponding to the target image data; Before performing separated sampling on each image frame in the target image data, the method further includes: Adjust the working state of the register associated with the image histogram corresponding to the image frame to a first state, where when the register is in the first state, it indicates that the statistical value in the image histogram associated with the register has not been read by the single-port random access memory; After writing the first statistical value of each first pixel point into the first memory based on the first read / write operation and writing the second statistical value of each second pixel point into the second memory based on the second read / write operation, the method further includes: Adjust the working state of the register associated with the image histogram corresponding to the image frame to a second state, where when the register is in the second state, it indicates that the statistical value in the image histogram associated with the register has been read by the single-port random access memory; During the process of the single-port random access memory performing read / write operations on the target pixel point, the temporary register corresponding to the target pixel point caches the statistical information of the previous pixel point, and the statistical information includes a statistical value and address information, where the previous pixel point is the pixel point associated with the last read / write operation performed by the single-port random access memory; according to the address information of the previous pixel point and the address information of the target pixel point, determine whether the target pixel point and the previous pixel point are the same pixel point. If the target pixel point and the previous pixel point are the same pixel point, the single-port random access memory does not perform read / write operations; if the target pixel point and the previous pixel point are not the same pixel point, the single-port random access memory performs read / write operations on the target pixel point.

2. The method according to claim 1, wherein The writing the first statistical value of each first pixel point into the first memory based on the first read / write operation includes: In the first clock cycle, read the first statistical value of the first first pixel point, and every N clock cycles, read the first statistical value of one first pixel point in the arrangement order of each first pixel point on the image frame; N is a positive integer greater than or equal to 1; In the first target clock cycle, write the first statistical value of the first first pixel into the first memory, and write the first statistical value of one first pixel into the first memory every N clock cycles; the first target clock cycle is the clock cycle after reading the first statistical value of the second first pixel.

3. The method according to claim 1, characterized in that, The writing of the second statistical value of each second pixel into the second memory based on the second read / write operation includes: In the first clock cycle, read the second statistical value of the first second pixel, and read the second statistical value of one second pixel every M clock cycles in the arrangement order of each second pixel on the image frame; M is a positive integer greater than or equal to 1; In the second target clock cycle, write the second statistical value of the first second pixel into the second memory, and write the second statistical value of one second pixel into the second memory every M clock cycles; the second target clock cycle is the clock cycle after reading the second statistical value of the second second pixel.

4. The method according to claim 1, wherein After obtaining the image histogram corresponding to the target image data, the method includes: When a read instruction is received, write the image histogram into the third memory; the third memory is a single-port random access memory; When the entire image histogram is written into the third memory, read the image histogram from the third memory to perform image processing on the target image data.

5. The method according to claim 1, wherein After obtaining the image histogram corresponding to the target image data, the method includes: When a read instruction is received, write the image histogram into the third memory; the third memory is a single-port random access memory; During the process of writing the image histogram into the third memory, read the written image histogram data from the third memory every other clock cycle to perform image processing on the target image data.

6. An image histogram generation device, characterized in that, Includes: A sampling module, configured to, when the target image data is obtained, perform separate sampling on each image frame in the target image data to obtain at least one first pixel and at least one second pixel corresponding to the image frame; the first pixel is a pixel on the image frame with an odd number of pixel bits, and the second pixel is a pixel on the image frame with an even number of pixel bits; A first processing module, configured to write the first statistical value of each first pixel into the first memory based on the first read / write operation, and write the second statistical value of each second pixel into the second memory based on the second read / write operation; both the first read / write operation and the second read / write operation are time-division multiplexed read / write operations, and both the first memory and the second memory are single-port random access memories; A second processing module, configured to obtain the image histogram corresponding to the target image data based on the first statistical value and the second statistical value; The apparatus further includes: A first adjustment module for adjusting the operating state of a register associated with an image histogram corresponding to the image frame to a first state, where when the register is in the first state, it indicates that the statistical value in the image histogram associated with the register has not been read by the single-port random access memory; A second adjustment module for adjusting the operating state of a register associated with an image histogram corresponding to the image frame to a second state, where when the register is in the second state, it indicates that the statistical value in the image histogram associated with the register has been read by the single-port random access memory; During the process of the single-port random access memory performing read and write operations on a target pixel point, a temporary register corresponding to the target pixel point caches the statistical information of the previous pixel point, and the statistical information includes a statistical value and address information, where the previous pixel point is the pixel point associated with the last read and write operation performed by the single-port random access memory; according to the address information of the previous pixel point and the address information of the target pixel point, it is determined whether the target pixel point and the previous pixel point are the same pixel point. If the target pixel point and the previous pixel point are the same pixel point, the single-port random access memory does not perform read and write operations; if the target pixel point and the previous pixel point are not the same pixel point, the single-port random access memory performs read and write operations on the target pixel point.

7. The device according to claim 6, characterized in that, The first processing module is specifically configured to: In the first clock cycle, read the first statistical value of the first first pixel point, and every N clock cycles, read the first statistical value of a first pixel point in the order of arrangement of each first pixel point in the image frame; N is a positive integer greater than or equal to 1; In the first target clock cycle, write the first statistical value of the first first pixel point into the first memory, and every N clock cycles, write the first statistical value of a first pixel point into the first memory; the first target clock cycle is the clock cycle after reading the first statistical value of the second first pixel point.

8. The device according to claim 6, characterized in that, The first processing module is further specifically configured to: In the first clock cycle, read the second statistical value of the first second pixel point, and every M clock cycles, read the second statistical value of a second pixel point in the order of arrangement of each second pixel point in the image frame; M is a positive integer greater than or equal to 1; In the second target clock cycle, write the second statistical value of the first second pixel point into the second memory, and every M clock cycles, write the second statistical value of a second pixel point into the second memory; the second target clock cycle is the clock cycle after reading the second statistical value of the second second pixel point.

9. The device according to claim 6, characterized in that, The device further includes: A first writing module for writing the image histogram into a third memory when a read instruction is received; the third memory is a single-port random access memory; A first reading module, configured to read the image histogram from the third memory when all of the image histogram has been written into the third memory, so as to perform image processing on the target image data.

10. The device according to claim 6, characterized in that, The apparatus further includes: A second writing module, configured to write the image histogram into a third memory when a reading instruction is received; the third memory is a single-port random access memory; A second reading module, configured to, during the process of writing the image histogram into the third memory, read the written image histogram data from the third memory every other clock cycle, so as to perform image processing on the target image data.

11. An electronic device, characterized in that, It includes a processor, a memory, and a program or instruction stored on the memory and executable on the processor. When the program or instruction is executed by the processor, the steps of the image histogram generation method according to any one of claims 1-5 are implemented.

12. A readable storage medium, characterized in that, A program or instruction is stored on the readable storage medium. When the program or instruction is executed by a processor, the steps of the image histogram generation method according to any one of claims 1-5 are implemented.

13. A chip, characterized in that, The chip includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is configured to run a program or instruction. When the program or instruction is executed by the processor, the steps of the image histogram generation method according to any one of claims 1-5 are implemented.

Citation Information

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