An edge termination with field plate and field limiting ring, its manufacturing method and application

Abstract

The application discloses an edge terminal with a field plate and a field limiting ring, a manufacturing method and application thereof. The edge terminal comprises a substrate and a drift region formed on one side of the substrate. A main junction region and a plurality of field limiting rings are formed on the outer side of the drift region. The plurality of field limiting rings are sequentially arranged around the outer periphery of the main junction region. A passivation layer whole plate is formed on the same horizontal plane of the field limiting ring and the outer side of the main junction region. A field plate whole plate is formed on the passivation layer whole plate. The material of the field plate whole plate is gate metal. The manufacturing method comprises the following steps: using deposition, photolithography and etching processes to prepare the passivation layer and the field plate in the form of a whole plate on the substrate. The edge terminal with the field plate and the field limiting ring has the advantages of high terminal efficiency and high blocking voltage, and can be widely used in the manufacturing of MOSFET and IGBT, has high use value and good application prospect, and the corresponding manufacturing method can greatly reduce the operation difficulty and simplify the operation process, and thus is more favorable to improving the reliability of performance.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of semiconductor devices, and relates to an edge termination with field plates and field limiting rings, a manufacturing method thereof and application thereof. BACKGROUND

[0002] In a semiconductor power device made by cutting a wafer, in order to alleviate the edge electric field concentration effect caused by the main junction bending, the edge termination technology adopted includes field limiting rings, field plates and the like. The existing edge termination with only field limiting rings has defects such as low termination efficiency and low blocking voltage, as shown in the structure of Figure 1 In order to improve the blocking voltage, researchers have proposed an edge termination with field plates and field limiting rings, as shown in the structure of Figure 2 The defects of the edge termination with field plates and field limiting rings include: (1) there are many etching areas of the termination passivation layer and the sizes are different, and the etching process adjustment is difficult; (2) in a high-voltage device, the number of field limiting rings is greater than 10, and in order to improve the chip area utilization rate, the ring width of the field limiting ring needs to be optimized to be minimum, however, when the ring width of part of the field limiting rings is relatively narrow, the etching window of the termination passivation layer is small, which has a high requirement on the photoetching precision, and the photoetching adjustment is difficult; (3) when the metal field plate is deposited in the small passivation layer etching area, if the passivation layer etching is not clean, the metal will have a cavity, resulting in poor contact performance; (4) in the etching process of the metal field plate, if the etching window is small, there is a risk of incomplete etching. At the same time, the existence of the above defects also makes the performance of the edge termination with field plates and field limiting rings manufactured thereby difficult to guarantee. Therefore, it is urgent to obtain an edge termination with field plates and field limiting rings with high termination efficiency and high blocking voltage, and a manufacturing process with small process difficulty matched therewith, which has very important significance for promoting the wide application of semiconductor power devices. SUMMARY

[0003] The technical problem to be solved by the present application is to overcome the defects of the prior art, and to provide an edge termination with field plates and field limiting rings with high termination efficiency and high blocking voltage, a manufacturing method with small process difficulty matched therewith and application of the edge termination in semiconductor power devices.

[0004] To solve the above technical problems, the present application adopts the following technical solutions:

[0005] An edge termination with field plates and field limiting rings, comprising a substrate and a drift region formed on one side of the substrate, a main junction region and a plurality of field limiting rings are formed on the outer side of the drift region, the plurality of field limiting rings are sequentially arranged around the outer periphery of the main junction region, and a passivation layer whole plate is formed on the same horizontal plane of the field limiting rings and the outer side of the main junction region; a field plate whole plate is formed on the passivation layer whole plate, and the material of the field plate whole plate is a gate metal.

[0006] The edge termination with the field plate and the field limiting ring is further improved, the size and shape of the field plate whole plate are same as the passivation layer whole plate; the thickness of the passivation layer whole plate is 0.4-1.6 μm; the material of the passivation layer whole plate is SiO2; the material of the field plate whole plate is at least one of Al, AlCu, AlSiCu, Ni and Ti.

[0007] The edge termination with the field plate and the field limiting ring is further improved, the other side of the substrate is formed with a drain metal layer; the material of the drain metal layer is at least one of Al, AlCu, AlSiCu, Ni and Ti.

[0008] The edge termination with the field plate and the field limiting ring is further improved, the other side of the substrate is formed with a drain metal layer; the material of the drain metal layer is at least one of Al, AlCu, AlSiCu, Ni and Ti.

[0009] The edge termination with the field plate and the field limiting ring is further improved, the thickness of the substrate is 200-400 μm; the resistivity of the substrate is 0.01-0.03 Ω·cm; the substrate is silicon, germanium silicon, gallium arsenide, silicon carbide, gallium nitride, gallium sesquioxide or diamond.

[0010] The edge termination with the field plate and the field limiting ring is further improved, the peak doping concentration of the drift region is 5e14 cm -3 -3e16 cm -3 .

[0011] The edge termination with the field plate and the field limiting ring is further improved, the doping distribution of the field limiting ring is same as the main junction region; the peak doping concentration of the field limiting ring is 1e18 cm -3 -5e20 cm -3 ; the junction depth of the field limiting ring is 0.8-1.3 μm.

[0012] As a general technical concept, the application further provides a manufacturing method of the edge termination with the field plate and the field limiting ring, comprising the following steps:

[0013] S1, forming a drift region on the front side of a substrate by using an epitaxy process;

[0014] S2, forming a main junction region and a field limiting ring on the drift region by using a photoetching and ion implantation process;

[0015] S3, forming a passivation layer whole plate above the main junction region and the field limiting ring by using a deposition, photoetching and etching process;

[0016] S4, forming a field plate whole plate on the passivation layer whole plate by using a deposition, photoetching and etching process.

[0017] The manufacturing method is further improved, and the step S4 further comprises: forming a source metal layer on the main junction region and a drain metal layer on the back of the substrate by using deposition, photolithography and etching processes.

[0018] As a general technical concept, the application also provides an application of the above-mentioned edge termination with field plates and field limiting rings or the edge termination with field plates and field limiting rings manufactured by the above-mentioned manufacturing method in a semiconductor power device.

[0019] The application is further improved, and the semiconductor power device is a planar MOSFET, a planar IGBT, a trench MOSFET or a trench IGBT.

[0020] Compared with the prior art, the application has the following advantages:

[0021] (1) The application provides an edge termination with field plates and field limiting rings, which comprises a substrate and a drift region formed on one side of the substrate, a main junction region and a plurality of field limiting rings are formed on the outer side of the drift region, the plurality of field limiting rings are sequentially arranged around the outer periphery of the main junction region, a passivation layer plate is formed on the same horizontal plane as the outer side of the main junction region, and a field plate plate is formed on the passivation layer plate, and the material of the field plate plate is gate metal. In the application, the material of the field plate plate is the same as the gate metal, the negative bias can be provided by the gate metal, and the field plate plate and the passivation layer plate below the field plate plate are both free of etching windows. Therefore, when a negative bias is applied to the field plate plate relative to the substrate, electrons will be repelled to move away from the surface, so that the depletion region at the surface extends outward, the electric field distribution of the termination region is changed, the uniformity and area of the electric field distribution of the termination region are improved, and the termination efficiency and blocking voltage are improved. More importantly, in the edge termination of the application, the passivation layer and the field plate arranged above the drift region exist in the form of a whole piece / plate, which is more conducive to the implementation of the process and the obtaining of stable performance. The edge termination with field plates and field limiting rings has the advantages of high termination efficiency and high blocking voltage, and can be widely used in planar MOSFETs, planar IGBTs, trench MOSFETs or trench IGBTs, has high use value and good application prospect.

[0022] (2) The application also provides a manufacturing method of the edge termination with field plates and field limiting rings, which uses deposition, photolithography and etching processes to prepare the passivation layer and the field plate in the form of a whole piece / plate. The accuracy requirements of photolithography and etching are relatively low, and the adjustment of the photolithography and etching processes is relatively easy. Therefore, the method for manufacturing the edge termination can greatly reduce the operation difficulty and simplify the operation process, and is more conducive to improving the reliability of performance. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application.

[0024] Figure 1 A cross-sectional structure schematic diagram of an existing edge termination with a field limiting ring.

[0025] Figure 2 A cross-sectional structure schematic diagram of an existing edge termination with a field limiting ring.

[0026] Figure 3 A cross-sectional structure schematic diagram of an edge termination with a field limiting ring in Embodiment 1 of the present application.

[0027] Figure 4 A preparation process flow chart of an edge termination with a field limiting ring in Embodiment 1 of the present application.

[0028] Figure 5 An electric field distribution simulation diagram of an existing conventional edge termination.

[0029] Figure 6 An electric field distribution simulation diagram of an edge termination with a field limiting ring in Embodiment 1 of the present application.

[0030] Figure 7 A breakdown voltage diagram of an edge termination with a field limiting ring in Embodiment 1 of the present application.

[0031] Legend:

[0032] 1, substrate; 2, drift region; 3, main junction region; 4, field limiting ring; 5, passivation layer whole plate; 6, source metal; 7, field plate whole plate; 8, drain metal. DETAILED DESCRIPTION

[0033] The present application will be further described below in conjunction with the drawings in the specification and specific preferred embodiments, but the protection scope of the present application is not limited thereby.

[0034] As Figure 1 and Figure 2As shown, the existing edge termination still has the following defects: (1) the terminal efficiency and blocking voltage are still low; (2) the terminal passivation layer has more etching regions of different sizes, and the etching process is difficult to adjust; (3) in high-voltage devices, the number of field limiting rings is greater than 10, and in order to improve the chip area utilization, the ring width of the field limiting ring needs to be optimized to the minimum, however, when the ring width of part of the field limiting ring is relatively narrow, the etching window of the terminal passivation layer is small, which has high requirements on the photoetching accuracy, and the photoetching adjustment is difficult; (4) when depositing metal in the small passivation layer etching region, if the passivation layer etching is not clean, the metal will have voids, resulting in poor contact performance; (5) in the metal etching process, if the etching window is small, there is a risk of incomplete etching.

[0035] In view of the defects existing in the existing edge termination, the present application aims to provide an edge termination with high terminal efficiency, high blocking voltage and easy to prepare, specifically: in the present application, the shape of the passivation layer and the field plate is improved, by forming the passivation layer and the field plate in the form of a whole sheet / plate above the drift region, to optimize the uniformity and distribution area of the electric field in the drift region, thereby facilitating the improvement of the terminal efficiency and the blocking voltage. As shown, Figure 3 As shown, the present application proposes an improved edge termination with field plates and field limiting rings, including a substrate and a drift region formed on one side of the substrate, a main junction region and a plurality of field limiting rings are formed on the outer side of the drift region, the plurality of field limiting rings are sequentially surrounded on the outer periphery of the main junction region, a passivation layer whole plate is formed on the same horizontal plane of the field limiting ring and the outer side of the main junction region, and a field plate whole plate is formed on the passivation layer whole plate, the material of the field plate whole plate is gate metal. In the present application, the material of the field plate whole plate is the same as the gate metal, which can provide negative bias voltage by the gate metal, and the field plate whole plate and the passivation layer whole plate below it are both without etching window (the passivation layer and the field plate are in the form of a whole sheet / plate), so when a negative bias voltage is applied to the field plate whole plate relative to the substrate, the electrons will be repelled to move away from the surface, making the depletion region at the surface extend outward, changing the electric field distribution of the terminal region, and improving the uniformity and area of the electric field distribution of the terminal region, thereby improving the terminal efficiency and the blocking voltage. More importantly, in the edge termination of the present application, the passivation layer and the field plate above the drift region exist in the form of a whole sheet / plate, which is more conducive to improving the contact performance between them and more conducive to obtaining stable performance, so the edge termination with field plates and field limiting rings of the present application has the advantages of high terminal efficiency, high blocking voltage, high use value and good application prospect. At the same time, when using deposition, photoetching and etching processes to prepare the passivation layer and the field plate in the form of a whole sheet / plate, the accuracy requirements of photoetching and etching are relatively low, and the adjustment of photoetching and etching process is relatively easy, so the method for manufacturing the edge termination of the present application can greatly reduce the operation difficulty and simplify the operation process, and is more conducive to improving the reliability of performance.

[0036] The present invention will be further described below with reference to specific embodiments:

[0037] Example 1

[0038] like Figure 3 As shown, an edge terminal with a field plate and field limiting rings includes a substrate 1 and a drift region 2 formed on one side of the substrate 1. A main junction region 3 and several field limiting rings 4 are formed on the outer side of the drift region 2. The several field limiting rings 4 are sequentially surrounded around the outer periphery of the main junction region 3. A passivation layer plate 5 is formed on the same horizontal plane outside the field limiting rings 4 and the main junction region 3. A field plate plate 7 is formed on the passivation layer plate 5. The field plate plate 7 is made of gate metal.

[0039] In this embodiment, the field plate 7 has the same size and shape as the passivation layer plate 5, wherein the passivation layer plate 5 has a thickness of 0.8 μm and the field plate 7 has a thickness of 4 μm. In this embodiment, the passivation layer plate 5 is made of SiO2; the field plate 7 is made of at least one of Al, AlCu, AlSiCu, Ni, and Ti, specifically Al in this embodiment.

[0040] In this embodiment, a source metal layer 6 is further provided outside the main junction region 3, and the thickness of the source metal layer 6 is 4 μm. In this invention, the source metal layer 6 is made of at least one of Al, AlCu, AlSiCu, Ni, and Ti, and specifically Al in this embodiment.

[0041] In this embodiment, a drain metal layer 8 with a thickness of 4 μm is formed on the other side of the substrate 1. In this invention, the drain metal layer 8 is made of at least one of Al, AlCu, AlSiCu, Ni, and Ti, and specifically Al in this embodiment.

[0042] In this embodiment, substrate 1 is silicon carbide with a thickness of 350 μm and a resistivity of 0.02 Ω·cm.

[0043] In this embodiment, the peak doping concentration of drift region 2 is 8e15cm. -3 A cutoff loop also forms on drift zone 2.

[0044] In this embodiment, the doping distribution of the field confinement ring 4 is the same as that of the main junction region 3, both being P-type doped, and the peak doping concentration of the field confinement ring is 5e18cm. -3 The junction depth of the field-limited ring is 1.0 μm.

[0045] In this embodiment, there are 24 field limiting rings 4, and the period of each field limiting ring is 6μm.

[0046] In order to more clearly illustrate the present application, a manufacturing method of the edge termination with field plate and field limiting ring in the above embodiment is proposed in the present application, only the manufacturing method of the edge termination with field plate and field limiting ring is described, a preparation process flow chart thereof is shown in Figure 4 , and includes the following steps:

[0047] Step 1: Forming an N-type drift region 2 on a silicon carbide N-type substrate 1 by epitaxy process, wherein the resistivity of the N-type substrate 1 is 0.02 Ω·cm, the thickness is 350 μm, and the doping concentration of the N-type drift region 2 is 8e15 cm -3 -3. Figure 4

[0048] Step 2: Forming a P-type main junction region 3 and a field limiting ring 4 on the N-type drift region 2 by photolithography and ion implantation process, the junction depth is 1.0 μm, and the peak doping concentration is 5e18 cm -3 -3. Figure 4

[0049] Step 3: Forming a passivation layer plate 5 above the N-type drift region 2 by deposition, photolithography and etching process, the thickness is 0.8 μm, as shown in Figure 4

[0050] Step 4: Forming a source metal layer 6 above the N-type drift region 2, forming a field plate plate 7 (the material of the field plate plate 7 is gate metal) on the passivation layer plate 5, and forming a drain metal layer 8 on the back of the substrate 1 by deposition, photolithography and etching process, to obtain the edge termination with field plate and field limiting ring, as shown in Figure 4

[0051] In the present application, the dimensions in the figures (including lateral dimensions, layout dimensions, medium thickness, metal thickness, junction depth, etc.) do not represent actual dimensions, but are only used to illustrate the method of forming the edge termination, and do not constitute a limitation on the technical solutions of the present application, including but not limited to planar MOSFET, planar IGBT, trench MOSFET, trench IGBT; at the same time, the semiconductor substrate includes but is not limited to SiC, such as Si, germanium silicon, gallium arsenide, gallium nitride, gallium sesquioxide or diamond, etc., which can be used in the present application as needed.

[0052] The edge termination with field plate and field limiting ring prepared in embodiment 1 and the existing conventional edge termination are simulated and tested for breakdown voltage, and the results are shown in Figures 5-7

[0053] The simulation results of the electric field distribution of the existing conventional edge termination are shown in Figure 5 ​​​​​As shown; simulation results of the electric field distribution at the edge terminals of the semiconductor power devices prepared in Examples 1-4, as follows. Figure 6 As shown. By Figure 5 and 6 As can be seen, compared with existing conventional edge terminals, the edge terminal with field plate and field limiting ring in Embodiment 1 of this invention, when a -5V bias voltage is applied to the field plate, electrons are repelled and move away from the surface, causing the depletion region at the surface to extend outward. This changes the electric field distribution in the terminal region and improves the uniformity and area of ​​the electric field distribution in the terminal region, thereby improving the terminal efficiency and blocking voltage. More importantly, in the edge terminal of this invention, the passivation layer and field plate disposed above the drift region exist in the form of a whole piece / plate, which is more conducive to obtaining stable performance. In addition, due to Figure 7 As can be seen, compared with existing conventional edge terminals, the blocking voltage of the edge terminal with field plate and field limiting ring in Embodiment 1 of the present invention is increased by 300V. Therefore, the edge terminal with field plate and field limiting ring of the present invention has advantages such as high terminal efficiency and high blocking voltage, high practical value, and good application prospects. Furthermore, in the manufacturing method of the edge terminal with field plate and field limiting ring of the present invention, the passivation layer and field plate, existing in the form of a whole wafer / plate, are prepared by deposition, photolithography, and etching processes. The precision requirements for photolithography and etching are relatively low, and the adjustment of photolithography and etching processes is relatively easy. Therefore, the method of the present invention for manufacturing edge terminals can significantly reduce the difficulty of operation and simplify the operation process, which is more conducive to improving the reliability of performance.

[0054] The above embodiments are merely preferred embodiments of the present invention, and the scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, improvements and modifications made without departing from the principles of the present invention should also be considered within the scope of protection of the present invention.

Claims

1. An edge termination with field plate and field limiting rings, characterized in that The application relates to a vertical power MOSFET, which comprises a substrate and a drift region formed on one side of the substrate, an outer side of the drift region is formed with a main junction region and a plurality of field limiting rings, the field limiting rings are sequentially arranged around the outer periphery of the main junction region, a passivation layer whole plate is formed on the same horizontal plane of the field limiting rings and the outer side of the main junction region; a field plate whole plate is formed on the passivation layer whole plate, the material of the field plate whole plate is gate metal; the size and shape of the field plate whole plate are the same as those of the passivation layer whole plate; the thickness of the passivation layer whole plate is 0.4-1.6 mu m; the material of the passivation layer whole plate is SiO2; the material of the field plate whole plate is at least one of Al, AlCu, AlSiCu, Ni and Ti; the peak doping concentration of the drift region is 5e14-3e16 cm -3 . -3 .

2. The edge termination with field plates and field limiting rings of claim 1, wherein, Another side of the substrate is formed with a drain metal layer; the material of the drain metal layer is at least one of Al, AlCu, AlSiCu, Ni, Ti; The main junction region is further provided with a source metal layer; the material of the source metal layer is at least one of Al, AlCu, AlSiCu, Ni, Ti.

3. The edge termination with field plates and field limiting rings of claim 1, wherein, The thickness of the substrate is 200-400 μm; the resistivity of the substrate is 0.01-0.03 Ω·cm; the substrate is silicon, germanium-silicon, gallium arsenide, silicon carbide, gallium nitride, gallium sesquioxide or diamond.

4. The edge termination with field plates and field limiting rings of claim 1, wherein, The doping distribution of the field limiting ring is the same as that of the main junction region; the peak doping concentration of the field limiting ring is 1e18 cm -3 ~ 5e20 cm -3 The junction depth of the field limiting ring is 0.8 μm ~ 1.3 μm.

5. A method of manufacturing an edge termination with a field plate and a field limiting ring as claimed in any one of claims 1 to 4, characterized in that The method comprises the following steps: S1, forming a drift region on the front side of the substrate by epitaxy; S2, forming a main junction region and a field limiting ring on the drift region by photolithography and ion implantation; S3, forming a passivation layer plate above the main junction region and the field limiting ring by deposition, photolithography and etching; S4, forming a field plate plate on the passivation layer plate by deposition, photolithography and etching.

6. The production method according to claim 5, wherein In step S4, a source metal layer is formed on the main junction region and a drain metal layer is formed on the back side of the substrate by deposition, photolithography and etching.

7. Use of the edge termination with a field plate and a field limiting ring according to any one of claims 1-4 or manufactured by the manufacturing method of claim 5 or 6 in a semiconductor power device.

8. Use according to claim 7, characterized in that, The semiconductor power device is a planar MOSFET, a planar IGBT, a trench MOSFET or a trench IGBT. The semiconductor power device is a planar MOSFET, a planar IGBT, a trench MOSFET or a trench IGBT.

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