Power amplifier and control method for compensating for load variations

By using a hybrid combiner and peak signal distribution circuit in the power amplifier, combined with a sequential drive method, the efficiency and load modulation problems of the power amplifier under peak-to-average power ratio (PAPR) signals are solved, realizing a high-efficiency and low-power power amplifier suitable for mobile communication base stations.

CN114868334BActive Publication Date: 2025-11-04HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202080090226.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-01-15
Publication Date
2025-11-04
Estimated Expiration
2040-01-15

AI Technical Summary

Technical Problem

Existing power amplifiers struggle to achieve high efficiency and low power consumption when processing peak-to-average power ratio (PAPR) signals, especially in mobile telecommunications standard signals where PAPR is high. Doherty and Chireix amplifiers also suffer from turn-off impedance issues under load modulation.

Method used

By employing a hybrid combiner and peak signal distribution circuit, combined with a sequential drive method, the peak amplifier signal is distributed to compensate for load changes, reduce or eliminate load modulation of the main amplifier and peak amplifier, and use multiple peak amplifiers to reduce turn-off impedance, thus achieving a high-efficiency power amplifier architecture.

Benefits of technology

It improves the back-off average efficiency of power amplifiers at high power and wide bandwidth, reduces the load pull ratio, and reduces turn-off impedance loss, making it suitable for modern mobile communication infrastructure such as LTE and 5G networks.

✦ Generated by Eureka AI based on patent content.

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Abstract

A power amplifier and a method of controlling a power amplifier are described. The power amplifier (300) comprises a hybrid combiner (310) comprising a first input port and a second input port, an isolated port and an output port, wherein the hybrid combiner (310) delivers an output power at the output port. A balanced amplifier arrangement (320) is comprised, the balanced amplifier arrangement (320) comprising a main amplifier arrangement, a first peaking amplifier and a second peaking amplifier, wherein the output of the main amplifier arrangement and the outputs of the first and second peaking amplifiers are coupled to the first and second input ports of the hybrid combiner (310) to provide the output power at the output port. A third peaking amplifier (330) has an output coupled to the isolated port of the hybrid combiner (310). A peaking signal distribution circuit distributes a peaking amplification signal to the input ports of the first, second and third peaking amplifiers.
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Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to a power amplifier and a method of controlling a power amplifier, and more particularly, but not exclusively, to a power amplifier and a method of controlling a power amplifier to distribute a peak amplifier signal to compensate for load variations so that partial or full load modulation of the main amplifier and the peak amplifier can be minimized or eliminated. The power amplifier can be driven by a driver circuit to perform the method. The power amplifier or method can be used in a mobile communication base station. BACKGROUND

[0002] Power amplifiers can be required to handle signals that include a high peak to average power ratio. For such signals, the power amplifier will operate at some back-off power (i.e. below maximum power) but needs to be able to handle the occasional power peaks. This makes it difficult to design a high power efficient amplifier. Since the peak to average ratio in mobile telecommunication standards signals is high (i.e. for LTE, close to 9dB), the amplifier size should be eight times larger than the power amplifier (PA) average provides to the antenna load. This makes it difficult to achieve a PA with high efficiency, low power consumption.

[0003] Both the known so-called Chireix amplifier and the Doherty amplifier share a common approach in the form of dynamic load modulation that enables different components (i.e. transistors) of the amplifier to operate with maximum voltage swing, and thus have high power efficiency when driven with some back-off.

[0004] The Doherty amplifier uses a main amplifier and a peak amplifier (or auxiliary amplifier). The main amplifier is an amplifier that is always on when there is some signal at the input of the amplifier. The peak amplifier (or auxiliary amplifier) is an amplifier that is only on when the input signal exceeds some predefined power threshold. Below this threshold, the peak amplifier is idle.

[0005] US 2005 / 0134377 describes an embodiment of a Doherty power amplifier. The main amplifier is implemented as a balanced amplifier and the auxiliary amplifier is connected to the isolated port of a quadrature hybrid combiner. At the output of the quadrature hybrid combiner the total power is added and collected. SUMMARY

[0006] In a first aspect, there is provided a power amplifier comprising: a hybrid combiner comprising a first input port and a second input port, an isolated port and an output port, wherein the hybrid combiner is configured to deliver an output power at the output port; a balanced amplifier arrangement comprising a main amplifier arrangement, a first peaking amplifier and a second peaking amplifier, wherein an output of the main amplifier arrangement and outputs of the first and second peaking amplifiers are coupled to the first and second input ports of the hybrid combiner to provide the output power at the output port; a third peaking amplifier having an output coupled to the isolated port of the hybrid combiner; a peaking signal distribution circuit configured to provide a peaking amplification signal to input ports of the first, second and third peaking amplifiers. The hybrid combiner (sometimes referred to in the art as a hybrid coupler) can be a quadrature hybrid combiner.

[0007] By providing a peaking amplification signal at the peaking amplifier coupled to the isolated port (i.e. normally terminated output port) of the hybrid combiner, and also at the first and second peaking amplifiers coupled to the input ports of the hybrid combiner, a low load-pull ratio can be achieved and off-impedance experienced by the main amplifier arrangement mitigated. Thus, the load modulation of the amplifier can be controlled to reduce or even eliminate the LPR across the power range. As a result, the average efficiency of the power amplifier at useful back-off levels can be improved under a high power (e.g. 1 KW, operating at 9 dB back-off) wideband (i.e. 40% bandwidth) power amplifier design. In other words, a power amplifier architecture is provided that is capable of operating efficiently at useful back-off levels, and that can also operate efficiently over a wide bandwidth. Such a power amplifier is useful for modern mobile communications infrastructure, such as LTE or 5G networks.

[0008] In a first implementation of the first aspect, the peak signal distribution circuit comprises: a first peak hybrid splitter for receiving a peak amplified signal at an input port and passing the peak amplified signal at respective first and second output ports; a second hybrid splitter comprising an input port and first and second output ports, the first and second output ports being coupled to inputs of the first and second peak amplifiers; wherein the first output port of the first hybrid splitter is coupled to an input of the third peak amplifier and the second output port of the first hybrid splitter is coupled to the input of the second hybrid splitter. The first peak hybrid splitter can comprise a 180 degree hybrid splitter for providing a 180 degree shifted signal at the first output port and a direct (in-phase) signal at the second output. The second peak hybrid splitter can comprise a quadrature hybrid splitter for providing a quadrature shifted signal at the first output port and a direct (in-phase) signal at the second output port. Thus, the peak signals can be conveniently provided quadrature at the first and second amplifiers, which allows the first and second amplifiers to be combined at the hybrid combiner, whilst directly providing a peak signal to the third peak amplifier to provide power at the isolated port of the hybrid combiner, thereby modulating the impedance presented at the inputs of the hybrid combiner.

[0009] In a second implementation of the first aspect, the output of the first peak amplifier is coupled to a first input port of the hybrid combiner and the output of the second peak amplifier is coupled to a second input port of the hybrid combiner, such that the first and second peak amplifiers are configured as limbs of a balanced amplifier. In other words, the first and second peak amplifiers are arranged as limbs of a balanced amplifier, which together with the third peak amplifier helps to reduce the load pull ratio of the main amplifier arrangement.

[0010] In a third implementation of the first aspect, the main amplifier arrangement comprises first and second main amplifiers, wherein the output of the first main amplifier is coupled to a first input port of the hybrid combiner and the output of the second main amplifier is coupled to a second input port of the hybrid combiner, such that the first and second main amplifiers are configured as limbs of a balanced amplifier. Thus, the main amplifier arrangement is arranged as a component of a balanced amplifier together with the first and second peak amplifiers (peak amplifier arrangement). Thus, the signals from the balanced amplifier of the main amplifier arrangement can be combined with the signals from the balanced amplifier of the peak amplifier arrangement (which works in conjunction with the third peak amplifier), thereby providing high efficiency at back-off and reducing the load pull ratio of the balanced main amplifier arrangement.

[0011] In a fourth implementation of the first aspect, the power amplifier further comprises a third hybrid splitter for receiving the main input signal at an input port and delivering a first main output signal and a second main output signal at respective first and second output ports, the first and second output ports of the third hybrid splitter being coupled to respective inputs of the first and second main amplifiers, the outputs of the first and second main amplifiers being coupled to respective first and second input ports of the hybrid combiner via respective first and second impedance modifying elements. The third hybrid splitter can comprise a quadrature hybrid splitter arranged to provide a quadrature output at a first output and a direct (in-phase) signal at a second output. Thus, the outputs of the first and second peaking amplifiers can be matched to the outputs of the first and second main amplifiers to allow efficient combining of the respective main and peaking amplified signals at the hybrid combiner. The impedance modifying elements can be matching networks, transmission lines (e.g. quarter wavelength transmission lines) or any other means capable of efficiently coupling signals at the input ports of the hybrid combiner, for example.

[0012] In a fifth implementation of the first aspect, the power amplifier is configured to provide power from the main amplifier arrangement and increase the output power of the main amplifier arrangement to a predetermined power level, on reaching the predetermined power level, provide power from the first, second and third peaking amplifiers and increase the output power level provided by the first, second and third peaking amplifiers while continuing to provide output power at the predetermined level from the main amplifier arrangement; increase the output power level of the first, second and third peaking amplifiers until a predetermined output power level is provided at the output port of the power amplifier circuit. This sequential driving approach can achieve a lower or optimal load-pulling ratio even without turning off the main amplifiers as used in the prior art. Thus, the relative amplitudes and phases of the main and peaking signals provided to the main and peaking amplifiers can be controlled over the entire power range, thereby enabling the benefits of tracking the impedance over the full frequency range.

[0013] In a sixth implementation of the first aspect, at least one of the first and second main amplifiers comprises a power amplifier arrangement having high efficiency with extension to a non-zero back-off level. In a seventh implementation of the first aspect, the power amplifier arrangement can be any one of: a Doherty power amplifier, an N-way Doherty power amplifier, a Chireix amplifier and an envelope tracking amplifier. Thus, the back-off efficiency of the power amplifier can be further improved over a power range with a low load-pulling ratio.

[0014] In a second aspect, there is provided a method for controlling a power amplifier, the power amplifier comprising: a main amplifier arrangement and a balanced amplifier arrangement with a peaking amplifier, the peaking amplifier connected using a hybrid combiner, wherein power is delivered at an output port of the hybrid combiner, the method comprising: providing power from the main amplifier arrangement and increasing the output power provided by the main amplifier arrangement to a predetermined power level, upon reaching the predetermined power level, providing power from the peaking amplifier and increasing the power level provided by the peaking amplifier while continuing to provide output power by the main amplifier; continuing to increase the power level provided by the peaking amplifier until a predetermined output power level is provided by the power amplifier.

[0015] In a first implementation of the second aspect, the power is provided from the main amplifier arrangement by obtaining power from the main amplifier connected to an isolated port of the hybrid combiner. This sequential driving supports controlling the impedance present at the peaking amplifier, for example by controlling the amplitude and phase relationship between the main amplifier and the peaking amplifier. Furthermore, the load pull of the main amplifier will remain at a lower or minimum value.

[0016] The peaking amplifier can comprise a first peaking amplifier and a second peaking amplifier corresponding to respective branches of the balanced amplifier. The power size of the peaking amplifier can be balanced with the back-off and size of the main amplifier to provide the required back-off of the overall power amplifier. For example, a peaking amplifier with a smaller power size can be used to reduce the turn-off impedance problem. This will reduce the back-off of the overall power amplifier as a whole, but this can be compensated if a main amplifier arrangement with more back-off is chosen, for example an N-way Doherty.

[0017] In a second implementation of the second aspect, the power is provided from a main power amplifier arrangement, the main power amplifier arrangement comprising a power amplifier with extended back-off to a non-zero back-off level. By using a power amplifier with extended back-off as part of the main amplifier arrangement, the back-off provided when applying sequential driving to the power amplifier can be further extended. Furthermore, as mentioned above, this allows for the use of a smaller peaking amplifier to reduce problems related to turn-off impedance, wherein any back-off reduction caused by using a smaller peaking amplifier is compensated by the extended high efficiency when back- off of the main amplifier arrangement.

[0018] In a third implementation of the second aspect, the main amplifier arrangement comprises any one of: a single-ended amplifier, a Doherty amplifier, a Chireix amplifier, an N-way Doherty amplifier and an envelope tracking amplifier. Any one of these alternatives can be used to extend the back-off while maintaining high efficiency.

[0019] In a fourth implementation of the second aspect, the power amplifier further comprises a third peaking amplifier coupled to the isolation port of the hybrid combiner, wherein the main amplifier arrangement of the balanced amplifier and the peaking amplifier are coupled to the first input port and the second input port of the hybrid combiner to provide power at the output port, and the method further comprises: when the predetermined power level is reached, providing power from the third peaking amplifier together with the peaking amplifier of the balanced amplifier, and increasing the power level provided by the third peaking amplifier.

[0020] This reduces the off impedance loss introduced by the third peaking amplifier in the power amplifier and enables impedance control over the entire power range. Thus, in a high power (e.g. 1 KW, working with 9 dB backoff) broadband (e.g. 40% bandwidth) power amplifier design, the backoff average efficiency can be improved. This power amplifier topology can be used in modern mobile communication (LTE, 4G, etc.) networks, e.g. in base stations.

[0021] In a fifth implementation of the second aspect, the main amplifier arrangement comprises a first main amplifier and a second main amplifier, wherein the output of the first main amplifier is coupled to the first input port of the hybrid combiner and the second main amplifier is coupled to the second input port of the hybrid combiner, such that the first main amplifier and the second main amplifier are configured as a balanced amplifier, and providing power to the main amplifier arrangement comprises providing power to the first amplifier and the second amplifier. Thus, the main amplifier arrangement is arranged as an element of the balanced amplifier together with the first peaking amplifier and the second peaking amplifier (peaking amplifier arrangement). The signal from the balanced amplifier of the main amplifier arrangement can be combined with the signal from the balanced amplifier of the peaking amplifier arrangement (which works simultaneously with the third peaking amplifier), thereby providing high efficiency at backoff and reducing the load pulling ratio of the balanced main amplifier arrangement.

[0022] In a sixth implementation of the second aspect, the main amplifier arrangement comprises a pair of first and second Doherty amplifiers coupled to first and second input ports of the hybrid combiner, the providing of power from the main amplifier arrangement comprises providing power from the main amplifiers of the respective first and second Doherty amplifiers and increasing the provided output power, and the providing of power from the peak amplifiers of the first and second Doherty amplifiers is performed when a predetermined power level of the main amplifiers of the first and second Doherty amplifiers is reached. This allows further extension of the backoff while maintaining high efficiency. In other words, the first and second Doherty amplifiers will operate as main amplifier arrangements coupled to the hybrid coupler input ports and provide power until the predetermined power level is reached. The total amplifier backoff will be extended by the backoff of the Doherty amplifiers for the main amplifier arrangement.

[0023] In other implementations of the second aspect, the main amplifier arrangement can comprise a pair of power amplifiers with high efficiency extending to a non-zero backoff level, such as any of a single-ended amplifier, a Doherty amplifier, a Chireix amplifier, an N-way Doherty amplifier, and an envelope tracking amplifier. The providing of power to the main amplifier arrangement comprises providing power to the power amplifiers. Any of these alternatives can be used to extend the backoff while maintaining high efficiency.

[0024] In a third aspect, there is provided a power amplifier comprising a hybrid combiner having an output port through which power is delivered, a main amplifier arrangement connected to an isolated port of the hybrid combiner, a balanced amplifier arrangement having first and second peak amplifiers connected using the hybrid combiner, wherein the power amplifier is configured to perform the method according to any of the first to third implementations of the second aspect.

[0025] In a fourth aspect, there is provided a driver circuit for driving a power amplifier, the driver circuit comprising a baseband digital signal processing unit comprising a look-up table / digital pre-distorter unit, first and second digital-to-analog converters, an up-converter, and an RF module, wherein the look-up table / digital pre-distorter unit is configured to provide respective first and second digital outputs to the first and second digital-to-analog converters, and wherein the first and second digital-to-analog converters are configured to provide respective outputs to the up-converter, the up-converter being configured to provide a main drive signal and a peak drive signal at an output of the up-converter for provision to first and second channels of the power amplifier.

[0026] The drive circuit can include a signal processing unit to receive the modulated input signal and generate the main drive signal and the peak drive signal as outputs. The output signals can be generated to cause the Doherty power amplifier topology having multiple input (main input and peak input) signal outputs to perform the control steps of any of the methods described in aspects and embodiments herein.

[0027] In a first embodiment of the fourth aspect, the drive circuit is to provide power from the main amplifier device by providing power to the main amplifier connected to the isolated port of the hybrid combiner. This sequential driving can control the impedance of the peak amplifier while keeping the load pulling ratio of the main amplifier device at a low or minimum value.

[0028] The peak amplifier can include a first peak amplifier and a second peak amplifier corresponding to respective branches of a balanced amplifier. The power size of the peak amplifier can be balanced with the backoff and size of the main amplifier to provide a desired backoff of the overall power amplifier. For example, a peak amplifier with a smaller power size can be used to reduce the turn-off impedance problem. This will reduce the backoff of the overall power amplifier, but this can be compensated if a main amplifier device with more backoff is selected (e.g., an N-way Doherty).

[0029] In a second embodiment of the fourth aspect, the drive circuit is to provide power from the main power amplifier device including a power amplifier having high efficiency with expansion to a non-zero backoff level. By using a power amplifier with expanded backoff as part of the main amplifier device, the backoff provided when applying sequential driving to the power amplifier can be further expanded. In addition, as described above, this allows the use of a smaller peak amplifier to reduce problems related to turn-off impedance, where the reduction in backoff caused by using a smaller peak amplifier is compensated by the expanded high efficiency at the main amplifier device backoff.

[0030] In a third embodiment of the fourth aspect, the main amplifier device driven by the drive circuit can include any of the following: a single-ended amplifier, a Doherty amplifier, a Chireix amplifier, an N-way Doherty amplifier, and an envelope tracking amplifier. Any of these alternatives can be used to expand the backoff while maintaining high efficiency.

[0031] In a fourth implementation of the fourth aspect, the power amplifier further comprises a third peaking amplifier coupled to the isolation port of the hybrid combiner, wherein the main amplifier arrangement of the balanced amplifier and the peaking amplifier are coupled to the first input port and the second input port of the hybrid combiner to provide power at the output port, and the drive circuit is further configured to provide power from the third peaking amplifier together with the peaking amplifier of the balanced amplifier when a predetermined power level is reached, and to increase the power level provided by the third peaking amplifier.

[0032] This reduces turn-off impedance losses in the power amplifier and enables impedance control over the entire power range. Thus, in a high power (e.g. 1 KW, working with 9 dB back-off) broadband (e.g. 40% bandwidth) power amplifier design, the back-off average efficiency can be improved. Such a power amplifier topology can be used in modern mobile communication (LTE, 4G, etc.) networks, e.g. in base stations.

[0033] In a fifth implementation of the fourth aspect, the main amplifier arrangement comprises a first main amplifier and a second main amplifier, wherein the output of the first main amplifier is coupled to the first input port of the hybrid combiner and the output of the second main amplifier is coupled to the second input port of the hybrid combiner, such that the first main amplifier and the second main amplifier are configured as a balanced amplifier, and the drive circuit is configured to provide power to the main amplifier arrangement by providing power to the first amplifier and the second amplifier. Thus, the main amplifier arrangement is arranged as an element of a balanced amplifier together with the first peaking amplifier and the second peaking amplifier (peaking amplifier arrangement), and the signal from the balanced amplifier of the main amplifier arrangement can be combined with the signal of the balanced amplifier of the peaking amplifier arrangement at the hybrid combiner, thereby providing low load pulling over the entire power range and reducing turn-off impedance losses.

[0034] In a sixth implementation of the fourth aspect, the main amplifier arrangement comprises a pair of first and second Doherty amplifiers coupled to first and second input ports of the hybrid combiner, the drive circuitry being configured to provide power from the main amplifier arrangement by providing power from the main amplifiers of the respective first and second Doherty amplifiers and to increase the provided output power, and to provide power from the peak amplifiers of the first and second Doherty amplifiers when a predetermined power level of the main amplifiers of the first and second Doherty amplifiers is reached. This allows further extension of the back-off while maintaining high efficiency. In other words, the first and second Doherty amplifiers will operate as main amplifier arrangements coupled to the hybrid coupler input ports and provide power until the predetermined power level is reached. The total amplifier back-off will be extended by the back-off of the Doherty amplifiers for the main amplifier arrangement.

[0035] In other implementations of the fourth aspect, the main amplifier arrangement can comprise a pair of power amplifiers with high efficiency extending towards a non-zero back-off level, for example any one of a single-ended amplifier, a Doherty amplifier, a Chireix amplifier, an N-way Doherty amplifier and an envelope tracking amplifier. The drive circuitry can be configured to provide power to the main amplifier arrangement by providing power to the power amplifiers. Any one of these alternatives can be used to extend the back-off while maintaining high efficiency.

[0036] In another aspect, there is provided a base station for a communication network, the base station comprising a power amplifier according to any of the aspects and implementations described herein.

[0037] In yet another aspect, there is provided a computer program comprising computer- executable instructions which, when executed by one or more processors, cause the drive circuitry to control a power amplifier according to any of the implementations of the second aspect. The computer program can be embodied on a computer-readable carrier medium and comprise instructions which, when executed by one or more processors, cause the method according to any of the implementations of the second aspect to be performed. The carrier medium can be transitory or non-transitory. BRIEF DESCRIPTION OF DRAWINGS

[0038] Embodiments will now be described, by way of example only, with reference to the accompanying drawings in which:

[0039] Fig. 1A shows a schematic diagram of a Doherty power amplifier circuit according to the prior art;

[0040] Fig. 1B shows a block diagram of a Doherty power amplifier circuit according to the prior art;

[0041] Figure 2 shows a plot of efficiency versus output power;

[0042] Figure 3 A distributed balanced Doherty power amplifier is shown in accordance with an example;

[0043] Figure 4 A method of controlling a power amplifier is shown in accordance with an example;

[0044] Figure 5 is a plot showing drive current for a distributed balanced Doherty power amplifier in accordance with an example;

[0045] Figure 6 is a plot showing phase of a drive current signal in a distributed balanced Doherty power amplifier in accordance with an example;

[0046] Figure 7 A distributed balanced Doherty power amplifier is shown in accordance with an example;

[0047] Figure 8 A distributed balanced Doherty power amplifier having a main amplifier implemented as a Doherty amplifier is shown in accordance with an example;

[0048] Figure 9 is a plot showing drive current for a distributed balanced Doherty power amplifier having a main amplifier implemented as a Doherty amplifier in accordance with an example;

[0049] Figure 10 is a plot showing phase of drive current for a distributed balanced Doherty power amplifier having a main amplifier implemented as a Doherty amplifier in accordance with an example;

[0050] Figure 11 is a plot showing impedance for a distributed balanced Doherty power amplifier having a main amplifier implemented as a Doherty amplifier in accordance with an example;

[0051] Figure 12 is a plot showing a relationship of theoretical efficiency versus power for a distributed balanced Doherty power amplifier having a main amplifier implemented as a Doherty amplifier in accordance with an example;

[0052] Figure 13 A balanced single ended single ended (BSS) power amplifier is shown in accordance with an example;

[0053] Figure 14A plot of drive current for a BSS power amplifier is shown in accordance with an example;

[0054] Figure 15 A balanced single ended Doherty (BSD) amplifier is shown with a main amplifier implemented as a Doherty amplifier;

[0055] Figure 16 A BSD amplifier is shown with a main amplifier implemented as an N-way Doherty amplifier; and

[0056] Figure 17 A controller including a drive circuit is shown in accordance with an example. DETAILED DESCRIPTION

[0057] Embodiments of the present disclosure are described in sufficient detail below to enable one of ordinary skill in the art to implement and practice the systems and processes described herein. It is to be understood that embodiments can be provided in many alternative forms and should not be construed as limited to the examples set forth herein.

[0058] Accordingly, while embodiments can be modified in various ways and take on various alternative forms, embodiments herein are shown in the drawings and described in detail as examples. It is not to be construed that the application is limited to the particular forms disclosed. Rather, all modifications, equivalents, and alternatives falling within the scope of the appended claims should be included. Where appropriate, elements of example embodiments are consistently denoted by the same reference numeral throughout the drawings and the DETAILED DESCRIPTION.

[0059] The terminology used herein to describe embodiments is not intended to be limiting in scope. Singular terminology is used with the recognition that plural forms are to be covered unless context clearly dictates otherwise. In other words, unless it is clearly stated to the contrary, the use of singular referents in the description of the embodiments is to be taken as a description of one or more of such referents. It is also to be understood that the use of "including", "comprising", "containing" or "having" and variations thereof herein is to be taken as to mean that the elements listed are to be considered as being included or contained in the described embodiments, but not to exclude other elements or features. It is not intended to exclude other elements or features from the described embodiments.

[0060] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0061] The output power range of practical radio frequency (RF) devices is limited, within which a high drain efficiency can be maintained. For example, FIG. 2 illustrates an example of such limited output power range of a typical prior art device. As such power amplifiers (PAs) use load modulation techniques, this variation in power is achieved by actively load pulling the load. Because the available LPR at which high efficiency can be obtained is limited, the best PA architecture will be able to achieve high efficiency back off (BO) with a small load pull ratio (LPR).

[0062] There is another benefit of a smaller LPR, which is the RF bandwidth (BW). A smaller LPR will have the potential to implement a wideband matching network, capable of tracking the load of the amplifiers making up the PA architecture at different states.

[0063] Another important issue to consider is what happens when different power amplifiers are turned on / off. This is typically done in Doherty-type architectures, where the peaking PA is turned off until a certain threshold power is exceeded. This extends the BO efficiency without increasing the LPR. For example, a Chireix amplifier has a higher LPR than a Doherty amplifier, because the Chireix amplifier does not have a peaking amplifier. The switching of the peaking amplifier introduces another issue, which relates to the off-impedance of the amplifier (transistor) when it is turned off (i.e., not providing power). Ideally, an open circuit is provided when the peaking amplifier is turned off, but in practice, it is difficult to achieve a good (highly reflective) load over a wide frequency range.

[0064] Connecting the peaking amplifier on the balanced side will reduce the load pull ratio of the PA. However, the balanced side is sensitive to the off-impedance of the peaking amplifier. Connecting the peaking amplifier in the isolated port will solve the off-impedance issue, but will use a very high load pull ratio to achieve an acceptable back off level, for example, a load pull ratio of 5: 1 to obtain a back off level of 9.54 dB.

[0065] According to embodiments, a topology is provided for distributing the peaking amplifier signal to compensate for load variations, enabling minimization or elimination of partial or full load modulation of the main amplifier and the peaking amplifier. Furthermore, according to embodiments, a sequential driving approach is used to exploit the LMBA impedance tracking over frequency.

[0066] Figure 3A circuit according to a first embodiment is shown, which is referred to as a distributed balanced Doherty power amplifier (dBD PA).

[0067] A power amplifier arrangement 300 is shown, comprising a quadrature hybrid coupler 310 (configured as a hybrid combiner) and a balanced amplifier arrangement 320, whose outputs of the in-phase branch and the quadrature branch are coupled to input ports 310a, 310b of the hybrid coupler 310, so that the signals are combined and provided to an output load 360 at an output port 310c. A peak allocation circuit 340 receives a peak drive signal (e.g. from a driver circuit) and allocates (provides) the peak signal to a first (single-ended) peak amplifier and a second (single-ended) peak amplifier 322-1, 322-2 at a respective branch of the balanced amplifier arrangement 320, and to a third (single-ended) peak amplifier 330, whose output 330b is connected to an isolated port 310d of the hybrid coupler 310. A first main amplifier and a second main amplifier 321-1, 321-2 are arranged to receive a main drive signal at their inputs 321- la, 321-2a and are coupled to respective input ports 310a, 310b of the hybrid coupler 310 through impedance modifying elements 323a and 323b, respectively, to match the signal outputs of the first and second main amplifiers 321-1, 321-2 to the signal outputs of the first and second peak amplifiers 322-1, 322-2. The impedance modifying elements can include (but are not limited to) transmission lines having an electrical length or other types of matching elements or networks that match the signal outputs of the main amplifiers 321-1, 321-2 and the peak amplifiers 322-1, 322-2, for example.

[0068] The peak allocation circuit 340 comprises a hybrid 180-degree coupler configured as a first hybrid splitter 341, which is arranged to receive a peak input signal at an input port 341d and to provide a direct signal at an output port 341c and a 180-degree shifted signal at an output port 341b. An isolated port 341a of the first hybrid splitter 341 is terminated with a predetermined load Z0(e.g. a resistor having a fixed impedance). An input 330a of the third peak amplifier 330 is connected to the output port 341b, so that the 180-degree shifted peak input signal is fed through the first hybrid splitter 341 to the third peak amplifier 330 and power is provided from the third peak amplifier to the isolated port 310d of the hybrid coupler 310.

[0069] The direct output 341c of the first hybrid splitter 341 is coupled to the input 342a of the second hybrid splitter 342. In the present embodiment, the second hybrid splitter 342 is a hybrid quadrature coupler configured as a quadrature splitter. The direct output port 342b of the second hybrid splitter is connected to the input 322-2a of the second peaking amplifier 322. The quadrature output port 342c is connected to the input 322- la of the first peaking amplifier 322-1. The isolated port 342d is terminated with a fixed impedance Z0. Thus, the first and second peaking amplifiers 322-1, 322-2 are effectively configured as a peaking balanced amplifier arrangement providing quadrature and in-phase signals at the respective inputs 310a, 310b of the hybrid combiner 310.

[0070] Another hybrid quadrature coupler 350 is configured as a third hybrid signal splitter for receiving the main drive signal and delivering the direct and quadrature main drive signals to the first and second main amplifiers 321-1, 321-2, respectively, such that the first and second main amplifiers are configured as main balanced amplifiers. The main drive signal is provided to the input port 350a of the third hybrid splitter 350 and the direct and quadrature signals are provided to the output ports 350b and 350c, respectively. The direct output port 350b is connected to the input 321- la of the first main amplifier 321-1. The quadrature output port 350c is connected to the input 321-2a of the second main amplifier 321-2. The port 350d is an isolated port terminated with a fixed impedance Z0.

[0071] Thus, the multiple input single output (MISO) power amplifier architecture has 2 channels (main drive signal and peaking drive signal) implementing a Doherty power amplifier architecture. Thus, according to Figure 3 In the illustrated embodiment, the peaking drive signal is distributed to a power amplifier connected between the isolated port of the hybrid coupler and the other input port of the hybrid coupler as a balanced amplifier. This distribution of peaking can be used to neutralize the load pulling ratio of the main amplifier, addressing the load pulling ratio issue.

[0072] Accordingly, the first and second peaking amplifiers 322-1, 322-2 introduce load pulling on the main amplifier arrangement (e.g., the first and second main amplifiers 321-1, 321-2). The third peaking amplifier 330 connected to the isolated port 310d of the hybrid combiner 310 eliminates the load pulling of the first and second peaking amplifiers 322-1, 322-2, thereby achieving a zero dB load-pulling ratio for the main amplifier arrangement comprising the first and second main amplifiers 321-1, 321-2. At the same time, the third peaking amplifier 330 is connected to the isolated port 310d of the hybrid combiner 310 and therefore does not affect the main amplifiers that have imperfect off-impedance when turned off, thereby improving the off-impedance problem. Accordingly, using three peaking amplifiers 322-1, 322-2, 330 (e.g., one balanced peaking amplifier 322-1, 322-2 (e.g., using 2 transistors) and a single-ended peaking amplifier 330) distributes the peaking function across the hybrid coupler 310.

[0073] Table 1. Comparison of different implementations of a 1 KW amplifier and 9.54 dB backoff

[0074]

[0075] Table 1 shows a comparison of different architectures of power amplifiers that achieve a 9.54 dB backoff. It can be observed that the classical (C.) Doherty and Prior Art 1 (first implementation) have a high load-pulling ratio problem, which limits the design possibilities. Prior Art 1b employs the driving scheme described above, and the total power size of the device is the same as the dBD embodiment. However, in the example of FIGS. 1A and 1B, half of the power of the peaking amplifiers is connected to the isolated port of the hybrid coupler. Therefore, doubling the size of such a device would result in the output capacitance becoming twice as large. This makes it more difficult to match the output of the peaking device and increases the off-impedance dispersion, which in turn increases the impact of the in-band losses for a given frequency band. Figure 3

[0076] Another advantage of embodiments of the present disclosure becomes apparent when considering the driving signals of the main and peaking amplifiers. Figure 5 The sequential driving current signals of an embodiment with a 9.54 dB backoff 1 KW peak power are shown. Figure 6 The phase of the driving current versus the output voltage is shown. In the example of FIG. 2A, the driving current of the main amplifier is in phase with the output voltage, and the driving current of the peaking amplifier is 180 degrees out of phase with the output voltage. In the example of FIG. 2B, the driving current of the main amplifier is 180 degrees out of phase with the output voltage, and the driving current of the peaking amplifier is in phase with the output voltage. Figure 5 Figure 6 ​​In the figure, 'Main' refers to the driving signal provided from the main amplifiers 321-1, 321-2 by the main balanced amplifier, 'Peak 3' refers to the signal provided by the third peak amplifier 330, and 'Peak 1, 2' refers to the signal provided from the amplifiers 322-1, 322-2 by the peak balanced amplifier.

[0077] Figure 6 The phase of the signal provided by 'Peak 1' is shown, while the phase of the signal provided by 'Peak 2' is not shown. However, it will be appreciated that the phase difference of the signal of 'Peak 2' and the signal of 'Peak 1' will be 90 degrees. In embodiments, the order of the driving procedure is performed according to the method shown in the figure. The procedure starts with a power scan during a start RF signal period (S401). In step S402, the main amplifier arrangement is turned on. In other words, power is provided from the main amplifier arrangement. For example, in the embodiment of the figure, this means that the first main amplifier and the second main amplifier 321-1, 321-2 are driven by the driving signal provided at the input port 350a of the third hybrid splitter 350. As the power scan proceeds, the main amplifier power is increased to meet the demand until the main amplifier power reaches a predetermined level. For example, until the main amplifier power is greater than a threshold value. For example, the threshold value can be the maximum output power of the main amplifier arrangement. In the embodiment of the figure, the threshold value can be the maximum power from the first main amplifier and the second main amplifier, which can be 112W. Figure 4 Figure 3 Figure 3 If the output power exceeds the threshold value is true in step S404, the 'Yes' branch is followed to step S405. In S405, the peak amplifiers are turned on, i.e. power is provided by the peak amplifiers, and the power continues to be provided from the main amplifier arrangement, i.e. the main amplifiers remain on and provide the threshold power, e.g. the maximum available power of the main amplifiers.

[0078] In the embodiment of the figure, 'Peak' refers to the driving current from the first peak amplifier and the second peak amplifier 322-1, 322-2, while 'Peak dBD' refers to the driving current from the third peak amplifier 330. Due to the different sizes, the power of each of the first peak amplifier and the second peak amplifier 322-1, 322-2 is half of the power of the third peak amplifier 330 (222W and 444W), the power is increased. In S406, the power provided by the peak amplifiers 322-1, 322-2, 330 is increased. In step S407, it is determined whether the output power is at the peak envelope power, i.e. the highest envelope power. If 'Yes', the power scan ends in step S408. If 'No', the power provided by the peak amplifiers continues to be increased, and the procedure returns to step S406. Figure 5

[0079] ​​​Thus, there is no need to turn off the main amplifier to achieve the same LPR as prior art 1 (second embodiment). Thus, by applying the sequential driving process of Figure 4 to the power amplifiers of Figure 3 at all power levels, the relative amplitude and phase can be controlled, thereby achieving the benefit of tracking the impedance over a wide frequency range.

[0080] Figure 7 Another embodiment is shown in which the impedance modifying elements 323a and 323b comprise a pair of matched networks (MN) and a combiner, the MNs and combiner coupling the output signals from the respective peak amplifiers 321-1, 321-2 and main amplifiers 322-1, 322-2 at input ports 310a, 310b of the hybrid combiner 310. Other matched networks 711, 712 couple the input terminals 321-la, 321-2a of the main amplifiers 321-1, 321-2 with the output terminals 350b, 350c of the third hybrid splitter 350, respectively. Similarly, matched networks 721, 722 couple the input terminals 322-la, 322-2a of the peak amplifiers 322-1, 322-2 with the output terminals 342b, 342c of the second hybrid splitter 342, respectively. The third peak amplifier 330 is logically supported on one side by a matched network between its input terminal 330a and the output terminal 341b of the first hybrid splitter 341 and on the other side by a matched network between its output terminal 330b and the isolated port 310d of the hybrid combiner 310. In embodiments, the various matched networks 711, 712, 721, 722, 731, 732, 323a, 323b perform network matching to provide effective coupling between elements in the circuit in a manner that will be understood by those skilled in the art.

[0081] In another embodiment, the dBD PA of Figure 3 may be modified to provide an extended back-off of high efficiency. Figure 8 A block diagram of a power amplifier apparatus 800 according to an embodiment is shown in which the first and second main amplifiers 321-1, 321-2 are replaced by first and second Doherty amplifiers 801a, 801b, respectively.

[0082] The first and second Doherty amplifiers 801a, 801b comprise a Doherty peak amplifier 820-1, 820-2 and a Doherty main amplifier 810-1, 810-2, respectively. Impedance modifying elements (e.g. transmission delay lines, e.g. λ / 4 transmission lines) 830a, 830b are provided between the outputs 350b, 350c of the third hybrid splitter 350 and the inputs 810-1a, 810-2a of the main amplifiers 810-1, 810-2 of the Doherty amplifiers. This is such that the phase difference between the signals of the main amplifiers 810-1, 810-2 and the inputs 820-1a, 820-2a of the peak amplifiers 820-1, 820-2 is 90 degrees to provide the classic Doherty action. Furthermore, for each Doherty amplifier 801a, 801b, impedance modifying elements (e.g. transmission delay lines, e.g. λ / 4 transmission lines) 840a, 840b are provided between the outputs of the main amplifiers 810-1b, 810-2b and the outputs of the peak amplifiers ('peak 1') 820-1b, 820-2b to match the respective outputs, i.e. phase match the outputs, such that these outputs are effectively combined at the outputs 820-1b, 820-2b. The other elements of the power amplifier arrangement 800 correspond to those of the arrangement shown in Figure 6

[0083] As each of the main amplifiers 321-1, 321-2 has been effectively replaced by a Doherty amplifier 801a, 801b, the back-off of the overall power amplifier arrangement 800 will be extended by the Doherty back-off provided by the respective Doherty amplifiers 801a, 801b.

[0084] In embodiments, a 1 KW peak power amplifier with 12 dB back-off can be designed according to the topology of Figure 8 In embodiments, a 1 KW peak power amplifier with 12 dB back-off can be designed according to the topology of

[0085]

[0086]

[0087] Figure 9 The sequential drive signals are depicted,​Figure 10 The corresponding phases of the drive signals are depicted. In Figure 9 In Figure 10 'Peak 1, 2' refers to the signals provided by the first and second peak amplifiers 322-1, 322-2, and 'Peak 3' refers to the signal provided by the third peak amplifier 330. Figure 10 The phase of the signal provided by 'Peak 1' is shown, while the phase of the signal provided by 'Peak 2' is not shown. However, it will be appreciated that the phase difference between the signal provided by 'Peak 2' and the signal of 'Peak 1' will be 90 degrees. The phase difference between Peak 3 and Peak 1 is -90 degrees. Figure 10 The phases in are the phases of the signals delivered to the output by the amplifiers. While the embodiment uses a splitter device, the relative phases of the drive signals can be provided and arranged in different ways to provide the same result. It can be seen that the power at the main amplifiers 810-1, 810-2 is increased until a first power threshold is reached, at which point the 'Peak DHT' amplifiers 820-1, 820-2 provide power, which is increased until both the main amplifiers 810-1, 810-2 and the peak amplifiers 820-1, 820-2 of the Doherty device 801a, 801b are saturated (or the power provided exceeds a threshold power value). Then, power is provided by the peak drive signals distributed by the peak distribution circuit 340 from the distributed peak amplifiers 322-1, 322-2, 330 Figure 9 The 'Peak 1, 2' and 'Peak 3' in are provided until a predetermined power level (e.g. peak envelope power) is reached.

[0088] Figure 11 The relationship of the impedance of the amplifiers in the power amplifier device 800 to the output power is shown. It can be seen that the main impedance 'Main DHT' (i.e. the impedance of the main amplifiers 810-1, 810-2) does vary by a factor of 2:1, indicating a moderate load pull ratio for such a high backoff (12 dB). Due to the adoption of the distributed peak amplifier device, the impedance of 'Main DHT' (i.e. the main amplifiers 810-1, 810-2) and 'Peak DHT' (i.e. the peak amplifiers 820-1, 820-2) remains constant from 6 dB backoff to full power. Finally, because the distributed peak amplifier 330 is connected to the isolated port 310d of the quadrature hybrid combiner 310, there is no load pull ratio for the distributed peak amplifier (i.e. 'Peak 3') 330.

[0089] Figure 12The power efficiency (%) of the power amplifier arrangement 800 is shown in relation to power (W). It can be seen that there is a peak of efficiency T1 at a 12 dB back-off corresponding to the additional 6 dB back-off provided by the Doherty amplifiers 801a, 801b, and a second peak of efficiency T2 at a 6 dB back-off provided by the dBD arrangement.

[0090] In Figure 8 The embodiments shown and described above use Doherty amplifiers for the main amplifiers 321-1, 321-2. However, in other embodiments, other amplifier topologies can be used in place of the main amplifiers 321-1, 321-2. Any amplifier topology that provides high efficiency at some back-off (i.e. at a non-zero back-off level) will provide some extension of the high efficiency back-off. For example, one or both of the main amplifiers 321-1, 321-2 described above can be implemented as an N-way Doherty amplifier, a Chireix amplifier, a combination of a Chireix amplifier and a Doherty amplifier, or an envelope tracking amplifier to increase the high efficiency back-off. The topologies of N-way Doherty amplifiers, Chireix amplifiers and envelope tracking amplifiers will be understood by those skilled in the art, and so need not be described further here.

[0091] In another embodiment, the circuit topology of prior art 1 (balanced single ended single ended (BSS) topology) is used, but the dimensions of the devices used are different and have sequential driving according to the method already described with reference to Figure 4 In Figure 13 The power amplifier arrangement 1300 shown is used, but the amplifier elements are driven such that the main drive and the peak / auxiliary drive of prior art 1 are reversed. According to Figure 4The circuit is driven by a sequential drive process. Furthermore, in designing the amplifier 1300, the power size ratio between the peak amplifier and the main amplifier is chosen to optimize the performance. This embodiment is another solution 1310 in the case that the peak amplifier is implemented as a balanced amplifier 1320, the main amplifier 1321 receives the main input drive signal at the input 1321a and has an output 1321b connected to the isolated port 1310d of the quadrature hybrid combiner. The quadrature hybrid combiner is used to combine the signals from the first peak amplifier and the second peak amplifier 1322-1, 1322-2 of the balanced amplifier 1320 at the outputs 1322-1b, 1322-2b to provide power at the output port 1310c. The quadrature hybrid 1340 is arranged as a signal splitter, the quadrature hybrid 1340 takes the peak drive signal at the input port 1340a and provides the direct signal at the direct port 1340b and the quadrature (-90 degree shifted) signal at the quadrature port 1340c. The isolated port 1340d is terminated with a fixed impedance. The direct and quadrature signals of the output ports 1340b, 1340c are provided to the inputs 1322-1a, 1322-2a of the peak amplifiers 1322-1, 1322-2. In an embodiment, the power size of the amplifiers can be: 112W for the main amplifier and 888W (2x444W) for the peak amplifiers to achieve a 9.54dB backoff. The proposed sequential drive supports the use of different power ratios to more flexibly trade off the size of the peak amplifiers against the backoff that the main amplifier device can deliver.

[0092] Figure 14 The relationship of the drive current and the output voltage is shown. It can be seen that the main amplifier 1321 is turned on to provide power and the provided power is increased until a threshold is exceeded. This corresponds to, for example, steps S401-S404 of Figure 4 The above threshold can correspond to the main amplifier 1321 becoming saturated. Once the threshold is exceeded, the peak amplifiers 1322-1, 1322-2 are turned on. That is, power is provided from the balanced amplifier device 1320 comprising the peak amplifiers 1322-1, 1322-2. The peak amplifier power is increased until a certain target power is reached, for example, the peak envelope power of the RF signal. Importantly, the main amplifier 1321 is not turned off and continues to provide power. This corresponds to, for example, steps S405-S408 of Figure 4

[0093] This embodiment therefore solves the LPR problem and by Figure 14 the sequential drive shown and follows Figure 4 ​The LMBA impedance tracking can be implemented by the process described above. The required back-off can be obtained by balancing the size of the peaking amplifier and the main amplifier. For example, a smaller peaking amplifier can be used to reduce the off-state impedance problem, and the back-off can be implemented by selecting a main amplifier with more back-off.

[0094] In an embodiment, the main amplifier with more back-off can be provided by replacing the single-ended main amplifier 1321 with an amplifier replacement with extended back-off, such as a Chireix amplifier, a Doherty amplifier, and a combination of Chireix amplifier, an N-way Doherty amplifier, or an envelope tracking amplifier. In this way, the back-off can be further extended. However, the embodiments are not limited to these examples, and any amplifier arrangement that provides high efficiency at some back-off (non-zero back-off) can replace the single-ended main amplifier 1321.

[0095] For example, Figure 15 An embodiment is shown in which the main amplifier 1321 is implemented as a Doherty amplifier with a main amplifier 1510 and a peaking amplifier 1520. An impedance modifying element 1530 (in this embodiment a λ / 4 transmission line) is connected between the inputs 1510a, 1520a of the main amplifier and the peaking amplifier 1510, 1520 in the Doherty arrangement 1321 to provide the required 90-degree phase difference at the inputs of the main amplifier and the peaking amplifier 1510, 1520. The outputs 1510b, 1520b of the main amplifier and the peaking amplifier 1510, 1520 are connected to respective ends of another impedance modifying element 1540 (in this embodiment a λ / 4 transmission line) that provides a 90-degree shift to match the output. The combined signal output of the main amplifier and the peaking amplifier 1510, 1520 is provided to the isolation port 1310d of the hybrid combiner 1310 through the connection between the output port 1520b of the peaking amplifier 1520 and the isolation port 1310d.

[0096] Figure 16Another embodiment is shown in which the main amplifier 1321 is implemented using an N-way Doherty amplifier including a plurality of power amplifiers 1610-1 to 1610-N. In an embodiment, the first power amplifier 1610-1 is configured as the main amplifier and the subsequent power amplifiers 1610-2 to 1610-N are auxiliary / peak amplifiers. A matching network and signal splitter 1620 provides signal coupling and distributes the main drive signal to the inputs 1610-1a to 1610-1b of the power amplifiers 1610-1 to 1610-N at the input port 1620a of the matching network and signal splitter 1620. The outputs 1610-1b to 1610-Nb of the power amplifiers 1610-1 to 1610-N are connected to the input ports 1630-1a to 1630-Na of a matching network and combiner 1630 which combines the respective output signals and provides a single output 1630b to the isolation port 1310d of the quadrature coupler 1310. The auxiliary / peak amplifiers 1610-2 to 1610-N are configured to be turned on at certain power levels. The staging of the turn on of the auxiliary / peak amplifiers 1610-2 to 1610-N can be configured such that the auxiliary / peak amplifiers are turned on at one time or are staged to turn on at different power levels (e.g., corresponding to efficiency peaks). The more the number of power amplifiers 1610-1 to 1610-N in the N-way arrangement, the more the backoff can be extended, but the more the number of stages, the more the complexity. Other matching networks 1640a, 1640b couple the outputs 1340b, 1340c of the signal splitter 1340 to the inputs 1322-1a, 1322-2a of the peak amplifiers 1322-1, 1322-2. Further, matching networks 1650a, 1650b couple the outputs 1322-1b, 1322-2b of the peak amplifiers 1322-1, 1322-2 to the inputs 1310a, 1310b of the quadrature coupler 1310. Thus, the matching networks provide efficient signal transfer between the signal splitter 1340, the balanced amplifier 1320, and the quadrature coupler 1310.

[0097] As mentioned above, the main amplifier can also be replaced with a power amplifier arrangement based on a Chireix or envelope tracking topology. Since these topologies are understood by those skilled in the art, they are not further described.

[0098] Thus, according to the arrangements and methods described herein, the effects of the off impedance of the peak amplifier can be reduced and impedance control can be achieved over the entire power range. Because a smaller peak amplifier can be used relative to using a main amplifier, the off impedance problem is minimized.

[0099] Thus, in high power (i.e. 1 KW, operating with 9 dB back-off) wideband (i.e. 40% bandwidth) power amplifier designs used in modern mobile communication infrastructure, the average efficiency of back-off can be improved.

[0100] Furthermore, the simplicity of the sequential driving makes it possible to implement these amplifiers using simple driving schemes, for example, a simple 2-channel multi input single output power amplifier (MISO PA) design can be used.

[0101] Figure 17 Embodiments of a driving circuit suitable for providing the sequential driving described above in relation to the methods of the embodiments (e.g. Figure 4 are shown.

[0102] In the present embodiment, the driving circuit can provide the main drive signal and the peak drive signal to the channel 1 (main) and channel 2 (peak) inputs of the power amplifier architecture of the above-described embodiments.

[0103] In embodiments, the driving circuit is a controller providing digital control to a multi input single output PA (MISO PA). Generally, the controller takes the modulated signal, analyses the waveform and determines the signals to be delivered to the multiple input channels 1 and 2, for example, following the flowchart of Figure 4

[0104] The controller 1700 comprises a base band (BB) digital signal processing unit 1720 and an RF module 1730. The BB digital signal processing unit 1720 comprises a look up table / digital pre-distorter (LUT / DPD) unit 1721 providing respective first and second digital outputs to first and second digital-to-analog converters (DACs) 1722, 1723. The outputs of the first and second DACs 1722, 1723 are provided to up-converters (e.g. IQ modulators) 1731, 1732, which in turn provide the main drive signal and the peak drive signal at their outputs to the channel 1 and channel 2 of the power amplifier architecture of the above-described embodiments.

[0105] In the present embodiment, the driving circuit is a controller providing digital control to a multi input single output PA (MISO PA). Generally, the controller takes the modulated signal, analyses the waveform and determines the signals to be delivered to the multiple input channels 1 and 2, for example, following the flowchart of Figure 17 ​In the example of FIG. 17, the modulated signal 1710 to be transmitted is represented in the form of a time-domain signal, which is, for example, the amplitude of an actual LTE signal over a short time interval. The signal 1710 can be processed (e.g., continuously streamed and processed) within the BB digital signal processing unit 1720 to perform signal splitting for the main and peak channels (Channel 1 and Channel 2). The signal splitting performed according to a look-up table implemented in the LUT / DPD unit 1721 is used to process the input signal 1710 and decide the amplitude and phase that should be sent to the respective channels to enable the reproduction of the input modulated signal at the power amplifier with maximum fidelity and optimal efficiency. In the example, the LUT / DPD unit 1721 can be optimized to provide no or very little signal (e.g., substantially no signal) to Channel 2 (corresponding to the peak power amplifier signal) when the amplitude of the modulated signal 1710 is below a threshold. Above the threshold, the LUT / DPD 1721 can return a signal that increases the Channel 2 peak drive signal and keeps Channel 1 (corresponding to the main drive signal) at approximately constant amplitude while adjusting the phase in a convenient way to achieve the required impedance at the peak amplifier. With this phase control and some small amplitude control, it is possible to track the impedance over a wide frequency range, thus enabling the power amplifier in the embodiments to work efficiently over a wide bandwidth. Such phase control and amplitude control techniques are understood by those skilled in the art and thus need not be further described here.

[0106] After processing the signal in the baseband unit 1720, the signal is converted to analog in the respective DAC units 1722, 1723 and the analog signals are provided to the up-converters 1731, 1732 of the RF module 1730. The analog signals are converted to RF by the respective mixers 1731, 1732 in the RF module. The outputs 1730a, 1730b of the RF module 1730 are directly or indirectly connected to the two inputs of the final stage multi input single output (MISO) amplifier (e.g., the power amplifier topology provided in any of the embodiments). In the embodiments, the outputs 1730a, 1730b can be indirectly connected through drivers (not shown) to adapt the input power to the target power amplifier.

[0107] Thus, Figure 17 The drive circuit 1700 of FIG. 17 can be used to provide the Channel 1 (main) and Channel 2 (peak) signals in any of the embodiments described herein. Moreover, according to the embodiments, the LUT / DPD can be used to provide the correct main drive signal and peak drive signal to Channel 1 and Channel 2, respectively, according to the order drive method shown in, for example, Figure 4

[0108] ​However, embodiments are not limited to this drive circuit topology. Other solutions and drive circuits can be used to provide the main drive signal and the peak drive signal, as will be appreciated by the skilled person.

[0109] The control method disclosed in the embodiments can be implemented using a processing unit of the device. In the implementation process, the steps of determining the drive signal (for example, to implement the method of Figure 4 The above-mentioned processing unit configured to perform the power amplifier control method disclosed in the embodiments can include a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component; and the above-mentioned processing unit can implement or execute each method, step and logic block disclosed in the embodiments described herein. The general-purpose processor can be a microprocessor, or any common processor, etc. The steps of the method disclosed in the embodiments can be directly executed and completed by the hardware decoding processor, or can be executed and completed by the combination of hardware and software modules in the decoding processor. The software module can be located in the mature storage medium in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or register. The storage medium is located in the memory, and the processing unit reads the information in the memory and completes the steps of the method by referring to the hardware.

[0110] In the above description, the expression "peak amplifier" is used. However, as will be appreciated by the skilled person, the equivalent expression "auxiliary amplifier" can be used as an alternative.

[0111] Those of ordinary skill in the art can understand that, in combination with the examples described in the embodiments described herein, the units and algorithm steps can be implemented by electronic hardware or a combination of computer software and electronic hardware. Whether the function is performed by hardware or software depends on the application and design constraints of the technical solution. The skilled person can use different methods to implement the described functions for each application, but should not be considered as beyond the scope given herein.

[0112] It can be clearly understood by those skilled in the art that, for the convenience and brevity of description, the specific working processes of the above system, device and unit can refer to the corresponding processes in the above method embodiments, and will not be repeated here.

[0113] In the embodiments provided, it should be understood that the disclosed system, device and method can be implemented in other manners. For example, the described device embodiments are merely exemplary. For example, a plurality of units or components can be merged or integrated into another system, or some features can be omitted or not performed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be implemented through some interfaces. The direct coupling or communication connection between the devices or units can be implemented by electronic, mechanical or other forms.

[0114] The units described as separated components can or can not be physically separated, and the components shown as units can or can not be physical units, can be located in one position, or can be distributed on a plurality of network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiments.

[0115] In addition, the functional units in the embodiments can be integrated into one processing unit, or each unit can exist physically as a separate entity, or two or more units can be integrated into one unit.

[0116] When these functions are implemented in the form of software functional units and sold or used as independent products, these functions can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments, the parts that contribute to the prior art, or part of the technical solutions can be implemented in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for instructing a computer device (which can be a personal computer, a server or a network device) to perform all or part of the steps of the methods described in the embodiments. The above storage medium includes any medium that can store program codes, such as a USB flash drive, a removable hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0117] The embodiments can be implemented in other devices and / or methods. The described embodiments are considered illustrative in all aspects and are not limited. The scope of the present application is indicated by the appended claims rather than by the specification and drawings herein. All modifications within the equivalent meaning and scope of the claims should be included in the scope.

Claims

1. A power amplifier (300, 700, 800), comprising: a hybrid combiner (310) comprising a first input port (310a) and a second input port (310b), an isolated port (310d) and an output port (310c), wherein the hybrid combiner (310) is configured to deliver an output power at the output port (310c); a balanced amplifier arrangement (320) comprising a main amplifier arrangement (321-1, 321-2), a first peaking amplifier and a second peaking amplifier (322-1, 322-2), wherein outputs (321-1b, 321-2b) of the main amplifier arrangement (321-1, 321-2) and outputs (322-1b, 322-2b) of the first peaking amplifier and the second peaking amplifier (321-1, 321-2) are coupled to the first and second input ports (310a, 310b) of the hybrid combiner (310) to provide an output power at the output port (310c); a third peaking amplifier (330) having an output (330b) coupled to the isolated port (310d) of the hybrid combiner (310); a peaking signal distribution circuit (340) configured to provide a peaking amplification signal to input ports (322-1a, 322-2a, 330a) of the first, second and third peaking amplifiers (322-1, 322-2, 330).

2. The power amplifier of claim 1, wherein, The peaking signal distribution circuit (340) comprises: a first peaking hybrid splitter (341) configured to receive the peaking amplification signal at an input port (341d) and to deliver the peaking amplification signal at respective first and second output ports (341b, 341c); a second hybrid splitter (342) comprising an input port (342a) and first and second output ports (342b, 342c), the first and second output ports (342b, 342c) being coupled to inputs (322-1a, 322-2a) of the first and second peaking amplifiers (322-1, 322-2); wherein the first output port (341b) of the first peaking hybrid splitter (341) is coupled to the input (330a) of the third peaking amplifier (330) and the second output port (342c) of the first peaking hybrid splitter (341) is coupled to the input (342a) of the second hybrid splitter (342).

3. The power amplifier according to claim 1 or 2, wherein, The output (322-1 b) of the first peaking amplifier (322-1) is coupled to the first input port (310a) of the hybrid combiner (310), and the output (322-2b) of the second peaking amplifier (322-2) is coupled to the second input port (310b) of the hybrid combiner (310), such that the first and second peaking amplifiers (322-1, 322-2) are configured as a balanced amplifier.

4. The power amplifier according to any one of claims 1 to 3, The main amplifier arrangement (321-1, 321-2) comprises a first main amplifier (321-1) and a second main amplifier (321-2), and The output (321-1 b) of the first main amplifier (321-1) is coupled to the first input port (310a) of the hybrid combiner (310), and the output (321-2b) of the second main amplifier (321-2) is coupled to the second input port (310b) of the hybrid combiner (310), such that the first and second main amplifiers (321-1, 321-2) are configured as a balanced amplifier.

5. The power amplifier according to claim 1, further comprising: a third hybrid splitter (350) for receiving a main input signal at an input port (350a) and delivering a first main output signal and a second main output signal at respective first and second output ports (350b, 350c); wherein the first and second output ports (350b, 350c) of the third hybrid splitter (350) are coupled to respective inputs (321-1a, 321-2a) of the first and second main amplifiers (321-1, 321-2), and wherein the outputs (321-1 b, 321-2b) of the first and second main amplifiers (321-1, 321-2) are coupled to the first and second input ports (310a, 310b) of the hybrid combiner (310) via respective first and second impedance modifying elements (323a, 323b).

6. The power amplifier of any one of claims 1 to 3, wherein, The power amplifier is configured to: provide (S402) power from the main amplifier arrangement (321-1, 321-2) and increase (S403) the output power of the main amplifier arrangement to a predetermined power level, upon reaching (S404) the predetermined power level, provide (S405) power from the first, second and third peaking amplifiers (322-1, 322-2, 330) and increase (S406) the output power level provided by the first, second and third peaking amplifiers (322-1, 322-2, 330) while continuing to provide the output power at the predetermined level from the main amplifier arrangement (321-1, 321-2); increasing (S407) the output power level of the first, second and third peaking amplifiers (322-1, 322-2, 330) until a predetermined output power level is provided at the output port (310c) of the power amplifier.

7. The power amplifier of claim 4 or 5, wherein, At least one of the first and second main amplifiers (321-1, 321-2) comprises a power amplifier device (801a, 801b) having high efficiency extended to non-zero back-off levels.

8. The power amplifier of claim 7, wherein, The power amplifier device (801a, 801b) is any one of: a Doherty power amplifier, an N-way Doherty power amplifier, a Chireix amplifier and an envelope tracking amplifier.

9. A method for controlling a power amplifier (300, 700, 800, 1300, 1500, 1600), the power amplifier comprising: A main amplifier device (321-1, 321-2, 1321) and a balanced amplifier device (320, 1320) having peaking amplifiers (322-1, 322-2, 330, 1322a, 1322b) connected using a hybrid combiner (310, 1310), and a third peaking amplifier (330) coupled to an isolated port (310d) of the hybrid combiner (310), wherein power is delivered at an output port (310c, 1310c) of the hybrid combiner, the output ends (322-1b, 322-2b) of the main amplifier device (321-1, 321-2) and peaking amplifiers (322-1, 322-2) of the balanced amplifier (320) are coupled to first and second input ports (310a, 310b) of the hybrid combiner (310) to provide power at the output port (310c), the method comprising: providing power from the main amplifier device and increasing (S403) the output power provided by the main amplifier device to a predetermined power level, upon reaching the predetermined power level (S404), providing (S405) power from the peaking amplifiers and increasing (S406) the power level provided by the peaking amplifiers while continuing to provide output power by the main amplifiers; and continuing (S407) to increase the power level provided by the peaking amplifiers until a predetermined output power level is provided by the power amplifier; The method further comprises: upon reaching the predetermined power level, providing (S405) power from the third peaking amplifier together with the peaking amplifiers of the balanced amplifier and increasing the power level provided by the third peaking amplifier.

10. The method of claim 9, wherein, Power is provided from the main amplifier device by obtaining power from a main amplifier (1330) connected to an isolated port (1310d) of the hybrid combiner (1310).

11. The method of claim 10, wherein, Power is provided from a main power amplifier device (1321) comprising a power amplifier having high efficiency extended to non-zero back-off levels.

12. The method of claim 11, wherein, The main amplifier arrangement (1321) comprises any one of: a single-ended amplifier, a Doherty amplifier, a Chireix amplifier, an N-way Doherty amplifier, and an envelope tracking amplifier.

13. The method of claim 9, wherein, The main amplifier arrangement comprises: a pair of first and second Doherty amplifiers (801a, 801b) having outputs (820-1b, 820-2b) coupled to the first and second input ports (310a, 310b) of the hybrid combiner (310), respectively, wherein providing power from the main amplifier arrangement (321a, 321b) comprises providing power from main amplifiers (810-1, 810-2) of the respective first and second Doherty amplifiers and increasing the provided output power, and providing power from peak amplifiers (820-1, 820-2) of the first and second Doherty amplifiers when a predetermined power level of the main amplifiers (810-1, 810-2) of the first and second Doherty amplifiers (800a, 800b) is reached.

14. A power amplifier (1300, 1500, 1600) comprising: a hybrid combiner (1310) having an output port (1310c) at which power is delivered; a main amplifier arrangement (1330) connected to an isolated port (1310d) of the hybrid combiner; a balanced amplifier arrangement (1320) having first and second peak amplifiers (1322-1, 1322-2) connected using the hybrid combiner (1310), wherein the power amplifier (1300, 1500, 1600) is configured to perform the method according to any one of claims 10 to 12.

15. A drive circuit for driving a power amplifier (300, 700, 800, 1300, 1500, 1600), the drive circuit comprising: a baseband digital signal processing unit (1720) comprising a look-up table / digital pre-distorter unit (1721); first and second digital-to-analog converters (1722, 1723); up-converters (1731, 1732); and an RF module (1730), wherein the look-up table / digital predistorter unit (1721) is configured to provide respective first and second digital outputs to the first and second digital-to-analog converters (1722, 1723), and wherein the first and second digital-to-analog converters (1722, 1723) are configured to provide respective outputs to the up-converters (1731, 1732), the up-converters (1731, 1732) being configured to provide a main drive signal and a peak drive signal at outputs of the up-converters (1731, 1732) for provision to the first and second channels of the power amplifier.

16. The drive circuit of claim 15, wherein, The power amplifier is according to any one of claims 1 to 8 or 14.

Citation Information

Patent Citations

  • Doherty amplifier

    US20050134377A1