Light Sensor

Abstract

A light sensor is disclosed. The light sensor includes a first pixel and a second pixel. The light sensor includes a measurement circuit. When the light sensor is exposed to light, the first pixel is configured to accumulate a first charge, and the second pixel is configured to accumulate a second charge. The first pixel is configured to trigger the measurement circuit to measure the second charge when the first charge reaches a threshold capacity of the first pixel. An active pixel sensor including the light sensor, an image sensor, and a device incorporating the light sensor are also disclosed.

Description

Technical Field

[0001] The present disclosure relates to a light sensor, an active pixel sensor and an image sensor.The light sensor may be used in an imaging device, such as an imaging device found on a mobile device such as a mobile phone. Background Art

[0002] Image sensors are widely used in a range of devices such as cellular phones, digital cameras and other image recording devices. Such image sensors may be, for example, charge coupled device (CCD) sensors or complementary metal oxide semiconductor (CMOS) image sensors.

[0003] A typical CMOS image sensor includes an array of pixels, where each pixel within the array includes a photodetector (such as a photodiode) and one or more transistors for controlling and / or activating the pixel.

[0004] Such a photodiode is configured to generate and store charge when exposed to incident light. The maximum storage capacity of a photodiode, or more generally a pixel, is referred to as the "Full-Well Capacity" (FWC). FWC can be defined as the amount of charge that a single pixel can store before saturation.

[0005] FWC is fundamental to pixel performance: reduced FWC means lower dynamic range and lower signal-to-noise ratio. The FWC of a pixel in an image sensor (e.g., a pixel array) can be related to the image sensor's ability to capture an image with both dark and bright objects. Charge storage on a pixel reaching the FWC, e.g., effectively saturating the pixel, can result in optical aberrations such as blur. Therefore, it is generally desirable to maximize the FWC of a pixel to maximize the pixel's dynamic range and signal-to-noise ratio.

[0006] For example, by increasing the area of ​​the photodiode within the pixel, such as by increasing the geometry of the charge storage structure within the pixel, a larger FWC can be achieved. However, this approach conflicts with current commercial demand for higher resolution but lower power image sensors, which generally drives the increasing miniaturization and integration of image sensors. In general, smaller pixels may suffer from more limited FWC than larger pixels, at least in part due to the limited charge storage area of ​​the smaller pixels.

[0007] Furthermore, in current CMOS image sensors, photodiodes are typically used to generate and store charge during an integration time (i.e., the time interval during which light is incident on the photodiode, also referred to as exposure time). The integration time of an image sensor or a pixel within a sensor is typically selected to avoid the charge stored on a pixel within the sensor from reaching the FWC. However, the selection of an optimal integration time can be problematic and difficult because the FWC of a pixel can be difficult to accurately predict, at least in part due to the dependence of the FWC on temperature and incident light level.

[0008] An object of at least one embodiment of at least one aspect of the present disclosure is to obviate or at least mitigate at least one of the above-mentioned disadvantages of the prior art. Summary of the invention

[0009] According to a first aspect, a light sensor is provided, comprising a first pixel, a second pixel and a measurement circuit. When the light sensor is exposed to light, the first pixel is configured to accumulate a first charge, and the second pixel is configured to accumulate a second charge. The first pixel is configured to trigger the measurement circuit to measure the second charge when the first charge reaches a threshold capacity of the first pixel.

[0010] Advantageously, the first pixel ensures that the measurement of the charge in the second pixel is made before the charge in the second pixel reaches a threshold value (e.g., FWC), thereby preventing the second pixel from saturating. Advantageously, avoiding saturation of the second pixel ensures that no light information is lost during the exposure time. Advantageously, this makes the light sensor particularly suitable for applications requiring long integration times.

[0011] The first pixel may include a pinned photodiode. The second pixel may include a pinned photodiode.

[0012] The threshold capacity may correspond to a full well capacity of the first pixel.

[0013] The threshold capacity may correspond to a proportion of the full well capacity of the first pixel. For example, the threshold capacity may correspond to 90%, 80%, 70% or even less of the full well capacity of the first pixel.

[0014] The first pixel and the second pixel may be configured such that when the light sensor is exposed to light, the first charge reaches a threshold capacity of the first pixel before the second charge reaches a full well capacity of the second pixel.

[0015] The second pixel may be configured to be less sensitive to a range of wavelengths of light than the first pixel.

[0016] The second pixel may be configured to be less exposed to light of the wavelength range than the first pixel.

[0017] The second pixel may include a layer configured to limit a range of wavelengths of light incident on at least a portion of a photosensitive portion of the second pixel.

[0018] The layer may comprise a material that is substantially opaque or translucent to light in the wavelength range to which the photosensitive portion of the second pixel is sensitive.

[0019] The reset voltage of the first pixel may be different from the reset voltage of the second pixel. Preferably, the reset voltage of the first pixel may be lower than the reset voltage of the second pixel.

[0020] The first pixel and the second pixel may be fabricated to exhibit substantially the same electrical characteristics.The first pixel and the second pixel may be fabricated to include substantially the same full well capacity.

[0021] The light sensor may be manufactured as a monolithic device. The first pixel and the second pixel may be manufactured as a monolithic device. The light sensor may be a CMOS device.

[0022] The light sensor may include discrete components. At least one of the first pixel, the second pixel, the measurement circuit or components thereof may be manufactured independently.

[0023] The measurement circuit may include an analog-to-digital converter (ADC). The ADC may be configured to convert a voltage corresponding to the second charge into a digital signal.

[0024] The light sensor may include a state machine and / or programmable logic and / or a central processing unit (CPU) and / or a circuit. The state machine and / or programmable logic and / or CPU and / or circuit may be configured to repeat the following steps within a predefined exposure time: 1. Reset the first pixel and the second pixel; and 2. When the first charge reaches a threshold capacity, trigger the measurement circuit to measure the second charge.

[0025] The state machine and / or the programmable logic and / or the CPU and / or the circuitry may be configured to determine the total charge within the predefined exposure time by accumulating consecutive measurements of the second charge.

[0026] The state machine and / or the programmable logic and / or the CPU and / or the circuit may be configured to compensate for the overhead time incurred during the measurement of the second charge.

[0027] The first pixel and / or the second pixel may include a 4T active pixel.

[0028] The light sensor may include a plurality of second pixels.

[0029] Each second pixel may be configured to accumulate an associated charge when the light sensor is exposed to light. The first pixel may be configured to trigger the measurement circuit to measure the associated charge when the first charge reaches a threshold capacity.

[0030] According to a second aspect, there is provided an active pixel sensor comprising a plurality of light sensors according to the first aspect.

[0031] A first light sensor of the plurality of light sensors may be sensitive to light within a first wavelength range.

[0032] A second light sensor of the plurality of light sensors may be sensitive to light within a second wavelength range different from the first wavelength range.

[0033] The active pixel sensor may be configured to operate as a color (eg, red, green, blue (RGB)) image sensor.

[0034] The active pixel sensor can be configured to operate as a broadband image sensor. For example, the active pixel sensor can be configured to sense visible light across the entire visible spectrum, such as light with wavelengths in the range of approximately 380 nm to 740 nm.

[0035] The active pixel sensor may be configured to operate as a flicker image sensor, for example a sensor configured to determine the frequency of incident light.

[0036] According to a third aspect, there is provided an image sensor comprising a pixel array and at least one light sensor according to the first aspect.

[0037] According to a fourth aspect, there is provided a device comprising a processor and at least one image sensor according to the third aspect and / or at least an active pixel sensor according to the second aspect and / or at least one light sensor according to the first aspect.

[0038] The device may be, for example, a cellular phone, a digital camera, a security camera, a laptop or tablet device, an image recording device, or the like.

[0039] The above summary of the invention is intended to be merely illustrative and not restrictive. The present disclosure includes one or more corresponding aspects, embodiments or features, either alone or in various combinations, whether or not specifically stated (including claimed) in that combination or alone. It should be understood that the features defined above according to any aspect of the present disclosure or the features of any specific embodiment of the present disclosure below may be used alone or in combination with any other defined features in any other aspect or embodiment, or form another aspect or embodiment of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] These and other aspects of the present disclosure will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0041] Figure 1 Representation of a prior art four-transistor (4T) pinned photodiode (PPD) pixel;

[0042] Figure 2A A schematic diagram of a light sensor according to an embodiment of the present disclosure;

[0043] Figure 2B and Figure 2A A schematic diagram of a state machine used with a light sensor;

[0044] Figure 3 Corresponds to Figure 2A A timing diagram of the operation of the light sensor;

[0045] Figure 4 A schematic diagram of a light sensor according to another embodiment of the present disclosure;

[0046] Figure 5 An image sensor according to an embodiment of the present disclosure;

[0047] Figure 6 An active pixel sensor according to an embodiment of the present disclosure; and

[0048] Figure 7 and a device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0049] Figure 1 A representation of a prior art four-transistor (4T) active pixel, generally designated 100 , is depicted. Active pixel 100 includes a photodiode 105 , a reset transistor 110 , a transfer transistor 115 , a source follower transistor 125 , and a row select transistor 130 .

[0050] For purposes of illustration, the CMOS structure of the photodiode 105 and the transfer transistor 115 are shown as having a well structure within the substrate. For simplicity, the reset transistor 110, the source follower transistor 125, and the row select transistor 130 are shown as symbolic representations of transistors.

[0051] The photodiode 105 includes a pn junction diode configured to be exposed to light and convert incident light into a voltage signal through an optical absorption process. The principle of generating electron-hole pairs through light absorption is well known and will not be described here for convenience.

[0052] The photodiode 105 in the active pixel 100 is a pinned photodiode (PPD). That is, the photodiode 105 has been passivated with a shallow p+ implant 150 (referred to as a pinning layer) over the photosensitive structure of the photodiode 105. The pinning layer 150 allows all of the charge to be transferred to the n-type transistor 115 under the control of the transfer transistor 115. +Floating diffusion node 120, as will be described below. Again, PP is well known in the art and will not be described further at this time.

[0053] Transfer transistor 115 includes floating diffusion node 120 . Transfer transistor 115 is configured to move charge from photodiode 105 to floating diffusion node 120 .

[0054] Reset transistor 110 is coupled between voltage reference 160 and floating diffusion node 120 to reset active pixel 100 , eg, discharge or charge floating diffusion node 120 and photodiode 105 to a reset voltage under control of reset transistor 110 .

[0055] Source follower transistor 125 effectively operates as a voltage buffer. An input voltage (e.g., a voltage at the gate of source follower transistor 125) corresponds to the voltage of floating diffusion node 120. The output of source follower transistor 125 (e.g., a source terminal of source follower transistor 125) generally corresponds to the voltage at the gate of source follower transistor 125 minus the voltage drop across source follower transistor 125. Beneficially, source follower transistor 125 does not draw a significant amount of current from floating diffusion node 120, thus allowing the voltage at floating diffusion node 120 to be measured without discharging floating diffusion node 120.

[0056] Row select transistor 130 selectively couples the voltage at the source of source follower transistor 125 to another circuit, typically including measurement circuitry such as an ADC, to measure the effective voltage at floating diffusion node 120. In use, the voltage at floating diffusion node 120 corresponds to the charge stored at floating diffusion node 120 and is therefore indicative of the intensity of light to which the photodiode has been exposed during the exposure time.

[0057] A typical operation mode of the prior art 4T active pixel 100 is as follows.

[0058] In the initial stage of operation, the reset signal RST is asserted at the gate of the reset transistor 110, and the transfer signal TX is asserted at the gate of the transfer transistor 115. By turning on the reset transistor 110 and the transfer transistor 115 at the same time, the floating diffusion node 120 and the photodiode 105 are connected to the voltage reference 160, such as a power rail. This condition represents the reset state of the active pixel 100. That is, the voltage reference 160 provides a reset voltage for the active pixel 100.

[0059] Next, transfer signal TX is negated at the gate of transfer transistor 115 , effectively turning off transfer transistor 115 , and reset signal RST is negated at the gate of reset transistor 110 to turn off reset transistor 110 , thereby electrically isolating photodiode 105 from voltage reference 160 .

[0060] At this stage, the photodiode 105 can be exposed to light and will accordingly begin accumulation of charge. That is, the exposure time is started by deactivating the transfer signal TX and allowing incident light to charge the photodiode 105. As photogenerated electrons accumulate in the photodiode 105, the voltage at the photodiode 105 decreases.

[0061] After a period of time, known as the integration time or exposure time, the level of accumulated charge, and therefore the amount of light incident on the photodiode 105, can be determined as follows.

[0062] A reset signal RST may be asserted at the gate of reset transistor 110 to reset floating diffusion node 120 to voltage reference 160. In any case, reset signal RST is de-asserted to isolate floating diffusion node 120 at the end of the exposure time.

[0063] Next, transfer signal TX is temporarily asserted at the gate of transfer transistor 115 to allow the accumulated charge on photodiode 105 to be transferred to floating diffusion node 120. That is, photodiode 105 is temporarily coupled to floating diffusion node 120, and thus to the gate of source follower transistor 125. The charge transfer causes the voltage of floating diffusion node 120 to drop from voltage reference 160 to a second voltage that indicates the amount of charge accumulated on photodiode 105 during the exposure time.

[0064] When the charge transfer is complete, row select transistor 130 is configured to couple the voltage at the source of source follower transistor 125 to another circuit, typically including a ramp ADC (not shown), to measure the effective voltage at floating diffusion node 120 .

[0065] In some cases, a reset voltage of floating diffusion node 120, such as voltage reference 160, may also be measured before and / or after measuring charge transfer from photodiode 105. Thus, a more accurate measurement of charge transfer may be made by subtracting the measured reset voltage from the measured voltage due to charge transfer from photodiode 105.

[0066] Figure 2A A schematic diagram of a light sensor, generally designated 200 , is shown in accordance with an embodiment of the present disclosure.

[0067] The light sensor 200 comprises a first pixel 205. The first pixel 205 is configured to operate as a FWC detector, as will be described in more detail below.

[0068] The first pixel 205 includes a first PPD 210. The first pixel 205 includes a first transfer transistor 215 and a first reset transistor 220. For illustration purposes only, the first reset transistor 220 is depicted using a general switch symbol that represents the functionality provided by the first reset transistor 220. Those skilled in the art will appreciate that the first reset transistor 220 may be, for example, an NMOS transistor or the like.

[0069] The anode of the first PPD 210 is coupled to the first voltage reference 275. Figure 2A In the exemplary embodiment of FIG. 1 , the first voltage reference 275 is grounded, for example, 0V.

[0070] The cathode of the first PPD 210 is coupled to the source of the first transfer transistor 215 .

[0071] The gate of the first transfer transistor 215 is coupled to the transfer signal 225. The drain of the first transfer transistor 215 is coupled to the first reset transistor 220. In one embodiment, the drain of the first transfer transistor 215 is coupled to the source of the first reset transistor 220.

[0072] Thus, the first transfer transistor 215 may be configured by the transfer signal 225 to couple the cathode of the first PPD 210 to the first reset transistor 220 , and to another circuit, as will be described below.

[0073] The first reset transistor 220 is coupled to the second voltage reference 250. The second voltage reference 250 may be a power rail, such as a 5V, 3V, 1.8V rail, etc. In an example embodiment, the first reset transistor 220 is an NMOS transistor, the drain of the first reset transistor 220 is coupled to the second voltage reference 250, and the source of the first reset transistor 220 is coupled to the drain of the first transfer transistor 215.

[0074] The gate of the first reset transistor 220 is coupled to the reset signal 230. Thus, the first reset transistor 220 may be configured by the reset signal 230 to couple the first transfer transistor 215 to the second voltage reference 250.

[0075] It should be understood that the arrangement of the first PPD 210, the first transfer transistor 215 and the first reset transistor 220 forming the first pixel 205 generally corresponds to Figure 11 , the arrangement of the PPD 105, the transfer transistor 115, and the reset transistor 110 of the active pixel 100. That is, the first reset transistor 220 and the first transfer transistor 215 can be configured by the reset signal 230 and the transfer signal 225, respectively, to reset the first pixel 205 to a reset voltage (e.g., the second voltage reference 250) and isolate the first floating diffusion node (not shown) associated with the first transfer transistor 215.

[0076] To keep it simple, Figure 2A Not shown is a first floating diffusion node, which may be considered as a charge storage element, such as a capacitive element, coupled between the drain of the first transfer transistor 215 and a first voltage reference 275 (eg, 0 V).

[0077] The light sensor 200 also includes a second pixel 255. The second pixel 255 is configured to operate as a light detector, as will be described in more detail below.

[0078] The second pixel 255 includes a second PPD 260. The second pixel 255 includes a second transfer transistor 265 and a second reset transistor 270. For illustration purposes only, the second reset transistor 270 is depicted using a general switch symbol that represents the functionality provided by the second reset transistor 270. Those skilled in the art will appreciate that the second reset transistor 270 may be an NMOS transistor, etc.

[0079] The anode of the second PPD 260 is coupled to the first voltage reference 275. The cathode of the second PPD 260 is coupled to the source of the second transfer transistor 265.

[0080] The gate of the second transfer transistor 265 is coupled to the transfer signal 225. The drain of the second transfer transistor 265 is coupled to the second reset transistor 270. In one embodiment, the drain of the second transfer transistor 265 is coupled to the source of the second reset transistor 270.

[0081] Thus, the second transfer transistor 265 may be configured by the transfer signal 225 to couple the cathode of the second PPD 260 to the second reset transistor 270 , and to another circuit, as will be described below.

[0082] The second reset transistor 270 is coupled to the second voltage reference 250. In one example embodiment, the second reset transistor 220 is an NMOS transistor, the drain of the second reset transistor 220 is coupled to the second voltage reference 250, and the source of the second reset transistor 270 is coupled to the drain of the second transfer transistor 265.

[0083] The gate of the second reset transistor 270 is coupled to the reset signal 230. Thus, the second reset transistor 270 can be configured by the reset signal 230 to couple the second transfer transistor 265 to the second voltage reference 250.

[0084] It should be understood that the arrangement of the second PPD 260, the second transfer transistor 265, and the second reset transistor 270 forming the second pixel 265 generally corresponds to Figure 1 1 , and the like. The arrangement of the PPD 105, the transfer transistor 115, and the reset transistor 110 of the active pixel 100. That is, the second reset transistor 270 and the second transfer transistor 265 can be configured by the reset signal 230 and the transfer signal 225, respectively, to reset the second pixel 255 to a reset voltage (e.g., the second voltage reference 250) and isolate the second floating diffusion node (not shown) associated with the second transfer transistor 265.

[0085] To keep it simple, Figure 2A Not shown is a second floating diffusion node, which may be considered as a charge storage element, such as a capacitive element, coupled between the drain of the second transfer transistor 265 and the first voltage reference 275 (eg, 0 V).

[0086] The first pixel 205, and in particular the first PPD 210, is configured to be exposed to light, such as ambient light and / or light from a light source and / or light of a specific wavelength range to which the first PPD 210 is sensitive. In an example embodiment, the light sensor 200 may be configured for front-side illumination, e.g., illumination of a side of a semiconductor substrate (not shown) on which the first PPD 210 is fabricated. Alternatively or additionally, the light sensor 200 may be configured for back-side illumination, e.g., illumination of a side of the semiconductor substrate (not shown) opposite to the side on which the first PPD 210 is fabricated.

[0087] The second pixel 255, and in particular the second PPD 260, is also configured to be exposed to light, such as light from the same light source(s) to which the first pixel 205 is exposed. The second PPD 260 is configured to have a different sensitivity to light than the first PPD 210. In an example embodiment, the light sensor 200 can be configured such that the amount or intensity of light incident on the second PPD 260 is less than the amount or intensity of light incident on the first PPD 210. This can be achieved in one of several ways. For example, the area of ​​the second PPD 260 exposed to the light source(s) can be smaller relative to the area of ​​the first PPD 210 exposed to the light source(s). For example, a mask can be implemented on one or more layers of the light sensor 200 to reduce the area of ​​the second PPD 260 exposed to the light source(s) relative to the area of ​​the first PPD 210 exposed to the light source(s). Such a mask can include or be formed in a metal layer. Such a mask can include a material that is substantially opaque or translucent to light of the wavelength range to which the light-sensitive portion of the second pixel is sensitive.

[0088] In another embodiment, a layer such as a mask layer may completely cover the second pixel 255 or at least the second PPD 260. Such a layer may be only partially opaque to light of the wavelength range to which the photosensitive portion of the second pixel is sensitive, for example such a layer may be semi-transparent.

[0089] In one example embodiment, when the light sensor 200 is exposed to light, the second PPD 260 is configured to be exposed to between 10% and 90% of the light to which the first PPD 210 is configured to be exposed. In another example, when the light sensor 200 is exposed to light, the second PPD 260 is configured to be exposed to between 20% and 80% of the light to which the first PPD 210 is configured to be exposed. It should be understood that other ranges are also applicable, where the second PPD 260 is configured to be exposed to less light than the first PPD 210, such as lower intensity light.

[0090] exist Figure 2A In the example embodiment of , the drain of the first transfer transistor 215 is coupled to a first input of the comparator 280, and the drain of the second transfer transistor 265 is coupled to a second input of the comparator 280. Thus, the comparator 280 is configured to compare the voltage at the drain of the first transfer transistor 215 (which corresponds to the charge stored in the first floating diffusion node) with the voltage at the drain of the second transfer transistor 265 (which corresponds to the charge stored in the second floating diffusion node).

[0091] exist Figure 2AIn the example embodiment of , the comparator is a Schmitt trigger, thus providing a degree of hysteresis to compensate for any small fluctuations due to noise on either input of the comparator 280. In other embodiments, the comparator may be, for example, a general purpose operational amplifier.

[0092] The drain of the second transfer transistor 265 is also coupled to the measurement circuit 285 .

[0093] In the example embodiment shown, the measurement circuit 285 includes an integrating analog-to-digital converter (ADC) 290, referred to as a “ramp ADC”. The integrating ADC 290 is configured to be triggered by a start_conversion signal 295. That is, assertion of the start_conversion signal 295 triggers the ADC 290 to provide a digital signal corresponding to the voltage at the drain of the second transfer transistor 265 (at Figure 2A denoted as adc_value (adc_value) 245), which corresponds to the charge stored in the second floating diffusion node.

[0094] It should be understood that in other embodiments, different types of ADCs may be used, such as a flash ADC, a Σ-Δ ADC, or a successive approximation ADC. The choice of ADC type may depend on, for example, power and / or area constraints of the light sensor, timing constraints of the ADC, and / or requirements related to scaling or integration of the light sensor 200 in a device, etc.

[0095] In an exemplary embodiment, the output 235 from the comparator 280 and the digital signal adc_value 245 are inputs to the state machine 240, such as Figure 2B The reset signal 230 , the transfer signal 225 , and the start_conversion signal 295 are output from the state machine 240 .

[0096] Thus, state machine 240 may be configured and / or configurable to reset the first and second pixels and / or trigger the measurement circuit to measure the charge stored in the second floating diffusion node.

[0097] It should be understood that in other embodiments, the state machine 240 may alternatively or additionally be a circuit, combinational logic, sequential logic, a CPU, a programmable device, or the like.

[0098] Reference now Figure 2A , Figure 2B and Figure 3 The operation of the light sensor 200 in conjunction with the state machine 240 is described, wherein Figure 3 is corresponding to Figure 2A 1 is a timing diagram of the operation of the light sensor 200.

[0099] First pixel 205 and second pixel 255 are initially reset by asserting transfer signal 225 and reset signal 230 to couple cathodes of first PPD 210 and second PPD 260 to second voltage reference 250. That is, first PPD 210 and second PPD 260 and their associated floating diffusion nodes are reset to second voltage reference 250.

[0100] Subsequently, both transfer signal 225 and reset signal 230 are deasserted to decouple first PPD 210 and second PPD 260 and their associated floating diffusion nodes from second voltage reference 250. The input of comparator 285 is high impedance and thus the floating diffusion nodes, now effectively isolated, maintain the voltage at second voltage reference 250.

[0101] The integration time starts, and the first PPD 210 and the second PPD 260 begin to accumulate charges according to the amount (eg, intensity) of incident light on the first PPD 210 and the second PPD 260 .

[0102] Initially, the cathodes of both the first PPD 210 and the second PPD 260 are at the voltage of the second voltage reference 250. When the photosensor 200 is exposed to light, electron-hole pairs are generated in each of the first PPD 210 and the second PPD 260.

[0103] Because the first PPD 210 is configured to be more sensitive to incident light than the second PPD 260, electron-hole pairs are generated at a higher rate in the first PPD 210 than in the second PPD 260. Due to the electric field in each PPD 210, 260, the electron-hole pairs are separated, causing the voltage across each PPD 210, 260 to begin to drop. The voltage across the first PPD 210 drops at a faster rate than the voltage across the second PPD 260.

[0104] Eventually, after sufficient exposure time, the voltage across the first PPD 210 drops to approximately zero volts or even less. This may indicate that the PPD 210 has reached its FWC. At this stage, the first transfer transistor 215 begins to conduct due to the voltage drop between the gate and source of the first transfer transistor 215, such as leakage current from the drain to the source. Due to the current leakage, the voltage on the drain of the first transfer transistor 215 (e.g., the reset voltage maintained by the floating diffusion node) begins to drop significantly. Since the drain of the first transfer transistor 215 is coupled to the first input of the comparator 280, the voltage at the first input of the comparator drops accordingly.

[0105] The drain of second transfer transistor 265 is coupled to a second input of comparator 280. Since second PPD 260 is less sensitive to incident light than first PPD 210, second PPD 260 has not yet reached its FWC at this stage. Therefore, the second input of comparator 280 is substantially maintained at the reset voltage.

[0106] Thus, the output 235 of the comparator 285 is configured to provide a trigger signal 310, effectively indicating that the first PPD 210 has reached its FWC. That is, the first pixel 205 is configured to operate as a FWC detector.

[0107] At the time of the trigger signal 310, the second pixel 255 has not yet saturated at its FWC. Thus, the trigger signal 310 can be used as a trigger to measure the charge in the second pixel before the charge in the second pixel reaches its FWC.

[0108] exist Figure 3 , it can be seen that when the FWC of the first PPD 210 is signaled by the trigger signal 310 , the following sequence of events occurs under the control of the state machine 240 .

[0109] exist Figure 3 At time denoted as 315 in FIG. 8 , reset signal 230 is asserted to reset at least first PPD 210 , second PPD 260 , and first and second floating diffusion nodes to a reset voltage, such as second voltage reference 250 .

[0110] Next, after a sufficient time for the second floating diffusion node associated with the second pixel 205 to reach the reset voltage, the integrating ADC 290 Figure 3 The time 320 in FIG. 1 is triggered by the start_conversion signal 295 to convert the reset voltage to a first digital value, such as a first count, at Figure 3 In the example, it is represented as “adc_reset_value”.

[0111] Next, in Figure 3 At time denoted as 325 in FIG. 8 , reset signal 230 is deasserted to isolate the floating diffusion node from the reset voltage.

[0112] Next, in Figure 3 At time denoted as 330 in FIG. 1 , the transfer signal 225 is asserted to transfer the charge on the second PPD 260 to the second floating diffusion node.

[0113] Then, after the second floating diffusion has charged for a sufficient time, Figure 3At time 335, the integrating ADC 290 is triggered by the start_conversion signal 295 to convert the floating diffusion node voltage into a second digital value, such as a second count. Figure 3 Next, the state machine 240 is configured to subtract the second digital value from the first digital value to determine a third digital value corresponding to the light measured by the first pixel 205, Figure 3 It is represented as "subtraction value" in .

[0114] The state machine 240 is configured to accumulate such a third digital value (eg, in response to a sum_up_digitally trigger signal) over the total exposure time to provide Figure 3 That is, each time the trigger signal 310 is asserted, the above process can be repeated, i.e., each time the first PPD 210 reaches its FWC, the second pixel 255 provides a measurement of the light incident on the second pixel 255, and the state machine 240 is configured to accumulate such measurements over the total exposure time.

[0115] It should be understood that in other embodiments, the processing of the digital values ​​(e.g., conversion results) provided by the ADC can be performed as part of the described sequence, or can be performed at a later time. For example, in one embodiment, the digital values ​​provided by the ADC can be stored in a memory and processed at a later time.

[0116] The measurement of light incident on the second pixel 255 may generally be referred to as “reading” the second pixel 255 , or performing a “readout,” and such terminology is used throughout the remainder of this specification.

[0117] The provision of a trigger signal indicating that the first charge has reached the FWC of the first pixel 205 prevents the second pixel 255 from reaching its FWC. In addition, the total exposure time of the light sensor 200 is not as long as Figure 1 The light sensor 200 is not limited to a time defined by the FWC of the pixel as in the prior art pixel 100. Instead, the light sensor 200 can be configured to repeatedly measure light using the second pixel 255 while using the first pixel 205 to ensure that the second pixel 255 never reaches the FWC, as described above. This ensures that no light information is lost during the exposure time by avoiding saturation of the second pixel 255. This also makes the light sensor 200 particularly suitable for applications that require long integration times. In theory, the maximum exposure time of the light sensor 200 is limited only by the capabilities of the digital circuitry, such as the maximum value that the state machine 240 can accumulate.

[0118] In addition, the light sensor 200 only reads the second pixel 255, such as the light collector pixel 255, when the FWC of the first pixel 205 is reached. Therefore, the rate or frequency at which the light sensor 200 reads the second pixel 255 varies depending on environmental factors such as light conditions and temperature. For example, in high-intensity light conditions, the light sensor 200 may read the second pixel 255 every 10us to 20us. However, in low-light conditions, the light sensor 200 may read the second pixel 255 once per millisecond in an area. This can result in significant power savings, especially in low-light conditions.

[0119] The FWC of a photodiode is linear with temperature and logarithmically with light conditions. Therefore, accurate prediction of the FWC of a photodiode can be difficult. Figure 1 In prior art active pixels of 4T active pixels 100, it may be necessary to read the pixels 100 at a high rate in order to provide sufficient margin to avoid saturation of the pixels 100, e.g., to avoid the pixels 100 reaching FWC. For example, a camera on a smartphone may be configured to estimate the exposure time of a picture in order to avoid pixel saturation.

[0120] The light sensor 200 overcomes these disadvantages because the light sensor 200 is configured to ensure that the second pixel 255 (eg, light collector pixel 255 ) never reaches FWC, and therefore no longer needs to estimate the exposure time with sufficient margin to avoid FWC.

[0121] Furthermore, the light sensor 200 is configured to use nearly the entire available resolution of the integrating ADC 290 because, rather than performing readout at a fixed or predefined rate in low light conditions, readout is performed on demand only when the first pixel is at FWC and the second pixel 255 is at a significant proportion of FWC, such as 90% of FWC.

[0122] Furthermore, the typical FWC of a PPD is very low and is typically in the range of 2000 to 20,000 electrons. PPDs, while highly sensitive, typically exhibit a very limited dynamic range due to the low FWC. Light sensor 200 overcomes this limitation because, as described above, light measuring second pixel 255 is prevented from saturating. Therefore, light sensor 200 does not actually have a maximum resolution.

[0123] In an example embodiment, the state machine 240 may be configured to compensate for the overhead time incurred during the readout of the second pixel 255. That is, when the charge stored in the second pixel 255 is measured using the integrating ADC 290, the second pixel 255 is not configured to operate as a photodiode for converting incident light into a voltage signal through an optical absorption process. The state machine 240 may be configured to estimate the light conditions during the overhead time. For example, the state machine 240 may be configured to extrapolate or interpolate between successive measurements of the charge stored in the second pixel 255 by making assumptions and / or predictions about changes in the light conditions (e.g., predicting only limited changes in the light conditions during the time required to read out the pixel 205). For example, the state machine 240 may be configured to linearly interpolate or perform second, third, or higher order interpolation between successive measurements of the charge stored in the second pixel 255 to compensate for the overhead time.

[0124] In yet another example embodiment, the light sensor 200 may include two second pixels, namely a first light collector pixel and a second light collector pixel. The state machine 240 may be configured to compensate for the overhead time incurred during the readout by alternately using each of the first light collector pixel and the second light collector pixel. That is, for example, the state machine 240 may be configured to compensate for the overhead time incurred during the readout by keeping the first light collector pixel in a reset state until the readout of the second light collector pixel is triggered. The triggering of the readout of the second light collector pixel will start (e.g., immediately start) the exposure of the first light collector pixel. That is, triggering the readout of the second light collector pixel may cause the state machine to configure the first light collector pixel so that the photodiode of the first light collector pixel is electrically isolated from the voltage reference 250, thereby configuring the first light collector pixel to start the accumulation of charge accordingly.

[0125] Similarly, the state machine 240 can be configured to compensate for the overhead time incurred during the readout by holding the second light collector pixel in a reset state until the readout of the first light collector pixel is triggered. The triggering of the readout of the first light collector pixel will start (e.g., immediately start) the exposure of the second light collector pixel. That is, triggering the readout of the first light collector pixel can cause the state machine to configure the second light collector pixel so that the photodiode of the second light collector pixel is electrically isolated from the voltage reference 250, thereby configuring the second light collector pixel to start the accumulation of charge accordingly.

[0126] In this way, the state machine 240 may be configured to alternately use the first light collector pixels and the second light collector pixels, thereby avoiding incurring any overhead associated with pixel readout time.

[0127] Although discussed as providing an indication that the charge on the first pixel 205 has reached the FWC, it will be appreciated that the light sensor 200 may be configured to indicate that other threshold capacities below the FWC have been reached.

[0128] For example, light sensor 200 may be configured to indicate a threshold capacity of 90%, 80%, 70%, or even less of the FWC.

[0129] Additionally, in some embodiments, state machine 240 can be configured to trigger readout of a light collection pixel (e.g., second pixel 255) at the end of the total exposure time (e.g., even if first pixel 205 has not yet triggered readout of the light collection pixel. Beneficially, this can ensure that all light collected by the light collection pixel is accumulated by state machine 240 and thus avoid loss of light information during the exposure time.

[0130] In one embodiment, the first transfer transistor 215 may be configured to discharge the first floating diffusion node before reaching the FWC of the first pixel 205. In one embodiment, this may be achieved by adjusting the voltage level at the gate of the first transfer transistor 215 to change the voltage threshold at which the first transfer transistor 215 begins to discharge the first floating diffusion node. In other embodiments, the first transfer transistor 215 may be designed to discharge the first floating diffusion node at or near a desired voltage threshold.

[0131] Figure 4 A schematic diagram of a light sensor, generally designated 400, is shown according to another embodiment of the present disclosure. The circuitry of light sensor 400 is generally the same as that of light sensor 200 and therefore will not be described in detail. The significant differences between light sensor 400 and light sensor 200 are described below.

[0132] The light sensor 400 comprises a first pixel 405. The first pixel 405 is configured to operate as a FWC detector, as will be described in more detail below.

[0133] The first pixel 405 includes a first PPD 410 .

[0134] An anode of the first PPD 410 is coupled to a first voltage reference 475. In an example embodiment, the first voltage reference 475 is ground, such as 0V.

[0135] A cathode of the first PPD 410 may be configured to be coupled to a second voltage reference VDD_LO via a first reset transistor 420. The second voltage reference VDD_LO may be a power supply rail.

[0136] The light sensor 400 includes a second pixel 455. The second pixel 455 is configured to operate as a light detector, as will be described in more detail below.

[0137] The second pixel 455 includes a second PPD 460. The anode of the second PPD 410 is coupled to a first voltage reference 475.

[0138] The cathode of the second PPD 410 may be configured to be coupled to a third voltage reference VDD_HI via a second reset transistor 470. The third voltage reference VDD_HI may be a power rail.

[0139] The third voltage reference VDD_HI is at a higher voltage than the second voltage reference VDD_LO.

[0140] and Figure 2A In contrast to the light sensor 200 of the present invention, in the presently described embodiment, both the first pixel 405 and the second pixel 455 are configured to be exposed to the same amount (e.g., intensity) of light, such as ambient light and / or light from a light source and / or light of a particular wavelength range to which the first PPD 410 and the second PPD 460 are sensitive. That is, the first pixel 405 and the second pixel 455 are configured to have substantially the same sensitivity to light.

[0141] The operation of light sensor 400 is generally similar to that of light sensor 200. However, in contrast to light sensor 200 where both pixels are reset to a common voltage, Figure 4 In the embodiment of FIG. 4 , the first pixel 405 is reset to VDD_LO and the second pixel 455 is reset to VDD_HI.

[0142] Thus, the first pixel 405 is configured to reach the FWC before the second pixel 455. The comparator 485 is configured to provide a trigger signal effectively indicating that the first PPD 410 has reached its FWC.

[0143] Because the first PPD 410 is reset to a lower voltage than the second PPD 460 , the first PPD 410 will always reach FWC before the second PPD 460 .

[0144] In some embodiments, the comparator can be adapted or configured to accommodate different reset voltages VDD_LO and VDD_HI. For example, in one embodiment, the power supply of the comparator can be VDD_LO. In other embodiments, a voltage offset can be applied to one or both inputs of the comparator.

[0145] The embodiments described so far include two pixels: a first pixel for FWC detection and a second pixel for light detection. It should be understood that in other embodiments, the light sensor may include more pixels. For example, the light sensor may include a plurality of second pixels. The light sensor may include an array of second pixels.

[0146] Figure 5 An example of an image sensor, generally designated 500, is depicted. The image sensor includes a first light sensor 505. The first light sensor 505 can be similar to the light sensors 200 or 400 described above, and includes a first pixel 510 for FWC detection and a plurality of second pixels 515 for light detection. The first light sensor 505 is sensitive to light within a first wavelength range. In one embodiment, the first wavelength range substantially corresponds to red light, such as a range centered around 564 nm to 580 nm. For example, a filter layer (not shown) can be applied to the first light sensor 505 to substantially limit light incident on the first light sensor 505 to the first wavelength range.

[0147] The image sensor includes a second light sensor 525. The second light sensor 525 can be similar to the light sensor 200 or 400 described above, and includes a first pixel 530 for FWC detection and a plurality of second pixels 535 for light detection. The second light sensor 505 is sensitive to light within a second wavelength range. In one embodiment, the second wavelength range substantially corresponds to green light, such as a range centered at 534 nm to 545 nm.

[0148] The image sensor includes a third light sensor 545. The third light sensor 545 can be similar to the light sensor 200 or 400 described above, and includes a first pixel 550 for FWC detection and a plurality of second pixels 555 for light detection. The third light sensor 545 is sensitive to light within a third wavelength range. In one embodiment, the third wavelength range substantially corresponds to blue light, such as a range centered at 420 nm to 440 nm.

[0149] Thus, image sensor 500 may be configured to operate as an RGB image sensor.

[0150] The image sensor also includes logic and / or a state machine 560, a CPU, etc., for controlling the first light sensor 505, the second light sensor 525, and the third light sensor 545. It should be understood that although a single state machine 560 is shown, in other embodiments, each light sensor 505, 525, 545 may be associated with a dedicated state machine.

[0151] Similarly, other circuits such as measurement circuits may be instantiated for each light sensor, or shared among multiple light sensors.

[0152] In an example embodiment, the image sensor may further include a memory 580. The memory 580 may be used to store digital values ​​provided by the measurement circuit. The memory 580 may be used to store program code executed by the CPU, for example for processing image-related data and / or for embodiments in which the state machine 560 is alternatively or additionally a programmable CPU.

[0153] Figure 6 An active pixel sensor, generally designated 600, is depicted in accordance with an embodiment of the present disclosure. Figure 6 In the example embodiment of FIG. 6 , the active pixel sensor 600 is formed as a monolithic device. The active pixel sensor 600 includes a plurality of light sensors 605, 610, 615, wherein each light sensor 605, 610, 615 corresponds to a Figure 2A The light sensor 200 shown. It should be understood that although Figure 6 The active pixel sensor 600 includes three light sensors 605, 610, 615, but in other embodiments, the active pixel sensor 600 may include less than or more than three light sensors.

[0154] In further embodiments, a first light sensor 605 of the plurality of light sensors is sensitive to light within a first wavelength range, and another light sensor 610, 615 of the plurality of light sensors is sensitive to light within a second wavelength range different from the first wavelength range.

[0155] Figure 7 A device generally indicated at 700 is depicted in accordance with an embodiment of the present disclosure. The device includes a processor 705 and an image sensor 710. The image sensor may be, for example, Figure 5 In other embodiments, the device may additionally or alternatively include at least one active pixel sensor (such as Figure 6 active pixel sensor as described) and / or at least one light sensor (such as Figure 2A light sensor described above).

[0156] For purposes of example only, device 700 is a cellular telephone. It should be understood that in other examples, the device may be a digital camera, a security camera, a laptop or tablet device, an image recording device, etc.

[0157] Applicants disclose separately each individual feature described herein and any combination of two or more such features, as long as these features or combinations can be performed according to the common general knowledge of those skilled in the art based on the specification as a whole, regardless of whether these features or combinations of features solve any problems disclosed herein, and are not limited to the scope of the claims. Applicants point out that various aspects of the present invention may consist of any such individual features or combinations of features. In view of the foregoing description, it will be apparent to those skilled in the art that various modifications may be made within the scope of the present disclosure.

[0158] Those skilled in the art will appreciate that in the foregoing description and the appended claims, positional terms such as "above," "along," "side," etc., are made with reference to conceptual illustrations such as those shown in the accompanying drawings. These terms are used for ease of reference and are not intended to be limiting. Therefore, these terms should be understood to refer to an object when in an orientation as shown in the accompanying drawings.

[0159] Although the present disclosure has been described according to the preferred embodiments described above, it should be understood that these embodiments are illustrative only and the claims are not limited to those embodiments. Those skilled in the art will be able to make modifications and substitutions in view of the present disclosure, and these modifications and substitutions are considered to fall within the scope of the appended claims. Each feature disclosed or shown in this specification can be combined in any embodiment, either alone or in any appropriate combination with any other features disclosed or shown herein.

[0160] Reference numerals list

[0161] Active Pixel 100

[0162] Photodiode 105

[0163] Reset transistor 110

[0164] Transfer transistor 115

[0165] Floating diffusion node 120

[0166] Source follower transistor 125

[0167] Row selection transistor 130

[0168] P+ injection 150

[0169] Voltage reference 160

[0170] Light Sensor 200

[0171] First Pixel 205

[0172] First PPD 210

[0173] First transfer transistor 215

[0174] The first reset transistor 220

[0175] Transfer signal 225

[0176] Reset signal 230

[0177] Output 235

[0178] State Machine 240

[0179] adc_value 245

[0180] Second voltage reference 250

[0181] Second pixel 255

[0182] Second PPD 260

[0183] The second transfer transistor 265

[0184] The second reset transistor 270

[0185] First voltage reference 275

[0186] Comparator 280

[0187] Measurement circuit 285

[0188] ADC 290

[0189] Start_conversion signal 295

[0190] Trigger signal 310

[0191] Indicates time 315

[0192] Indicates time 320

[0193] Indicates time 325

[0194] Indicates time 330

[0195] Indicates time 335

[0196] Indicates time 315

[0197] Light Sensor 400

[0198] First Pixel 405

[0199] First PPD 410

[0200] First reset transistor 420

[0201] Second pixel 455

[0202] Second PPD 460

[0203] The second reset transistor 470

[0204] First voltage reference 475

[0205] Comparator 485

[0206] Image Sensor 500

[0207] First light sensor 505

[0208] First pixel 510

[0209] Second pixel 515

[0210] Second light sensor 525

[0211] First Pixel 530

[0212] Second pixel 535

[0213] Third light sensor 545

[0214] First Pixel 550

[0215] Second pixel 555

[0216] State Machine 560

[0217] Memory 580

[0218] Active Pixel Sensor 600

[0219] Light Sensor 605

[0220] Light sensor 610

[0221] Light Sensor

[0222] Device 700

[0223] Processor 705

[0224] Image sensor 710

Claims

1. A light sensor, comprising: First pixel; The second pixel; as well as Measuring circuit; wherein when the light sensor is exposed to light, the first pixel is configured to accumulate a first charge and the second pixel is configured to accumulate a second charge; wherein the first pixel is configured to trigger the measurement circuit to measure the second charge when the first charge reaches a threshold capacity of the first pixel, and Wherein the second pixel is configured to be less sensitive to and / or less exposed to light of a wavelength range than the first pixel. 2 . The light sensor of claim 1 , wherein the first pixel and the second pixel each comprise a pinned photodiode. 3 . The photosensor according to claim 1 , wherein the threshold capacity corresponds to a full well capacity of the first pixel, or corresponds to a ratio of the full well capacity of the first pixel.

4. The light sensor of claim 3, wherein the first pixel and the second pixel are configured such that when the light sensor is exposed to light, the first charge reaches the threshold capacity of the first pixel before the second charge reaches the full well capacity of the second pixel. 5 . The light sensor of claim 1 , wherein the second pixel comprises a layer configured to limit a wavelength range of light incident on at least a portion of a photosensitive portion of the second pixel.

6. The light sensor of claim 5, wherein the layer comprises a material that is substantially opaque or translucent to light in the wavelength range to which the light-sensitive portion of the second pixel is sensitive. 7 . The light sensor of claim 1 , wherein a reset voltage of the first pixel is different from a reset voltage of the second pixel.

8. The photosensor of claim 1, wherein the first pixel and the second pixel are fabricated to exhibit substantially the same electrical characteristics and / or include substantially the same full well capacity.

9. The light sensor of claim 1, wherein the measurement circuit comprises an analog-to-digital converter (ADC), wherein: The ADC is configured to convert a voltage corresponding to the second charge into a digital signal.

10. The light sensor according to claim 1, comprising a state machine and / or circuit configured to repeat the following steps within a predefined exposure time: - resetting the first pixel and the second pixel; and - When the first charge reaches the threshold capacity, triggering the measurement circuit to measure the second charge.

11. The light sensor of claim 10, wherein the state machine and / or the circuit is configured to perform at least one of the following operations: determining the total charge during the predefined exposure time by accumulating successive measurements of the second charge; and / or The overhead time incurred during the measurement of the second charge is compensated. 12 . The light sensor of claim 1 , wherein the first pixel and / or the second pixel comprises a 4T active pixel.

13. The light sensor of claim 1, comprising a plurality of second pixels.

14. The light sensor of claim 13, wherein each second pixel is configured to accumulate an associated charge when the light sensor is exposed to light; and wherein the first pixel is configured to trigger the measurement circuit to measure the associated charge when the first charge reaches the threshold capacity.

15. The light sensor of claim 1 , wherein the first pixel is configured to trigger the measurement circuit to measure the second charge when the first charge reaches a threshold capacity of the first pixel and the second charge reaches a significant proportion of the threshold capacity, in, The threshold capacity corresponds to a full well capacity of the first pixel, and a significant proportion of the threshold capacity is 70% to 90% of the full well capacity of the first pixel.

16. An active pixel sensor comprising a plurality of light sensors according to any one of claims 1 to 15.

17. The active pixel sensor according to claim 16, wherein: A first light sensor of the plurality of light sensors is sensitive to light within a first wavelength range; and A second light sensor of the plurality of light sensors is sensitive to light within a second wavelength range different from the first wavelength range.

18. An active pixel sensor according to claim 16 or 17, configured to operate as an RGB and / or broadband and / or flicker image sensor.

19. An image sensor, comprising: Pixel array; as well as At least one light sensor according to any one of claims 1 to 15.

20. An imaging device comprising: processor; And at least one of the following: at least one image sensor according to claim 19; At least one active pixel sensor according to any one of claims 16 to 18; and / or At least one light sensor according to any one of claims 1 to 15.

Images