Wafer scheduling method and device, and semiconductor process equipment

Abstract

This invention discloses a wafer scheduling method, apparatus, and semiconductor process equipment for scheduling bonded wafers formed by bonding two wafers before the process and first and second wafers separated from the bonded wafers after the process. The scheduling method includes: after separating the bonded wafers into first and second wafers by processing them in a process chamber, determining the source wafer cassette corresponding to the first wafer and an empty wafer cassette that can be used to load the second wafer, wherein the source wafer cassette is the wafer cassette used to load the bonded wafers before the process; transferring the source wafer cassette to a first loading / unloading position using a wafer cassette robot, and transferring the empty wafer cassette to a second loading / unloading position using the wafer cassette robot; transferring the first wafer to the source wafer cassette placed at the first loading / unloading position using the first robotic arm of the wafer robot, and transferring the second wafer to the empty wafer cassette placed at the second loading / unloading position using the second robotic arm. This invention provides a novel bonded wafer scheduling scheme.

Description

Technical Field

[0001] This application belongs to the field of semiconductor manufacturing technology, specifically relating to a wafer scheduling method, apparatus, and semiconductor process equipment. Background Technology

[0002] Existing semiconductor vertical furnace scheduling algorithms can transfer wafers from the front-opening unified pod (FOUP) to the corresponding positions in the process chamber (PM) during the charge phase. However, during the discharge phase, they can only transfer wafers from the PM back to the original FOUP. This cannot meet the wafer transfer requirements of new bonding wafer process equipment. Furthermore, it cannot meet the requirements of treating wafers stacked together before the process as a single wafer and separating wafers stacked together after the process into two wafers that need to be transferred to different FOUPs.

[0003] Furthermore, existing bonding wafer separation equipment involves grinding different types of bonded wafers together until the unwound wafer is essentially gone. This method is inefficient and the resulting product is not very satisfactory. Summary of the Invention

[0004] This application provides a wafer scheduling method, apparatus, and semiconductor process equipment to solve the problem that existing bonded wafers cannot be transferred as needed after separation.

[0005] In a first aspect, embodiments of this application provide a wafer scheduling method for scheduling a bonded wafer formed by bonding two wafers before the process and a first wafer and a second wafer separated from the bonded wafer after the process; the scheduling method includes:

[0006] After the bonding wafer is separated into the first wafer and the second wafer by the process in the process chamber, a source wafer box corresponding to the first wafer and an empty wafer box that can be used to load the second wafer are determined, wherein the source wafer box is a wafer box used to load the bonding wafer before the process.

[0007] The source wafer cassette is transferred to the first loading / unloading position by the wafer cassette robot, and the empty wafer cassette is transferred to the second loading / unloading position by the wafer cassette robot.

[0008] The first wafer is transferred to the source wafer cassette placed on the first loading / unloading position by the first robotic arm of the wafer robot, and the second wafer is transferred to the empty wafer cassette placed on the second loading / unloading position by the second robotic arm of the wafer robot.

[0009] Secondly, embodiments of this application further provide a wafer transfer device for scheduling a bonded wafer formed by bonding two wafers before the process and a first wafer and a second wafer separated from the bonded wafer after the process; the scheduling device includes:

[0010] The determination module is used to determine the source wafer cassette corresponding to the first wafer and the empty wafer cassette that can be used to load the second wafer after the bonding wafer is separated into the first wafer and the second wafer by the process in the process chamber, wherein the source wafer cassette is the wafer cassette used to load the bonding wafer before the process;

[0011] The first transmission module is used to transmit the source wafer cassette to the first loading / unloading position via the wafer cassette robot arm, and to transmit the empty wafer cassette to the second loading / unloading position via the wafer cassette robot arm;

[0012] The second transmission module is used to transmit the first wafer to the source wafer cassette placed on the first loading and unloading position via the first robotic arm of the wafer robot, and to transmit the second wafer to the empty wafer cassette placed on the second loading and unloading position via the second robotic arm of the wafer robot.

[0013] Thirdly, embodiments of this application provide a semiconductor process apparatus, including a storage cabinet for placing wafer cassettes, a wafer cassette robot, a first loading / unloading position, a second loading / unloading position, a wafer robot with a first robotic arm and a second robotic arm, and a process chamber, and also includes a controller, the controller being used to schedule a bonding wafer formed by bonding two wafers before the process and a first wafer and a second wafer separated from the bonding wafer after the process using the wafer scheduling method described in the first aspect.

[0014] Fourthly, embodiments of this application provide an electronic device including a processor, a memory, and a program or instructions stored in the memory and executable on the processor, wherein the program or instructions, when executed by the processor, implement the steps of the method described in the first aspect.

[0015] Fifthly, embodiments of this application provide a readable storage medium on which a program or instructions are stored, which, when executed by a processor, implement the steps of the method described in the first aspect.

[0016] The wafer scheduling scheme provided in this application embodiment is used to schedule a bonding wafer formed by bonding two wafers before the process and a first wafer and a second wafer separated from the bonding wafer after the process. After separating the bonding wafer into the first wafer and the second wafer by the process chamber, a source wafer cassette corresponding to the first wafer and an empty wafer cassette for loading the second wafer are determined. The source wafer cassette is the wafer cassette used to load the bonding wafer before the process. The source wafer cassette is transferred to a first loading / unloading position by a wafer cassette robot, and the empty wafer cassette is loaded by the wafer cassette robot. The wafer cassette is transferred to the second loading / unloading position; the first robotic arm of the wafer robot transfers the first wafer to the source wafer cassette placed at the first loading / unloading position, and the second robotic arm of the wafer robot transfers the second wafer to the empty wafer cassette placed at the second loading / unloading position. This solves the problem that existing bonded wafers cannot be transferred according to demand. In addition, by transferring the wafers separately, more separate wafers can be transferred in one process, improving separation efficiency and avoiding the low efficiency caused by grinding one of the bonded wafers until it disappears, thus improving the process effect. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the structure of a new type of bonding wafer process equipment;

[0018] Figure 2 This is a flowchart illustrating the Carrier In phase in related technologies;

[0019] Figure 3 This is a flowchart illustrating the Charge phase in related technologies;

[0020] Figure 4 This is a flowchart illustrating the Discharge phase in related technologies;

[0021] Figure 5 This is a schematic flowchart of the wafer scheduling method in an embodiment of this application;

[0022] Figure 6 This is a flowchart illustrating the Carrier In stage in an embodiment of this application;

[0023] Figure 7 This is a flowchart illustrating the Discharge stage in an embodiment of this application;

[0024] Figure 8 This is a schematic diagram of the wafer scheduling device in an embodiment of this application;

[0025] Figure 9 This is a schematic diagram of the structure of the semiconductor process equipment in the embodiments of this application;

[0026] Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0029] like Figure 1 The diagram shows the structure of a novel bonding wafer process equipment. This equipment has two load ports, Load Port A and Load Port B, used for material transfer between the automated factory overhead crane and the equipment. The crane can place FOUPs (also known as wafer cassettes) into the load ports and simultaneously remove them from the load ports.

[0030] The FOUP robot (also known as the wafer box robot) is responsible for transferring FOUPs. The FOUP robot can take FOUPs from the Load Port or Load Lock position and place them in the buffer position of the Stocker; it can also take FOUPs from the buffer in the Stocker and place them in the Load Port or Load Lock position.

[0031] A Stocker is used to store FOUPs. A Stocker has multiple Buffer areas, such as 18, for storing different types of FOUPs.

[0032] The Load Lock has an opening mechanism that allows the FOUP door to be opened, enabling the Wafer Robot (also known as a wafer manipulator) to pick up and place wafers from the FOUP at this location, transferring the wafers to the PM section. The PM is a chamber used for wafer processing reactions, and it contains a boat for placing wafers.

[0033] The Wafer robot is used to transfer Wafers in FOUPs. It can transfer FOUPs at the Load Lock position to Boats in PMs, and it can also transfer FOUPs at the Boat position to the Load Lock position. It also has the function of scanning (Mapping) FOUPs at the Crystal Boat and Load Lock positions.

[0034] Before the process begins, all FOUPs participating in the process must first be transported into the Stocker; this process is called CarrierIn. During CarrierIn, the specific types of all materials need to be specified in advance, such as Product (P-Product), Monitor (M-Monitor), SideDummy (SD-SideDummy), and ExtraDummy (ED-ExtraDummy). Existing solutions also require pre-setting the types of all buffers in the Stocker (such as P-Product, M-Monitor, SD-SideDummy, ED-ExtraDummy, etc.) to match the material types. When materials are CarrierInduce, different types of materials are placed into the corresponding buffer types in the Stocker. If the corresponding type is full, the equipment will issue an alarm.

[0035] The CarrierIn process is as follows: Figure 2 As shown, the specific steps include: placing a FOUP on the Load Port, specifying the FOUP type, executing the CarrierIn action, checking if there is a corresponding empty slot in the Stocker, and if so, placing the FOUP in the Stocker and executing the MAP operation; otherwise, issuing a warning.

[0036] Furthermore, the process of transferring all materials from the Stocker through the LoadLock to the process chamber PM is called charging. During the charging phase, firstly, according to the material transfer priority, the wafers in the FOUP corresponding to the highest priority type are transferred one by one to the corresponding position in the PM. After all the wafers have been transferred, the wafers in the FOUP with the next highest priority are transferred, until all the wafers required for this process have been transferred to the PM.

[0037] The charging process is as follows: Figure 3 As shown, the specific steps include: acquiring the selected FOUP material and its wafer information; checking whether the wafer type and quantity match the process recipe (Recipe), i.e., determining whether the process quantity requirement is met; if they do not match, an alarm is triggered; if they match, FOUPs are acquired in type order, i.e., traversing FOUPs one by one, with the FOUP traversal parameter set to 0 and incremented for each traversal; determining whether the PM transfer rule is top-down or bottom-up; if it is top-down, the PM position corresponding to the wafer quantity in the FOUP is acquired from high to low; if it is bottom-up, the PM position corresponding to the wafer quantity in the FOUP is acquired from low to high; then specifying the FOUP's charge path (Stocker->LoadLock->Stocker, "->" indicates transfer to, i.e., transfer from Stocker to LoadLock, and then back to Stocker), with the scheduling priority being the current FOUP traversal parameter; then determining whether the FOUP traversal order is top-down or bottom-up; if it is top-down... If the load is down, the wafers in the FOUP are traversed from high to low. If it's bottom up, the wafers in the FOUP are traversed from low to high. Then, the charge path for the wafers is specified (Load Lock C / D->PM), and the wafer priority is set as the traversal order. It is checked whether the wafer traversal is complete. If not, the traversal continues. If complete, it checks whether all FOUPs have been traversed. If not, the traversal continues; otherwise, the process ends. Through these steps, the total priority and path of the selected material are determined. The corresponding move sequence is calculated for that material, and the corresponding combined move is generated based on the priority and path, decomposed, and issued for execution until the charge is complete.

[0038] Furthermore, the process of transferring all materials from PM back to the corresponding location in Stocker is called Discharge. During the Discharge phase, existing scheduling algorithms, based on the reverse Charge process, can only transfer the wafer back to the original FOUP.

[0039] The discharge process is as follows: Figure 4As shown, the specific steps include: checking if a P-type FOUP exists in the Stocker; if it does not exist, an alarm is raised; if it exists, a FOUP is retrieved according to its type; traversing the FOUPs, retrieving P-type FOUPs, creating a FOUP path (Stocker->Load Lock C / D->Stocker), and placing the FOUP; then triggering the single-arm Discharge calculation mode, obtaining the location of the wafer in the current FOUP, and constructing a wafer path (PM->Load Lock C / D), sequentially traversing the wafers within the FOUP; if the wafers within the FOUP have not completed Discharge, continuing to traverse the wafers within the FOUP; if the wafers within the FOUP have completed Discharge, retrieving the Load Lock C / D port FOUP from the Stocker; finally, checking if all FOUPs have been traversed; if not, continuing to traverse; if all have been traversed, the process ends.

[0040] Existing scheduling algorithms for semiconductor vertical process furnaces can transfer wafers from the FOUP to the corresponding PM during the Charge phase, but can only transfer wafers from the PM back to the original FOUP during the Discharge phase. This cannot meet the requirements of new bonding wafer process equipment for wafer transfer, nor can it meet the requirement of treating wafers stacked together before the process as a single wafer for transfer, and separating wafers stacked together after the process into two wafers that need to be transferred to different FOUPs.

[0041] Furthermore, existing bonding wafer separation equipment involves grinding different types of bonded wafers together until the unwound wafer is essentially gone. This method is inefficient and the resulting product is not very satisfactory.

[0042] To address this, this embodiment provides a wafer scheduling method for a novel bonding wafer process equipment. Before entering the process unit (PM), materials are stacked in pairs and placed in a slot within a FOUP. After the reaction in the PM is complete, the stacked wafers automatically separate due to temperature and process gases. Typically, the upper wafer in each pair of wafers is the actual product wafer, which can be designated as a Product type, and the lower wafer is an auxiliary Product wafer, which can be designated as a ProductDummyProduct (PDP) type (the specific type is determined based on the actual process wafer type). Process wafer transfer is explicitly required to be processed as a single wafer before the process and then separated and placed into the FOUP after the process. This embodiment identifies a source FOUP corresponding to the first wafer and an empty FOUP for unloading the second wafer. The source FOUP is the FOUP used to carry the bonding wafer before the process. The first wafer is transferred to the source FOUP, and the second wafer is transferred to the empty FOUP. This achieves the transfer of different wafers back to different FOUPs, solving the problem that existing bonding wafers cannot be transferred according to demand. In addition, by transferring the wafers separately, more separate wafers can be transferred in one process, improving separation efficiency and avoiding the low efficiency caused by grinding one of the bonding wafers until it disappears. It also improves the process effect.

[0043] The method for producing props provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0044] Figure 5 An embodiment of the present invention provides a wafer scheduling method, which can be executed by an electronic device, including a server and / or a terminal device. In other words, the method can be executed by software or hardware installed on the electronic device.

[0045] In this embodiment, the application scenario is that a wafer cassette stores bonded wafers, and the bonded wafer formed by bonding two wafers before the process will be separated into a first wafer and a second wafer after the process.

[0046] Specifically, before entering the process chamber, the bonding wafers are stacked in pairs and placed in a slot of a wafer cassette. After the reaction is completed in the process chamber, the stacked bonding wafers will automatically separate due to the influence of temperature and process gases.

[0047] For this scenario, this embodiment provides a scheduling method mainly corresponding to the Discharge phase, which includes the following steps:

[0048] Step 501: After separating the bonded wafer into a first wafer and a second wafer by processing it in the process chamber, determine the source wafer cassette corresponding to the first wafer and the empty wafer cassette that can be used to load the second wafer.

[0049] The source wafer box is a wafer box used to load the bonding wafer before the process.

[0050] An empty wafer box can be an unspecified type of wafer box, which allows loading of a second wafer regardless of its type.

[0051] Specifically, for the discharge stage after the process is completed, the wafer information in the process chamber is updated again after the process. If the first wafer in the bonding wafer is of type 1 and the second wafer is of type 2, for example, type 1 can be type P and type 2 can be type PDP (the specific type is determined according to the actual wafer type in the process), then the type P wafer can be divided into upper wafers, and the upper wafer retains all the original wafer information; a new wafer is created at the lower wafer position, the wafer type is PDP, and the wafer name is the original name_B. For example, assuming the original wafer name is PRO1.1, then the wafer name at the lower wafer position is PRO1.1_B.

[0052] Step 502: The source wafer cassette is transferred to the first loading / unloading position by the wafer cassette robot, and the empty wafer cassette is transferred to the second loading / unloading position by the wafer cassette robot.

[0053] Specifically, in order to distinguish between the source wafer box and the empty wafer box, and in order to be able to transfer the first wafer and the second wafer simultaneously, the source wafer box can be transferred to the first loading and unloading position by the wafer box robot, and the empty wafer box can be transferred to the second loading and unloading position by the wafer box robot.

[0054] Step 503: The first wafer is transferred to the source wafer cassette placed on the first loading / unloading position by the first robotic arm of the wafer robot, and the second wafer is transferred to the empty wafer cassette placed on the second loading / unloading position by the second robotic arm of the wafer robot.

[0055] Specifically, the first wafer can be transferred to the source wafer cassette and the second wafer can be transferred to the empty wafer cassette, thereby realizing the transfer of the separated first and second wafers to two different wafer cassettes.

[0056] In this embodiment, by transferring the first wafer to the source wafer cassette and the second wafer to the empty wafer cassette, the separated first and second wafers are transferred to two different wafer cassettes. This solves the problem that existing bonded wafers cannot be transferred as needed. Moreover, compared to grinding two bonded wafers until one of them is essentially gone, this method allows for the separation of more wafers in a single process, resulting in higher efficiency and improved wafer processing performance.

[0057] In one implementation, the bonding wafer and the first wafer are of type 1, the second wafer is of type 2, the wafer cassette is of the same type as the wafer it houses, and the buffer type is unset by default. Before separating the bonding wafer into the first wafer and the second wafer using a process, the method further includes:

[0058] After the wafer cassette containing the bonded wafer is transferred to the loading / unloading port, it is checked whether there is any free, unconfigured buffer area in the storage cabinet.

[0059] If a cache area without a set type is detected in the storage cabinet, the wafer cassette is transported to the cache area by the wafer cassette robot, and the type of the cache area containing the wafer cassette is updated to the type of the wafer cassette.

[0060] The wafer cassette is transferred from the buffer area to the first loading / unloading position or the second loading / unloading position by the wafer cassette robot, and the bonding wafer is transferred to the process chamber by the first or second robotic arm of the wafer cassette robot.

[0061] Specifically, before the bonded wafer is separated into the first wafer and the second wafer through processing, there is a stage where the wafer cassette is transferred to the storage cabinet, which can be called the FOUPCarrierIn stage. During this process, after the wafer cassette containing the bonded wafer is transferred to the loading / unloading port, it is checked whether there is a free, untyped buffer area in the storage cabinet. If so, the wafer cassette can be transferred to the buffer area, and the type of the buffer area containing the wafer cassette is updated to the type of the wafer cassette. In this embodiment, no type is set for the free buffer areas in the storage cabinet. The wafer cassette can be transported to any free buffer area, and then the type of the buffer area containing the wafer cassette is updated to the same type as the wafer cassette. This effectively improves the utilization rate of the free buffer areas in the storage cabinet.

[0062] Optionally, the new bonding wafer process equipment can specify the type of wafers fed into the CarrierIn stage as P, while other material types can retain their designated types (M-Monitor, SD-SideDummy, ED-ExtraDummy, etc.). Idle wafer cassettes are designated as the newly added PDP type (this type is an empty cassette marker; the specific type can be specified according to requirements). The buffer type of the storage cabinet within the machine is set to "Unknown," meaning that the buffer type is "Unknown" when no wafer cassette is placed there. Only when a wafer cassette is placed into the corresponding buffer location in the storage cabinet will the buffer type automatically change to match the wafer cassette type.

[0063] For example, suppose that when specifying the type of buffer, there are 5 buffers for the Special Wafer (ED) type and 10 buffers for the Product Wafer (P) type, and different types of wafers can only be placed in their corresponding buffers. In this case, suppose the storage cabinet only occupies the buffer corresponding to one ED type wafer cassette, leaving 4 ED type buffers free. However, 12 Product type wafer cassettes need to be moved into the storage cabinet, requiring 12 buffers. Since the storage cabinet only has 10 buffers for the Product type, these 12 Product type wafer cassettes cannot be moved in at once and must be processed in batches. This application, however, does not specify the type of the free buffers; that is, the buffer type is set to unset by default. This allows the 12 Product type wafer cassettes to freely occupy the free buffers, thus avoiding the problem of batch processing and effectively improving the utilization rate of the buffers in the storage cabinet, thereby improving process efficiency.

[0064] The following is through Figure 6 The flowchart shown illustrates the specific process of the CarrierIn phase described above.

[0065] The process specifically includes: placing a wafer pod (FOUP) on the Load Port, specifying the wafer pod type, and starting the CarrierIn operation; detecting whether there is a free space (i.e., buffer) in the storage cabinet (Stocker); if so, placing the wafer pod into the free space in the storage cabinet and performing a MAP operation to set the type of the buffer to be consistent with the type of the wafer pod; and issuing an alert if there is no free space in the storage cabinet.

[0066] In another implementation, determining the source wafer cassette corresponding to the first wafer and the vacant wafer cassette available for loading the second wafer includes:

[0067] The wafer cassette in the storage cabinet used to load the bonding wafer before the process is identified as the source wafer cassette; it is detected whether there is a wafer cassette in the storage cabinet that is not set to a type that can load the second wafer and is not filled with a wafer; if the detection result is yes, the wafer cassette without a wafer is identified as the empty wafer cassette.

[0068] Specifically, the wafer cassette without wafers has no type specified, which allows wafers of any type to be placed in the cassette, improving process efficiency.

[0069] Furthermore, specifically, in this embodiment, the wafer cassette used to load the bonding wafer before the process can be identified as the source wafer cassette for accommodating the first wafer, thereby enabling the identified source wafer cassette to load the first wafer. Additionally, it is necessary to detect whether there is an empty wafer cassette in the storage cabinet capable of loading the second wafer but without any wafers placed inside. If such a wafer cassette exists, it can be identified as an empty wafer cassette for loading the second wafer. It should be noted that if there is no wafer cassette in the storage cabinet capable of loading the second wafer but without any wafers placed inside, it indicates that the second wafers in the process chamber cannot all be returned to the storage cabinet, and an alarm can be triggered to alert the user.

[0070] Furthermore, in one implementation, the step of transferring the source wafer cassette to the first loading / unloading position via a wafer cassette robot, and transferring the empty wafer cassette to the second loading / unloading position via the wafer cassette robot, includes:

[0071] A first transport path is set for the source wafer cassette, wherein the first transport path is to transport the source wafer cassette from a storage cabinet for placing the source wafer cassette to the first loading and unloading position, and from the first loading and unloading position back to the storage cabinet, wherein the source wafer cassette returned to the storage cabinet has been loaded with the first wafer;

[0072] A second transport path is set for the empty wafer box, wherein the second transport path is to transport the empty wafer box from the storage cabinet for placing the empty wafer box to the second loading and unloading position, and from the second loading and unloading position back to the storage cabinet, wherein the empty wafer box returned to the storage cabinet is loaded with the second wafer;

[0073] The wafer cassette robot transports the source wafer cassette to the first loading / unloading position based on the first transport path, and transports the empty wafer cassette to the second loading / unloading position based on the second transport path.

[0074] Specifically, for the source wafer box, a path of storage cabinet -> first loading / unloading position -> storage cabinet is constructed, and the source wafer box is placed into the first loading / unloading position of the storage cabinet; and for the empty wafer box, a path of storage cabinet -> second loading / unloading position -> storage cabinet is constructed, and the empty wafer box is placed into the second loading / unloading position of LoadLock, thereby realizing the transfer of the wafer box to the corresponding position of LoadLock.

[0075] Furthermore, in one implementation, the step of transferring the first wafer to the source wafer cassette placed on the first loading / unloading position via the first robotic arm of the wafer robot, and transferring the second wafer to the empty wafer cassette placed on the second loading / unloading position via the second robotic arm of the wafer robot, includes:

[0076] A third transport path is set for the first wafer, wherein the third transport path is to transport the wafer from the process chamber to the first loading / unloading position;

[0077] A fourth transport path is provided for the second wafer, wherein the fourth transport path is for transporting the wafer from the process chamber to the second loading / unloading position;

[0078] Based on the third transport path, the first wafer is transferred by the first robotic arm to the source wafer cassette placed at the first loading and unloading position;

[0079] Based on the fourth transport path, the second wafer is transferred by the second robotic arm to the empty wafer cassette placed in the second loading / unloading position.

[0080] Specifically, in this embodiment, paths can be set for the first wafer and the second wafer after splitting. For the first wafer, a path of process chamber -> first loading / unloading position is constructed to place the first wafer into the source wafer cassette already placed in the first loading / unloading position. For the second wafer, a path of process chamber -> second loading / unloading position is constructed to place the second wafer into the empty wafer cassette already placed in the second loading / unloading position, thereby realizing the transfer of the first wafer and the second wafer to different wafer cassettes respectively.

[0081] Furthermore, specifically, the first and second wafers can be positioned vertically within the process chamber. The first robotic arm, equipped with a suction cup, can pick up the upper wafer (i.e., the first wafer) after separation from the bonded wafer; the second robotic arm can be used to hold the lower wafer (i.e., the second wafer) after separation from the bonded wafer. In this way, the two separated wafers are transferred back to different wafer cassettes by the dual-arm robotic arms, allowing for the separation of multiple wafers in a single process, improving separation efficiency, and ensuring the quality of the separated wafers.

[0082] In another implementation, the first wafer and the second wafer corresponding to the same bonding wafer have the same wafer scheduling priority; the step of transferring the second wafer to the empty wafer cassette placed on the second loading / unloading position via the second robotic arm of the wafer manipulator includes:

[0083] Once it is determined that the first robotic arm has transferred the first wafer to the source wafer cassette, the second robotic arm then transfers the second wafer, which has the same wafer scheduling priority as the first wafer, to the vacant wafer cassette.

[0084] Specifically, the first and second wafers corresponding to the same bonding wafer can be set to the same priority, that is, the upper and lower wafers (first and second wafers) at the same position in the process chamber are set to the same priority. At this time, the two robotic arms corresponding to wafers with the same priority generate bilateral actions simultaneously. The first robotic arm loads the first wafer, and the second robotic arm loads the second wafer. For wafers with the same priority, the second robotic arm is only allowed to load the second wafer after the first robotic arm has completed the transfer action of the first wafer, thereby ensuring that the first and second robotic arms operate separately and at maximum speed.

[0085] Furthermore, in one implementation, the number of wafer cassettes is multiple, and each wafer cassette can hold multiple bonding wafers;

[0086] Before the process of separating the bonded wafer into the first wafer and the second wafer, the method further includes:

[0087] Obtain the type and total number of each bonding wafer in each wafer cassette, and determine whether the type and total number of bonding wafers match the process formulation of the process.

[0088] If so, then traverse each wafer cassette, set the wafer cassette scheduling priority and the first transport path for each wafer cassette according to the actual traversal order, and determine the number of bonding wafers in each wafer cassette and the placement position of the bonding wafers in the process chamber.

[0089] For each wafer cassette, the bonding wafers therein are traversed in a first preset order, and a wafer scheduling priority is set for each bonding wafer in the first preset order. At the same time, a fifth transport path is set for each bonding wafer according to the placement position of the bonding wafer in the wafer cassette in the process chamber, wherein the fifth transport path is to transport from the first loading / unloading position or the second loading / unloading position to the process chamber.

[0090] The bonding wafer is transferred to the process chamber for processing according to the wafer cassette scheduling priority, the first transport path, the wafer scheduling priority, and the fifth transport path.

[0091] Specifically, when there are multiple wafer cassettes, and each wafer cassette can hold multiple bonded wafers, before separating the bonded wafers for the process, it is necessary to determine whether the type and total number of bonded wafers match the process formulation of the process. If they match, the next step can be carried out; if they do not match, an early warning can be issued.

[0092] Furthermore, specifically, during the process of transferring the bonded wafers from the wafer cassette to the process chamber, a wafer cassette scheduling priority can be set for each wafer cassette according to the actual traversal order of all wafer cassettes. For example, the earlier the actual traversal order, the higher the wafer cassette scheduling priority. At the same time, a first transport path can be set for each wafer cassette in the actual traversal order of all wafer cassettes. This first transport path is from the storage cabinet used to place the source wafer cassette to the first loading and unloading position. In addition, it is also necessary to determine the number of bonded wafers in each wafer cassette and the placement position of the bonded wafers in the wafer cassette in the process chamber, so as to facilitate the transfer of the bonded wafers in each wafer cassette to the corresponding placement position in the process chamber.

[0093] Of course, for each wafer cassette, the bonding wafers can be traversed according to a first preset order, and a wafer scheduling priority can be set for each bonding wafer according to the first preset order. For example, the wafers that are sorted earlier in the first preset order have a higher scheduling priority. At the same time, a fifth transport path can be set for each bonding wafer according to the placement position of the bonding wafers in the wafer cassette in the process chamber, so that the bonding wafers can be transported to the process chamber according to the fifth transport path.

[0094] In this way, by setting the wafer cassette scheduling priority, the first transport path of each wafer cassette, the wafer scheduling priority of the bonding wafers in each wafer cassette, and the fifth transport path of each bonding wafer, the wafer cassette and the bonding wafer can be transported according to these parameters, so that each bonding wafer in each wafer cassette can be transported to the process chamber for processing.

[0095] Optionally, the first wafer is transferred to the source wafer cassette placed on the first loading / unloading position by the first robotic arm of the wafer robot, and the second wafer is transferred to the empty wafer cassette placed on the second loading / unloading position by the second robotic arm of the wafer robot, including:

[0096] Obtain the type of each first wafer, the type of each second wafer, the total number of first wafers, and the total number of second wafers; determine whether the types of all first wafers, the types of all second wafers, the total number of first wafers, and the total number of second wafers match the process formulation of the process.

[0097] If so, then determine the number of first wafers corresponding to each source wafer cassette and the placement position of the first wafers corresponding to the source wafer cassette in the process chamber, and determine the number of second wafers corresponding to each empty wafer cassette and the placement position of the second wafers corresponding to the empty wafer cassette in the process chamber;

[0098] For each source wafer cassette, the first wafers corresponding to the source wafer cassette are traversed according to a second preset order, and a wafer scheduling priority is set for each first wafer according to the second preset order. At the same time, a third transport path is set for each first wafer according to its placement position in the process chamber.

[0099] For each of the vacant wafer cassettes, the second wafers corresponding to the vacant wafer cassettes are traversed according to the second preset order, and a wafer scheduling priority is set for each second wafer according to the second preset order. At the same time, a fourth transport path is set for each second wafer according to its placement position in the process chamber.

[0100] According to the wafer scheduling priority of the first wafer and the third transport path, the first wafer is transmitted to the corresponding source wafer cassette, and according to the wafer scheduling priority of the second wafer and the fourth transport path, the second wafer is transmitted to the corresponding vacant wafer cassette.

[0101] Specifically, during the transfer of the first wafer and the second wafer, it can be determined whether the types of all first wafers, the types of all second wafers, the total number of first wafers, and the total number of second wafers match the process formula of the process. If they match, proceed to the next step; if they do not match, issue an early warning.

[0102] When determining the match, for each source wafer cassette, the number of first wafers corresponding to each source wafer cassette and the placement position of the first wafers corresponding to the source wafer cassette in the process chamber can be determined firstly. Then, all the first wafers corresponding to the source wafer cassette are traversed according to a pre-set second preset order, and a wafer scheduling priority is set for each corresponding first wafer according to the second preset order. For example, the wafers that are ranked earlier in the second preset order have a higher scheduling priority. At the same time, a third transport path is set for each first wafer according to the placement position of each corresponding first wafer in the process chamber, so that the first wafer can be transferred to the source wafer cassette according to the third transport path.

[0103] Furthermore, for each vacant wafer cassette, the number of second wafers corresponding to each vacant wafer cassette and the placement position of the second wafers corresponding to the vacant wafer cassette in the process chamber can be determined first. Then, all the second wafers corresponding to the vacant wafer cassette are traversed according to a pre-set second preset order, and a wafer scheduling priority is set for each corresponding second wafer according to the second preset order. For example, the wafers that are ranked earlier in the second preset order have a higher scheduling priority. At the same time, a fourth transport path is set for each second wafer according to the placement position of each corresponding second wafer in the process chamber, so that the second wafer can be transferred to the source wafer cassette according to the fourth transport path.

[0104] In this way, by setting the wafer scheduling priority of each first wafer, the third transport path of each first wafer, the wafer scheduling priority of each second wafer, and the fourth transport path of each second wafer, the first wafer and the second wafer can be transmitted according to these parameters, thereby realizing the sequential return of all first wafers to the original source wafer cassette carrying the bonding wafers and the sequential return of all second wafers to the empty wafer cassette.

[0105] The following is through Figure 7 The specific process of one embodiment of this application will be described.

[0106] Assuming the bonding wafer is designated as type P, the wafer information in the process chamber is updated again after the process. The type P wafer is divided into upper wafers, which retain all the original wafer information. A new wafer is created at the lower wafer location, with the wafer type being PDP. This process specifically includes:

[0107] The system checks whether a P-type wafer cassette exists in the storage cabinet. If it does not exist, an alarm is triggered. If it does exist, the system checks whether there are enough empty wafer cassettes in the storage cabinet to hold PDP-type wafers in the process chamber.

[0108] If not, an alarm is triggered; if so, a P-type wafer box is obtained in traversal order, and the bonding wafers in the P-type wafer box are traversed.

[0109] Create a P-type wafer cassette path (storage cabinet -> Load Lock C (corresponding to the first loading / unloading position) -> storage cabinet), and place the P-type wafer cassette into Load Lock C;

[0110] Obtain a PDP type wafer box (i.e., an empty wafer box), create a PDP type wafer box path (storage cabinet -> LoadLock D (corresponding to the second loading / unloading position) -> storage cabinet), and put the PDP type wafer box into Load Lock D;

[0111] Obtain the specific position sequence of the bonded wafers in the process chamber within the traversed P-type wafer cassette;

[0112] The upper and lower wafers (i.e., the first wafer and the second wafer) at the acquired positions are separated into different processes. The upper P-type (first wafer) is constructed with a process chamber -> LoadLockC path and the first robotic arm (Arm1) is attached. The lower PDP-type (second wafer) is constructed with a process chamber -> LoadLockD path and the second robotic arm (Arm2) is attached.

[0113] The first wafer corresponding to the P-type wafer box is sequentially traversed, and the first wafer is transferred to the P-type wafer box according to the construction path corresponding to the first wafer; at the same time, the second wafer corresponding to the empty wafer box is traversed, and the second wafer is transferred to the empty wafer box according to the construction path corresponding to the second wafer.

[0114] Set the same priority for the upper and lower wafers (i.e., the first wafer and the second wafer) in the same process chamber location;

[0115] Traverse all the first and second wafers corresponding to the bonding wafers in the P-type wafer cassette until all the first wafers (upper wafers) are returned to the P-type wafer cassette and all the second wafers (lower wafers) are returned to the new empty wafer cassette. After all the wafers are returned, put the returned wafer cassette back into the storage cabinet.

[0116] Repeat the above until all P-type wafer boxes have been traversed;

[0117] For wafers with the same priority but different arms involved in wafer transfer calculations, dual-arm motion is generated simultaneously. The first robotic arm loads the wafer and sends it down, while the second robotic arm loads the wafer and sends it down. A precondition for sending is set: when transferring wafers with the same priority, the second robotic arm is only allowed to send down after the first robotic arm has completed its sending operation, ensuring that the robotic arms operate separately and at maximum speed.

[0118] In this way, through the above steps, it is possible to transfer different wafers separated from the same bonded wafer back to different wafer cassettes, solving the problem that existing bonded wafers cannot be transferred according to demand; in addition, by transferring the wafers separately, more separated wafers can be transferred in one process, improving separation efficiency, avoiding the problem of low efficiency caused by grinding one of the bonded wafers until it disappears, and improving the process effect.

[0119] Figure 8 This diagram illustrates a wafer scheduling device according to an embodiment of the present invention. The device is used to schedule a bonded wafer formed by bonding two wafers before the process and a first wafer and a second wafer separated from the bonded wafer after the process. Figure 8 As shown, a wafer scheduling device includes:

[0120] The determination module 801 is used to determine the source wafer box corresponding to the first wafer and the empty wafer box that can be used to load the second wafer after the bonding wafer is separated into the first wafer and the second wafer by the process in the process chamber, wherein the source wafer box is the wafer box used to load the bonding wafer before the process.

[0121] The first transmission module 802 is used to transmit the source wafer cassette to the first loading / unloading position via the wafer cassette robot arm, and to transmit the empty wafer cassette to the second loading / unloading position via the wafer cassette robot arm;

[0122] The second transmission module 803 is used to transmit the first wafer to the source wafer cassette placed on the first loading and unloading position via the first robotic arm of the wafer robot, and to transmit the second wafer to the empty wafer cassette placed on the second loading and unloading position via the second robotic arm of the wafer robot.

[0123] In one implementation, the bonding wafer and the first wafer are of type 1, the second wafer is of type 2, the wafer cassette is of type 1 and the wafer it carries is of type 2, and the cache area is of type 2 by default.

[0124] Before the bonding wafer is processed to separate it into the first wafer and the second wafer, the first transmission module 802 is also used to,

[0125] After the wafer cassette containing the bonded wafer is transferred to the loading / unloading port, it is detected whether there is an empty, untyped buffer area in the storage cabinet. If an untyped buffer area is detected in the storage cabinet, the wafer cassette is transported to the buffer area by the wafer cassette robot, and the type of the buffer area containing the wafer cassette is updated to the type of the wafer cassette. The wafer cassette is then transferred from the buffer area to the first loading / unloading position or the second loading / unloading position by the wafer cassette robot, and the bonded wafer is transferred to the process chamber by the first or second robotic arm of the wafer robot.

[0126] In one implementation, the determining module 801 is specifically used to: determine the wafer cassette in the storage cabinet used to load the bonding wafer before the process as the source wafer cassette; detect whether there is a wafer cassette in the storage cabinet that is not set to a type that can load the second wafer and does not contain a wafer; if the detection result is yes, then determine the wafer cassette without a wafer in it as the empty wafer cassette.

[0127] In one implementation, the first transmission module 802 is configured to: set a first transport path for the source wafer cassette, wherein the first transport path involves transporting the source wafer cassette from a storage cabinet for placing the source wafer cassette to a first loading / unloading position and returning from the first loading / unloading position to the storage cabinet, wherein the source wafer cassette returned to the storage cabinet is loaded with the first wafer; set a second transport path for the empty wafer cassette, wherein the second transport path involves transporting the empty wafer cassette from the storage cabinet for placing the empty wafer cassette to a second loading / unloading position and returning from the second loading / unloading position to the storage cabinet, wherein the empty wafer cassette returned to the storage cabinet is loaded with the second wafer; and use a wafer cassette robot to transport the source wafer cassette to the first loading / unloading position based on the first transport path and the empty wafer cassette to the second loading / unloading position based on the second transport path.

[0128] In one implementation, the second transmission module 803 is specifically used for,

[0129] A third transport path is established for the first wafer, wherein the third transport path is from the process chamber to the first loading / unloading position; a fourth transport path is established for the second wafer, wherein the fourth transport path is from the process chamber to the second loading / unloading position; based on the third transport path, the first wafer is transported to the source wafer cassette placed at the first loading / unloading position by the first robotic arm; based on the fourth transport path, the second wafer is transported to the empty wafer cassette placed at the second loading / unloading position by the second robotic arm.

[0130] In one implementation, the first wafer and the second wafer corresponding to the same bonding wafer have the same priority;

[0131] The second transmission module 803 is specifically used to, after determining that the first robotic arm has transmitted the first wafer to the source wafer cassette, transmit the second wafer, which has the same wafer scheduling priority as the first wafer, to the vacant wafer cassette via the second robotic arm.

[0132] In one implementation, there are multiple wafer cassettes, each of which can hold multiple bonding wafers. The first transmission module 802 is further configured to: obtain the type of each bonding wafer in each wafer cassette and the total number of bonding wafers; determine whether the type and total number of bonding wafers match the process formulation of the process; if so, traverse each wafer cassette, set a wafer cassette scheduling priority and a first transport path for each wafer cassette according to the actual traversal order, and simultaneously determine the number of bonding wafers in each wafer cassette and the number of bonding wafers in the process chamber. Placement location; for each wafer cassette, the bonding wafers therein are traversed according to a first preset order, and a wafer scheduling priority is set for each bonding wafer according to the first preset order. At the same time, a fifth transport path is set for each bonding wafer according to its placement location in the process chamber, wherein the fifth transport path is from the first loading / unloading position or the second loading / unloading position to the process chamber; according to the wafer cassette scheduling priority, the first transport path, the wafer scheduling priority, and the fifth transport path, the bonding wafer is transported to the process chamber for processing.

[0133] In one implementation, the second transmission module 803 is configured to: acquire the type of each first wafer, the type of each second wafer, the total number of first wafers, and the total number of second wafers; determine whether the types of all first wafers, the types of all second wafers, the total number of first wafers, and the total number of second wafers match the process recipe of the process; if so, determine the number of first wafers corresponding to each source wafer cassette and the placement position of the first wafers corresponding to the source wafer cassette in the process chamber, and determine the number of second wafers corresponding to each empty wafer cassette and the placement position of the second wafers corresponding to the empty wafer cassette in the process chamber; for each source wafer cassette, traverse the first wafers corresponding to the source wafer cassette according to a second preset order, and process them according to the second preset order... Each first wafer is assigned a wafer scheduling priority, and a third transport path is set for each first wafer according to its placement position in the process chamber. For each vacant wafer cassette, the second wafers corresponding to the vacant wafer cassette are traversed according to the second preset order, and a wafer scheduling priority is assigned for each second wafer according to the second preset order. A fourth transport path is set for each second wafer according to its placement position in the process chamber. Based on the wafer scheduling priority of the first wafer and the third transport path, the first wafer is transferred to the corresponding source wafer cassette, and based on the wafer scheduling priority of the second wafer and the fourth transport path, the second wafer is transferred to the corresponding vacant wafer cassette.

[0134] Figure 9 This diagram illustrates the structure of a semiconductor process apparatus according to an embodiment of the present invention. The semiconductor process apparatus includes a storage cabinet 91 for placing wafer cassettes, a wafer cassette robot 92, a first loading / unloading position 93, a second loading / unloading position 94, a wafer robot 95 having a first robotic arm and a second robotic arm, and a process chamber 96. It also includes a controller 97, which is used to schedule a bonded wafer formed by bonding two wafers before the process and a first wafer and a second wafer separated from the bonded wafer after the process, using any of the above-described wafer scheduling method embodiments.

[0135] The wafer scheduling device and semiconductor process equipment provided in this application embodiment can both achieve Figures 5 to 7 The various processes implemented in the method implementation examples will not be described again here to avoid repetition.

[0136] It should be noted that the embodiments of the wafer scheduling device in this specification and the embodiments of the wafer scheduling method in this specification are based on the same inventive concept. Therefore, for specific implementation of the wafer scheduling device embodiments, please refer to the implementation of the corresponding wafer scheduling method embodiments mentioned above. Repeated descriptions will not be repeated.

[0137] The wafer scheduling device in this application embodiment can be a device, or a component, integrated circuit, or chip in a terminal. The device can be a mobile electronic device or a non-mobile electronic device. For example, mobile electronic devices can be mobile phones, tablets, laptops, PDAs, in-vehicle electronic devices, wearable devices, ultra-mobile personal computers (UMPCs), netbooks, or personal digital assistants (PDAs), etc., while non-mobile electronic devices can be servers, network-attached storage (NAS), personal computers (PCs), televisions (TVs), ATMs, or self-service machines, etc. This application embodiment does not impose specific limitations.

[0138] The wafer scheduling device in this application embodiment can be a device with an operating system. This operating system can be Android, iOS, or other possible operating systems; this application embodiment does not specifically limit the specific operating system used.

[0139] Based on the same technical concept, embodiments of this application also provide an electronic device for executing the aforementioned wafer scheduling method. Figure 10This is a schematic diagram of the structure of an electronic device to implement various embodiments of this application. The electronic device can vary significantly due to differences in configuration or performance, and may include a processor 1010, a communications interface 1020, a memory 1030, and a communication bus 1040. The processor 1010, communications interface 1020, and memory 1030 communicate with each other via the communication bus 1040. The processor 1010 can call a computer program stored in the memory 1030 and executable on the processor 1010 to perform the following steps:

[0140] After the bonding wafer is separated into the first wafer and the second wafer by the process in the process chamber, a source wafer box corresponding to the first wafer and an empty wafer box that can be used to load the second wafer are determined, wherein the source wafer box is a wafer box used to load the bonding wafer before the process.

[0141] The source wafer cassette is transferred to the first loading / unloading position by the wafer cassette robot, and the empty wafer cassette is transferred to the second loading / unloading position by the wafer cassette robot.

[0142] The first wafer is transferred to the source wafer cassette placed on the first loading / unloading position by the first robotic arm of the wafer robot, and the second wafer is transferred to the empty wafer cassette placed on the second loading / unloading position by the second robotic arm of the wafer robot.

[0143] The specific execution steps can be found in the various steps of the above wafer scheduling method embodiment, and can achieve the same technical effect. To avoid repetition, they will not be repeated here.

[0144] It should be noted that the electronic devices in the embodiments of this application include: servers, terminals, or other devices besides terminals.

[0145] The above electronic device structure does not constitute a limitation on the electronic device. An electronic device may include more or fewer components than illustrated, or combine certain components, or arrange them differently. For example, an input unit may include a Graphics Processing Unit (GPU) and a microphone, and a display unit may use a liquid crystal display (LCD), organic light-emitting diode (OLED), or other similar display panels. User input units include at least one of a touch panel and other input devices. A touch panel is also called a touchscreen. Other input devices may include, but are not limited to, physical keyboards, function keys (such as volume control buttons, power buttons, etc.), trackballs, mice, and joysticks, which will not be elaborated further here.

[0146] Memory can be used to store software programs and various data. Memory can primarily include a first storage area for storing programs or instructions and a second storage area for storing data. The first storage area can store the operating system, application programs or instructions required for at least one function (such as sound playback, image playback, etc.). Furthermore, memory can include volatile memory or non-volatile memory, or both. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (Synchlink DRAM, SLDRAM), and direct memory bus RAM (DRRAM).

[0147] The processor may include one or more processing units; optionally, the processor integrates an application processor and a modem processor, wherein the application processor mainly handles operations related to the operating system, user interface, and applications, while the modem processor mainly handles wireless communication signals, such as a baseband processor. It is understood that the aforementioned modem processor may also not be integrated into the processor.

[0148] This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described wafer scheduling method embodiments and achieve the same technical effects. To avoid repetition, they will not be described again here.

[0149] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.

[0150] This application embodiment also provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement the various processes of the above method embodiments and achieve the same technical effect. To avoid repetition, it will not be described again here.

[0151] It should be understood that the chip mentioned in the embodiments of this application may also be referred to as a system-on-a-chip, system chip, chip system, or system-on-a-chip, etc.

[0152] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0153] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0154] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A wafer scheduling method, characterized in that, This is used to schedule the bonding wafer formed by bonding two wafers before the process and the first wafer and the second wafer that are separated after the process. The scheduling method includes: After the bonding wafer is separated into the first wafer and the second wafer by the process in the process chamber, a source wafer box corresponding to the first wafer and an empty wafer box that can be used to load the second wafer are determined, wherein the source wafer box is a wafer box used to load the bonding wafer before the process. The source wafer cassette is transferred to the first loading / unloading position by the wafer cassette robot, and the empty wafer cassette is transferred to the second loading / unloading position by the wafer cassette robot. The first wafer is transferred to the source wafer cassette placed on the first loading / unloading position by the first robotic arm of the wafer robot, and the second wafer is transferred to the empty wafer cassette placed on the second loading / unloading position by the second robotic arm of the wafer robot, wherein the wafer robot is located between the first loading / unloading position and the second loading / unloading position and the process chamber.

2. The scheduling method according to claim 1, characterized in that, The bonding wafer and the first wafer are of type 1, the second wafer is of type 2, the wafer cassette is of type 1 and the wafer it carries is of type 2, and the type of the buffer is unset by default. Before the bonding wafer is processed to separate it into the first wafer and the second wafer, the process further includes: After the wafer cassette containing the bonded wafer is transferred to the loading / unloading port, it is checked whether there is any free, unconfigured buffer area in the storage cabinet. If a cache area without a set type is detected in the storage cabinet, the wafer cassette is transported to the cache area by the wafer cassette robot, and the type of the cache area containing the wafer cassette is updated to the type of the wafer cassette. The wafer cassette is transferred from the buffer area to the first loading / unloading position or the second loading / unloading position by the wafer cassette robot, and the bonding wafer is transferred to the process chamber by the first or second robotic arm of the wafer cassette robot.

3. The scheduling method according to claim 1, characterized in that, The step of determining the source wafer cassette corresponding to the first wafer and the empty wafer cassette that can be used to load the second wafer includes: The wafer cassette in the storage cabinet used to load the bonding wafer before the process is identified as the source wafer cassette. Detect whether there is a wafer cassette in the storage cabinet that is not configured to hold the second wafer but is not currently containing a wafer; If the detection result is yes, then the wafer cassette without a wafer is identified as the empty wafer cassette.

4. The scheduling method according to claim 1, characterized in that, The step of transferring the source wafer cassette to the first loading / unloading position via the wafer cassette robot, and transferring the empty wafer cassette to the second loading / unloading position via the wafer cassette robot, includes: A first transport path is set for the source wafer cassette, wherein the first transport path is to transport the source wafer cassette from a storage cabinet for placing the source wafer cassette to the first loading and unloading position, and from the first loading and unloading position back to the storage cabinet, wherein the source wafer cassette returned to the storage cabinet has been loaded with the first wafer; A second transport path is set for the empty wafer box, wherein the second transport path is to transport the empty wafer box from the storage cabinet for placing the empty wafer box to the second loading and unloading position, and from the second loading and unloading position back to the storage cabinet, wherein the empty wafer box returned to the storage cabinet is loaded with the second wafer; The wafer cassette robot transports the source wafer cassette to the first loading / unloading position based on the first transport path, and transports the empty wafer cassette to the second loading / unloading position based on the second transport path.

5. The scheduling method according to claim 1 or 4, characterized in that, The process of transferring the first wafer to the source wafer cassette placed on the first loading / unloading position via the first robotic arm of the wafer robot, and transferring the second wafer to the empty wafer cassette placed on the second loading / unloading position via the second robotic arm of the wafer robot, includes: A third transport path is set for the first wafer, wherein the third transport path is a transfer from the process chamber to the first loading / unloading position; A fourth transport path is provided for the second wafer, wherein the fourth transport path is for transporting the wafer from the process chamber to the second loading / unloading position; Based on the third transport path, the first wafer is transferred by the first robotic arm to the source wafer cassette placed at the first loading and unloading position; Based on the fourth transport path, the second wafer is transferred by the second robotic arm to the empty wafer cassette placed in the second loading / unloading position.

6. The scheduling method according to claim 1, characterized in that, The first wafer and the second wafer, which correspond to the same bonding wafer, have the same wafer scheduling priority; The transfer of the second wafer to the empty wafer cassette placed on the second loading / unloading position via the second robotic arm of the wafer manipulator includes: Once it is determined that the first robotic arm has transferred the first wafer to the source wafer cassette, the second robotic arm then transfers the second wafer, which has the same wafer scheduling priority as the first wafer, to the vacant wafer cassette.

7. The scheduling method according to claim 5, characterized in that, The number of wafer cassettes is multiple, and each wafer cassette can hold multiple bonding wafers; Before the process of separating the bonded wafer into the first wafer and the second wafer, the method further includes: Obtain the type and total number of each bonding wafer in each wafer cassette, and determine whether the type and total number of bonding wafers match the process formulation of the process. If so, then traverse each wafer cassette, set the wafer cassette scheduling priority and the first transport path for each wafer cassette according to the actual traversal order, and determine the number of bonding wafers in each wafer cassette and the placement position of the bonding wafers in the process chamber. For each wafer cassette, the bonding wafers therein are traversed in a first preset order, and a wafer scheduling priority is set for each bonding wafer in the first preset order. At the same time, a fifth transport path is set for each bonding wafer according to the placement position of the bonding wafer in the wafer cassette in the process chamber, wherein the fifth transport path is to transport from the first loading / unloading position or the second loading / unloading position to the process chamber. The bonding wafer is transferred to the process chamber for processing according to the wafer cassette scheduling priority, the first transport path, the wafer scheduling priority, and the fifth transport path.

8. The scheduling method according to claim 7, characterized in that, The process of transferring the first wafer to the source wafer cassette placed on the first loading / unloading position via the first robotic arm of the wafer robot, and transferring the second wafer to the empty wafer cassette placed on the second loading / unloading position via the second robotic arm of the wafer robot, includes: Obtain the type of each first wafer, the type of each second wafer, the total number of first wafers, and the total number of second wafers; determine whether the types of all first wafers, the types of all second wafers, the total number of first wafers, and the total number of second wafers match the process formulation of the process. If so, then determine the number of first wafers corresponding to each source wafer cassette and the placement position of the first wafers corresponding to the source wafer cassette in the process chamber, and determine the number of second wafers corresponding to each empty wafer cassette and the placement position of the second wafers corresponding to the empty wafer cassette in the process chamber; For each source wafer cassette, the first wafers corresponding to the source wafer cassette are traversed according to a second preset order, and a wafer scheduling priority is set for each first wafer according to the second preset order. At the same time, a third transport path is set for each first wafer according to its placement position in the process chamber. For each of the vacant wafer cassettes, the second wafers corresponding to the vacant wafer cassettes are traversed according to the second preset order, and a wafer scheduling priority is set for each second wafer according to the second preset order. At the same time, a fourth transport path is set for each second wafer according to its placement position in the process chamber. According to the wafer scheduling priority of the first wafer and the third transport path, the first wafer is transmitted to the corresponding source wafer cassette, and according to the wafer scheduling priority of the second wafer and the fourth transport path, the second wafer is transmitted to the corresponding vacant wafer cassette.

9. A wafer scheduling device, characterized in that, This is used to schedule the bonding wafer formed by bonding two wafers before the process and the first wafer and the second wafer that are separated after the process. The scheduling device includes: The determination module is used to determine the source wafer cassette corresponding to the first wafer and the empty wafer cassette that can be used to load the second wafer after the bonding wafer is separated into the first wafer and the second wafer by the process in the process chamber, wherein the source wafer cassette is the wafer cassette used to load the bonding wafer before the process; The first transmission module is used to transmit the source wafer cassette to the first loading / unloading position via the wafer cassette robot arm, and to transmit the empty wafer cassette to the second loading / unloading position via the wafer cassette robot arm; The second transfer module is used to transfer the first wafer to the source wafer cassette placed on the first loading and unloading position via the first robotic arm of the wafer robot, and to transfer the second wafer to the empty wafer cassette placed on the second loading and unloading position via the second robotic arm of the wafer robot, wherein the wafer robot is located between the first loading and unloading position and the second loading and unloading position and the process chamber.

10. A semiconductor process apparatus, comprising a storage cabinet for placing wafer cassettes, a wafer cassette robot, a first loading / unloading position, a second loading / unloading position, a wafer robot having a first robotic arm and a second robotic arm, and a process chamber, characterized in that, It also includes a controller for scheduling a bonding wafer formed by bonding two wafers before the process and a first wafer and a second wafer separated from the bonding wafer after the process, using the wafer scheduling method according to any one of claims 1-8.

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