An output control method and system for multi-channel pulse signals

Abstract

The present invention discloses an output control method and system for multi-channel pulse signals, which are applied to a first device. A synchronization signal management module is provided in the first device. The method includes: obtaining synchronization pulse signals for a plurality of controlled devices through the synchronization signal management module, so as to send the synchronization pulse signals to a pulse signal output circuit corresponding to the controlled device; the obtaining of the synchronization pulse signals through the synchronization signal management module includes: obtaining a first synchronization pulse signal through a synchronization signal input circuit connected to the synchronization signal management module, or generating a second synchronization pulse signal by the synchronization signal management module according to configuration information when the first synchronization pulse signal does not exist and the synchronization signal input circuit does not have a transmission abnormality. The present invention realizes the collaborative work of a plurality of controlled devices in different application scenarios.

Description

Technical Field

[0001] The present invention relates to the technical field of synchronization control, and particularly relates to a method and system for output control of multiple-channel pulse signals. Background Art

[0002] The acquisition of video image data often requires the collaborative work of cameras and other devices, such as cameras and vibration sensors, cameras and voltage sensors, cameras and laser light sources, multiple cameras at different angles, etc. In the measurement field, for the collaborative work between various acquisition devices and supporting devices, the synchronization control in the prior art often cannot be flexibly applied to various collaborative work application scenarios with different numbers of controlled devices. Summary of the Invention

[0003] In view of the problems existing in the above prior art, the present invention provides a method and system for output control of multiple-channel pulse signals, which realizes the switching of synchronization control for different collaborative work scenarios. The technical solution includes:

[0004] In a first aspect, a method for output control of multiple-channel pulse signals is provided, which is applied to a first device. A synchronization signal management module is provided in the first device. The method includes:

[0005] Obtain synchronization pulse signals for a plurality of controlled devices controlled by the first device through the synchronization signal management module, so as to send the synchronization pulse signals to the pulse signal output circuits corresponding to the controlled devices;

[0006] The obtaining of the synchronization pulse signals through the synchronization signal management module includes:

[0007] Obtain a first synchronization pulse signal through a synchronization signal input circuit connected to the synchronization signal management module, or generate a second synchronization pulse signal by the synchronization signal management module according to configuration information when the first synchronization pulse signal does not exist and the synchronization signal input circuit does not have a transmission abnormality.

[0008] In a possible implementation manner, a control module is further provided in the first device. The generating of the second synchronization pulse signal by the synchronization signal management module according to configuration information when the first synchronization pulse signal does not exist and the synchronization signal input circuit does not have a transmission abnormality includes:

[0009] When the first synchronization pulse signal does not exist, obtain, through the synchronization signal management module, status confirmation information of the synchronization signal input circuit of the first device not being connected to a device. The status confirmation information of the synchronization signal input circuit of the first device not being connected to a device is obtained based on the network device topology connection relationship including the first device acquired by the control module from the host computer;

[0010] The synchronization signal management module determines that there is no transmission anomaly in the synchronization signal input circuit of the first device based on the status confirmation information;

[0011] The synchronization signal management module generates a second synchronization pulse signal according to the configuration information.

[0012] In a possible implementation manner, the synchronization signal management module generating a second synchronization pulse signal according to the configuration information includes:

[0013] The control module obtains the first configuration information sent by the host computer;

[0014] The control module generates second configuration information for the synchronization signal management module based on the first configuration information;

[0015] The synchronization signal management module generates a second synchronization pulse signal based on the second configuration information.

[0016] In a possible implementation manner, the synchronization signal management module generating a second synchronization pulse signal based on the second configuration information includes:

[0017] The synchronization signal management module obtains the information sent by the control module, which characterizes that the clock system times of all devices in the determined network device topology connection relationship are synchronized with each other;

[0018] Based on the start counter of the first device's own clock system, a second synchronization pulse signal is generated according to the second configuration information.

[0019] In a possible implementation manner, after the synchronization signal management module generates a second synchronization pulse signal based on the second configuration information, it includes:

[0020] Receiving the receiving time of the second synchronization pulse signal fed back by the controlled device, and calculating the line delay parameter of each pulse signal output circuit;

[0021] Based on the maximum value of multiple line delay parameters, synchronously correct the parameter characterizing the start time of each second synchronization pulse signal in the second configuration information;

[0022] Generate an optimized second synchronization pulse signal based on the corrected second configuration information.

[0023] In a possible implementation manner, the control module determining that the clock system times of all devices in the network device topology connection relationship are synchronized with each other includes:

[0024] (61) The control module sends test data to all second devices in the network device topology connection relationship, sequentially obtains the clock error data of the first device and each second device, and forms a first clock error array;

[0025] (62) During a time period of at least one preset length, step (61) is executed multiple times, and a first clock error array set is formed based on the first clock error arrays obtained from each test result;

[0026] (63) Based on the data of the first clock error array set, all the clock system time synchronization state parameters of the devices themselves in the network device topology connection relationship are identified through the trained synchronization recognition network model;

[0027] (64) Determine whether it is necessary to correct the clock systems of all the devices themselves in the network device topology connection relationship based on the synchronization state parameters.

[0028] In a possible implementation, the correction in step (64) uses B-code time service.

[0029] In a possible implementation, before identifying the synchronization state parameters in step (63), it further includes:

[0030] Determine multiple local clock error spatial distribution characteristics based on each first clock error array in the first clock error array set, and determine multiple local clock error temporal distribution characteristics based on the whole set of the first clock error array set. The synchronization recognition network model identifies the synchronization state parameters based on the local clock error spatial distribution characteristics and the multiple local clock error temporal distribution characteristics.

[0031] In a possible implementation, the determining of the multiple local clock error spatial distribution characteristics includes:

[0032] Construct an error fluctuation vector based on two adjacent error data of each first clock error array;

[0033] Cluster based on all the error fluctuation vectors, and determine the local clock error spatial distribution characteristics based on the distribution position of each cluster, the area size of each cluster, and the distance of each data in each cluster;

[0034] The determining of the multiple local clock error temporal distribution characteristics includes:

[0035] Determine an error fluctuation vector generated by two adjacent error data at the same position based on the array elements at the same position in each first clock error array in the first clock error array set, and determine the local clock error temporal distribution characteristics based on the error fluctuation vector.

[0036] In a possible implementation, the control module generates second configuration information for the synchronization signal management module based on the first configuration information, including:

[0037] (91) The control module obtains the normal operating parameters of the controlled devices connected to the first device from the synchronization signal management module;

[0038] (92) Based on the normal operating parameters of the controlled devices, determine whether the controlled devices can operate normally under the target operating parameters of the controlled devices characterized in the first configuration information. If so, proceed to step (93); otherwise, proceed to step (94);

[0039] (93) The control module generates the second configuration information for the synchronization signal management module based on the first configuration information, where the target operating parameters of the controlled devices characterized in the first configuration information are consistent with the configured operating parameters of the corresponding controlled devices in the second configuration information;

[0040] (94) For the controlled devices that cannot operate normally under the parameters of the target operating frequency, denoted as the first controlled devices, determine whether there is a corresponding equivalent combination of controlled devices in the controlled devices obtained in step (91), and determine the equivalent combination strategy.

[0041] In a possible implementation, in step (92), determining whether the controlled devices can operate normally under the target operating parameters of the controlled devices characterized in the first configuration information based on the normal operating parameters of the controlled devices includes:

[0042] Determine whether the maximum operating frequency of the normal operation of the controlled devices is greater than the parameter characterizing the target operating frequency of the controlled devices in the first configuration information.

[0043] In a second aspect, an output control system for multiplexed pulse signals is provided, including:

[0044] A synchronization pulse signal acquisition module, configured to acquire synchronization pulse signals for a plurality of controlled devices controlled by the first device through the synchronization signal management module, so as to send the synchronization pulse signals to the pulse signal output circuit corresponding to the controlled devices;

[0045] The synchronization pulse signal acquisition module includes:

[0046] A first synchronization pulse signal acquisition module, configured to acquire a first synchronization pulse signal through a synchronization signal input circuit connected to the synchronization signal management module;

[0047] A second synchronization pulse signal acquisition module, configured to generate a second synchronization pulse signal by the synchronization signal management module according to the configuration information when the first synchronization pulse signal does not exist and the synchronization signal input circuit does not have a transmission abnormality.

[0048] An output control method and system for multiplexed pulse signals of the present invention have the following beneficial effects:

[0049] 1. In the present invention, the synchronization signal management module of the first device, i.e., the synchronization control device, is provided with a synchronization input circuit, and the output end of the synchronization signal management module of the first device is provided with a plurality of synchronization pulse signal output circuits. One synchronization pulse signal output circuit of the first device is connected to one synchronization input interface of another first device to realize the cascading of multiple first devices, i.e., the expansion of the synchronization pulse signal output circuit. Moreover, the first device can determine whether to control the controlled device based on the first synchronization pulse signal or the second synchronization pulse signal according to whether the synchronization input circuit is connected or not. The first device can be applied to control multiple same-type controlled devices to start working simultaneously or stop working simultaneously, and can also be applied to control multiple same-type controlled devices to start working and stop working at different times, and can also be applied to control different-type controlled devices to start working and stop working at different times, realizing a variety of cooperative working application scenarios that are flexibly applicable to different numbers of controlled devices.

[0050] 2. In the present invention, when the synchronization signal management module generates the second synchronization pulse signal according to the configuration information, the control module generates the second configuration information for the synchronization signal management module based on the first configuration information; the synchronization signal management module generates the second synchronization pulse signal based on the second configuration information. When generating the second configuration information, the control module determines whether the controlled device can operate normally under the target working operation parameters characterizing the controlled device in the first configuration information. In the case of abnormal operation, an equivalent controlled device combination can be constructed to ensure the normal progress of the synchronization control in the application scenario. When generating the second synchronization pulse signal, it can be determined whether to adopt the device clock correction working mode according to the actual situation to achieve high-precision time synchronization of the clock system time of all devices themselves. After generating the second synchronization pulse signal, it can also be determined whether to adopt the line delay correction working mode according to the actual needs. The synchronization control device of the present invention can operate under different application scenario requirements. Description of the Drawings

[0051] Figure 1 is a flowchart of an output control method for a multiplex pulse signal in an embodiment of the present application;

[0052] Figure 2 is a flowchart of generating the second synchronization pulse signal in an embodiment of the present application;

[0053] Figure 3 is a flowchart of determining whether it is necessary to correct the clock systems of all devices themselves in an embodiment of the present application;

[0054] Figure 4 is a structural diagram of an output control system for a multiplex pulse signal in an embodiment of the present application. Detailed Embodiments

[0055] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be construed as limiting the present invention. All other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of the present invention.

[0056] The embodiment of the present application provides a method for output control of multi-channel pulse signals, which is applied to a first device. A synchronization signal management module is provided in the first device. The first device has a multi-channel pulse signal output circuit. The pulse signal output circuit has an input port and an output interface. The output interface is connected to a controlled device. The output control method includes:

[0057] Obtaining, by the synchronization signal management module, synchronization pulse signals for a plurality of controlled devices controlled by the first device, so as to send the synchronization pulse signals to the pulse signal output circuits corresponding to the controlled devices;

[0058] The obtaining of the synchronization pulse signals by the synchronization signal management module includes:

[0059] Obtaining a first synchronization pulse signal through a synchronization signal input circuit connected to the synchronization signal management module, or generating a second synchronization pulse signal by the synchronization signal management module according to configuration information when the first synchronization pulse signal does not exist and no transmission abnormality occurs in the synchronization signal input circuit.

[0060] In the embodiment of the present application, the synchronization signal management module of the first device is provided with a synchronization input circuit, and the output end of the synchronization signal management module of the first device is provided with at least 8 synchronization pulse signal output circuits. One synchronization pulse signal output circuit of the first device is connected to one synchronization input interface of another first device to realize the cascading of multiple first devices, that is, the expansion of the synchronization pulse signal output circuit. Further, when the current first device is connected to another first device through the synchronization signal input circuit, the current first device synchronizes the synchronization signals of multiple pulse signal output circuits according to the first synchronization pulse signal output. When the current first device is not connected to another first device, a second synchronization pulse signal for the controlled device connected to the current first device is generated according to the configuration information obtained from the host computer. In the embodiment of the present application, the first device is a synchronization control device, and this device realizes the output management of multiplex pulse signals for multiple controlled devices connected to the current first device and multiple controlled devices of the next-level first device through the synchronization signal management module. It can be understood that the first device in the present application is applied to the synchronization control of multiple controlled devices, including controlling multiple controlled devices of the same type to start working simultaneously or stop working simultaneously. For example, when multiple high-speed cameras are required to take pictures of the same target scene from multiple angles, it also includes controlling multiple controlled devices of the same type to start working and stop working at different times, and also includes controlling different types of controlled devices to start working and stop working at different times. For example, in the particle image velocimetry application scenario, it is necessary to control the shutters of two lasers within a short time to equivalently realize two exposures of the camera image sensor within a short time. Among them, the laser has 2 control signals of gating and shutter, and the camera has 1 exposure control signal. The synchronization control device in the embodiment of the present application controls the timing of 5 different control signals in this application scenario.

[0061] Further, a control module is also provided in the first device of the embodiment of the present application. When the first synchronization pulse signal does not exist and the synchronization signal input circuit does not have a transmission abnormality, the synchronization signal management module generates a second synchronization pulse signal according to the configuration information, including:

[0062] When the first synchronization pulse signal does not exist, the synchronization signal management module obtains the status confirmation information that the synchronization signal input circuit of the first device is not connected to a device. The status confirmation information that the synchronization signal input circuit of the first device is not connected to a device is obtained based on the network device topology connection relationship including the first device obtained by the control module from the host computer;

[0063] The synchronization signal management module determines that the synchronization signal input circuit of the first device has no transmission abnormality based on the status confirmation information;

[0064] The synchronization signal management module generates a second synchronization pulse signal according to the configuration information.

[0065] In the embodiment of the present application, the synchronous control device adopts an FPGA+ARM architecture design. Among them, the ARM circuit module is the control module, and the FPGA circuit module is the synchronous signal management module. The ARM is responsible for receiving, uploading, and distributing commands through network communication. The ARM and the FPGA can either perform their respective duties and give full play to the unique advantages of their original architectures, or cooperate with each other to handle more complex problems. At the same time, it has the computing power of the ARM and the parallel processing ability of the FPGA, and the internal communication rate between the ARM and the FPGA in the synchronous control device is faster, improving the output management and control of the synchronous control device for multiple pulse signals of multiple controlled devices.

[0066] Further, the above-mentioned synchronous signal management module generates a second synchronous pulse signal according to the configuration information, including:

[0067] Step A: The control module obtains the first configuration information sent by the host computer;

[0068] Step B: The control module generates the second configuration information for the synchronous signal management module based on the first configuration information;

[0069] Step C: The synchronous signal management module generates a second synchronous pulse signal based on the second configuration information.

[0070] In the embodiment of the present application, after the synchronous control device is powered on, the synchronous signal management module and the control module are started respectively. After the control module is started, it checks the connection relationship with the host computer. After connection, it receives the first configuration information from the host computer, generates the second configuration information for the synchronous signal management module, and configures the synchronous signal management module through the I2C interface based on the second configuration information. The synchronous signal management module controls the pulse signal output process based on the external trigger signal.

[0071] Among them, the second synchronous pulse signal includes multiple synchronous pulse signals for multiple controlled devices connected to the first device, and the synchronous pulse signal parameters of different controlled devices are different, such as the pulse signal start time, pulse width, pulse period, and the number of pulse periods.

[0072] Further, the above-mentioned Step C: The synchronous signal management module generates a second synchronous pulse signal based on the second configuration information, including:

[0073] Step C1: The synchronous signal management module obtains the information sent by the control module, which characterizes that the clock system time of all devices in the network device topology connection relationship determined by the control module is synchronized;

[0074] Step C2: Based on the start counter of the first device's own clock system, a second synchronous pulse signal is generated according to the second configuration information.

[0075] In the embodiment of the present application, the synchronization signal management module, i.e., the FPGA circuit module, based on the second configuration information, uses its own clock system for timing, and controls the start time, pulse width, pulse period, and number of pulse periods of each path of pulse signal through a counter. Considering that in some application scenarios, all devices in the network device topology connection relationship cannot ensure the synchronization of the time of their own clock systems. For example, for some large-scale experiments, the positions where cameras are installed may be very far apart, and in this case, it is impossible to use the direct connection method for synchronization. At this time, the time of the clock systems of all devices in the network device topology connection relationship can be corrected to achieve high-precision time synchronization of the clock systems of all devices. In the embodiment of the present application, a working mode for clock correction of all devices in the network device topology connection relationship is implemented. In actual applications, according to the requirement for the synchronization accuracy of all devices in the application scenario, it can be determined whether to adopt the device clock correction working mode.

[0076] Further, after the above step C2, it includes:

[0077] Send the second synchronization pulse signal to the controlled device connected to the first device, receive the second synchronization pulse signal reception time fed back by the controlled device, and calculate the line delay parameter of each pulse signal output circuit;

[0078] Synchronously correct the parameter representing the start time of each second synchronization pulse signal in the second configuration information based on the maximum value of multiple line delay parameters;

[0079] Generate an optimized second synchronization pulse signal based on the corrected second configuration information.

[0080] In the embodiment of the present application, after the control module configures the second configuration information for the synchronization signal management module, without considering the line delay difference between the synchronization control device and multiple controlled devices, directly start the synchronization control of each controlled device based on the second synchronization pulse signal corresponding to the second configuration information. Considering the influence of the material and length of the cables connecting each controlled device on the signal delay, in order to ensure that each controlled device can still maintain high-precision synchronization, the synchronization signal management module corrects the second configuration information provided by the control module.

[0081] Of course, for the case where the current first device is connected to another first device through the synchronization signal input circuit, after the current first device outputs the synchronization signal for multiple pulse signal output circuits according to the first synchronization pulse signal, it can also calculate the line delay parameter of each pulse signal output circuit and optimize the first synchronization pulse signal.

[0082] For the above two working modes, the working mode can be manually selected or automatically determined based on the application requirements of the actual application scenario. In the case of automatic determination, it can be determined whether to consider line delay correction based on whether the line delay difference of multiple controlled devices meets the preset synchronization accuracy requirements.

[0083] Specifically, in step C1 above, the control module determines the clock system time synchronization of all devices in the network device topology connection relationship, including:

[0084] (61) The control module sends test data to all second devices in the network device topology connection relationship, and sequentially obtains the clock error data of the first device and each second device to form a first clock error array;

[0085] (62) In at least one preset-length time period, step (61) is executed multiple times, and a first clock error array set is formed based on the first clock error arrays obtained from each test result;

[0086] (63) Based on the data in the first clock error array set, the synchronization recognition network model is trained to recognize the clock system time synchronization state parameters of all devices in the network device topology connection relationship;

[0087] (64) Based on the synchronization state parameters, it is determined whether it is necessary to correct the clock systems of all devices in the network device topology connection relationship.

[0088] In the embodiment of the present application, when obtaining the first clock error array set, a preset-length time period can be used as a time window, and step (61) is executed multiple times within this time window to obtain multiple first clock error arrays. Of course, multiple time windows can be set and distributed in different time periods to obtain sufficient distribution characteristic information of the device clock errors in different time windows.

[0089] In one embodiment, for application scenarios with high synchronization accuracy requirements, the correction in step (64) uses B code timing. In the embodiment of the present application, step (64) determines that there are errors in the clock systems of all devices themselves. In this case, the B code timing information is used to tame the clock system of the device itself, which can achieve a timing accuracy of less than 200ns. The first device in the embodiment of the present application, that is, the synchronization control device, is internally provided with a B code demodulation module, which starts to send outward with the whole second of the B code as the starting pulse, and realizes a pulse sequence of 0s, 1ms, 2ms... of absolute time when working at 1000Hz. In the embodiment of the present application, the requirements of application scenarios with high synchronization accuracy requirements are met. When the synchronization accuracy represented by the synchronization state parameters is lower than the preset synchronization accuracy requirements, the B code timing information can be used to tame the clock system of the device itself. When the synchronization accuracy represented by the synchronization state parameters is higher than the preset synchronization accuracy requirements, the B code taming process can be omitted.

[0090] Furthermore, in the above step (63), before identifying the synchronization state parameter, the step further includes:

[0091] Step (631) determines a plurality of local clock error spatial distribution features based on each first clock error array in the first clock error array set;

[0092] Step (632) determines a plurality of local clock error time distribution characteristics based on the full set of the first clock error array set;

[0093] Step (633) identifies the synchronization state parameters based on the local clock error spatial distribution characteristics and multiple local clock error temporal distribution characteristics through a synchronization identification network model.

[0094] In an embodiment of the present application, the spatial distribution characteristics of local clock errors are determined based on the intra-group data of the first clock error array to characterize the differences and similarities of the clock systems of all devices in the topological connection relationship of the network devices, and the temporal distribution characteristics of local clock errors are analyzed based on the inter-group data of multiple first clock error arrays. Based on the intra-group data characteristics and inter-group data characteristics of the first clock error array, rich feature information of the first clock error array set is extracted, thereby improving the characterization capability of the feature data of the first clock error array set.

[0095] Furthermore, in the above step (631), determining multiple local clock error spatial distribution characteristics includes:

[0096] Constructing an error fluctuation vector based on two adjacent error data of each first clock error array;

[0097] Cluster based on all error fluctuation vectors, and determine the local clock error spatial distribution characteristics based on the distribution positions of each cluster, the area sizes of each cluster, and the distances of each data in each cluster;

[0098] In the above step (632), determine multiple local clock error time distribution characteristics, including:

[0099] Based on the array elements at the same position in each first clock error array in the first clock error array set, determine the error fluctuation vectors generated by two adjacent error data at the position, and determine the local clock error time distribution characteristics based on the error fluctuation vectors.

[0100] In the embodiments of the present application, an error fluctuation vector is constructed with two adjacent error data. For the intra-group data of the first clock error array, it carries both the clock error distribution characteristics of all devices and the clock error difference characteristics of different devices, and can comprehensively characterize the characteristics of the intra-group data of the first clock error array. For the inter-group data of the first clock error array, it carries both the distribution characteristics of the device clock error at different times and the change characteristics of the device clock error at adjacent times, and can comprehensively characterize the inter-group data characteristics of different first clock error arrays.

[0101] The training method of the synchronization recognition network model in the above step (63) includes:

[0102] Based on the first clock error array set obtained historically, extract the local clock error spatial distribution characteristics and multiple local clock error time distribution characteristics, and input them into a preset convolutional neural network;

[0103] Calculate a preset loss function based on the output data of the convolutional neural network and the annotation data carried by the input data, and iteratively update the convolutional neural network based on the size of the preset loss function value until the preset maximum iteration number is reached or the loss function value converges, stop the training process, and when it is determined that the recognition accuracy of the convolutional neural network at the end of training meets the preset requirements, determine the trained convolutional neural network as the synchronization recognition network model;

[0104] Among them, the annotation data carried by the input data represents the clock system time synchronization degree of all devices in the network device topology connection relationship corresponding to the first clock error array set.

[0105] Further, in the above step (61), the first device sends test data to all second devices in the network device topology connection relationship through the control module, and sequentially obtains the clock error data of the first device and each second device, including:

[0106] (71) Send a first measurement signal data packet to a second device through a control module, where the first measurement signal data packet sends the first time of the first device itself when sending the first measurement signal data packet;

[0107] (72) Receive a second measurement signal data packet responded by the second device, and determine the second time of the first device itself when receiving the second measurement signal data packet. The second measurement signal data packet carries the third time of the second device itself when receiving the first measurement signal data packet and the fourth time of the second device itself when sending the second measurement signal data packet;

[0108] (73) Calculate the clock error between the first device and the second device based on the first time, the second time, the third time, and the fourth time.

[0109] Among them, in step (73), calculate the clock error t0 between the first device and the second device based on the first time t1, the second time t2, the third time t3, and the fourth time t4.

[0110] In one implementation manner, step B above: The control module generates second configuration information for the synchronization signal management module based on the first configuration information, including:

[0111] (91) The control module obtains the normal operating parameters of the controlled device connected to the first device from the synchronization signal management module;

[0112] (92) Judge whether the controlled device can operate normally under the target operating parameters representing the controlled device in the first configuration information based on the normal operating parameters of the controlled device. If so, go to step (93); otherwise, go to step (94). Specifically, judge whether the controlled device can operate normally under the target operating parameters by judging whether the maximum operating frequency of the normal operation of the controlled device is greater than the parameter representing the target operating frequency of the controlled device in the first configuration information;

[0113] (93) The control module generates second configuration information for the synchronization signal management module based on the first configuration information, where the target operating parameters representing the controlled device in the first configuration information are consistent with the configured operating parameters of the corresponding controlled device in the second configuration information;

[0114] (94) For the controlled device that cannot operate normally under the parameter of the target operating frequency, denoted as the first controlled device, judge whether there is a corresponding equivalent controlled device combination in the controlled devices obtained in step (91), and determine the equivalent combination strategy.

[0115] In the embodiment of the present application, the control module also performs adaptability judgment and optimization on the instruction information obtained from the host computer and the controlled devices connected to the first device obtained from the synchronization signal management module. When the controlled devices connected to the first device cannot directly operate normally with the instruction information obtained from the host computer, first, it is determined whether there are controlled devices of the same type as the first controlled device among all the controlled devices connected to the first device. If so, in the second step, it is determined whether an equivalent controlled device combination corresponding to the first controlled device can be obtained by combining multiple controlled devices of the same type. If there are multiple corresponding equivalent controlled device combinations, in the third step, the best equivalent controlled device combination is determined from the multiple equivalent controlled device combinations. In the fourth step, an equivalent combination strategy is determined based on the equivalent controlled device combination.

[0116] Further, step (94) above includes:

[0117] Obtain m second controlled devices of the same type as the first controlled device among the controlled devices obtained in step (91);

[0118] Based on the operating frequency range parameters of the normal operation of the first controlled device and all the second controlled devices, determine the controlled devices in the equivalent controlled device combination. All the controlled devices in the equivalent controlled device combination satisfy the constraint conditions:

[0119] The actual operating frequencies of all the controlled devices are the same, denoted as the first operating frequency f1;

[0120] All the controlled devices are in the best operating state at the first operating frequency;

[0121] The number a of controlled devices in the equivalent controlled device combination is the same as the ratio of the target operating frequency f2 of the controlled device in the first configuration information to the first operating frequency f1, where a is greater than or equal to 2 and less than or equal to m + 1.

[0122] In the embodiment of the present application, an equivalent replacement for the first controlled device is formed by combining a controlled devices of the same type as the first controlled device. The operating frequency range of the equivalent controlled device combination as a whole satisfies the target operating frequency f2 of the controlled device in the first configuration information. Further, the method for determining the controlled devices in the equivalent controlled device combination includes:

[0123] Based on the first controlled device and m second controlled devices as candidate controlled devices, initialize the first operating frequency allocation matrix of m + 1 candidate controlled devices. Each row in the first operating frequency allocation matrix represents the parameter a taking different values a k When K = 2, 3,..., m + 1, allocate operating frequencies to a k devices among the m + 1 controlled devices For the remaining m+1-a k A distribution strategy for allocating working frequency 0 to each device;

[0124] For each row allocation strategy in the first working frequency allocation matrix, obtain the working state parameters of the equivalent controlled device combination under the allocation strategy, determine the first allocation strategy parameters under the historical best working state parameters of each row allocation strategy and the second allocation strategy parameters under the historical best working state parameters of all row allocation strategies;

[0125] Update the allocation strategy of each row in the first working frequency allocation matrix, and update the first allocation strategy parameters of each row and the second allocation strategy parameters of all rows until the preset maximum number of updates is reached, and obtain the final second allocation strategy parameters, that is, determine the controlled devices in the equivalent controlled device combination and the working frequency of each controlled device in the combination.

[0126] In the embodiment of the present application, a plurality of allocation strategies can be updated and generated in the same row of the first working frequency allocation matrix, and the maximum number of updates is determined based on the maximum number of allocation strategies that can be generated in each row.

[0127] The determination of the equivalent combination strategy in the above step (94) includes:

[0128] The control module generates a target start time parameter of the second synchronization pulse signal start time of the first controlled device in the first configuration information based on the first configuration information for the equivalent controlled device combination. k a controlled device k A startup time parameter, the a k The method for generating the start time parameters is:

[0129] Based on the target start time parameter as a start time parameter, and delay in sequence Get a unit time k Start time parameters.

[0130] Based on the above steps (91)-(94), the k The controlled devices whose working frequencies do not meet the preset values ​​start pulse signals in time-sharing to achieve the effect that the overall working frequency reaches the preset value. Specifically, for example, in the application scenario where the image acquisition frequency requires 2000HZ, and the working frequency of the on-site camera is 1000HZ, it can be set to send the first synchronization signal to the first camera, and the sending time of the first synchronization signal is 0ms, 1ms, 2ms,... and the second synchronization signal is sent to the second camera, and the sending time of the second synchronization signal is 0.5ms, 1.5ms, 2.5ms,... This achieves a sampling rate of 2000Hz for the actual shooting of the target.

[0131] Based on the same inventive concept, an output control system for multi-channel pulse signals is further provided in an embodiment of the present application, including:

[0132] A synchronous pulse signal acquisition module, configured to acquire synchronous pulse signals for a plurality of controlled devices controlled by a first device through a synchronous signal management module, so as to send the synchronous pulse signals to a pulse signal output circuit corresponding to the controlled device;

[0133] The synchronous pulse signal acquisition module includes:

[0134] A first synchronous pulse signal acquisition module, configured to acquire a first synchronous pulse signal through a synchronous signal input circuit connected to the synchronous signal management module;

[0135] A second synchronous pulse signal acquisition module, configured to generate a second synchronous pulse signal by the synchronous signal management module according to configuration information when the first synchronous pulse signal does not exist and the synchronous signal input circuit does not have a transmission abnormality.

[0136] Wherein, the second synchronous pulse signal acquisition module includes:

[0137] A first configuration information acquisition unit, configured to acquire first configuration information sent by a host computer;

[0138] A second configuration information generation unit, configured to generate second configuration information for the synchronous signal management module based on the first configuration information;

[0139] A second synchronous pulse signal generation unit, configured to generate a second synchronous pulse signal based on the second configuration information.

[0140] Wherein, the second configuration information generation unit includes: an equivalent controlled device combination construction unit, configured to perform: for a controlled device that cannot operate normally under the parameters of the target operating frequency, denoted as a first controlled device, determine whether there is a corresponding equivalent controlled device combination in the controlled devices, and determine an equivalent combination strategy.

[0141] Wherein, the second synchronous pulse signal generation unit includes: a device clock correction unit, configured to determine information on the time synchronization of the clock systems of all devices in the network device topology connection relationship;

[0142] The second synchronous pulse signal generation unit further includes: a second synchronous pulse signal optimization unit, configured to calculate the line delay parameter of each pulse signal output circuit, correct the parameter representing the start time of each second synchronous pulse signal in the second configuration information, and generate an optimized second synchronous pulse signal based on the corrected second configuration information.

[0143] The present invention is not limited to the output control system for multi-channel pulse signals provided by the above specific embodiments of the present application. Its implementation principle and the technical effects produced are the same as those of the foregoing embodiments of the output control method for multi-channel pulse signals. For the sake of brief description, for the parts not mentioned in the embodiments of the output control system, reference may be made to the corresponding content in the foregoing method embodiments.

[0144] The present invention is not limited to the above specific implementation manners. Various transformations made by those of ordinary skill in the art starting from the above concepts without creative efforts fall within the protection scope of the present invention.

Claims

1. A method for output control of multi-channel pulse signals, characterized in that, Applied to a first device, a synchronization signal management module is provided in the first device, and the method includes: Obtaining, by the synchronization signal management module, synchronization pulse signals for a plurality of controlled devices controlled by the first device, so as to send the synchronization pulse signals to a pulse signal output circuit corresponding to the controlled device; The obtaining, by the synchronization signal management module, of the synchronization pulse signals includes: Obtaining, by a synchronization signal input circuit connected to the synchronization signal management module, a first synchronization pulse signal, or generating, by the synchronization signal management module according to configuration information, a second synchronization pulse signal when the first synchronization pulse signal does not exist and the synchronization signal input circuit does not have a transmission abnormality; A control module is further provided in the first device. The generating, by the synchronization signal management module according to configuration information, of the second synchronization pulse signal when the first synchronization pulse signal does not exist and the synchronization signal input circuit does not have a transmission abnormality includes: when the first synchronization pulse signal does not exist, obtaining, by the synchronization signal management module, status confirmation information of the synchronization signal input circuit of the first device not being connected to a device sent by the control module, where the status confirmation information of the synchronization signal input circuit of the first device not being connected to a device is obtained based on the network device topology connection relationship including the first device obtained by the control module from the upper computer; the synchronization signal management module determining that the synchronization signal input circuit of the first device does not have a transmission abnormality based on the status confirmation information; and the synchronization signal management module generating a second synchronization pulse signal according to configuration information.

2. The method for output control of multi-channel pulse signals according to claim 1, characterized in that, The generating, by the synchronization signal management module, of the second synchronization pulse signal according to configuration information includes: The control module obtaining first configuration information sent by the upper computer; The control module generating second configuration information for the synchronization signal management module based on the first configuration information; The synchronization signal management module generating a second synchronization pulse signal based on the second configuration information.

3. The method for output control of multi-channel pulse signals according to claim 2, characterized in that, The generating, by the synchronization signal management module, of the second synchronization pulse signal based on the second configuration information includes: The synchronization signal management module obtaining information sent by the control module indicating that the clock system times of all devices in the network device topology connection relationship are synchronized with each other; Based on the start counter of the clock system of the first device itself, generating a second synchronization pulse signal according to the second configuration information.

4. The method for output control of multi-channel pulse signals according to claim 3, characterized in that, After the synchronization signal management module generates the second synchronization pulse signal based on the second configuration information, it includes: Receiving the second synchronization pulse signal reception time fed back by the controlled device, and calculating the line delay parameter of each pulse signal output circuit; Synchronously correcting the parameter indicating the start time of each second synchronization pulse signal in the second configuration information based on the maximum value of the plurality of line delay parameters; Generating an optimized second synchronization pulse signal based on the corrected second configuration information.

5. The method for output control of multi-channel pulse signals according to claim 4, characterized in that, The control module determining that the clock system times of all devices in the network device topology connection relationship are synchronized with each other includes: (61) The control module sending test data to all second devices in the network device topology connection relationship, sequentially obtaining the clock error data of the first device and each second device, and forming a first clock error array; (62) Within a time period of at least one preset length, step (61) is executed multiple times, and a first clock error array set is formed based on the first clock error arrays obtained from each test result. (63) Based on the data of the first clock error array set, the synchronization state parameters of the clock systems of all devices in the network device topology connection relationship are identified through the trained synchronization recognition network model. (64) Determine whether it is necessary to correct the clock systems of all devices in the network device topology connection relationship based on the synchronization state parameters, and the correction uses B-code time service.

6. The method for output control of multi-channel pulse signals according to claim 5, characterized in that, Before identifying the synchronization state parameters in step (63), it further includes: Determine multiple local clock error spatial distribution characteristics based on each first clock error array in the first clock error array set, and determine multiple local clock error temporal distribution characteristics based on the entire set of the first clock error array set. The synchronization recognition network model identifies the synchronization state parameters based on the local clock error spatial distribution characteristics and the multiple local clock error temporal distribution characteristics.

7. The method for output control of multi-channel pulse signals according to claim 6, characterized in that, The determination of multiple local clock error spatial distribution characteristics includes: Construct an error fluctuation vector based on two adjacent error data of each first clock error array. Perform clustering based on all the error fluctuation vectors, and determine the local clock error spatial distribution characteristics based on the distribution positions of each cluster, the area sizes of each cluster, and the distances of each data in each cluster. The determination of multiple local clock error temporal distribution characteristics includes: Based on the array elements at the same position in each first clock error array in the first clock error array set, determine the error fluctuation vector generated by two adjacent error data at this position, and determine the local clock error temporal distribution characteristics based on the error fluctuation vector.

8. The method for output control of multi-channel pulse signals according to claim 2, characterized in that, The control module generates second configuration information for the synchronization signal management module based on the first configuration information, including: (91) The control module obtains the normal operating parameters of the controlled devices connected to the first device from the synchronization signal management module. (92) Judge whether the controlled devices can operate normally under the target operating parameters of the controlled devices characterized in the first configuration information based on the normal operating parameters of the controlled devices. If so, go to step (93); otherwise, go to step (94). (93) The control module generates second configuration information for the synchronization signal management module based on the first configuration information, where the target operating parameters of the controlled devices characterized in the first configuration information are consistent with the configured operating parameters of the corresponding controlled devices in the second configuration information. (94) For the controlled devices that cannot operate normally under the parameters of the target operating frequency, denoted as the first controlled devices, judge whether there is a corresponding equivalent controlled device combination in the controlled devices obtained in step (91), and determine the equivalent combination strategy.

9. An output control system for a multi-channel pulse signal, characterized in that, It includes: A synchronization pulse signal acquisition module, configured to acquire synchronization pulse signals for multiple controlled devices controlled by the first device through the synchronization signal management module, so as to send the synchronization pulse signals to the pulse signal output circuits corresponding to the controlled devices. The synchronous pulse signal acquisition module includes: The first synchronous pulse signal acquisition module is used to acquire the first synchronous pulse signal through a synchronous signal input circuit connected to the synchronous signal management module; The second synchronous pulse signal acquisition module is used to generate a second synchronous pulse signal by the synchronous signal management module according to the configuration information when the first synchronous pulse signal does not exist and the synchronous signal input circuit does not have a transmission abnormality; A control module is further provided in the first device. When the first synchronous pulse signal does not exist and the synchronous signal input circuit does not have a transmission abnormality, the synchronous signal management module generates a second synchronous pulse signal according to the configuration information, including: when the first synchronous pulse signal does not exist, the state confirmation information that the synchronous signal input circuit of the first device is not connected to a device is obtained through the synchronous signal management module from the control module. The state confirmation information that the synchronous signal input circuit of the first device is not connected to a device is obtained based on the network device topology connection relationship including the first device acquired by the control module from the upper computer; the synchronous signal management module determines that the synchronous signal input circuit of the first device does not have a transmission abnormality based on the state confirmation information; the synchronous signal management module generates a second synchronous pulse signal according to the configuration information.

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