A multi-task flow code generation method and device

Abstract

The present invention discloses a method and device for generating multi-task stream code, the method comprising: obtaining a serial program; performing parallel loop analysis and identification on the serial program to obtain a first parallel loop information set; the first parallel loop information set includes a plurality of first parallel loop information; the first parallel loop information represents the parallel loops in the serial program; performing data stream analysis on the first parallel loop information set to obtain a second parallel loop information set; the second parallel loop information set includes a plurality of second parallel loop information; performing code generation on the second parallel loop information set to obtain a multi-task stream code; the multi-task stream code can enable the computing tasks and transmission tasks in different task streams to be executed in an overlapping manner. It can be seen that the present invention is conducive to realizing the intelligent generation of multi-task stream code, thereby enabling the multi-task stream code to enable the computing tasks and transmission tasks in different streams to be executed in an overlapping manner, effectively hiding the data transmission overhead between the host end and the acceleration device end.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular to a multi-task flow code generation method and device. Background Art

[0002] Heterogeneous computing systems can make full use of the computing advantages of accelerators to bring higher computing performance, but the data required for the calculation needs to be transferred from the host side to the device side, and the results need to be transferred from the device side back to the host side after the calculation is completed. This data transmission overhead between the host side and the device side is an important factor limiting the improvement of parallel computing performance, and this transmission overhead may offset the computing performance improvement brought by heterogeneous computing systems. The multi-task flow mechanism uses time sharing to achieve concurrent execution of task flows, thereby providing a way to hide data transmission overhead. However, writing heterogeneous multi-task flow code is more difficult than traditional heterogeneous code. Programmers need to correctly analyze the computing tasks, manually divide the task flows and explicitly schedule the execution, so it is very challenging to perform heterogeneous multi-task flow programming manually. Therefore, a multi-task flow code generation method and device are provided to realize intelligent generation of multi-task flow code, so that the multi-task flow code can enable the computing tasks and transmission tasks in different flows to overlap and execute, effectively hiding the data transmission overhead between the host side and the accelerator device side and improving the overall execution performance of heterogeneous parallel programs. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a multi-task flow code generation method and device, which can obtain multi-task flow code that can enable the overlapping execution of computing tasks and transmission tasks in different task flows by performing parallel loop analysis and identification, data flow analysis and code generation on a serial program, which is conducive to the intelligent generation of multi-task flow code, and then enables the multi-task flow code to enable the overlapping execution of computing tasks and transmission tasks in different flows, effectively hiding the data transmission overhead between the host end and the acceleration device end.

[0004] In order to solve the above technical problems, a first aspect of an embodiment of the present invention discloses a multi-task flow code generation method, the method comprising:

[0005] Get the serial program;

[0006] Performing parallel loop analysis and identification on the serial program to obtain a first parallel loop information set; the first parallel loop information set includes a plurality of first parallel loop information; the first parallel loop information represents the parallel loops in the serial program;

[0007] Performing data stream analysis on the first parallel loop information set to obtain a second parallel loop information set; the second parallel loop information set includes a plurality of second parallel loop information;

[0008] Code generation is performed on the second parallel loop information set to obtain a multi-task flow code; the multi-task flow code can enable computing tasks and transmission tasks in different task flows to be executed in an overlapping manner.

[0009] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the performing parallel loop analysis and identification on the serial program to obtain a first parallel loop information set includes:

[0010] Traversing the serial program to obtain a first set of standby cycle information; the first set of standby cycle information includes a plurality of first standby cycle information;

[0011] Performing a standard cycle determination analysis on the first set of standby cycle information to obtain a second set of standby cycle information; the second set of standby cycle information includes a plurality of second standby cycle information;

[0012] Perform a loop dependency analysis on the second standby loop information set to obtain a first parallel loop information set.

[0013] As an optional implementation manner, in the first aspect of the embodiment of the present invention, performing a cyclic dependency analysis on the second standby cycle information set to obtain a first parallel cycle information set includes:

[0014] For any of the second standby cycle information, determine whether there is data dependency between the loop iterations in the second standby cycle information, and obtain a dependency determination result;

[0015] When the dependency determination result is no, the second standby cycle information is determined to be the first parallel cycle information.

[0016] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the performing data stream analysis on the first parallel loop information set to obtain the second parallel loop information set includes:

[0017] The second parallel loop information set is classified by using a preset streaming condition to obtain a first set of standby data streaming information and a second set of standby data streaming information; the first set of standby data streaming information includes a plurality of first standby data streaming information; the second set of standby data streaming information includes a plurality of second standby data streaming information; the first standby data streaming information indicates that the transmission array in the outer parallel loop can be transmitted in blocks;

[0018] Performing data structure analysis on the first unused data streaming information set to obtain a first data streaming information set; the first data streaming information set includes a plurality of first data streaming information;

[0019] Performing inner layer streaming analysis on the second set of standby data streaming information to obtain a second set of data streaming information; the second set of data streaming information includes a plurality of second data streaming information;

[0020] The first data streaming information set and the second data streaming information set are integrated to obtain a second parallel loop information set.

[0021] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the performing inner layer streaming analysis on the second set of stand-by data streaming information to obtain the second set of data streaming information includes:

[0022] For any of the second standby data streaming information, determine whether the parallelization degree of the inner loop corresponding to the second standby data streaming information is greater than the parallelization degree of the outer loop corresponding to the second standby data streaming information, and obtain a parallelization degree determination result;

[0023] When the parallel degree determination result is yes, determining whether the outer loop corresponding to the second standby data streaming information has an access operation to the inner loop array, and obtaining an access determination result;

[0024] When the access judgment result is no, inner-layer streaming processing is performed on the second standby data streaming information to obtain second data streaming information corresponding to the second standby data streaming information.

[0025] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the multi-task flow code includes a host-side code and a device-side code;

[0026] The step of generating code for the second parallel loop information set to obtain a multi-task flow code includes:

[0027] The host-side code is determined according to the preset host-side code template information and the second parallel loop information set; the host-side code includes a first host-side code and a second host-side code; the first host-side code does not change with the change of the input program; the first host-side code represents the code generated in the initialization phase;

[0028] The device-side code is determined according to the second parallel loop information set.

[0029] As an optional implementation manner, in the first aspect of the embodiment of the present invention, determining the host-side code according to the preset host-side code template information and the second parallel loop information set includes:

[0030] Instantiating the preset host-side code template information and the second parallel loop information set to obtain an initialization code;

[0031] Creating and transmitting a buffer corresponding to a data block for the initialization code to obtain a first intermediate code;

[0032] Setting parameters for the first intermediate code and configuring startup information of a kernel function to obtain a second intermediate code;

[0033] The second intermediate code is subjected to synchronization operation and resource release to obtain the host-side code.

[0034] A second aspect of an embodiment of the present invention discloses a multi-task stream code generation device, the device comprising:

[0035] An acquisition module, used to acquire a serial program;

[0036] A first analysis module is used to analyze and identify parallel loops in the serial program to obtain a first parallel loop information set; the first parallel loop information set includes a plurality of first parallel loop information; the first parallel loop information represents the parallel loops in the serial program;

[0037] A second analysis module, configured to perform data stream analysis on the first parallel loop information set to obtain a second parallel loop information set; the second parallel loop information set includes a plurality of second parallel loop information;

[0038] A generation module is used to generate code for the second parallel loop information set to obtain a multi-task flow code; the multi-task flow code can enable the computing tasks and transmission tasks in different task flows to be executed in an overlapping manner.

[0039] As an optional implementation manner, in the second aspect of the embodiment of the present invention, the first analysis module includes a traversal submodule, a first analysis submodule and a second analysis submodule, wherein:

[0040] The traversal submodule is used to traverse the serial program to obtain a first set of standby cycle information; the first set of standby cycle information includes a plurality of first standby cycle information;

[0041] The first analysis submodule is used to perform a canonical cycle determination analysis on the first set of standby cycle information to obtain a second set of standby cycle information; the second set of standby cycle information includes a plurality of second standby cycle information;

[0042] The second analysis submodule is used to perform a loop dependency analysis on the second standby loop information set to obtain a first parallel loop information set.

[0043] As an optional implementation, in the second aspect of the embodiment of the present invention, the second analysis submodule performs a cyclic dependency analysis on the second standby cycle information set to obtain the first parallel cycle information set in the following specific manner:

[0044] For any of the second standby cycle information, determine whether there is data dependency between the loop iterations in the second standby cycle information, and obtain a dependency determination result;

[0045] When the dependency determination result is no, the second standby cycle information is determined to be the first parallel cycle information.

[0046] As an optional implementation, in the second aspect of the embodiment of the present invention, the second analysis module performs data stream analysis on the first parallel loop information set to obtain the second parallel loop information set in the following specific manner:

[0047] The second parallel loop information set is classified by using a preset streaming condition to obtain a first set of standby data streaming information and a second set of standby data streaming information; the first set of standby data streaming information includes a plurality of first standby data streaming information; the second set of standby data streaming information includes a plurality of second standby data streaming information; the first standby data streaming information indicates that the transmission array in the outer parallel loop can be transmitted in blocks;

[0048] Performing data structure analysis on the first unused data streaming information set to obtain a first data streaming information set; the first data streaming information set includes a plurality of first data streaming information;

[0049] Performing inner layer streaming analysis on the second set of standby data streaming information to obtain a second set of data streaming information; the second set of data streaming information includes a plurality of second data streaming information;

[0050] The first data streaming information set and the second data streaming information set are integrated to obtain a second parallel loop information set.

[0051] As an optional implementation, in the second aspect of the embodiment of the present invention, the second analysis module performs inner layer streaming analysis on the second standby data streaming information set to obtain the second data streaming information set in the following specific manner:

[0052] For any of the second standby data streaming information, determine whether the parallelization degree of the inner loop corresponding to the second standby data streaming information is greater than the parallelization degree of the outer loop corresponding to the second standby data streaming information, and obtain a parallelization degree determination result;

[0053] When the parallel degree determination result is yes, determining whether the outer loop corresponding to the second standby data streaming information has an access operation to the inner loop array, and obtaining an access determination result;

[0054] When the access judgment result is no, inner-layer streaming processing is performed on the second standby data streaming information to obtain second data streaming information corresponding to the second standby data streaming information.

[0055] As an optional implementation manner, in the second aspect of the embodiment of the present invention, the multi-task stream code includes a host-side code and a device-side code;

[0056] The specific method in which the generating module generates code for the second parallel loop information set to obtain the multi-task flow code is:

[0057] The host-side code is determined according to the preset host-side code template information and the second parallel loop information set; the host-side code includes a first host-side code and a second host-side code; the first host-side code does not change with the change of the input program; the first host-side code represents the code generated in the initialization phase;

[0058] The device-side code is determined according to the second parallel loop information set.

[0059] As an optional implementation, in the second aspect of the embodiment of the present invention, the generation module determines the host-side code according to the preset host-side code template information and the second parallel loop information set, including:

[0060] Instantiating the preset host-side code template information and the second parallel loop information set to obtain an initialization code;

[0061] Creating and transmitting a buffer corresponding to a data block for the initialization code to obtain a first intermediate code;

[0062] Setting parameters for the first intermediate code and configuring startup information of a kernel function to obtain a second intermediate code;

[0063] The second intermediate code is subjected to synchronization operation and resource release to obtain the host-side code.

[0064] The third aspect of the present invention discloses another multi-task stream code generation device, the device comprising:

[0065] A memory storing executable program code;

[0066] a processor coupled to the memory;

[0067] The processor calls the executable program code stored in the memory to execute part or all of the steps in the multi-task stream code generation method disclosed in the first aspect of the embodiment of the present invention.

[0068] The fourth aspect of the present invention discloses a computer storage medium, which stores computer instructions. When the computer instructions are called, they are used to execute some or all of the steps in the multi-task flow code generation method disclosed in the first aspect of an embodiment of the present invention.

[0069] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0070] In an embodiment of the present invention, a serial program is obtained; parallel loop analysis and identification is performed on the serial program to obtain a first parallel loop information set; the first parallel loop information set includes a plurality of first parallel loop information; the first parallel loop information represents the parallel loops in the serial program; data stream analysis is performed on the first parallel loop information set to obtain a second parallel loop information set; the second parallel loop information set includes a plurality of second parallel loop information; code generation is performed on the second parallel loop information set to obtain a multi-task flow code; the multi-task flow code can enable overlapping execution of computing tasks and transmission tasks in different task flows. It can be seen that the present invention can obtain a multi-task flow code that can enable overlapping execution of computing tasks and transmission tasks in different task flows by performing parallel loop analysis and identification, data stream analysis and code generation on the serial program, which is conducive to realizing intelligent generation of multi-task flow code, thereby enabling the multi-task flow code to enable overlapping execution of computing tasks and transmission tasks in different flows, effectively hiding the data transmission overhead between the host end and the acceleration device end. BRIEF DESCRIPTION OF THE DRAWINGS

[0071] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0072] Figure 1 It is a flowchart of a multi-task flow code generation method disclosed in an embodiment of the present invention;

[0073] Figure 2 It is a flowchart of another multi-task flow code generation method disclosed in an embodiment of the present invention;

[0074] Figure 3 It is a structural schematic diagram of a multi-task stream code generation device disclosed in an embodiment of the present invention;

[0075] Figure 4It is a structural schematic diagram of another multi-task stream code generation device disclosed in an embodiment of the present invention;

[0076] Figure 5 A schematic structural diagram of another multi-task stream code generating device disclosed in an embodiment of the present invention. DETAILED DESCRIPTION

[0077] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0078] The terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, device, product or equipment that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or equipment.

[0079] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0080] The present invention discloses a multi-task stream code generation method and device, which can obtain multi-task stream code that can enable overlapping execution of computing tasks and transmission tasks in different task streams by performing parallel loop analysis and identification, data stream analysis and code generation on serial programs, which is conducive to realizing intelligent generation of multi-task stream code, thereby enabling multi-task stream code to enable overlapping execution of computing tasks and transmission tasks in different streams, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs. The following are detailed descriptions.

[0081] Embodiment 1

[0082] See also Figure 1 , Figure 11 is a flowchart of a multi-task flow code generation method disclosed in an embodiment of the present invention. Figure 1 The multi-task flow code generation method described is applied to a multi-task flow code management system, such as a local server or cloud server for multi-task flow code generation management, etc., which is not limited in the embodiments of the present invention. Figure 1 As shown, the multi-task flow code generation method may include the following operations:

[0083] 101. Get the serial program.

[0084] 102. Perform parallel loop analysis and identification on the serial program to obtain a first parallel loop information set.

[0085] In the embodiment of the present invention, the first parallel loop information set includes a plurality of first parallel loop information.

[0086] In the embodiment of the present invention, the first parallel loop information represents a parallel loop in a serial program.

[0087] 103. Perform data stream analysis on the first parallel loop information set to obtain a second parallel loop information set.

[0088] In the embodiment of the present invention, the second parallel loop information set includes a plurality of second parallel loop information.

[0089] 104. Perform code generation on the second parallel loop information set to obtain a multi-task flow code.

[0090] In the embodiment of the present invention, the above multi-task flow code can enable the computing tasks and transmission tasks in different task flows to be executed overlappingly.

[0091] In the embodiment of the present invention, the multi-task flow code includes a host-side code and / or a device-side code, which is not limited in the embodiment of the present invention.

[0092] Optionally, the above serial program is a serial C language code.

[0093] Optionally, the multi-task streaming code runs more than 1.4 times faster on a GPU platform than a non-streamed OpenCL code.

[0094] Optionally, the multi-task streaming code runs more than 1.1 times faster on a CPU platform than a non-streamed OpenCL code.

[0095] It can be seen that the multi-task flow code generation method described in the embodiment of the present invention can obtain multi-task flow code that can enable the overlapping execution of computing tasks and transmission tasks in different task flows by performing parallel loop analysis and identification, data flow analysis and code generation on the serial program, which is conducive to the intelligent generation of multi-task flow code, and then enables the multi-task flow code to enable the overlapping execution of computing tasks and transmission tasks in different flows, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0096] In an optional embodiment, in the above step 102, parallel loop analysis and identification is performed on the serial program to obtain a first parallel loop information set, including:

[0097] Traversing the serial program to obtain a first set of standby cycle information; the first set of standby cycle information includes a plurality of first standby cycle information;

[0098] Performing a standard cycle determination analysis on the first standby cycle information set to obtain a second standby cycle information set; the second standby cycle information set includes a plurality of second standby cycle information;

[0099] Performing a loop dependency analysis on the second standby loop information set to obtain a first parallel loop information set.

[0100] In this optional implementation, as an optional implementation, the specific method of traversing the serial program to obtain the first set of waiting cycle information is:

[0101] Use the preset static code analysis model to transform the serial program and obtain the abstract syntax tree information;

[0102] Taking the TranslationUnitDecl node in the above abstract syntax tree information as the starting point, recursively traverse all reachable class nodes to obtain a first set of waiting loop information.

[0103] Optionally, the above static code analysis model has the characteristics of fast static analysis speed, small inner layer occupancy, and good compatibility.

[0104] In this optional embodiment, as another optional implementation, the specific manner of performing the canonical cycle determination analysis on the first standby cycle information set to obtain the second standby cycle information set is:

[0105] For any first standby cycle information, determine whether the specific grammatical structure of the first standby cycle information is correct, and obtain a first grammatical determination result;

[0106] When the first grammar determination result is yes, determine whether the grammar specific structure of the first standby loop information is default, and obtain a second grammar determination result;

[0107] When the second grammar judgment result is no, judging whether all conditional judgment statements in the first standby loop information meet the judgment restriction condition, and obtaining a third grammar judgment result;

[0108] When the third syntax determination result is yes, determine whether there is a loop iteration variable in all execution code blocks of the first standby loop information, and obtain a fourth syntax determination result;

[0109] When the fourth syntax determination result is no, it is determined that the first standby cycle information is a second standby cycle information.

[0110] Optionally, the above-mentioned specific grammatical structure includes initialization statements, and / or conditional judgment statements, and / or control statements, and / or execution code blocks, and / or interval symbol information, which is not limited in the embodiments of the present invention.

[0111] Optionally, the above-mentioned judgment restriction condition includes a first restriction condition and a second restriction condition.

[0112] Optionally, the first restriction condition mentioned above is that the loop iteration variable includes a signed integer variable or an unsigned integer variable.

[0113] Optionally, the second restriction condition is that the judgment type in the conditional judgment statement is one of greater than, less than, greater than or equal to, or less than or equal to.

[0114] Optionally, the loop iteration variable in the second standby loop information may be added or subtracted by a specific step length in a control statement.

[0115] Optionally, there is no interrupt statement in the execution code block in the second standby loop information.

[0116] Optionally, the above-mentioned interrupt statement includes a break statement and / or a goto statement, which is not limited in the embodiment of the present invention.

[0117] Optionally, the above-mentioned canonical loop determination analysis is helpful to improve the efficiency of determining the number of iterations of the loop and the data dependency analysis between loops.

[0118] It can be seen that the multi-task flow code generation method described in the embodiment of the present invention can obtain the first parallel loop information by traversing the serial program, standardizing the loop determination analysis and the loop dependency analysis, which is conducive to the intelligent generation of multi-task flow code, and then the multi-task flow code can enable the computing tasks and transmission tasks in different flows to overlap and execute, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0119] In another optional embodiment, the above-mentioned performing a cyclic dependency analysis on the second standby cycle information set to obtain the first parallel cycle information set includes:

[0120] For any second standby cycle information, determine whether there is data dependency between the loop iterations in the second standby cycle information, and obtain a dependency determination result;

[0121] When the dependency determination result is no, the second standby cycle information is determined to be the first parallel cycle information.

[0122] Optionally, the data dependency characterizes that during the execution of the serial program, there are more than two operations that simultaneously access the same memory location and at least one of the operations is a write operation.

[0123] Optionally, the above data dependency includes read-after-write dependency, and / or write-after-read dependency, and / or write-after-write dependency, which is not limited in the embodiment of the present invention.

[0124] Optionally, the judgment order of the above data dependency is read-after-write dependency, write-after-read dependency, and write-after-write dependency.

[0125] Optionally, the read-then-write dependency indicates that a previous loop iteration performs a read operation on the data information, and a next loop iteration performs a write operation on the data information.

[0126] Optionally, the read-after-write dependency indicates that a previous loop iteration performs a write operation on data information, and a next loop iteration performs a read operation on the data information.

[0127] Optionally, the write-after-write dependency indicates that a previous loop iteration performs a write operation on data information, and a next loop iteration performs a write operation on the data information.

[0128] Optionally, the above data dependency may lead to data competition, causing deviations in program results before and after parallelization.

[0129] Optionally, the above determination of data dependency includes determination of dependency on general non-array variables and / or determination of dependency on array variables, which is not limited in the embodiment of the present invention.

[0130] Optionally, the above dependency judgment result of "no" indicates that the non-array dependency judgment result corresponding to the dependency judgment of the non-array general variable is no, and / or the array dependency judgment result corresponding to the dependency judgment of the array variable is no.

[0131] Optionally, the specific method of determining the dependency on the general non-array variable is as follows:

[0132] For any non-array general variable, determine whether the non-array general variable is an initialization variable defined in the loop, and obtain a first variable determination result;

[0133] When the first variable judgment result is yes, determining that the non-array dependency judgment result corresponding to the dependency judgment of the general variable of the non-array is no;

[0134] When the first variable judgment result is no, determine whether there is a write operation on the general variable that is not an array, and obtain a second variable judgment result;

[0135] When the second variable judgment result is negative, it is determined that the non-array dependency judgment result corresponding to the dependency judgment of the non-array general variable is negative.

[0136] Optionally, the above dependency judgment on array variables includes dependency judgment on index scalars and / or dependency judgment on loop iteration variables, which is not limited in the embodiment of the present invention.

[0137] Optionally, the specific method of determining the dependency on the index scalar is as follows:

[0138] For any array variable, determine whether array elements in the array variable are only read or initialized in a loop, and obtain a first array determination result;

[0139] When the first array judgment result is yes, it is determined that the array dependency judgment corresponding to the array variable is no.

[0140] Optionally, the specific method of determining the dependency on the loop iteration variable is as follows:

[0141] For any array variable, determine whether the array variable satisfies the array circular dependency condition, and obtain a second array determination result;

[0142] When the second array judgment result is negative, it is determined that the array dependency judgment corresponding to the array variable is negative.

[0143] Optionally, the above-mentioned array loop dependency conditions include that the index on any dimension of the array element is changed in the loop, and / or that the index variable of the array element has a dependency relationship with the iteration variable of the loop, and / or that there is a write operation on the array element in the loop, which is not limited in the embodiments of the present invention.

[0144] It can be seen that the multi-task flow code generation method described in the embodiment of the present invention can determine the first parallel loop information through the data dependency on the second standby loop information, which is conducive to the intelligent generation of multi-task flow code, and then the multi-task flow code can enable the computing tasks and transmission tasks in different flows to overlap and execute, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0145] In yet another optional embodiment, the first parallel loop information set is subjected to data stream analysis to obtain a second parallel loop information set, including:

[0146] The second parallel loop information set is classified by using a preset streaming condition to obtain a first set of standby data streaming information and a second set of standby data streaming information; the first set of standby data streaming information includes a plurality of first standby data streaming information; the second set of standby data streaming information includes a plurality of second standby data streaming information; the first standby data streaming information indicates that the transmission array in the outer parallel loop can be transmitted in blocks;

[0147] Performing data structure analysis on the first set of standby data streaming information to obtain a first set of data streaming information; the first set of data streaming information includes a plurality of first data streaming information;

[0148] Performing inner layer streaming analysis on the second set of standby data streaming information to obtain a second set of data streaming information; the second set of data streaming information includes a plurality of second data streaming information;

[0149] The first data streaming information set and the second data streaming information set are integrated to obtain a second parallel loop information set.

[0150] Optionally, the above-mentioned fluidization conditions include that each dimensional index of the loop array does not change in the entire loop, and / or that the lowest dimensional index of the loop array is linearly related to the outermost iteration variable of the loop, which is not limited in this embodiment of the present invention.

[0151] In this optional embodiment, as an optional implementation, before the second parallel cycle information set is classified by using the preset streaming condition to obtain the first standby data streaming information set and the second standby data streaming information set, the method further includes:

[0152] For any second parallel loop information, traverse the second parallel loop information to obtain array vector information and variable vector information;

[0153] The second parallel loop information is updated using the array vector information and the variable vector information.

[0154] Optionally, the above array vector information includes a circular array, and / or an array name, and / or an array type, and / or an array index expression, and / or a read-write judgment flag, which is not limited in the embodiment of the present invention.

[0155] Optionally, the variable vector information includes variable values ​​and / or initialization addresses, which is not limited in the embodiment of the present invention.

[0156] Optionally, the first data streaming information includes array size information, and / or subtask size information, and / or an address offset of the subtask relative to the entire task, which is not limited in this embodiment of the present invention.

[0157] Optionally, the array size in the above array size information is related to the value range of the lowest dimensional index expression and the data type of the lowest dimension.

[0158] In this optional embodiment, as another optional implementation, the specific manner of performing data structure analysis on the first set of to-be-used data streaming information to obtain the first set of data streaming information is:

[0159] For any first stand-by data streaming information, use a preset array size calculation model to perform array size calculation on the first stand-by data streaming information to obtain array size information corresponding to the first stand-by data streaming information;

[0160] Using a preset subtask size calculation model to calculate the subtask size of the first stand-by data streaming information, to obtain the subtask size information corresponding to the first stand-by data streaming information;

[0161] The address offset of the first standby data streaming information is calculated using a preset address offset model to obtain the address offset of the subtask corresponding to the first standby data streaming information relative to the entire task.

[0162] Optionally, the specific form of the above array size calculation model is:

[0163] B=(i max -i min +1) sizeof(Type);

[0164] Among them, B is the array size, i max The maximum value of the lowest dimensional index of the loop array, i min It is the minimum value of the lowest dimension index of the loop array, and Type is the data type of the lowest dimension of the loop array.

[0165] Optionally, the specific form of the above subtask size calculation model is:

[0166]

[0167] Among them, B sub is the subtask size in the subtask size information, and tasks is the number of task flows.

[0168] Optionally, the specific form of the above address offset model is:

[0169] B offset =ir ·B sub ;

[0170] Among them, B offset is the address offset of the subtask relative to the entire task, i r The ID of the task flow.

[0171] Optionally, the inner layer streaming analysis of the second set of standby data streaming information includes transmitting the loop array in the inner layer loop in the form of a multi-task stream and moving the data transmission operation outside the outermost loop to avoid repeated transmission.

[0172] It can be seen that the multi-task flow code generation method described in the embodiment of the present invention can classify the second parallel loop information, perform data structure analysis and inner layer flow analysis, and integrate the processing to obtain the second parallel loop information, which is more conducive to the intelligent generation of multi-task flow code, thereby enabling the multi-task flow code to enable the computing tasks and transmission tasks in different flows to overlap and execute, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0173] In yet another optional embodiment, the inner layer streaming analysis is performed on the second set of standby data streaming information to obtain the second set of data streaming information, including:

[0174] For any second standby data streaming information, determine whether the parallelization degree of the inner loop corresponding to the second standby data streaming information is greater than the parallelization degree of the outer loop corresponding to the second standby data streaming information, and obtain a parallelization degree determination result;

[0175] When the parallel degree determination result is yes, determining whether the outer loop corresponding to the second standby data streaming information has an access operation to the inner loop array, and obtaining an access determination result;

[0176] When the access judgment result is no, inner-layer streaming processing is performed on the second standby data streaming information to obtain second data streaming information corresponding to the second standby data streaming information.

[0177] Optionally, the access operation of the outer loop to the inner loop array indicates that data needs to be transferred between the host end and the device end every time the outer loop loops once, which will bring additional performance overhead.

[0178] Optionally, the second data streaming information does not contain an access operation of the outer loop to the inner loop array, which is beneficial to improving the performance improvement brought by using multi-task streams to hide the transmission overhead.

[0179] It can be seen that the multi-task stream code generation method described in the embodiment of the present invention can obtain the second data streaming information by analyzing and judging the degree of parallelization of the second stand-by data streaming information and the analysis and judgment of the access operation and the inner-layer streaming processing, which is more conducive to the intelligent generation of multi-task stream codes, thereby enabling the multi-task stream code to enable the computing tasks and transmission tasks in different streams to overlap and execute, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0180] Embodiment 2

[0181] See also Figure 2 , Figure 2 FIG. 1 is a flow chart of another multi-task flow code generation method disclosed in an embodiment of the present invention. Figure 2 The multi-task flow code generation method described is applied to a multi-task flow code management system, such as a local server or cloud server for multi-task flow code generation management, etc., which is not limited in the embodiments of the present invention. Figure 2 As shown, the multi-task flow code generation method may include the following operations:

[0182] 201. Get the serial program.

[0183] 202. Perform parallel loop analysis and identification on the serial program to obtain a first parallel loop information set.

[0184] 203. Perform data stream analysis on the first parallel loop information set to obtain a second parallel loop information set.

[0185] 204. Determine the host-side code according to the preset host-side code template information and the second parallel loop information set.

[0186] In the embodiment of the present invention, the above-mentioned host-side code includes a first host-side code and / or a second host-side code, which is not limited in the embodiment of the present invention.

[0187] In the embodiment of the present invention, the first host-side code does not change with the change of the input program.

[0188] In the embodiment of the present invention, the first host-side code represents the code generated in the initialization phase.

[0189] 205. Determine a device-side code according to the second parallel loop information set.

[0190] In the embodiment of the present invention, for the specific technical details and technical terminology explanations of steps 201 to 203, reference may be made to the detailed description of steps 101 to 103 in the first embodiment, and the embodiment of the present invention will not be repeated herein.

[0191] Optionally, the above-mentioned device-side code includes a function name, and / or parameters, and / or executable statements, which is not limited in the embodiment of the present invention.

[0192] Optionally, the above executable statement includes a first kernel function.

[0193] Optionally, the first kernel function starts from _kernel, and the return value type is void.

[0194] Optionally, the pointer type parameters of the first kernel function have four address types.

[0195] It can be seen that the multi-task flow code generation method described in the embodiment of the present invention can obtain the host-side code and device-side code that can enable the overlapping execution of computing tasks and transmission tasks in different task flows by performing parallel loop analysis and identification, data flow analysis and code generation on the serial program, which is conducive to the intelligent generation of multi-task flow code, and then the multi-task flow code can enable the overlapping execution of computing tasks and transmission tasks in different flows, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0196] In an optional embodiment, the host-side code is determined according to the preset host-side code template information and the second parallel loop information set, including:

[0197] Instantiating the preset host-side code template information and the second parallel loop information set to obtain an initialization code;

[0198] Creating and transmitting a buffer corresponding to the data block of the initialization code to obtain a first intermediate code;

[0199] Setting parameters for the first intermediate code and configuring startup information of the kernel function to obtain a second intermediate code;

[0200] The second intermediate code is synchronized and resources are released to obtain a host-side code.

[0201] Optionally, the above initialization processing includes acquiring a platform, and / or acquiring a device, and / or creating a context, and / or creating a program object, and / or creating a command queue, and / or creating a kernel object, which is not limited in the embodiments of the present invention.

[0202] Optionally, the above-mentioned data block creation and transmission include creating a data object, and / or transmitting a data object (h2d), and / or transmitting a data object (d2h), which is not limited in this embodiment of the present invention.

[0203] Optionally, the above-mentioned parameter setting and configuring the startup information of the kernel function include setting kernel parameters and / or configuring the startup information of the kernel function, which is not limited in the embodiment of the present invention.

[0204] Optionally, the above-mentioned resource release includes releasing kernel objects, and / or releasing command queues, and / or releasing data objects, and / or releasing contexts, which is not limited in the embodiments of the present invention.

[0205] Optionally, before doing a block transfer, you need to create buffers for all loop arrays where the loop occurs.

[0206] Optionally, the above data block transmission includes a write buffer and a read buffer.

[0207] Optionally, the transmission direction of the above data block transmission depends on whether the circular array is read or written.

[0208] Optionally, a first parameter needs to be set when transmitting a data block.

[0209] Optionally, the first parameter includes the size of the cl_mem object, and / or the starting address offset of the data block relative to the cl_mem object, and / or the starting address offset of the data block relative to the array address in the host memory, which is not limited in the embodiment of the present invention.

[0210] Optionally, the above-mentioned circular array includes a fluidizable array and / or a non-fluidizable array, which is not limited in the embodiment of the present invention.

[0211] Optionally, the first parameter corresponding to the above-mentioned fluidizable array is inconsistent with the first parameter corresponding to the above-mentioned non-fluidizable array.

[0212] Optionally, the size of the cl_mem object in the above non-streamable array is equal to the total size of the data block.

[0213] Optionally, the data block in the non-streamable array is offset from the starting address of the cl_mem object by 0.

[0214] Optionally, the starting address offset of the data block in the non-streamable array relative to the array address in the host memory is 0.

[0215] Optionally, the size of the cl_mem object in the above streamable array is equal to the size of the subtask in the task stream.

[0216] Optionally, the starting address offset of the data block in the above streamable array relative to the cl_mem object and the starting address offset of the data block relative to the array address in the host memory are related to the address offset of the subtask relative to the entire task.

[0217] It can be seen that the multi-task stream code generation method described in the embodiment of the present invention can perform initialization processing on the second parallel loop information, data block creation and transmission, parameter setting and configuration of kernel function startup information, synchronization operation and resource release to obtain the host-side code, which is more conducive to the intelligent generation of multi-task stream code, thereby enabling the multi-task stream code to enable the computing tasks and transmission tasks in different streams to overlap and execute, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0218] Embodiment 3

[0219] See also Figure 3 , Figure 3 1 is a schematic diagram of a multi-task stream code generation device disclosed in an embodiment of the present invention. Figure 3 The described device can be applied to a multi-task stream code management system, such as a local server or cloud server for multi-task stream code generation management, etc., which is not limited in the embodiments of the present invention. Figure 3 As shown, the device may include:

[0220] An acquisition module 301 is used to acquire a serial program;

[0221] The first analysis module 302 is used to analyze and identify parallel loops in the serial program to obtain a first parallel loop information set; the first parallel loop information set includes a plurality of first parallel loop information; the first parallel loop information represents the parallel loops in the serial program;

[0222] The second analysis module 303 is used to perform data stream analysis on the first parallel loop information set to obtain a second parallel loop information set; the second parallel loop information set includes a plurality of second parallel loop information;

[0223] The generation module 304 is used to generate code for the second parallel loop information set to obtain a multi-task flow code; the multi-task flow code can enable the computing tasks and transmission tasks in different task flows to be executed in an overlapping manner.

[0224] It can be seen that implementation Figure 3 The described multi-task stream code generation device can obtain multi-task stream code that can enable overlapping execution of computing tasks and transmission tasks in different task streams by performing parallel loop analysis and identification, data stream analysis and code generation on serial programs, which is conducive to the intelligent generation of multi-task stream code, thereby enabling the multi-task stream code to enable overlapping execution of computing tasks and transmission tasks in different streams, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0225] In another optional embodiment, Figure 4As shown, the first analysis module 302 includes a traversal submodule 3021, a first analysis submodule 3022 and a second analysis submodule 3023, wherein:

[0226] The traversal submodule 3021 is used to traverse the serial program to obtain a first set of standby cycle information; the first set of standby cycle information includes a plurality of first standby cycle information;

[0227] The first analysis submodule 3022 is used to perform a standard cycle determination analysis on the first standby cycle information set to obtain a second standby cycle information set; the second standby cycle information set includes a plurality of second standby cycle information;

[0228] The second analysis submodule 3023 is used to perform a loop dependency analysis on the second standby loop information set to obtain a first parallel loop information set.

[0229] It can be seen that implementation Figure 4 The described multi-task stream code generation device can obtain the first parallel loop information by traversing the serial program, standardizing loop determination analysis and loop dependency analysis, which is conducive to the intelligent generation of multi-task stream code, so that the multi-task stream code can enable the computing tasks and transmission tasks in different streams to overlap and execute, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0230] In yet another optional embodiment, Figure 4 As shown, the second analysis submodule 3022 performs a cyclic dependency analysis on the second standby cyclic information set to obtain the first parallel cyclic information set in the following specific manner:

[0231] For any second standby cycle information, determine whether there is data dependency between the loop iterations in the second standby cycle information, and obtain a dependency determination result;

[0232] When the dependency determination result is no, the second standby cycle information is determined to be the first parallel cycle information.

[0233] It can be seen that implementation Figure 4 The described multi-task stream code generation device can determine the first parallel loop information through data dependency on the second standby loop information, which is conducive to the intelligent generation of multi-task stream code, so that the multi-task stream code can enable the computing tasks and transmission tasks in different streams to overlap and execute, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0234] In yet another optional embodiment, Figure 4As shown, the second analysis module 303 performs data stream analysis on the first parallel loop information set to obtain the second parallel loop information set in the following specific manner:

[0235] The second parallel loop information set is classified by using a preset streaming condition to obtain a first set of standby data streaming information and a second set of standby data streaming information; the first set of standby data streaming information includes a plurality of first standby data streaming information; the second set of standby data streaming information includes a plurality of second standby data streaming information; the first standby data streaming information indicates that the transmission array in the outer parallel loop can be transmitted in blocks;

[0236] Performing data structure analysis on the first set of standby data streaming information to obtain a first set of data streaming information; the first set of data streaming information includes a plurality of first data streaming information;

[0237] Performing inner layer streaming analysis on the second set of standby data streaming information to obtain a second set of data streaming information; the second set of data streaming information includes a plurality of second data streaming information;

[0238] The first data streaming information set and the second data streaming information set are integrated to obtain a second parallel loop information set.

[0239] It can be seen that implementation Figure 4 The described multi-task flow code generation device can classify, analyze the data structure and inner layer flow, and integrate the second parallel loop information to obtain the second parallel loop information, which is more conducive to the intelligent generation of multi-task flow code, so that the multi-task flow code can enable the computing tasks and transmission tasks in different flows to overlap and execute, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0240] In yet another optional embodiment, Figure 4 As shown, the second analysis module 303 performs inner layer streaming analysis on the second set of standby data streaming information, and obtains the second set of data streaming information in the following specific manner:

[0241] For any second standby data streaming information, determine whether the parallelization degree of the inner loop corresponding to the second standby data streaming information is greater than the parallelization degree of the outer loop corresponding to the second standby data streaming information, and obtain a parallelization degree determination result;

[0242] When the parallel degree determination result is yes, determining whether the outer loop corresponding to the second standby data streaming information has an access operation to the inner loop array, and obtaining an access determination result;

[0243] When the access judgment result is no, inner-layer streaming processing is performed on the second standby data streaming information to obtain second data streaming information corresponding to the second standby data streaming information.

[0244] It can be seen that implementation Figure 4 The described multi-task stream code generation device can obtain the second data streaming information by analyzing and judging the degree of parallelization of the second stand-by data streaming information and the analysis and judgment of the access operation and the inner-layer streaming processing, which is more conducive to the intelligent generation of multi-task stream code, thereby enabling the multi-task stream code to enable the computing tasks and transmission tasks in different streams to overlap and execute, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0245] In yet another optional embodiment, Figure 4 As shown, the multi-task flow code includes host-side code and device-side code;

[0246] The specific method in which the generation module 304 generates code for the second parallel loop information set and obtains the multi-task flow code is:

[0247] Determine the host-side code according to the preset host-side code template information and the second parallel loop information set; the host-side code includes a first host-side code and a second host-side code; the first host-side code does not change with the change of the input program; the first host-side code represents the code generated in the initialization phase;

[0248] The device-side code is determined according to the second parallel loop information set.

[0249] It can be seen that implementation Figure 4 The described multi-task stream code generation device can obtain host-side code and device-side code that can enable overlapping execution of computing tasks and transmission tasks in different task streams by performing parallel loop analysis and identification, data stream analysis and code generation on serial programs, which is conducive to the intelligent generation of multi-task stream codes, thereby enabling the multi-task stream codes to enable overlapping execution of computing tasks and transmission tasks in different streams, effectively hiding the data transmission overhead between the host side and the acceleration device side and improving the overall execution performance of heterogeneous parallel programs.

[0250] In yet another optional embodiment, Figure 4 As shown, the generation module 304 determines the host-side code according to the preset host-side code template information and the second parallel loop information set, including:

[0251] Instantiating the preset host-side code template information and the second parallel loop information set to obtain an initialization code;

[0252] Creating and transmitting a buffer corresponding to the data block of the initialization code to obtain a first intermediate code;

[0253] Setting parameters for the first intermediate code and configuring startup information of the kernel function to obtain a second intermediate code;

[0254] The second intermediate code is synchronized and resources are released to obtain a host-side code.

[0255] It can be seen that implementation Figure 4 The described multi-task stream code generation device can perform initialization processing on the second parallel loop information, data block creation and transmission, parameter setting and configuration of kernel function startup information, synchronization operations and resource release to obtain host-side code, which is more conducive to the intelligent generation of multi-task stream code, thereby enabling the multi-task stream code to enable overlapping execution of computing tasks and transmission tasks in different streams, effectively hiding the data transmission overhead between the host end and the acceleration device end and improving the overall execution performance of heterogeneous parallel programs.

[0256] Embodiment 4

[0257] See also Figure 5 , Figure 5 is a structural diagram of another multi-task stream code generation device disclosed in an embodiment of the present invention. Figure 5 The described device can be applied to a multi-task stream code management system, such as a local server or cloud server for multi-task stream code generation management, etc., which is not limited in the embodiments of the present invention. Figure 5 As shown, the device may include:

[0258] A memory 401 storing executable program codes;

[0259] a processor 402 coupled to the memory 401;

[0260] The processor 402 calls the executable program code stored in the memory 401 to execute the steps in the multi-task flow code generation method described in the first or second embodiment.

[0261] Embodiment 5

[0262] An embodiment of the present invention discloses a computer-readable storage medium storing a computer program for electronic data exchange, wherein the computer program enables a computer to execute the steps of the multi-task flow code generation method described in the first or second embodiment.

[0263] Embodiment 6

[0264] An embodiment of the present invention discloses a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to enable a computer to execute the steps in the multi-task flow code generation method described in Embodiment 1 or Embodiment 2.

[0265] The device embodiments described above are only illustrative, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, i.e., they may be located in one place, or they may be distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Those of ordinary skill in the art may understand and implement it without creative work.

[0266] Through the specific description of the above embodiments, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the above technical solution can be essentially or partly contributed to the prior art in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, and the storage medium includes a read-only memory (ROM), a random access memory (RAM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), a one-time programmable read-only memory (OTPROM), an electronically erasable rewritable read-only memory (EEPROM), a compact disc (CD-ROM) or other optical disc storage, magnetic disk storage, magnetic tape storage, or any other computer-readable medium that can be used to carry or store data.

[0267] Finally, it should be noted that the multi-task stream code generation method and device disclosed in the embodiment of the present invention discloses only the preferred embodiment of the present invention, which is only used to illustrate the technical solution of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features therein can be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A multi-task flow code generation method, characterized in that: The method comprises: Get the serial program; Performing parallel loop analysis and identification on the serial program to obtain a first parallel loop information set; the first parallel loop information set includes a plurality of first parallel loop information; the first parallel loop information represents the parallel loops in the serial program; Performing data stream analysis on the first parallel loop information set to obtain a second parallel loop information set; the second parallel loop information set includes a plurality of second parallel loop information; Performing code generation on the second parallel loop information set to obtain a multi-task flow code; the multi-task flow code can enable computing tasks and transmission tasks in different task flows to be executed in an overlapping manner; The step of performing data stream analysis on the first parallel loop information set to obtain a second parallel loop information set includes: The second parallel loop information set is classified by using a preset streaming condition to obtain a first set of standby data streaming information and a second set of standby data streaming information; the first set of standby data streaming information includes a plurality of first standby data streaming information; the second set of standby data streaming information includes a plurality of second standby data streaming information; the first standby data streaming information indicates that the transmission array in the outer parallel loop can be transmitted in blocks; Performing data structure analysis on the first unused data streaming information set to obtain a first data streaming information set; the first data streaming information set includes a plurality of first data streaming information; Performing inner layer streaming analysis on the second set of standby data streaming information to obtain a second set of data streaming information; the second set of data streaming information includes a plurality of second data streaming information; Integrating the first data streaming information set and the second data streaming information set to obtain a second parallel loop information set; The performing inner layer streaming analysis on the second set of standby data streaming information to obtain the second set of data streaming information includes: For any of the second standby data streaming information, determine whether the parallelization degree of the inner loop corresponding to the second standby data streaming information is greater than the parallelization degree of the outer loop corresponding to the second standby data streaming information, and obtain a parallelization degree determination result; When the parallel degree determination result is yes, determining whether the outer loop corresponding to the second standby data streaming information has an access operation to the inner loop array, and obtaining an access determination result; When the access judgment result is no, inner-layer streaming processing is performed on the second standby data streaming information to obtain second data streaming information corresponding to the second standby data streaming information.

2. The multi-task flow code generation method according to claim 1, characterized in that: The performing parallel loop analysis and identification on the serial program to obtain a first parallel loop information set includes: Traversing the serial program to obtain a first set of standby cycle information; the first set of standby cycle information includes a plurality of first standby cycle information; Performing a standard cycle determination analysis on the first set of standby cycle information to obtain a second set of standby cycle information; the second set of standby cycle information includes a plurality of second standby cycle information; Perform a loop dependency analysis on the second standby loop information set to obtain a first parallel loop information set.

3. The multi-task flow code generation method according to claim 2, characterized in that: The performing of a cyclic dependency analysis on the second standby cycle information set to obtain a first parallel cycle information set includes: For any of the second standby cycle information, determine whether there is data dependency between the loop iterations in the second standby cycle information, and obtain a dependency determination result; When the dependency judgment result is no, the second standby cycle information is determined to be the first parallel cycle information.

4. The multi-task flow code generation method according to claim 1, characterized in that: The multi-task stream code includes a host-side code and a device-side code; The step of generating code for the second parallel loop information set to obtain a multi-task flow code includes: The host-side code is determined according to the preset host-side code template information and the second parallel loop information set; the host-side code includes a first host-side code and a second host-side code; the first host-side code does not change with the change of the input program; the first host-side code represents the code generated in the initialization phase; The device-side code is determined according to the second parallel loop information set.

5. The multi-task flow code generation method according to claim 4, characterized in that: The determining the host-side code according to the preset host-side code template information and the second parallel loop information set includes: Instantiating the preset host-side code template information and the second parallel loop information set to obtain an initialization code; Creating and transmitting a buffer corresponding to a data block for the initialization code to obtain a first intermediate code; Setting parameters for the first intermediate code and configuring startup information of a kernel function to obtain a second intermediate code; The second intermediate code is subjected to synchronization operation and resource release to obtain the host-side code.

6. A multi-task stream code generation device, characterized in that: The device comprises: An acquisition module, used to acquire a serial program; A first analysis module is used to analyze and identify parallel loops in the serial program to obtain a first parallel loop information set; the first parallel loop information set includes a plurality of first parallel loop information; the first parallel loop information represents the parallel loops in the serial program; A second analysis module, configured to perform data stream analysis on the first parallel loop information set to obtain a second parallel loop information set; the second parallel loop information set includes a plurality of second parallel loop information; A generating module, configured to generate code for the second parallel loop information set to obtain a multi-task flow code; the multi-task flow code can enable computing tasks and transmission tasks in different task flows to be executed in an overlapping manner; The step of performing data stream analysis on the first parallel loop information set to obtain a second parallel loop information set includes: The second parallel loop information set is classified by using a preset streaming condition to obtain a first set of standby data streaming information and a second set of standby data streaming information; the first set of standby data streaming information includes a plurality of first standby data streaming information; the second set of standby data streaming information includes a plurality of second standby data streaming information; the first standby data streaming information indicates that the transmission array in the outer parallel loop can be transmitted in blocks; Performing data structure analysis on the first unused data streaming information set to obtain a first data streaming information set; the first data streaming information set includes a plurality of first data streaming information; Performing inner layer streaming analysis on the second set of standby data streaming information to obtain a second set of data streaming information; the second set of data streaming information includes a plurality of second data streaming information; Integrating the first data streaming information set and the second data streaming information set to obtain a second parallel loop information set; The performing inner layer streaming analysis on the second set of standby data streaming information to obtain the second set of data streaming information includes: For any of the second standby data streaming information, determine whether the parallelization degree of the inner loop corresponding to the second standby data streaming information is greater than the parallelization degree of the outer loop corresponding to the second standby data streaming information, and obtain a parallelization degree determination result; When the parallel degree determination result is yes, determining whether the outer loop corresponding to the second standby data streaming information has an access operation to the inner loop array, and obtaining an access determination result; When the access judgment result is no, inner-layer streaming processing is performed on the second standby data streaming information to obtain second data streaming information corresponding to the second standby data streaming information.

7. A multi-task stream code generation device, characterized in that: The device comprises: A memory storing executable program code; a processor coupled to the memory; The processor calls the executable program code stored in the memory to execute the multi-task flow code generation method as described in any one of claims 1-5.

8. A computer storage medium, characterized in that: The computer storage medium stores computer instructions, and when the computer instructions are called, they are used to execute the multi-task flow code generation method according to any one of claims 1-5.

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