Smart technology built into device assembly

Abstract

Embodiments of the present application disclose devices, methods, systems and program products for technical management of hardware components of a device at assembly. A device has a processor and a memory storing code executable by the processor. The processor obtains a function of a hardware component to be deleted in the hardware component; operates a virtual fuse to delete a data area related to the hardware component and permanently delete access to the function of the hardware component; and indicates a state of the function on the hardware component after operating the virtual fuse to delete the access to the function of the hardware component. Embodiments of the present application avoid designing and manufacturing products of different physical structures to support enabling and disabling of various functions, and provide personalized hardware function enabling and disabling services for users.

Description

Technical Field

[0001] This application relates to computing devices, and more particularly to selective resource management of functions on hardware components during manufacturing. Background Technology

[0002] Computing devices possess various resources on their hardware components, which are enabled through the device's firmware and system software. These hardware components are designed to execute programs, run system software, process data, and so on. The enabled and disabled functions on these hardware components form the basic model of a computing device. Summary of the Invention

[0003] This application discloses apparatus, methods, systems, and program products for technical management of hardware components of a device during assembly. This application avoids designing and manufacturing products with different physical structures to support the enabling and disabling of various functions, and provides users with personalized hardware function enabling and disabling services.

[0004] In a first aspect, embodiments of this application provide an apparatus including a processor and a storage device storing code executable by the processor. The processor operates a virtual fuse to perform the following operations: acquiring a function of the hardware component to be deleted from the hardware components; operating the virtual fuse to delete a data region associated with the hardware component and permanently delete access rights to the function of the hardware component; and, after operating the virtual fuse to delete access rights to the function of the hardware component, indicating the state of the function on the hardware component.

[0005] In some embodiments, the virtual fuse is read by a driver in the system software.

[0006] In some embodiments, the firmware of the hardware component has multiple data areas, each of which is associated with a single function of the hardware component, wherein the function of the hardware component that is permanently deleted is a first function and a second function of the hardware component is retained.

[0007] In some embodiments, the virtual fuse erases the data area of ​​the firmware associated with the function of the hardware component.

[0008] In some embodiments, the virtual fuse blows the electronic fuse in the electronic circuit that controls the function on the hardware component. After the electronic fuse blows, the processor can no longer access the electronic circuit and the firmware of the hardware component.

[0009] In some embodiments, the virtual fuse: writes a no-operation instruction to the data area of ​​the firmware associated with the function of the hardware component; or erases the data area of ​​the firmware associated with the function of the hardware component; and blows an electronic fuse in the electronic circuit associated with the function of the hardware component.

[0010] In some embodiments, the storage device is an electrically erasable programmable read-only memory (EEPROM) device, wherein the EEPROM device is at least partially erased and reprogrammed to delete the data area associated with the function to be deleted.

[0011] In some embodiments, the storage device includes flash memory that uses standard personal computer (PC) voltage to erase and reprogram the data areas associated with the function to be deleted.

[0012] In some embodiments, the virtual fuse is a virtual fuse block external to the hardware components having the processor and the storage device.

[0013] In some embodiments, the external virtual fuse block is kept separately on the server and is independent of the hardware component.

[0014] Secondly, embodiments of this application provide a method comprising the following operations: obtaining the function of a hardware component to be deleted from a hardware component; operating a virtual fuse to delete a data area associated with the hardware component and permanently delete access permissions to the function of the hardware component; and, after operating the virtual fuse to delete access permissions to the function of the hardware component, indicating the status of the function on the hardware component.

[0015] In some embodiments, the method further includes manipulating the virtual fuse to write a no-operation instruction in a data area of ​​firmware related to the function of the hardware component, thereby rendering the function of the hardware component inoperable.

[0016] In some embodiments, the method further includes operating the virtual fuse to erase the data area of ​​firmware associated with the functionality of the hardware component.

[0017] In some embodiments, the method further includes operating the virtual fuse to blow an electronic fuse in the electronic circuitry of a data region associated with the function on the hardware component.

[0018] In some embodiments, the method further includes operating the virtual fuse: writing a no-operation instruction or erasing the data area of ​​the firmware associated with the function of the hardware component in the data area of ​​the firmware associated with the function of the hardware component; and blowing an electronic fuse in the electronic circuitry of the data area associated with the function of the hardware component.

[0019] In some embodiments, the method further includes erasing the EEPROM device and reprogramming the EEPROM device to remove the data area associated with the function to be removed from the hardware component.

[0020] In some embodiments, the method further includes using a standard PC voltage to erase and reprogram data areas of a flash memory device associated with a function to be removed from the hardware component.

[0021] In some embodiments, the virtual fuse is a virtual fuse block external to the hardware component having a processor and a storage device, and the method further includes operating the virtual fuse block to write a no-operation instruction in the data area of ​​firmware related to the functionality of the hardware component to be removed.

[0022] In some embodiments, the external virtual fuse block is kept separately on the server and is independent of the hardware component.

[0023] Thirdly, embodiments of this application provide a computer-readable storage medium for storing program instructions. The program instructions include the following operations: acquiring a function of a hardware component to be deleted; operating a virtual fuse to delete a data area associated with the hardware component and permanently delete access permissions to the function of the hardware component; and, after operating the virtual fuse to delete access permissions to the function of the hardware component, indicating the state of the function on the hardware component.

[0024] This application allows device assemblers to enable and / or disable various functions after the device is assembled, thereby modifying the digital architecture without altering the physical architecture of the device. Enabling different functions on the device involves costs, such as the design and testing costs and / or licensing fees for various enabling technologies. Consumers can reduce costs by selectively disabling certain computing devices. The ability to selectively and permanently disable various technologies and / or functions on the device provides manufacturers with the benefit of mass production of devices with the same design. Designing and manufacturing different virtual SKU products is more cost-effective than physically changing the structure of the circuit board. Consumers can also gain greater access to the functions required for specific applications without paying for unwanted technologies. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a schematic diagram of the structure of a system for managing the technical functions of hardware components during the assembly of a computing device, provided as an embodiment of this application.

[0027] Figure 2 This is a schematic diagram of a hardware component for managing technical functions during the assembly of a computing device, provided as an embodiment of this application.

[0028] Figure 3 This is a schematic diagram of a device for managing the technical functions of a computing device during assembly, as provided in one embodiment of this application.

[0029] Figure 4 This is a schematic flowchart illustrating a method for managing hardware component technical functions during the assembly of a computing device, as provided in one embodiment of this application.

[0030] Figure 5 To explain Figure 4 A schematic flowchart of an optional method for selectively managing hardware component technology features during the assembly of a computing device.

[0031] Figure 6 To explain Figure 4 A schematic flowchart of an optional method for selectively managing hardware component technology features during the assembly of a computing device. Detailed Implementation

[0032] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0033] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0034] As will be understood by those skilled in the art, embodiments of this application may be embodied as a system, method, or program product. Therefore, embodiments may take the form of a completely hardware embodiment, a completely software embodiment (including firmware, resident software, microcode, etc.), or an embodiment combining software and hardware, which are generally referred to herein as “circuit,” “module,” or “system.” Furthermore, embodiments may also take the form of a program product in one or more computer-readable storage devices that store machine-readable code, computer-readable code, and / or program code, hereinafter referred to as code. The storage device may be tangible, non-transitory, and / or non-transferable. The storage device may not contain signals. In certain embodiments, the storage device uses only signals for accessing the code.

[0035] Many of the functional units described in this specification are labeled as modules to emphasize their implementation independence. For example, a module can be a hardware circuit, including a custom-designed very large-scale integrated circuit (VLSI) or gate array, off-the-shelf semiconductor elements (such as logic chips, transistors, or other discrete components). Modules can also be implemented in programmable hardware devices, such as field-programmable gate arrays (FPGAs), programmable array logic (PALs), programmable logic devices (PLDs), etc.

[0036] Modules can also be code and / or software executed by various types of processors, so modules can also be called code modules. For example, a code module may include one or more physical or logical blocks of executable code. Physical or logical blocks can be organized as objects, procedures, or functions. However, the executable files of the code module do not need to be physically placed together, but can include different instructions stored in different locations. When these instructions are logically combined, they constitute the code module and achieve the intended purpose of the code module.

[0037] The code module can be a single instruction or multiple instructions, and can even be distributed across multiple different code segments, various programs, and multiple storage devices. Similarly, operational data can be identified and described within the module, and can be represented in any suitable form and organized in any suitable data structure type. Operational data can be collected as a single dataset or distributed across different locations, including other computer-readable storage devices. In the case of a module or part of a module implemented in software, the software portion is stored on one or more computer-readable storage devices.

[0038] The code module may use any combination of one or more computer-readable media. The computer-readable medium may be a computer-readable storage medium. The computer-readable storage medium may be a storage device for storing code. The storage device may be, for example, but not limited to, electronic, magnetic, optical, electromagnetic, infrared, holographic, micromechanical, or semiconductor systems, apparatuses, or devices, or any suitable combination thereof.

[0039] More specific embodiments of storage devices (a non-exhaustive list) may include the following: electrical connections having one or more wires, portable computer floppy disks, hard disks, random access memory (RAM), read-only memory (ROM), (electronically) erasable programmable read-only memory (EPROM, EEPROM, and / or flash memory), portable optical disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing. In the context of this specification, a computer-readable storage medium can be any tangible medium that contains or stores programs for use by or in connection with an instruction execution system, apparatus, or device.

[0040] The code used to perform the operations of various embodiments can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Python, Ruby, Java, Smalltalk, C++, etc., as well as traditional programming languages ​​such as the "C" programming language, and / or machine languages ​​such as assembly language. The code can execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (e.g., through the network of an internet service provider).

[0041] Throughout this specification, references to "an embodiment," "embodiment," or similar language mean that a particular function, structure, or feature described in connection with the embodiment is included in at least one embodiment. Therefore, the phrases "in one embodiment," "in an embodiment," and similar language appearing throughout this specification may, but do not necessarily, refer to the same embodiment, unless otherwise expressly stated to mean only "one or more, but not all, embodiments." Unless otherwise expressly stated, the terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," "including." Unless otherwise expressly stated, the list of enumerated items does not imply that any or all items are mutually exclusive. Unless otherwise expressly stated, the terms "an," "a," and "described" also mean "one or more."

[0042] Furthermore, the functions, structures, or features described in the embodiments can be combined in any suitable manner. The following description provides numerous specific details, such as programming embodiments, software modules, user selection, network transactions, database queries, database structures, hardware modules, hardware circuits, hardware chips, etc., to provide a thorough understanding of the embodiments. However, those skilled in the art will recognize that these embodiments can be practiced without one or more specific details or using other methods, components, materials, etc. In other instances, well-known structures, materials, or operations have not been shown or described in detail to avoid obscuring the understanding of the embodiments.

[0043] The embodiments are described below with reference to schematic flowcharts and / or schematic block diagrams of methods, apparatus, systems, and program products according to the embodiments. Each block of the schematic flowcharts and / or schematic block diagrams, and combinations of blocks in the schematic flowcharts and / or schematic block diagrams, can be implemented by code. The code can be provided to a processor of a general-purpose computer, mobile phone, special-purpose computer, or other programmable data processing device to produce a machine means, such that instructions are executed by the processor of the computer or other programmable data processing device to create means for implementing the functions / actions specified in the blocks of the schematic flowcharts and / or schematic block diagrams.

[0044] The code may also be stored in a storage device that can instruct a computer, other programmable data processing device or other device to operate in a particular manner, such that the instructions stored in the storage device produce products that execute the functions / actions specified in the schematic flowchart and / or schematic block diagram blocks.

[0045] The code may also be loaded onto a computer, other programmable data processing apparatus or other device to execute on the computer, other programmable machine or other device through a series of operational steps to produce a computer-implemented process, such that the code executing on the computer or other programmable device provides a process for implementing the functions / actions specified in the schematic flowchart and / or schematic block diagram blocks or blocks.

[0046] The schematic flowcharts and / or schematic block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, systems, methods, and program products according to various embodiments. In this regard, each block in the schematic flowcharts and / or schematic block diagrams may represent a module, segment, or portion of code, including one or more executable instructions for implementing a specified logical function.

[0047] It should also be noted that in some alternative implementations, the functions marked in the boxes may not appear in the order indicated in the figures. For example, two consecutively displayed blocks may be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order, depending on the functions involved. Other steps and methods that are equivalent in function, logic, or effect to one or more blocks or portions thereof in the illustrated figures are conceivable.

[0048] While various arrow and line types may be used in schematic flowcharts and / or schematic block diagrams, they should be understood not to limit the scope of the respective embodiments. In fact, some arrows or other lines may simply indicate the logical flow of the depicted embodiment. For example, arrows may indicate waiting or monitoring periods of unspecified duration between enumerated steps in an illustrated embodiment. Each block in the schematic block diagram and / or schematic flowchart, and combinations of blocks in the schematic block diagram and / or schematic flowchart, may be implemented by a system based on specific / dedicated hardware that performs the specified function or action, or a combination of dedicated hardware and code.

[0049] The description of the elements in each figure can be referenced to the elements in the preceding figures. Throughout all figures, the same numbers refer to the same elements, including alternative embodiments of the same elements.

[0050] In one embodiment, an apparatus includes a processor and a memory storing code executable by the processor. In various embodiments, the apparatus acquires functionality of a hardware component to be removed; operates a virtual fuse to delete a data region associated with the hardware component and permanently remove access rights to the functionality of the hardware component; and, after operating the virtual fuse to remove access rights to the functionality of the hardware component, indicates the state of the functionality on the hardware component.

[0051] In one embodiment, the virtual fuse is read by a driver of the system software of the hardware component.

[0052] In one embodiment, the firmware of the hardware component has multiple data areas. Each data area is associated with a specific function of the hardware component. A first function of the hardware component is permanently removed from the hardware component. A second function of the hardware component is retained within the hardware component.

[0053] In one embodiment, the virtual fuse erases the data area of ​​the firmware used for the functionality of the hardware component.

[0054] In one embodiment, the virtual fuse blows the electronic fuse of the electronic circuitry that controls the functionality in the firmware of the hardware component. After the electronic fuse blows, the processor cannot access the electronic circuitry and the firmware of the hardware component.

[0055] In various embodiments, the virtual fuse operation involves more than one step to delete a data area from firmware associated with the function of the hardware component. For example, the virtual fuse is firmware that erases the data area of ​​the function on the hardware component, writes a no-operation instruction to the data area of ​​the firmware associated with the function of the hardware component, and blows the electronic fuse of the electronic circuit associated with the function of the hardware component.

[0056] In one embodiment, the storage device may be an electronically erasable programmable read-only memory (EEPROM) device. The entire EEPROM device can be erased and reprogrammed to remove the data areas associated with the functionality removed from the hardware component. In various embodiments, the storage device may include EPROM, EEPROM, and / or flash memory to erase and reprogram the data areas associated with the functionality removed from the hardware component using a standard PC voltage. The virtual fuse may be an external virtual fuse block located outside the hardware component having a processor and memory storage device.

[0057] In one embodiment, a method for selectively disabling a technical function during device assembly is described. The method includes obtaining the function of the hardware component to be removed from the hardware component, and operating a virtual fuse to delete the data area associated with the hardware component and permanently remove access to the function of the hardware component. The method further includes indicating the state of the function on the hardware component after operating the virtual fuse to delete access to the function of the hardware component.

[0058] In one embodiment, the method further includes manipulating the virtual fuse to write a no-operation instruction on a data area of ​​firmware for the hardware component, rendering the function of the hardware component inoperable.

[0059] In various embodiments, the method further includes actuating the virtual fuse to erase the data area of ​​firmware for the function of the hardware component, and / or actuating virtual fuses in other areas of the electronic circuitry to permanently erase the data area. For example, actuating the virtual fuse in the method further includes blowing an electronic fuse of the electronic circuitry associated with the function-related data area. In one embodiment, the method further includes actuating the virtual fuse in more than one step to delete the data area from the firmware associated with the function of the hardware component. For example, the method may include erasing firmware containing the data area of ​​a function on the hardware component, actuating the virtual fuse to write a no-operation instruction to the data area of ​​the firmware associated with the function of the hardware component, and blowing an electronic fuse of the electronic circuitry associated with the function of the hardware component.

[0060] In various embodiments, the method further includes erasing the entire EEPROM device and reprogramming the EEPROM device to remove the data area associated with the function to be removed from the hardware component. The method can use a standard PC voltage to erase and reprogram the data area of ​​the EPROM, EEPROM, and / or flash memory device associated with the function to be removed from the hardware component to remove the function.

[0061] In various embodiments, the external virtual fuse block, located outside the hardware component, includes all or part of the virtual fuse. For example, the method may further include writing no-operation instructions to a data area and / or firmware for the function to be removed in the hardware component. In this configuration, the external virtual fuse block may be retained separately from the hardware component.

[0062] In one embodiment, a computer-readable storage medium for technical management of hardware components of a device during assembly is used to store program instructions. The program instructions are executable by a processor to cause the processor to acquire the functionality of the hardware component to be removed; to operate a virtual fuse to delete the data area associated with the hardware component and permanently delete access rights to the functionality of the hardware component; and, after operating the virtual fuse to delete access rights to the functionality of the hardware component, to indicate the state of the functionality on the hardware component.

[0063] Figure 1 This is a schematic diagram of a system for managing the technical functions of hardware components during the assembly of a computing device, provided as an embodiment of this application. Figure 1As shown, system 100 is used to selectively remove technical functions from information processing equipment or computing device 102 during or simultaneously with device assembly. In one embodiment, system 100 includes one or more computing devices 102 having one or more circuit boards 104 having various hardware components 106 that implement various technical functions on the circuit board 104. System 100 also includes one or more resource management devices 108 located on the circuit board 104 and / or located on a separate main management device 110. System 100 may also include one or more data networks 112 and / or one or more servers 114.

[0064] In one embodiment, the resource management device 108 is located on circuit board 104 and communicates with a main management device 110 on server 114. In another embodiment, the resource management device 108 is located on server 114 and controls computing device 102. The resource management device 108 may also be located on both computing device 102 and one or more servers 114. As used herein, the resource management device 108 may include a main management device 110 located on a separate device (e.g., server 114) and / or a resource management device 108 located directly on device 200 or at another location on computing device 102.

[0065] although Figure 1 The system 100 is described as having a specific number of computing devices 102, circuit boards 104, hardware components 106, resource management devices 108, data networks 112, and servers 114. However, those skilled in the art will recognize that the system 100 may also include any number of computing devices 102, circuit boards 104, hardware components 106, resource management devices 108, main management devices 110, data networks 112, and / or servers 114.

[0066] In one embodiment, the system 100 includes one or more computing devices 102, each computing device 102 having a circuit board 104 having various functions 116 encoded within firmware 118 to activate and control various hardware components 106. A data area 120 of the firmware 118 can provide mechanisms for controlling the enabling / disabling of all or some of the functions, technologies, and / or features 116 on the hardware components 106. Typically, enabling a function 116 makes the technology available to the computing device 102 and / or circuit board 104. Similarly, disabling a function 116 removes the technology from the computing device 102 and / or circuit board 104.

[0067] The computing device 102 may be one or more of a desktop computer, laptop computer, tablet computer, smartphone, smart speaker (e.g., Amazon Echo®, Google Home®, Apple HomePod®), Internet of Things (IoT) device, security system, set-top box, game console, smart TV, smartwatch, fitness tracker or other wearable activity tracking device, optical head-mounted display (e.g., virtual reality headset, smart glasses, headphones, etc.), high-definition multimedia interface (“HDMI”) or other electronic display dongle, personal digital assistant, digital camera, camcorder, IoT vehicle (e.g., car, ship, airplane, etc.) or a computing device including a processor (e.g., central processing unit “CPU”), processor core, field-programmable gate array (“FPGA”) or other programmable logic, application-specific computing device integrated circuit (“ASIC”), controller, microcontroller and / or another semiconductor integrated circuit device), volatile memory and / or non-volatile storage medium, display, connection to display, etc.

[0068] Figure 1 and Figure 2 The diagram illustrates the connection of resource management device 108 to computing device 102 to disable function 116 from hardware component 106. The resource management device 108 is typically configured to determine various enabled technologies and / or functions 116 and / or disable selected functions 116. Functions 116 are technical functions of hardware component 106 that can be enabled or disabled on circuit board 104, such as video codecs and audio codecs.

[0069] The resource management device 108 obtains various functions 116 of the hardware component 106 to be removed from the circuit board 104 and operates a virtual fuse 122 to selectively delete one or more data regions 120 associated with function 116. This permanently disables function 116, making it unusable by the processor. After operating the virtual fuse 122 and deleting access to the indicated function 116, the resource management device 108 indicates the status of function 116 on the hardware component 106.

[0070] The firmware 118 of the hardware component 106 may have multiple data areas 120. In this configuration, each data area 120 may be associated with one or more functions 116 on the hardware component 106. For example, the data area 120 of the video codec 228 (e.g., first function 116a) on the hardware component 106 may be permanently deleted, while the data area 120 of the audio codec 230 (e.g., second function 116b) on the hardware component 106 may be retained as a function 116 of the hardware component 106.

[0071] In this way, the resource management device 108 can even monitor, control, and / or modify the technical functions 116 available on the hardware component 106 after the circuit board 104 has been initially assembled. For example, the resource management device 108 can modify the functions 116 of the circuit board 104 during the computer / phone assembly of the computing device 102.

[0072] Because a first company (e.g., a chip manufacturer) can manufacture chipsets and / or circuit boards 104 at a first facility, and a second company (e.g., an equipment assembler) can assemble circuit boards 104 in computing devices 102 at a second facility, the resource management device 108 can reduce the risk of infringement claims for both companies. The resource management device 108 can modify enabled functions 116 after circuit board 104 is manufactured.

[0073] For example, the resource management device 108 can remotely modify function 116 during and / or after assembling computing device 102. Server 114 can use the resource management device 108 to remotely disable function 116 of computing device 102 by targeting data area 120 of firmware 118 and / or erasing and reinstalling firmware 118. This capability limits the risk of infringement claims faced by chip manufacturers and / or device assemblers for not paying appropriate licensing fees. For example, device assemblers can enable or disable technical function 116 on circuit board 104 to better control the functionality of computing devices sold to consumers.

[0074] Regarding the disabled function 116, the resource management device 108 can indicate the status of function 116 on the hardware component 106. Specifically, the resource management device 108 can update the database and / or use the database to calculate license fees. The hardware component 106 and / or the resource management device 108 can display this information to the end user and / or a representative of the manufacturer. The resource management device 108 can instruct a separate, independent master management device 110 on the server 114 that a function 116 has been successfully or unsuccessfully deleted and / or disabled. In one embodiment, when the resource management device 108 instructs the separate, independent master management device 110 that a function 116 has not been successfully deleted, the separate, independent master management device 110 connects to the computing device 102 via the server 114 to remotely disable the function 116.

[0075] In some embodiments, the resource management device 108 may be partially or wholly included on the circuit board 104. Similarly, the resource management device 108 may be partially or wholly mounted on the main management device 110. The resource management device 108 can control which functions 116 are enabled on the circuit board 104. Based on the enabled technical functions on the circuit board 104, the manufacturer (e.g., an equipment assembler) can determine the price of the computing device 102, which covers any potential costs, including any licensing fees. Furthermore, the resource management device 108 enables the equipment assembler to offer the same device at a different price point, for example, by disabling the unpaid licensing fee function 116 on the computing device 102.

[0076] The resource management device 108 may include hardware devices of hardware components 106 of an adjustable circuit board 104. For example, the resource management device 108 may adjust one or more computing devices 102, such as security hardware dongles or other hardware devices, such as set-top boxes, network devices, etc. In various embodiments, the computing device 102 may include a head-mounted display, a laptop computer, a server 114, a tablet computer, a smartphone, a security system, a network router or switch, etc. The resource management device 108 may be connected via a wired connection (e.g., a Universal Serial Bus "USB" connection) or a wireless connection (e.g., Bluetooth®, Wi-Fi, Near Field Communication "NFC", LTE, 5G, etc.).

[0077] The hardware devices and / or hardware components 106 on the circuit board 104 of the resource management device 108 may include a power interface, a wired and / or wireless network interface, a graphics interface attached to a display, and / or semiconductor integrated circuit devices as described below, configured to perform the functions described in the specification. The resource management device 108 may be configured to control one or more computing devices 102 to selectively enable and / or disable various functions 116. The resource management device 108 may create different products from two physically identical computing devices 102, each computing device 102 having different functions 116 enabled and / or disabled.

[0078] The resource management device 108 controls the circuit board 104 of the computing device 102. The circuit board 104 may include semiconductor integrated circuit devices (e.g., one or more chips, dies, or other discrete logic hardware). The circuit board 104 may be a field-programmable gate array (“FPGA”) or other programmable logic, firmware for the FPGA or other programmable logic, or microcode for execution on a microcontroller. For example, the circuit board 104 may be an application-specific integrated circuit (“ASIC”), a processor, a processor core, etc.

[0079] In various embodiments, the resource management device 108 has a different circuit board 104 than the computing device 102. For example, the resource management device 108 may be separate from and / or located externally to the circuit board 104 of the computing device 102. In another embodiment, the resource management device 108 is located on the circuit board 104 of the computing device 102. For example, the resource management device 108 may be mounted on the printed circuit board 104 and have one or more wires or connections (e.g., volatile memory, non-volatile storage media, network interface, peripheral device, graphics / display interface, etc.).

[0080] The hardware components 106 of the circuit board 104 (and / or the hardware devices of the resource management device 108) may include one or more pins, pads, or other electrical connections configured to send and receive data (e.g., communicate with one or more wires of the printed circuit board 104, etc.). One or more hardware circuits and / or other circuits may be configured to perform various functions of the circuit board 104 and / or the resource management device 108 of the computing device 102. The resource management device 108 may be electrically coupled to the circuit board 104 in the computing device 102 and remotely coupled to the main management device 110 to enable or disable the data area 120 of the firmware 118 and to turn on / off the function 116 of the circuit board 104.

[0081] In some embodiments, the semiconductor integrated circuit device of the circuit board 104, such as on the computing device 102 (or the hardware device of the resource management device 108), includes and / or is communicatively coupled to one or more volatile storage media, which may include, but are not limited to, random access memory (“RAM”), dynamic RAM (“DRAM”), cache, etc.

[0082] In one embodiment, the semiconductor integrated circuit device, circuit board 104, or other hardware device of the resource management device 108 and / or computing device 102 includes and / or is communicatively coupled to one or more non-volatile media, which may include, but are not limited to: NAND flash memory, NOR flash memory, nanometer random access memory (nano RAM or "NRAM"), nanowire-based memory, silicon oxide-based sub-10 nanometer process memory, graphene memory, silicon oxide-nitride-silicon oxide ("SONOS"), resistive RAM ("RRAM"), programmable metallized cell ("PMC"), conductive bridged RAM ("CBRAM"), magnetoresistive RAM ("MRAM"), dynamic RAM ("DRAM"), phase change RAM ("PRAM or "PCM"), magnetic storage media (e.g., hard disk, magnetic tape), optical storage media, etc.

[0083] In various embodiments, the data network 112 includes, for example, a digital communication network that transmits digital communications between computing device 102 and server 114 having resource management device 108 on a separate master management device 110. Data network 112 may include wireless networks, such as wireless cellular networks, local wireless networks, Wi-Fi networks, Bluetooth® networks, near field communication (“NFC”) networks, ad hoc networks, and / or the like. Data network 112 may include a wide area network (“WAN”), storage area network (“SAN”), local area network (“LAN”) (e.g., a home network), fiber optic network, the Internet, or another digital communication network. Data network 112 may include two or more networks. Data network 112 may include one or more servers 114, routers, switches, and / or other network devices. Data network 112 may also include one or more computer-readable storage media, such as hard disk drives, optical drives, non-volatile memory, RAM, etc.

[0084] The wireless connection may be a mobile phone network. It may also be a Wi-Fi network based on any Institute of Electrical and Electronics Engineers (“IEEE”) 802.11 standard. Alternatively, it may be a Bluetooth connection. Furthermore, the wireless connection may employ radio frequency identification (“RFID”) communication, including RFID standards developed by the International Organization for Standardization (“ISO”), the International Electrotechnical Commission (“IEC”), the American Society for Testing and Materials® (ASTM®), the DASH7™ Alliance, and EPCGlobal™.

[0085] Optionally, the wireless connection may employ a ZigBee® connection based on the IEEE 802 standard. In one embodiment, the wireless connection employs a Z-Wave connection designed by Sigma Designs. Optionally, the wireless connection may employ an ANT® and / or ANT+® connection as defined by Dynastream® Innovations Inc. of Cochrane, Canada.

[0086] The wireless connection of the data network 112 may be an infrared connection, including a connection that conforms at least to the Infrared Physical Layer Specification (“IrPHY”) defined by the Infrared Data Association (“IrDA”). Optionally, the wireless connection may be cellular telephone network communication. All standards and / or connection types include the latest versions and revisions of the standards and / or connection types as of the date of filing of this application.

[0087] In one embodiment, the one or more servers 114 may be blade servers, mainframe servers, tower servers, rack servers, etc. The one or more servers 114 may be configured as mail servers, network servers, application servers, FTP servers, media servers, data servers, file servers, virtual servers, etc. The servers 114 may be communicatively coupled (e.g., networked) to one or more computing devices 102 via a data network 112, and may be configured to execute or run machine learning algorithms, programs, applications, processes, etc.

[0088] As described in more detail below, the computing device 102 may have a broad supply chain. For example, the supply chain may include chipset manufacturers (aka chip manufacturers), logic board manufacturers and / or circuit board 104 assemblers and / or device manufacturers / assemblers. Manufacturers of the computing device 102 work together to manufacture and distribute the circuit board 104 for a specific computing device 102. Typically, manufacturers and assemblers in the supply chain attempt to obtain any relevant licenses from the relevant patent holders before introducing a new circuit board 104 and / or the computing device 102 to the market.

[0089] For example, the hardware component 106 (e.g., the chip on circuit board 104) can use a variety of licensed and protected industry standards / technologies. Many of these functions have become industry standards and may be implemented using FRAND fee agreements and / or other agreed licensing arrangements.

[0090] As used herein, “manufacturer” refers to any organization or entity in the supply chain, from the manufacture of chips or other components to consumer end products. A “chip manufacturer” is the specific manufacturer of circuit board 104, and an equipment assembler uses the circuit board in computing device 102 to assemble consumer products required by users, which are sold to end users as products (e.g., laptops or mobile phones).

[0091] Given the scale of the various technologies and functions on each hardware component 106 and the different configurations of each circuit board 104, manufacturers typically seek extensive technology licenses before releasing new products (e.g., mobile phones, computers, or laptops). However, this can be expensive if a particular circuit board 104 does not wish to have certain technologies and / or functions. In the various embodiments described below, chip manufacturers can include new technologies on circuit boards 104, while device assemblers (and / or consumers) decide not to include said new technologies in their devices. Previously, to disable function 116 on circuit board 104, device assemblers needed to design and order new circuit boards 104 without said technology. This practice significantly increased model / SKU complexity for tracking physical orders for new and old circuit boards 104 with and without said functionality. However, the ability to permanently disable functionality allows device assemblers to create similar physical consumer models with different digital architectures. Since the digital architecture is known, the configuration also allows for more specific licensing surcharges.

[0092] The number of technical features in each hardware component 106 may make a change in just one or two features 116 critical to the time commitment for renegotiating licensing fees, for example, for a change in a “small” feature 116. However, including unused technology on each board 104 could significantly increase the cost of the computing device 102. In some embodiments, the increased cost may be justified because the cost may be small, or the consumer may want to add the features 116. However, in other embodiments, these features may only increase the cost of the computing device 102 (e.g., licensing fees), and the technical features will not be used or accessed.

[0093] Chip manufacturers sometimes attempt to remove certain functions 116 on circuit board 104 by controlling the use of fuses, but this practice increases complexity for device assemblers. For example, device assemblers need to create a separate SKU for each modified circuit board 104 and track the modified functions and features for each SKU of circuit board 104. Device assemblers may also need to pay for licenses for the disabled functions 116, which could increase the cost of computing device 102 for the end consumer.

[0094] Some examples of the described functional fuse may include an eFuse and / or an external resistor. Both the eFuse and the external resistor operate by increasing the resistance of function 116 on the physical electronic circuitry. This can increase the cost of the chip and / or remove die space from other hardware components 106, and is generally not software configurable. Combining several eFuses for several codecs (e.g., feature 116) on board 104 can significantly increase the cost of hardware components 106 and / or board 104. Because chip manufacturers may not want to change the design of board 104 or add eFuses proposed by device assemblers for enabling or disabling technologies, device assemblers are often unable to meet specific customer requests to enable or disable specific technology functions. Redesigning board 104 without the enabled function can become prohibitively costly. Therefore, from the perspective of device assemblers and end users, there is a need for chip suppliers to provide a mechanism to enable or disable the desired function on board 104 during assembly.

[0095] The applicant has discovered a smart inclusion / exclusion method for fine-grained control over technologies and / or functions 116 on hardware component 106. This method allows for the selective enabling / disabling of various technologies and / or functions of hardware component 106 after the circuit board is assembled. The selective inclusion of various technologies (e.g., functions 116) allows chip manufacturers and device assemblers to offer desired technologies and / or functions 116 for cost-effective, client-demand-driven systems. In other words, the selective inclusion / exclusion of functions 116 on circuit board 104 promotes market competition by providing consumers with a broader categorization of technologies available on hardware component 106 of computing device 102. This enables more efficient distribution of new technologies to models / users willing to pay for new functions 116, while also providing customers with a wider variety of computing products to tailor desired technologies and functions 116 to their individual needs and / or practical applications.

[0096] The applicant discovered that these systems and methods enable equipment assemblers to order commercially available standard circuit boards 104 from chip manufacturers and assemble various devices from the same standard basic configuration. Equipment assemblers can create new virtual SKUs and / or circuit boards 104 based on the model's basic configuration, sub-models, and / or location (e.g., country) to enable / disable various technical features 116 of the product family. Furthermore, end consumers cannot subsequently modify the enabling / disabling method. The systems and methods ensure that enabled features 116 have appropriate licenses. This also prevents chip manufacturers or equipment assemblers from distributing unlicensed technologies.

[0097] In one embodiment, the chip manufacturer can set a one-time "virtual fuse" that can be modified by the device assembler. The virtual fuse can be adjusted during assembly for various models, sub-models, or countries requiring different technical features. When the virtual fuse is "on," hardware technology function 116 is enabled, and technology function 116 is the technology available to the computing device 102. Conversely, when the virtual fuse is "off," the technology remains disabled and cannot be enabled by the end user. For example, the firmware of the technology is "bricked."

[0098] The applicant discovered that the write-once / one-time programmable memory located on the external fuse block 124 on the resource management device 108, which is located away from the circuit board 104, and / or on the circuit board 104 of the computing device 102, can be used to selectively enable / disable function 116 during the assembly of the computing device 102.

[0099] In one embodiment, the chip manufacturer can establish enable / disable values ​​for hardware component 106 during the software-driven process in chip manufacturing. Device assemblers can selectively enable / disable functionality of computing device 102 during assembly using resource management device 108 configured for a specific circuit board 104. Resource management device 108 can send bits and / or codes to hardware component 106 to enable or disable various functions. Because resource management device 108 can be stored externally to circuit board 104, the overall complexity of the supply chain for chip manufacturers and device assemblers can be simplified.

[0100] In one embodiment, the embedded firmware 118 on the circuit board 104 may include special and / or unique programs to create a permanent virtual switch or virtual fuse 122. The virtual fuse 122 is stored within the data area 120 of the firmware 118 and enables or disables the technical function. The data area 120 selectively enables or "bricks" the firmware 118 of the hardware component 106, making it inaccessible to the processor 204 and / or the circuit board 104.

[0101] During the manufacturing of circuit board 104, the chip manufacturer can install a virtual switch by installing a program into the data area 120 of firmware 118. The device assembler can use resource management device 108 to control hardware component 106 and can disable or enable various functions 116. Virtual fuse 122 can temporarily or permanently change the state of bits in data area 120 and selectively disable technologies and / or functions 116 on circuit board 104. Virtual fuse 122 can access the storage device 126 of hardware component 106 and / or directly modify the data area 120 of firmware 118.

[0102] After the bit is modified / written in the data area 120 of firmware 118, the virtual fuse 122 of the resource management device 108 can further operate the hardware component 106 to reprogram the firmware 118 and / or otherwise modify the circuit board 104. Upon initial startup, the resource management device 108 can send a bit or code that can only be changed once and permanently erases the data area 120 or enables function 116 on the hardware component 106. Once the bit is written to and / or erased from the data area 120 of firmware 118, the state of the hardware component 106 cannot be changed again. In one embodiment, the resource management device 108 sends a code that writes no opcode to the data area 120 of firmware 118.

[0103] During system startup and / or reset, the embedded firmware 118 on the hardware component 106 or circuit board 104 reads the virtual fuse 122. When the virtual fuse is on, the corresponding technical function is enabled. Conversely, when the virtual fuse 122 is off, the function 116 is disabled for the hardware component 106. The processor 204 and / or circuit board 104 can determine whether the function 116 has been permanently disabled by reading the virtual fuse 122. Similarly, drivers or other components can read the settings of the virtual fuse 122 as needed.

[0104] Because firmware 118 is a trusted system component, chip manufacturers and / or device assemblers can track data area 120 (e.g., in...). Figure 3 (In the resource management device 108 and / or register module 304 of the illustrated device 300). Chip manufacturers and / or device assemblers can later verify and certify that the sold configuration is licensed, protected, and unmodified. Furthermore, the firmware's lifespan can be enhanced by including such a self-modifying data area 120 and modifying it using a virtual fuse 122 that selectively enables or removes firmware 118 for one or more functions 116 in the data area 120. For example, mounting the resource management device 108 on a separate device from the circuit board 104 ensures that the manufacturing code and / or bits of the data area 120 used to modify the firmware 118 are protected.

[0105] Figure 2This is a schematic structural block diagram of a device 200 including various hardware components 106. The device 200 has hardware components 202 that may be functionally identical or similar to a circuit board 104 having hardware components 106. In various embodiments, the hardware components 202 of the device 200 may include a processor 204, a central processing unit (“CPU”) 206, a processor core, a field-programmable gate array (“FPGA”) or other programmable logic, an application-specific integrated circuit (“ASIC”), a controller, a microcontroller, and / or another semiconductor integrated circuit device. The device 200 includes a CPU 206 and various processors 204. The processor 204 includes the CPU 206 but may also include processing cores or processors 204 additional to the device 200. In other words, the CPU 206 is a dedicated processor 204, but may include other processors 204 on the device 200.

[0106] The device 200 may also include a storage device 208 having volatile memory such as RAM 212 and / or non-volatile storage media such as ROM 214 with various memory addresses 210. In various embodiments, the storage device 208 may include an erasable electronic read-only memory or EEPROM device 216. The storage device 208 may have a data area 220 with addresses 210 for firmware 222, system software 224 (e.g., an operating system), and / or other programs run by processor 204. Additional hardware components 202 of the device 200 may include a graphics card or GPU 226 with video codec 228 and / or audio codec 230, an RF transceiver 232, a camera image signal processor 234, a near field communication (NFC) wireless subsystem 236, a Bluetooth subsystem 238, a Wi-Fi subsystem 240, a digital signal processor or DSP 242, an artificial intelligence neural network or AI engine 244, a modem 246, such as a cellular modem 248, and a connection to a USB port 252, etc.

[0107] For example, the device 200 may have a charging port 250, a security support system 254, and / or cellular technology (e.g., a cellular modem 248). As described in this specification, various components (e.g., video codec 228 and audio codec 230 on GPU 226) are shown as single components and can be decoupled onto one or more different hardware components 202.

[0108] Various data regions 220 may have different addresses 210 on the device 200 and / or hardware components 202 that encode various technologies. The virtual fuse 256 may encode firmware 222 for function 260 on the device 200 for one or more specific addresses 210 of the data region 220. Figure 2 An exemplary embodiment of the device 200 having multiple hardware components 202 and functions 260 is shown, but it should be recognized that other hardware components 202, functions 260 and / or configurations of the device 200 are also within the scope of this disclosure.

[0109] Each hardware component 202 includes a data area 220 storing firmware 222, which is configured to enable one or more functions 260 to communicate with the CPU 206, processor 204, and / or system software 224 on the device 200. For example, the data area 220 and / or firmware 222 may be stored on a non-volatile storage device 208, such as an EPROM device, EEPROM device, and / or flash memory device. The CPU 206 may communicate with each hardware component 202 using the system software 224 and thereby utilize various enabled technologies and / or functions 260. For example, the system software 224 may enable and / or enhance the video codec 228 on the GPU 226 through interaction between the CPU 206 and the data area 220 of the firmware 222.

[0110] The system software 224 can be run by the CPU 206 and / or other processors 204 to communicate and / or control the functions 260 of the connected hardware components 202. The system software 224 can be a processor-side application 262 that facilitates and / or enables communication between the CPU 206 and various hardware components 202. As described in this specification, the firmware 222 is client code stored on the hardware component 202 that enables the hardware component 202 to communicate with the CPU 206 and / or device 200. The system software 224 may include or interface with the firmware 222 of the hardware component 202. The firmware 222 installed on the hardware component 202 can enable various functions 260 of the hardware component 202 that can be operated by the CPU 206 and / or other processors 204.

[0111] The hardware component 202 includes one or more data areas 220 in firmware 222 to selectively enable or disable functionality 260 of the hardware component 202. The data areas 220 provide selectivity for functionality 260 on the device 200 and provide specific granularity for enabling or disabling functionality 260. The functionality of the device 200 is a summary of the variations and number of enabled functionality 260 on the hardware component 202 and the ability to control or use the hardware component 202 through system software 224.

[0112] For example, the video codec 228 of the GPU 226 enhances the device 200 by providing a standardized format for communication with the system software 224. When properly configured with suitable firmware 222, the GPU 226 enhances the device 200 using various functions 260 provided by the video codec 228 for compressing / decompressing, communicating, transmitting, and / or displaying video signals. However, each of these functions 260 is only available to the device 200 if the data area 220 is enabled and the appropriate firmware 222 is installed and readable by the system software 224 for the specific functions of the video codec 228 and / or the GPU 226.

[0113] Similarly, the NFC wireless subsystem 236 uses standardized and appropriate firmware 222 to enable various functions 260 of the Bluetooth subsystem 238 and / or the Wi-Fi subsystem 240. In one embodiment, the enabled data area 220 of the firmware 222 can enable the 5G cellular function 260 of the device 200. A device 200 without the firmware 222 (e.g., a bricked data area 220) can only access 4G cellular function. Compared to the 802.11a / b / g or 802.11n Wi-Fi function 260, the Wi-Fi subsystem 240 may include another data area 220 with different firmware 222 for the Wi-Fi 6 function 260.

[0114] A feature of this application is that the device assembler can enable and / or disable various functions 260 after the device 200 is assembled, thereby modifying the digital architecture 264 without changing the physical architecture 266 of the device 200. For example, the same device 200 may include a cellular modem 248 that supports both 4G and 5G functions 260 but only enables 4G functionality. This can make mobile phones cheaper by eliminating the need for new device 200 design and / or reducing licensing costs for mobile devices.

[0115] Enabling different functions 260 on the device 200 can involve costs, such as the design and testing costs and / or licensing fees for various enabling technologies. This increases the total cost of the device 200 and / or computing device 102. Consumers can choose to disable certain functions 260 on the computing device 102 and pay a reduced cost.

[0116] However, manufacturers and / or assemblers previously lacked granularity in selecting specific, individually enabled features 260 sold to users. This meant that assemblers might have to pay for all feature licenses regardless of whether or not all features 260 were enabled or used. The applicant found that the ability to selectively and permanently disable various technologies and / or features 260 on the device 200 provides manufacturers with the benefit of mass production of the same design of the device 200. This feature also provides end consumers with the desired features 260 for a specific computing device 102. Designing and manufacturing different virtual SKU products is more cost-effective than physically changing the structure of the circuit board 104. Consumers also have greater access to the features 260 required for specific applications without having to pay for unwanted technologies.

[0117] Selectively and permanently disabling function 260 after assembly (e.g., during the assembly of computing device 102) enhances the ability to mass-produce the device 200 and physical device 200. This selectivity also allows for a broad categorization of the functions 260 within the digital device, based on the end-user's chosen architecture. Because resource management device 108 responds to an operational virtual fuse indicating whether the technology has been successfully removed, master management device 110 on remote server 114 can maintain a list of enabled functions 260 on each computing device 102. If assemblers and / or manufacturers are later accused of patent infringement, they can definitively prove which functions on the device 200 have been paid for (e.g., license fees) and enabled, and which functions have been permanently disabled. Enabling manufacturers and / or assemblers to mass-produce or purchase the same physical architecture 266 on the device 200 also provides consumers with a wider range of different categorizations of functions 260.

[0118] Figure 3 This is a schematic structural block diagram illustrating one embodiment of a circuit board 104 or device 300, which has enabled functions 260 on various hardware components 202. A setting module 302 (e.g., a resource management device 108 running on system software 224 of an information processing device) may include code executable on processor 204 to enable / disable various hardware components 202 in a data area 220. The setting module 302 includes a register module 304, a target function module 306, a fuse module 308, and a recording module 310.

[0119] refer to Figure 2 and 3The device 300 has a processor 204 electrically coupled to the storage device 208 and each hardware component 202. The processor 204 receives instructions from the resource management device 108 to control various functions 260 of the device 200. Specifically, the setting module 302 may include separate modules (e.g., register module 304, target function module 306, fuse block module 308, recording module 310, register storage unit 312, etc.) for enabling and / or disabling various functions provided by the hardware components 202 on the device 200. In various embodiments, the virtual fuse 256 may modify and / or change the digital architecture 264 of the device 200 without affecting the physical architecture 266 of the device 200.

[0120] For example, the setting module 302 may execute code and / or send bits to the data area 220 of the firmware in the hardware component 202. Upon receiving the bit, the data area 220 encodes whether a function 260 of the hardware component 202 is enabled or disabled. When the function 260 is enabled, the data area 220 encodes firmware 222 for the function 260. When the function is disabled, the bit triggers the execution of a program stored in the data area 220 to brick all or part of the chip and permanently delete the device 200 and / or processor 204's access to the function controlled by the data area 220 on the hardware component 202. In another embodiment, the data area 220 operates a physical or electronic fuse 268 and permanently alters (e.g., deletes and / or destroys) the circuitry that encodes the function 260 of the hardware component 202. In yet another embodiment, the virtual bit first encodes the data area 220 to delete access to the function 260, and then operates the electronic fuse 268 to permanently alter the access to the data area 220.

[0121] The virtual fuse 256 can blow the electronic fuse 268 of electronic circuit 270, which controls function 260 by writing and / or erasing firmware 222 of hardware component 202. Once the electronic fuse 268 blows, the processor 204 can no longer access electronic circuit 270 and the firmware 222 of function 260 of hardware component 202. In various embodiments, the virtual fuse can write random data bits and / or no opcode in data area 220 of firmware 222, encoding the function 260 of hardware component 202 to be deleted. The virtual fuse 256 can erase data area 220 of function 260 from hardware component 202 and / or firmware 222 and / or blow the electronic fuse 268 of electronic circuit 270 that controls function 260 of hardware component 202. For example, the electronic fuse 268 can be electrically coupled to data area 220 of firmware 222 or a specific portion of hardware component 202 and / or firmware 222.

[0122] The storage device 208 stores executable code accessible to the configuration module 302 to control the functions 260 of the hardware component 106 on the device 200 via the processor 204. The register module 304 stores records of the hardware component 106 and / or its functions 260 on the device 200. In some embodiments, the register module 304 reserves a register storage unit 312 for each enabled function 260 of each hardware component 202 on the device 200. For example, the register module 304 records firmware 222 configuration (e.g., version, update history, and / or compatibility) for each hardware component 202 and the function 260 enabled by firmware 222. The register module 304 may include configuration and / or bit codes or keys for enabling and / or disabling the firmware 222 and related functions of the hardware component 106.

[0123] In various embodiments, an operator of the device 300 specifies a function 260 of the hardware component 202 to be removed from the device 300. In some embodiments, the setting module 302 may obtain the function 260 from operator or program input. For example, the setting module 302 may be used to add and / or remove functions 260 of the device 200. For example, in one embodiment, the operator selects a specific function 260 to be disabled on the device 200, and the setting module 302 recommends and / or determines different related functions to enable / disable on the device 200. Once the device 200 obtains the function 260 to be enabled / disabled, the fuse block module 308 operates a virtual fuse 256 to permanently remove access to the specified function 260 of the hardware component 202 on the device 200. For example, the virtual fuse 256 sends one or more bits to firmware 222. The virtual fuse 256 may send a binary signal including one or more bits to write to the firmware 222 of the hardware component 202 to enable and / or disable the specified function 260. In some embodiments, a bit (or binary signal) is sent to and written into the firmware 222 of the hardware component 202 to create a virtual fuse 256, which prevents the processor 204 of the device 200 from accessing a specified function 260 and / or a portion or all of the hardware component 202.

[0124] For the virtual fuse 256 of the fuse block module 308 to remove processor 204's access to a specified function 260, the recording module 310 removes or deletes the function 260 of hardware component 202 from register storage unit 312. In other words, the recording module 310 modifies register storage unit 312 to include only the enabled function 260 of device 200. The recording module 310 may transfer a copy of the enabled function 260 on register storage unit 312 to system software 224 and / or setting module 302. For example, a manufacturer or assembler of computing device 102 having device 200 may store a copy of the enabled function 260 associated with SKU of device 200. The virtual fuse 256 may modify firmware 222 on hardware component 202 to enable / disable function 260 on device 200. The selectivity of device 200 provides the ability to have the same or similar mass-production physical architecture 266 as well as different digital architectures 264. The functionality of the device 200 is disabled after manufacturing but during assembly, for example, enabling the assembler to modify the circuit board 104 produced by the manufacturer for a specific consumer, while also ensuring that appropriate licensing fees and / or other costs of the technology are associated with the SKU of the device 200.

[0125] In various embodiments, device drivers, system software 224, installed programs, and / or other components coupled to processor 204 can read register memory 312. For example, the system software 224 can read register memory 312 to determine whether to enable / disable virtual fuse 256 for a driver of the device 200. In another embodiment, register memory 312 includes a list of all hardware components 202 on the device 200 and their associated functions 260, and the register memory 312 of available functions 260 and / or hardware components 202 is modified as virtual fuses 256 are deleted one by one.

[0126] The register storage unit 312 can read the data area 120 of the firmware 222 on the hardware component 202. For example, the register storage unit 312 can read whether the first function 116a of the hardware component 202 has been permanently deleted and read the second function 116b of the hardware component 202 stored on the device 200. Then the recording module 310 can update and / or maintain the register storage unit 312.

[0127] In various embodiments, the storage device 208 encoding firmware 222 is stored in electrically erasable programmable read-only memory (EEPROM) and / or resilient flash memory. In other embodiments, the storage device 208 is a stock read-only memory (“stock ROM”) device. The EEPROM, flash memory, and / or stock ROM include firmware 222 for each hardware component 202 on the device 200. System software 224 of one or more computing devices 102 can use the firmware 222 located on the hardware component 202 to control the functionality 260 of one or more hardware components 202. In various embodiments, the virtual fuse 256 operates on the EPROM, EEPROM, flash memory, and / or stock ROM to create new virtual devices 200 by controlling which data areas 120 on the firmware 222 are accessible. The virtual fuse 256 can control access to the functionality 260 on the hardware component 202, thereby altering the digital architecture 264 of the device 200.

[0128] In some embodiments, the virtual fuse 256 is an external virtual fuse block 124 located outside the device 200 having the processor 204 and storage device 208. The manufacturer or assembler may retain the external virtual fuse block 124 of the hardware component 202.

[0129] Figure 4 This is a schematic block diagram illustrating a method 400 for selectively disabling a function 260 on a computing device 200 during assembly (e.g., after manufacturing the device 200). In one embodiment, the method 400 includes: obtaining a function 260 of a hardware component 202 to be removed (402); and operating a virtual fuse 256 to remove a data region 220 associated with the hardware component 202 and permanently remove access to the function 260 of the hardware component 202 (404). In various embodiments, the virtual fuse 256 may permanently remove access to the function 260 on the device 200. In response to operating the virtual fuse 256 to remove access to the function 260, the method may include indicating the state of the function 260 on the hardware component 202. For example, the resource management device 108 may instruct a separate master management device 110 on a user display and / or server 114 that the function 260 is disabled.

[0130] Figure 5 It shows Figure 4Various alternative methods 500 of the method 400 for selectively disabling function 260 on device 200 during assembly are shown. Method 500 includes actuating the virtual fuse 256 to erase data area 220 (502) of firmware 222 for function 260 of hardware component 202. Method 500 further includes actuating the virtual fuse 256 to write a no-operation instruction (504) into the data area 220 of firmware 222 of hardware component 202. The no-operation instruction renders function 260 of hardware component 202 inoperable. In some embodiments, actuating the virtual fuse 256 blows electronic fuse 268 of electronic circuitry 270 associated with the data area 220 of function 260 (506). In various embodiments of method 500, a single virtual fuse 256 may actuate some or all of steps 502 to 506.

[0131] The virtual fuse 256 can erase the entire storage device 208 (508), such as an EPROM device, EEPROM device 216, and / or flash memory device 218. The virtual fuse 256 can reprogram the storage device 208 (e.g., EEPROM device 216 and / or flash memory device 218) to delete the data area 220 associated with the function 260 to be deleted from the device 200. In another embodiment, operating the virtual fuse 256 uses a standard PC voltage to erase and reprogram the data area 220 (510) of the storage device 208 (e.g., EEPROM device 216 or flash memory device 218) associated with the function 260 to be deleted from the device 200.

[0132] In one embodiment, the virtual fuse 256 is an external virtual fuse block 124 located outside the device 200. The external virtual fuse block 124 can send bits to the data area 220 of firmware 222 associated with the function 260 to be removed from the hardware component 202. The virtual fuse block 124 can write a no-operation instruction to the data area 220 of the firmware 222 for the function 260 to be removed from the hardware component 202. Thus, the external virtual fuse block 124 can be retained independently. This configuration can help manufacturers, chip manufacturers, and / or device assemblers control and / or monitor the external virtual fuse block 124. In various embodiments, the manufacturer and / or assembler of the hardware component 202 retains the external virtual fuse block 124. In various embodiments, the enable / disable functions on the device 200 can be stored and / or recorded in a database (512). For example, the enable function 260 in the data area 220 can be stored in a database on server 114 and / or in resource management device 108. The server 114 may record the disabled function 260 in the data area 220 of the hardware component 202.

[0133] Figure 6 This is an explanation Figure 4 Schematic block diagrams of various alternative methods 600 of method 400 shown, for selectively disabling the function 260 on the device 200 during assembly. In various embodiments, method 600 operates outside the device 200 and includes an external virtual fuse block 124 (602) of the virtual fuse 256. Method 600 also includes writing no-operation instructions to the data area 220 of the firmware 222 of the hardware component 202 for the function 260 to be deleted (604). Method 600 may store the enabled function 260 on the device 200 in register storage unit 312 (606). In other words, register storage unit 312 stores a record of enabled functions 260 on the device 200 that are accessible by the processor 204 and / or the operator of the system / method. In response to the virtual fuse 256 permanently deleting the processor 204's access to function 260, method 600 may delete function 260 from register storage unit 312 (608). The register storage unit 312 may store a list of all enabled functions 260 for each hardware component 202 on the device 200. Similarly, the register storage unit 312 may store a list of each disabled function 260 for a specific SKU of the device 200.

[0134] This application allows device assemblers to enable and / or disable various functions after the device is assembled, thereby modifying the digital architecture without altering the physical architecture of the device. Enabling different functions on the device involves costs, such as the design and testing costs and / or licensing fees for various enabling technologies. Consumers can reduce costs by selectively disabling certain computing devices. The ability to selectively and permanently disable various technologies and / or functions on the device provides manufacturers with the benefit of mass production of devices with the same design. Designing and manufacturing different virtual SKU products is more cost-effective than physically changing the structure of the circuit board. Consumers can also gain greater access to the functions required for specific applications without paying for unwanted technologies.

[0135] The various sections in this manual are described in a progressive manner, with each section focusing on the differences from the others. Similar or identical parts can be referred to each other.

[0136] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An apparatus comprising: processor; and Storage devices are used to store processor-executable code to perform the following operations: Identify the functions in the hardware components that need to be removed from the hardware components; The command instructs a virtual fuse to first encode data areas related to the operation of the function to prevent computational access to the function, and subsequently blows an electronic fuse to prevent electronic access to the hardware component, wherein encoding the data areas and blowing the electronic fuse permanently disable the function on the hardware component; and In response to operating the virtual fuse to permanently disable the function on the hardware component, the state in which the function is permanently disabled on the hardware component is indicated.

2. The apparatus of claim 1, wherein, The virtual fuse is read by the system software driver.

3. The apparatus of claim 1, wherein, The firmware of the hardware component has multiple data areas, each of which is associated with a single function of the hardware component, wherein the function of the hardware component that is permanently deleted is a first function and a second function of the hardware component is retained.

4. The apparatus of claim 1, wherein, When the data area is encoded, the virtual fuse erases the data area of ​​the firmware used for the function of the hardware component.

5. The apparatus of claim 1, wherein, When the electronic fuse is blown, the virtual fuse will blow the physical fuse in the electronic circuitry that controls the function on the hardware component.

6. The apparatus of claim 1, wherein, The virtual fuse: When encoding the data area, a no-operation instruction is written into the data area of ​​the firmware related to the function of the hardware component; or Erase the data area of ​​the firmware used for the function on the hardware component; and When the electronic fuse is blown, the physical fuse in the electronic circuitry associated with the function on the hardware component is also blown.

7. The apparatus of claim 1, wherein, The storage device includes an electrically erasable programmable read-only memory (EEPROM) device, wherein the EEPROM device is at least partially erased and reprogrammed to delete the data area associated with the function to be removed from the hardware component.

8. The apparatus of claim 1, wherein, The storage device includes flash memory that uses standard PC voltage to erase and reprogram the data areas associated with the functionality to be removed from the hardware component.

9. The apparatus of claim 1, wherein, The virtual fuse includes a virtual fuse block outside the hardware components having the processor and the storage device.

10. The apparatus of claim 9, wherein, The external virtual fuse block is kept separately on the server and is independent of the hardware component.

11. A method comprising: Identify the functions in the hardware components that need to be removed from the hardware components; The command virtual fuse first encodes the data area related to the operation of the function to prevent computational access to the function, and then blows the electronic fuse to prevent electronic access to the hardware component. Encoding the data area and blowing the electronic fuse permanently disable the function on the hardware component. In response to operating the virtual fuse to permanently disable the function on the hardware component, the state in which the function is permanently disabled on the hardware component is indicated.

12. The method of claim 11, wherein, The virtual fuse is commanded to first encode the data area by writing a no-operation instruction into the data area of ​​the firmware of the hardware component, making the function of the hardware component permanently inoperable.

13. The method of claim 11, wherein, The virtual fuse is commanded to first encode and erase the data area of ​​the firmware used for the function of the hardware component.

14. The method of claim 11, wherein, Commanding the virtual fuse to subsequently blow the electronic fuse includes blowing the physical fuse in the electronic circuitry of the data area that operates the function.

15. The method of claim 11, wherein, Commanding the virtual fuse to first encode the data region includes: Write a no-operation instruction to the data area of ​​the firmware related to the function of the hardware component; or Erase the data area of ​​the firmware used for the function on the hardware component; and Commanding the virtual fuse to subsequently blow the electronic fuse includes blowing the physical fuse in the electronic circuitry associated with the function of the hardware component.

16. The method of claim 11, wherein, Commanding the virtual fuse to first encode the data region includes: Erase the EEPROM device; and The EEPROM device is reprogrammed to delete the data area associated with the function to be removed from the hardware component.

17. The method of claim 11, wherein, The command to the virtual fuse first encodes the data area, including erasing and reprogramming the data area of ​​the flash memory device associated with the function to be removed from the hardware component using a standard PC voltage.

18. The method of claim 11, wherein, The virtual fuse is disposed on a virtual fuse block outside the hardware component having a processor and storage device, and the method further includes writing no-operation instructions to the data area of ​​the firmware of the function to be removed from the hardware component.

19. The method of claim 18, wherein, The external virtual fuse block is retained on the server, which is external to and separate from the device including the hardware component.

20. A computer-readable storage medium for storing program instructions that can be executed by a processor to cause the processor to perform the following operations: Identify the functions in the hardware components that need to be removed from the hardware components; commanding the virtual fuse to first encode a data region associated with the operation of the function to prevent computational access to the function, and subsequently blow the electronic fuse to prevent electronic access to the hardware component, wherein, Encoding the data area and blowing the electronic fuse permanently disables the function on the hardware component; and In response to operating the virtual fuse to permanently disable the function on the hardware component, the state in which the function is permanently disabled on the hardware component is indicated.

21. A computer program product comprising a computer-readable storage medium having program instructions implemented therein, the program instructions being executable by a processor to cause the processor to perform the following operations: Identify the functions in the hardware components that need to be removed from the hardware components; commanding the virtual fuse to first encode a data region associated with the operation of the function to prevent computational access to the function, and subsequently blow the electronic fuse to prevent electronic access to the hardware component, wherein, Encoding the data area and blowing the electronic fuse permanently disables the function on the hardware component; and In response to operating the virtual fuse to permanently disable the function on the hardware component, the state in which the function is permanently disabled on the hardware component is indicated.

Images