Display panel, display device and terminal equipment

Abstract

The application discloses a display panel, a display device and a terminal device, and relates to the technical field of display. The display panel comprises a driving back plate (1) having a transparent area (101) and a pixel area (102) surrounding the transparent area (101) at least partially, a plurality of pixel circuits (10) are arranged in the pixel area (102) in an array, the pixel circuit (10) comprises a plurality of first pixel circuits (110) and a plurality of second pixel circuits (120) arranged in a row direction; a light-emitting layer (200) is arranged on one side of the driving back plate (1) and comprises a plurality of light-emitting devices (20) arranged in an array; the light-emitting device (20) comprises a plurality of first light-emitting devices (201) located in the transparent area (101) and a plurality of second light-emitting devices (202) located in the pixel area (102); each first light-emitting device (201) is connected with a first pixel circuit (110) through a transparent conductor (3); each second pixel circuit (120) is connected with a second light-emitting device (202); the deviation of the delay time of any conductor (3) transmitting a signal from a standard delay time is not greater than a deviation threshold.

Description

[0001] CROSS-REFERENCE

[0002] The present disclosure claims priority to PCT Application No. PCT / CN2020 / 119673, filed on September 30, 2020, entitled “Display Panel and Display Device”, the entire contents of which are incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of display, in particular, to a display panel, a display device and a terminal device. BACKGROUND

[0004] For the screen of an electronic device with a camera such as a mobile phone or a tablet computer, the area of the screen corresponding to the camera usually needs to be opened, so that the area cannot emit light, which is not conducive to improving the screen-to-body ratio. At present, although there is a technology of under-screen camera, so that the area where the camera is located can also display images, avoid opening, and can normally shoot, but in the display area corresponding to the camera, the consistency of the lighting time of the light emitting devices in the same row is low, which affects the display effect.

[0005] It should be noted that the information disclosed in the above background section is only used to strengthen the understanding of the background of the present disclosure, and therefore can include information that does not constitute prior art known to those of ordinary skill in the art. SUMMARY

[0006] The purpose of the present disclosure is to provide a display panel, a display device and a terminal device.

[0007] According to one aspect of the present disclosure, a display panel is provided, comprising:

[0008] a driving backplane having a transparent area and a pixel area at least partially surrounding the transparent area, a plurality of pixel circuits being arranged in an array in the pixel area, the pixel circuits including a plurality of first pixel circuits and a plurality of second pixel circuits arranged in a row direction;

[0009] a light emitting layer arranged on one side of the driving backplane and including a plurality of light emitting devices arranged in an array; the light emitting devices including a plurality of first light emitting devices located in the transparent area and a plurality of second light emitting devices located in the pixel area;

[0010] each of the first light emitting devices is connected to one of the first pixel circuits through a transparent conductor; and each of the second pixel circuits is connected to one of the second light emitting devices;

[0011] The deviation of the delay time of any of the conductors transmitting signals from a standard delay time is not greater than a deviation threshold.

[0012] In an example embodiment of the present disclosure, among the two conductors connecting the two first pixel circuits in the same row, the area of the conductor of the first pixel circuit closer to the transparent region is greater than the area of the conductor of the first pixel circuit farther from the transparent region.

[0013] In an example embodiment of the present disclosure, the display panel further comprises:

[0014] The adapter layer is arranged on one side of the driving backplate, and the light-emitting layer is arranged on the surface of the adapter layer away from the driving backplate; the adapter layer comprises a plurality of mutually insulated lead layers, each of the lead layers comprises a plurality of mutually insulated leads; and each lead extends from the transparent region to the pixel region.

[0015] The first light-emitting device is connected to the first pixel circuit through the lead.

[0016] Each of the conductors comprises at least one lead.

[0017] In an example embodiment of the present disclosure, the lead layers comprise at least a first lead layer, a second lead layer and a third lead layer arranged in sequence from the driving backplate to the light-emitting layer.

[0018] The adapter layer further comprises:

[0019] The first planar layer covers the first lead layer and the surface of the driving backplate close to the light-emitting layer; and the second lead layer is arranged on the surface of the first planar layer away from the driving backplate.

[0020] The second planar layer covers the second lead layer and the surface of the first planar layer close to the light-emitting layer; and the third lead layer is arranged on the surface of the second planar layer away from the driving backplate.

[0021] The third planar layer covers the third lead layer and the surface of the second planar layer close to the light-emitting layer; and the light-emitting layer is arranged on the surface of the third planar layer away from the driving backplate.

[0022] In an example embodiment of the present disclosure, at least part of the conductors further comprises a first compensation part connected to the lead thereof, and the first compensation part is in the same layer and of the same material as the lead layer.

[0023] In an example embodiment of the present disclosure, at least part of the conductors further comprises a second compensation part connected to the lead thereof; the second compensation part is arranged in the driving backplate and located in the pixel region.

[0024] In the row direction, the orthographic projection of the second compensation part on the driving backplate overlaps at least one first pixel circuit.

[0025] In an exemplary embodiment of this disclosure, the pixel circuit includes at least a driving transistor, a first reset transistor, and a storage capacitor. The first electrode plate of the storage capacitor is multiplexed as the control terminal of the driving transistor, and the first terminal of the first reset transistor is connected to the first electrode plate via a transmission line.

[0026] The drive backplate also includes:

[0027] A shielding layer is disposed on the side of the driving transistor near the light-emitting layer, and is used to receive shielding signals;

[0028] The orthographic projection of the shielding layer onto the light-emitting layer at least partially coincides with the orthographic projection of the transmission line onto the light-emitting layer.

[0029] In one exemplary embodiment of this disclosure, the shielding layer includes:

[0030] The shielding portion, wherein the orthogonal projection of the transmission line onto the light-emitting layer is located within the orthogonal projection of the shielding portion onto the light-emitting layer;

[0031] The connecting part is made of the same layer and material as the shielding part and is connected to the shielding part. The connecting part and the second electrode plate of the storage capacitor are connected to the same power supply terminal. The shielding signal is the power signal output from the power supply terminal.

[0032] In one exemplary embodiment of this disclosure, the shielding layer is on the same layer and made of the same material as the second compensation part; the second compensation part has a hollowed-out portion, the shielding layer is located inside the hollowed-out portion, and is spaced apart from the inner wall of the hollowed-out portion.

[0033] In one exemplary embodiment of this disclosure, the length of at least a portion of the conductor's lead is greater than the distance in the row direction between the first pixel circuit and the first light-emitting device to which it is connected.

[0034] In one exemplary embodiment of this disclosure, the conductor includes a first conductor, and the lead of the first conductor is a first lead; the first lead extends along the row direction and its length is greater than the distance in the row direction between the first pixel circuit and the first light-emitting device connected to the first lead;

[0035] The first conductor includes a first compensation part and a second compensation part; the first compensation part of the first conductor is multiple and is connected to at least one side of the first lead along the row direction; the second compensation part of the first conductor is multiple and is distributed along the row direction and interconnected with each other.

[0036] In an example embodiment of the present disclosure, the first conductive body further comprises a third compensation portion connected with the first lead, the third compensation portion is arranged in the driving back plate and located in the partial transparent region.

[0037] In an example embodiment of the present disclosure, the third compensation portion and the second compensation portion are of the same layer and material.

[0038] In an example embodiment of the present disclosure, the conductive body comprises a second conductive body, the lead of the second conductive body is a second lead; the second lead extends in the row direction and the length is greater than the distance between the first pixel circuit and the first light emitting device connected with the second lead in the row direction.

[0039] The second conductive body comprises the first compensation portion connected with the second lead.

[0040] In an example embodiment of the present disclosure, the conductive body comprises a third conductive body, the lead of the third conductive body is a third lead.

[0041] The third lead comprises a first segment, a second segment and a third segment, the first segment is connected with one of the first light emitting devices and extends to the pixel region in the direction; the length of the first segment is greater than the distance between the first pixel circuit and the first light emitting device connected with the third lead in the row direction; the second segment extends in the column direction and is connected with one end of the first segment located in the pixel region; the third segment extends in the row direction towards the side of the second segment close to the transparent region and is connected with one of the first pixel circuits.

[0042] In an example embodiment of the present disclosure, the conductive body comprises a fourth conductive body, the lead of the fourth conductive body is a fourth lead.

[0043] The fourth lead comprises a first segment, a second segment and a third segment, the first segment is connected with one of the first light emitting devices and extends to the pixel region in the direction; the length of the first segment is greater than the distance between the first pixel circuit and the first light emitting device connected with the fourth lead in the row direction; the second segment extends in the column direction and is connected with one end of the first segment located in the pixel region; the third segment extends in the row direction towards the side of the second segment close to the transparent region and is connected with one of the first pixel circuits.

[0044] The fourth conductive body comprises a first compensation portion, the first compensation portion of the fourth conductive body is located between the first segment and the third segment and on the side of the second segment close to the transparent region, and the first compensation portion of the fourth conductive body is connected with at least one of the first segment, the second segment and the third segment.

[0045] In an example embodiment of the present disclosure, the light emitting layer is divided into four light emitting areas along the first and second central axes, the first central axis being a central axis of the transparent area extending in the column direction, and the second central axis being a central axis of the transparent area extending in the row direction.

[0046] The light emitting area includes a first sub-area, a second sub-area, a third sub-area and a fourth sub-area sequentially close to the first central axis in the row direction.

[0047] The lead wire connecting the first light emitting device in the first sub-area is located in the first lead wire layer.

[0048] The lead wire connecting the first light emitting device in the second sub-area is located in the second lead wire layer.

[0049] The lead wire connecting the first light emitting device in the third sub-area is located in the third lead wire layer.

[0050] The lead wire connecting the first light emitting device in the fourth sub-area is located in at least one of the first lead wire layer, the second lead wire layer and the third lead wire layer.

[0051] In an example embodiment of the present disclosure, the pixel circuit includes an active layer, a first gate layer, a second gate layer, a first source-drain layer and a second source-drain layer distributed towards the direction of the light emitting layer; the shielding layer is of the same layer and material as the second source-drain layer.

[0052] In an example embodiment of the present disclosure, the material of the lead wire includes at least one of indium tin oxide and indium gallium zinc oxide; the material of the second source-drain layer includes metal.

[0053] According to an aspect of the present disclosure, there is provided a display device including the display panel as described in any one of the above.

[0054] According to an aspect of the present disclosure, there is provided a terminal device including:

[0055] The display device as described in any one of the above;

[0056] A camera device is arranged on the backlight side of the display device and is arranged opposite to the transparent area, for capturing an image through the transparent area.

[0057] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and are not limiting to the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0058] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments consistent with the present disclosure and, together with the description, further serve to explain the principles of the disclosure. It is to be understood that the drawings are designed solely for purposes of illustration to be used in conjunction with the description insofar as specifically placed herein below.

[0059] FIG. 1 A schematic diagram of driving the backplane in an embodiment of the display panel of the present disclosure.

[0060] FIG. 2 A schematic diagram of the connection between the pixel circuit and the light emitting device in an embodiment of the display panel of the present disclosure.

[0061] FIG. 3 A schematic diagram of the distribution of the lead lines in an embodiment of the display panel of the present disclosure.

[0062] FIG. 4 A schematic diagram of the cross section of the display panel in an embodiment of the display panel of the present disclosure.

[0063] FIG. 5 A schematic diagram of the equivalent circuit of the pixel circuit in an embodiment of the display panel of the present disclosure.

[0064] FIGS. 6-11 A schematic diagram of the structure of the pixel circuit in an embodiment of the display panel of the present disclosure.

[0065] FIGS. 12-15 A schematic diagram of the pixel circuit and the first electrode distribution in an embodiment of the display panel of the present disclosure.

[0066] FIGS. 16-23 A schematic diagram of the conductive body of the pixel circuit in the first column in an embodiment of the display panel of the present disclosure.

[0067] FIGS. 24-28 A schematic diagram of the conductive body of the pixel circuit in the fifth column in an embodiment of the display panel of the present disclosure.

[0068] FIGS. 29-37 A schematic diagram of the conductive body of the pixel circuit in the ninth column in an embodiment of the display panel of the present disclosure.

[0069] FIGS. 38-42 A schematic diagram of the conductive body of the pixel circuit in the tenth column in an embodiment of the display panel of the present disclosure.

[0070] FIG. 43 A schematic diagram of the conductive body of the pixel circuit in the thirty-ninth column in an embodiment of the display panel of the present disclosure.

[0071] FIGS. 44-46 A schematic diagram of the conductive body of the pixel circuit in the fortieth column in an embodiment of the display panel of the present disclosure.

[0072] FIG. 47 Figure 1 is a schematic diagram of an embodiment of a terminal device of the present disclosure.

[0073] Reference signs:

[0074] 1, drive backboard; 101, transparent area; 102, pixel area; 103, frame area; 10, pixel circuit; 110, first pixel circuit; 120, second pixel circuit; 001, active layer; 002, first gate layer; 003, second gate layer; 004, first source-drain layer; 005, second source-drain layer; 300, jumper line; 400, cross-over line; 500, lead end; 600, transmission line;

[0075] 2, light-emitting layer; 200, light-emitting area; 20, light-emitting device; 201, first light-emitting device; 202, second light-emitting device; 211, first electrode; 2111, electrode part; 2112, wiring part; 212, light-emitting functional layer; 213, second electrode; 214, pixel definition layer;

[0076] 3, conductor; 31, first compensation part; 32, first compensation part; 33, third compensation part; 3a, first conductor; 3b, second conductor; 3c, third conductor; 3d, fourth conductor; 3e, fifth conductor; 3f, sixth conductor; 321, hollow part; 322, connection line; 310, first segment; 320, second segment; 330, third segment;

[0077] 4, jumper layer; 41, lead layer; 41a, first lead layer; 41b, second lead layer; 41c, third lead layer; 411, lead; 42, first flat layer; 43, second flat layer; 44, third flat layer; 411a, first lead; 411b, second lead; 411c, third lead; 411d, fourth lead; 411e, fifth lead; 411f, sixth lead; 401, first jumper hole; 402, second jumper hole; 403, third jumper hole;

[0078] 5, shielding layer; 51, shielding part; 52, connection part;

[0079] 100, display panel; 700, camera device. DETAILED DESCRIPTION

[0080] Example implementations will now be described more fully with reference to the accompanying drawings. Example implementations may, however, be implemented in many different forms and should not be construed as limited to the implementations set forth herein; rather, these implementations are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example implementations to those skilled in the art. Like reference numerals refer to like elements throughout the various figures, and thus a detailed description of the same will not be repeated. In addition, the drawings are only schematic and are non-limiting, exemplary embodiments, and are not necessarily to scale.

[0081] The terms "one", "a", "an", "the", and "at least one" are used to mean that "one or more" of something is present; the terms "comprises", "comprising", "has", "having", "includes", "including", "contains", "containing" or variations thereof are used to mean "including, but not limited to", to indicate that the list of genres / components / etc. that follow, can include additional genres / components / etc. not expressly listed; and the terms "first", "second", "third", etc. are used merely as labels, and are not meant to impose numerical requirements on their objects.

[0082] The row direction and the column direction are merely two perpendicular directions, and are not limited to specific orientations, for example, the row direction can be the lateral X direction in 1, and the column direction can be the longitudinal Y direction in 3. Those skilled in the art can know that the actual orientations of the row direction and the column direction can change if the display panel is rotated. FIG. 3

[0083] The display panel provided by the embodiments of the present disclosure can be an OLED (Organic Light-Emitting Diode) display panel. As shown in FIGS. 1-4 The display panel of the present disclosure can include a driving backplane 1 and a light-emitting layer 2, wherein:

[0084] The driving backplane 1 has a transparent area 101 and a pixel area 102 at least partially surrounding the transparent area 101, and a plurality of pixel circuits 10 are arranged in an array in the pixel area 102, wherein the pixel circuits 10 include a plurality of first pixel circuits 110 and a plurality of second pixel circuits 120 arranged in an array along the row direction.

[0085] The light-emitting layer 2 is arranged on one side of the driving backplane 1, and includes a plurality of light-emitting devices 20 arranged in an array; the light-emitting devices 20 include a plurality of first light-emitting devices 201 located in the transparent area 101 and a plurality of second light-emitting devices 202 located in the pixel area 102.

[0086] Each first light-emitting device 201 is connected to a first pixel circuit 110 through a transparent conductor 3; each second pixel circuit 120 is connected to a second light-emitting device 202;

[0087] The deviation of the delay time of any conductor 3 transmitting a signal from a standard delay time is not greater than a deviation threshold.​

[0088] The display panel of the present disclosure sets the first pixel circuit 110 for driving the first light emitting device 201 of the transparent area 101 in the pixel area 102 outside the transparent area 101, so that the light transmittance of the transparent area 101 can be improved without reducing the number of light emitting devices 20, and the image shooting of the camera is facilitated. Meanwhile, the deviation of the delay time of the signal transmitted by any conductor 3 from a standard delay time is not greater than a deviation threshold, which is conducive to reducing the difference in delay time when different conductors 3 transmit signals, and the lighting time of the same row of first light emitting devices 201 is more consistent, thereby improving the display effect.

[0089] The parts of the display panel will be described below:

[0090] As shown in FIGS. 1-4 , the driving backboard 1 is provided with a pixel circuit 10 for driving the light emitting device 20 to emit light, and the driving backboard 1 at least includes a transparent area 101 and a pixel area 102, wherein the pixel circuit 10 is located in the pixel area 102, and the transparent area 101 is not provided with the pixel circuit 10, so as to improve the light transmittance, and the camera can shoot the image through the transparent area 101, so as to realize the under-screen camera.

[0091] The shooting range P of the camera can be smaller than the transparent area 101, for example, the shape of the transparent area 101 is a square, and the shooting range P is a circular shape inscribed in the transparent area 101.

[0092] As shown in FIG. 2 , the pixel circuit 10 in the pixel area 102 at least includes a first pixel circuit 110 and a second pixel circuit 120, wherein the first pixel circuit 110 is used to drive the light emitting device corresponding to the transparent area 101, i.e. the first light emitting device 201; the second pixel circuit 120 is used to drive the light emitting device corresponding to the pixel area 102, i.e. the second light emitting device 202.

[0093] In some embodiments of the present disclosure, as shown in FIGS. 1-3 , the pixel area 102 at least partially surrounds the transparent area 101 outside, and one side of the transparent area 101 can at least partially coincide with one side of the pixel area 102. Of course, the pixel area 102 can also completely surround the transparent area 101. In addition, the driving backboard 1 can also include a frame area 103, which can surround the pixel area 102 outside, and the frame area 103 can be provided with a peripheral circuit for inputting a driving signal to the pixel circuit 10, which can include a gate driving circuit, a light emitting control circuit, etc., which is not specially limited here.

[0094] Further, all the first pixel circuits 110 can be distributed in the pixel area 102, and all the second pixel circuits 120 can also be distributed in the pixel area 102. Of course, part of the first pixel circuits 110 can be arranged in the pixel area 102, and all the second pixel circuits 120 can also be distributed in the pixel area 102, and the other first pixel circuits 110 can be arranged in the frame area 103. In addition, all the first pixel circuits 110 can be arranged in the frame area 103, and in this disclosure, only the case that at least part of the first pixel circuits 110 are arranged in the pixel area 102 is described.

[0095] Further, the first pixel circuits 110 and the second pixel circuits 120 in the pixel area 102 are arranged in arrays, each column of the first pixel circuits 110 is located between each column of the second pixel circuits 120, and at most one column of the first pixel circuits 110 is arranged between two adjacent columns of the second pixel circuits 120; and multiple columns of the second pixel circuits 120 can be arranged between two adjacent columns of the first pixel circuits 110.

[0096] In addition, one or more columns of the second pixel circuits 120 closest to the transparent area 101 in the row direction are not connected to the first light emitting device 201 and the second light emitting device 202, and these second pixel circuits 120 are used as dummy pixel circuits, so as to increase the distance between the second pixel circuit 120 closest to the transparent area 101 and connected to the first light emitting device 201 and the transparent area 101, increase the minimum length of the corresponding conductive body 3, and avoid that the length difference of the conductive body 3 is too large, so that the start time of the first light emitting device 201 in different columns is too different, and the picture quality is improved.

[0097] In order to have enough space in the pixel area 102 to accommodate the first pixel circuits 110 and the second pixel circuits 120 without reducing the number of the pixel circuits 10 and without increasing the size of the driving backboard 1, each pixel circuit 10 can be compressed in the row direction to reduce the width of the pixel circuit 10 in the row direction, so that more area can be left in the pixel area 102 under the premise of the same size of the driving backboard 1, and the second pixel circuits 120 can be arranged in the more area. The width of the pixel circuit 10 refers to the length of the orthogonal projection of the pixel circuit 10 on the driving backboard 1 in the row direction.

[0098] The structure of the pixel circuit 10 is described exemplarily as follows:

[0099] In some embodiments of the disclosure, as FIG. 5As shown, the pixel circuit 10 (the first pixel circuit 110 and the second pixel circuit 120) can be a 7T1C structure, i.e., including 7 transistors and 1 capacitor. The 7T1C pixel circuit includes a driving transistor T3, a data writing transistor T4, a threshold compensation transistor T2, a first light emitting control transistor T5, a second light emitting control transistor T6, a first reset transistor T1, a second reset transistor T7, and a storage capacitor Cst. The pixel circuit can be connected with a gate signal terminal Gate, a data signal terminal Data, reset signal terminals RST1 and RST2, a light emitting control signal terminal EM, a power supply terminal VDD, initial power supply terminals Vinit1 and Vinit2, and a light emitting device 20, which can also be connected with a power supply terminal VSS. The pixel circuit 10 can be used to drive the connected light emitting device 20 to emit light in response to the signals provided by the connected signal terminals.

[0100] In FIG. 5 , the power supply terminal VDD can be connected with the first electrode plate of the storage capacitor Cst and the first end of the first light emitting control transistor T5; the reset signal terminal RST1 can be connected with the control terminal of the first reset transistor T1, and the initial power supply terminal Vinit1 can be connected with the first end of the first reset transistor T1; the reset signal terminal RST2 can be connected with the control terminal of the second reset transistor T7, and the initial power supply terminal Vinit2 can be connected with the first end of the second reset transistor T7; the data signal terminal Data can be connected with the first end of the data writing transistor T4, and the gate signal terminal Gate can be connected with the control terminals of the data writing transistor T4 and the threshold compensation transistor T2;

[0101] The second electrode plate of the storage capacitor Cst, the second end of the first reset transistor T1, and the control terminal of the driving transistor T3 can be connected to an N1 node; the second end of the data writing transistor T4, the second end of the first light emitting control transistor T5, and the first end of the driving transistor T3 can be connected to an N2 node; the second end of the driving transistor T3, the second end of the threshold compensation transistor T2, and the first end of the second light emitting control transistor T6 can be connected to an N3 node; the second end of the second light emitting control transistor T6 and the second end of the second reset transistor T7 are connected to an N4 node, and are connected with the light emitting device 20 through an N5 node. As FIG. 6 and FIG. 10 As shown, the first electrode plate of the storage capacitor Cst is multiplexed as the control terminal of the driving transistor T3, and the first end of the first reset transistor T1 is connected with the first electrode plate through a transmission line 600.

[0102] In addition, according to the characteristics of the transistor, the transistor can be divided into N-type and P-type transistors. The embodiments of the present disclosure take the P-type transistor as an example for description. Based on the description and teaching of the implementation mode of the present disclosure, those skilled in the art can easily think of using the N-type transistor in at least part of the transistor in the pixel circuit structure of the embodiments of the present disclosure, that is, using the N-type transistor or the combination of the N-type transistor and the P-type transistor, without the need for creative labor, and therefore, these implementation modes are also within the protection scope of the embodiments of the present disclosure.

[0103] Of course, in other embodiments of the present disclosure, the pixel circuit 10 can also adopt other structures, for example, can be 6T1C, 6T2C or 7T2C or other types of pixel circuits, as long as it can drive the light emitting device 20 to emit light, and the structure is not specially limited here. Among them, nTmC represents that one pixel circuit 10 includes n transistors (represented by the letter "T") and m capacitors (represented by the letter "C").

[0104] Based on the above pixel circuit 10, taking the structure of one transistor as an example, as shown in FIGS. 6-11 , the pixel circuit 10 can include an active layer 001, a first gate insulating layer, a first gate layer 002, a second gate insulating layer, a second gate layer 003, an interlayer dielectric layer, a first source-drain layer 004, a first planarization layer, a second source-drain layer 005 and a second planarization layer which are sequentially stacked on the substrate, thereby forming a transistor, and the specific structure of the transistor is not specially limited here. The transmission line 600 can be the same layer and material as the first source-drain layer 004.

[0105] As shown in FIG. 2 and FIG. 4 , the light emitting layer 2 can include a plurality of light emitting devices 20, and each light emitting device 20 can be connected with a first pixel circuit 110 through a transparent conductor 3. The light emitting device 20 can be an OLED light emitting device, which can include a first electrode 211, a light emitting functional layer 212 and a second electrode 213, wherein:

[0106] As shown in FIGS. 12-13 , the first electrode 211 can be arranged on one side of the driving backplane 1, as shown in FIG. 13 , the first electrode 211 serves as the anode of the OLED light emitting device, has an electrode part 2111 and a wiring part 2112 located outside the edge of the electrode part 2111, and the wiring part 2112 is connected with the electrode part 2111 or adopts an integrated structure. The electrode part 2111 of each first electrode 211 is connected with a lead 411 through the wiring part 2112 and a switching hole in the switching layer 4, thereby connecting the first pixel circuit 110 with the first electrode 211 of the corresponding light emitting device 20. The wiring part 2112 of any light emitting device 20 can serve as the N5 node for connecting the corresponding pixel circuit 10.

[0107] The light-emitting functional layer 212 may be disposed on the surface of the first electrode 211 away from the driving backplate 1, and may include a hole injection layer, a hole transport layer, an organic light-emitting layer, an electron transport layer and an electron injection layer sequentially stacked on the first electrode 211.

[0108] The second electrode 213, serving as the cathode of the OLED light-emitting device, can be disposed on the surface of the light-emitting functional layer 212 away from the driving backplate 1. By applying electrical signals to the first electrode 211 and the second electrode 213, the light-emitting functional layer 212 can be driven to emit light.

[0109] The above describes the structure of a light-emitting device. In the entire display panel, the first electrodes 211 of each light-emitting device can be made of the same material and formed simultaneously through a single patterning process. Similarly, the light-emitting functional layers 212 with the same emitting color can also be made of the same material and formed simultaneously through a single patterning process. Light-emitting functional layers 212 with different colors can be formed separately. Simultaneously, each light-emitting device 20 can share the same second electrode 213, meaning the second electrode 213 can simultaneously cover each light-emitting functional layer 212. Furthermore, to facilitate defining the emitting range of each light-emitting device 20, the light-emitting layer 2 may also include a pixel definition layer 214, which can be disposed on the surface of the transition layer 4 away from the driving backplate 1 and has openings exposing each first electrode 211. The light-emitting functional layers 212 can cover the first electrodes 211 within each opening, exposing the electrode portion 2111, while the wiring portion 2112 is located outside the opening.

[0110] To ensure that the brightness of the area of ​​the light-emitting layer 2 corresponding to the transparent area 101 is consistent with that of the area corresponding to the pixel area 102, the density of the first light-emitting device 201 in the area corresponding to the transparent area 101 can be made the same as the density of the second light-emitting device 202 in the area corresponding to the pixel area 102, so that the display effect of the transparent area 101 and the pixel area 102 is consistent.

[0111] like FIG. 3 As shown, to facilitate routing, the light-emitting layer 2 and the pixel area 102 can be divided into sections. For example, the area of ​​the light-emitting layer 2 corresponding to the transparent area 101 can be divided into four light-emitting areas 200 along the first central axis S1 and the second central axis S2. The first central axis S1 is the central axis extending from the transparent area 101 along the column direction, and the second central axis S2 is the central axis of the transparent area 101 along the row direction. Simultaneously, the light-emitting area 200 can be divided into multiple sub-regions A that are sequentially close to the first central axis S1 along the row direction, such as the first sub-region A1, the second sub-region A2, the third sub-region A3, and the fourth sub-region A4. The structure and routing of at least some sub-regions A of the two light-emitting areas 200 in the row direction are symmetrically arranged about the first central axis S1. Furthermore, at least some sub-regions A can also be symmetrically arranged about the second central axis S2.

[0112] Correspondingly, in pixel area 102, sub-pixel areas B can be set one-to-one with each sub-region A. Each sub-pixel area B corresponding to any light-emitting area 200 is located on the side of the light-emitting area 200 away from the first central axis S1. Each sub-pixel area B has multiple columns of first pixel circuits 110, and the first pixel circuits 110 in each sub-pixel area B are used to connect to the first light-emitting device 201 of a sub-region A. For example, pixel area 102 may include a first sub-pixel area B1 corresponding to the first sub-region A1, a second sub-pixel area B2 corresponding to the second sub-region A2, a third sub-pixel area B3 corresponding to the third sub-region A3, and a fourth sub-pixel area B4 corresponding to the fourth sub-region A4. The first sub-pixel area B1, the second sub-pixel area B2, the third sub-pixel area B3, and the fourth sub-pixel area B4 are distributed sequentially away from the transparent area 101.

[0113] The first light-emitting device 201 of the first sub-region A1 is connected to the first pixel circuit 110 of the first sub-pixel region B1 via a conductor 3. The first light-emitting device 201 of the second sub-region A2 is connected to the first pixel circuit 110 of the first sub-pixel region B2 via a conductor 3. The first light-emitting device 201 of the first sub-region A3 is connected to the first pixel circuit 110 of the first sub-pixel region B3 via a conductor 3. The first light-emitting device 201 of the first sub-region A4 is connected to the first pixel circuit 110 of the first sub-pixel region B4 via a conductor 3.

[0114] For example, such as FIG. 3 As shown, a light-emitting area 200 is taken as the target light-emitting area, which has 48 columns of first light-emitting devices 201. The first to 13 columns of first light-emitting devices 201 are distributed in the first sub-region A1 along a direction close to the first central axis S1.

[0115] The first light-emitting devices 201 in columns 14 to 26 are distributed in the first sub-region A2 along a direction close to the first central axis S1;

[0116] The first light-emitting devices 201 in columns 27 to 39 are distributed in the first sub-region A3 along a direction close to the first central axis S1;

[0117] The first light-emitting devices 201 in columns 40 to 48 are distributed in the first sub-region A4 along a direction close to the first central axis S1.

[0118] In the sub-pixel regions B1-B4 corresponding to the aforementioned target light-emitting area, there are 48 columns of first pixel circuits 110. These 48 columns of first pixel circuits 110 are sequentially distributed along a direction away from the transparent area 101. The 1st to 13th columns of first pixel circuits 110 are located in the first sub-pixel region B1. The 1st column of first pixel circuits 110 is connected to the 1st column of first light-emitting devices 201, the 2nd column of first pixel circuits 110 is connected to the 2nd column of first light-emitting devices 201, the 30th column of first pixel circuits 110 is connected to the 30th column of first light-emitting devices 201, and so on. At least one column of dummy pixel circuits is provided in the first sub-region B1, and this dummy pixel circuit is located between the 1st column of first pixel circuits 110 and the target light-emitting area.

[0119] Furthermore, the second source / drain layer 005 of the pixel circuit 110 may be provided with a lead terminal 500, which can serve as the output terminal of the pixel circuit 110, i.e. FIG. 5 In the N4 node, the lead end 500 of any pixel circuit 10 can be connected to the corresponding light-emitting device 20. For example, the lead end 500 of the first pixel circuit 110 can be connected to the first light-emitting device 201 through the lead 411; the lead end 500 of the second pixel circuit 120 can be connected to the corresponding second light-emitting device 202. The structure of the lead end 500 is not specifically limited here.

[0120] like FIG. 3 As shown, there are multiple conductors 3 used to connect the first pixel circuit 110 and the first light-emitting device 201, and each first light-emitting device 201 is connected to the first pixel circuit 110 through one conductor 3. That is, the number of conductors 3, first light-emitting devices 201, and first pixel circuits 110 is the same, and each conductor 3 corresponds to a unique first light-emitting device 201 and a unique first pixel circuit 110. Of course, each second pixel circuit 120 is connected to a unique second light-emitting device 202, but not through a conductor 3, but through a lead terminal 500 in the second source / drain layer 005.

[0121] Simultaneously, the deviation between the signal delay time of any conductor 3 and a standard delay time is ensured to be no greater than a deviation threshold. The signal transmitted by the conductor 3 is not specifically limited here. The standard delay time can be the delay time of the conductor 3 with the longest delay among all conductors 3; of course, the standard delay time can also be larger. In other words, the delay time of any conductor 3 is no greater than this standard delay time. The deviation between the delay time of the conductor 3 and the standard delay time can be the difference between the standard delay time and the delay time of the conductor 3, and this deviation is not less than 0.

[0122] The size of the deviation threshold is not particularly limited here, and in some embodiments of the present disclosure, the threshold deviation can be 10% of the standard delay time, that is, the minimum delay time of the conductive body 3 is not less than 90% of the maximum delay time. Of course, in other embodiments of the present disclosure, the deviation threshold can also be larger or smaller, and it can be preferred that it is not greater than 30% of the standard delay time.

[0123] The applicant finds that the parasitic capacitance of the conductive body 3 has a greater impact on the delay time of the signal transmitted thereby, which can include the capacitance between the plurality of conductive bodies 3, the capacitance between the conductive body 3 and the conductive film layer in the driving backplane 1, etc., as long as it can form a capacitance with the conductive body 3. The way to determine the parasitic capacitance is not particularly limited here, for example, by detecting the capacitance between a conductive body 3 and any conductive film layer, selecting the capacitance that can have a detectable impact on the delay time as the parasitic capacitance of the conductive body 3. Specifically, for any conductive body 3, due to the parasitic capacitance between it and other conductive structures in the same layer or different layers, the driving transistor T3 charges the first electrode 211 of the light emitting device 20 at the same time, and also charges the parasitic capacitance, resulting in that the light emitting devices 20 connected by different conductive bodies 3 do not reach the voltage that can enable the light emitting device 20 at the same time, causing the transparent area 101 to be inconsistent in the display of a frame, and causing the transparent area 101 to be inconsistent in the display of a frame.

[0124] Further, the delay time can be limited by limiting the parasitic capacitance of each conductive body 3, and the consistency of the delay time can be improved. That is, by making the parasitic capacitance of each conductive body 3 close to or equal to a standard parasitic capacitance, the delay time of the conductive body 3 whose parasitic capacitance is equal to the standard parasitic capacitance is the standard delay time described above. Further, the parasitic capacitance can be limited by limiting the area of the conductive body 3. Specifically, the farther away from the transparent area 101, the longer the signal transmission path, and the larger the parasitic capacitance. The closer to the transparent area 101, the shorter the signal transmission path, and the smaller the parasitic capacitance, and thus the smaller the delay time. Therefore, among the two conductive bodies 3 connecting two first pixel circuits 110 in the same row, the area of the conductive body 3 of the first pixel circuit 110 closer to the transparent area 101 can be greater than the area of the conductive body 3 of the first pixel circuit 110 farther away from the transparent area 101.

[0125] It should be noted that the area of the conductive body 3 is the sum of the areas of the projections of each region of the conductive body 3 on the driving backplane 1. For example, if the conductive body 3 is a multi-layer structure, its area is equal to the sum of the areas of the projections of each layer.

[0126] The specific implementation of the conductive body 3 will be described in detail below:

[0127] As FIG. 4As shown, the display panel may include a transition layer 4, which is disposed on one side of the driving backplate 1, for example, on the surface of the second planarization layer of the driving backplate 1 facing away from the substrate. A light-emitting layer 2 is disposed on the surface of the transition layer 4 facing away from the driving backplate 1. The transition layer 4 may cover the transparent area 101 and the driving area 102, and the transition layer 4 includes multiple mutually insulated lead layers 41. Each lead layer 41 includes multiple mutually insulated leads 411, each lead 411 extending from the transparent area 101 to the driving area 102 and connected to a first pixel circuit 110. That is, each lead 411 is only used to transmit signals from one first pixel circuit 110. Simultaneously, the transition layer 4 has transition holes corresponding to each lead 411, allowing any first light-emitting device 201 to be connected to the corresponding first pixel circuit 110 through a transition hole and a lead 411. The adapter hole can be a via structure within the adapter layer 4, but since the lead wire 411 connected to the adapter hole may be located in different lead layers 41, the depth of different adapter holes can be different.

[0128] For example, such as FIG. 4 As shown, the first lead 411a is connected to the wiring portion 2112 of the first electrode 211 of the corresponding first light-emitting device 201 through the first adapter hole 401; the second lead 411b is connected to the corresponding wiring portion 2112 through the second adapter hole 402; and the third lead 411c is connected to the corresponding wiring portion 2112 through the third adapter hole 403. Although... FIG. 4 There is an intersection of the adapter hole and the lead wire 411, but in the plane parallel to the drive back plate 1, both the third lead wire 411c and the second lead wire 411b are located outside the first adapter hole 201 and are not connected to the first adapter hole 401. Similarly, the second adapter hole 402 is not connected to the third lead wire 411c. That is to say, each lead wire 411 is connected to the wiring portion 2112 of the first light-emitting unit 201 only through one adapter hole, and this adapter hole is not connected to any other lead wire 411.

[0129] The material of the leads 411 of each lead layer 41 may include at least one of indium tin oxide (ITO) and indium gallium zinc oxide (IGZO), and of course, it may also be other transparent conductive materials.

[0130] In some embodiments of this disclosure, such as FIG. 4 As shown, the number of lead layers 41 can be three, including a first lead layer 41a, a second lead layer 41b, and a third lead layer 41c distributed sequentially from the driving backplate 1 to the light-emitting layer 2.

[0131] For example, the lead wire 411 connecting the first light emitting device 201 in the first sub-area Al is located in the first lead wire layer 41a; the lead wire 411 connecting the first light emitting device 201 in the second sub-area A2 is located in the second lead wire layer 41b; the lead wire 411 connecting the first light emitting device 201 in the third sub-area A3 is located in the third lead wire layer 41c; and the lead wire 411 connecting the first light emitting device 201 in the fourth sub-area A4 is located in at least one of the first lead wire layer 41a, the second lead wire layer 41b and the third lead wire layer 41c.

[0132] It should be noted that, FIG. 4 The above is only for illustrating the relationship between the film layers of the display panel, and is not limited to the specific structure of the lead wire layer 41.

[0133] As shown in FIG. 1, the lead wire layer 41 is located on the surface of the driving back plate 1 facing the light emitting layer 2. FIG. 4 In order to insulate the lead wire layers 41 from each other, the adapter layer 4 further comprises a first flat layer 42, a second flat layer 43 and a third flat layer 44, wherein:

[0134] The first lead wire layer 41a can be arranged on the surface of the driving back plate 1 close to the light emitting layer 2. The first flat layer 42 covers the first lead wire layer 41a and the surface of the driving back plate 1 close to the light emitting layer 2.

[0135] The second lead wire layer 41b is arranged on the surface of the first flat layer 42 away from the driving back plate 1. The second flat layer 43 covers the second lead wire layer 41b and the surface of the first flat layer 42 close to the light emitting layer 2.

[0136] The third lead wire layer 41c is arranged on the surface of the second flat layer 43 away from the driving back plate 1. The third flat layer 44 covers the third lead wire layer 41c and the surface of the second flat layer 43 close to the light emitting layer 2; and the light emitting layer 2 is arranged on the surface of the third flat layer 44 away from the driving back plate 1.

[0137] Each conductor 3 comprises at least one lead wire 411 for signal transmission.

[0138] Since the length of the lead wire 411 connecting the first light emitting device 201 in different columns differs greatly, the lead wire 411 of at least part of the conductors 3 can be compensated, i.e. the area of the conductor 3 connected with the lead wire 411 is increased to increase the parasitic capacitance, so that the delay time is close to or equal to the standard delay time. There are various ways to increase the parasitic capacitance, which will be described below by way of example:

[0139] As shown in FIG. 1, the lead wire layer 41 is located on the surface of the driving back plate 1 facing the light emitting layer 2. FIGS. 15-19As shown, in some embodiments of the present disclosure, at least part of the conductive body 3 can further comprise a first compensation part 31, which is arranged in the same layer as a lead layer 41 and is made of the same material as the lead 411. Meanwhile, the first compensation part 31 is connected to the lead 411 belonging to the same conductive body 3, thereby increasing the area of the conductive body 3, making the parasitic capacitance close to or equal to the standard parasitic capacitance, and making the delay time close to or equal to the standard delay time. Further, for any conductive body 3 with the first compensation part 31, the first compensation part 31 can be arranged in the same layer and made of the same material as the lead 411, thereby facilitating one-piece molding.

[0140] In some other embodiments of the present disclosure, at least part of the conductive body 3 further comprises a second compensation part 32, which is arranged in the driving backboard 1 and is connected to the lead 411 belonging to the same conductive body 3, thereby increasing the area of the conductive body 3 by using the space in the driving backboard 1, increasing the parasitic capacitance, and making the delay time closer to the standard delay time. Meanwhile, the second compensation part 32 is arranged in the pixel area 102, thereby avoiding blocking the transparent area 101, and in the row direction, the orthographic projection of the second compensation part 32 on the driving backboard 1 overlaps with at least one first pixel circuit 110, i.e., one second compensation part 32 can cover one side of multiple first pixel circuits 110 close to the light-emitting layer 2. Of course, one first compensation part 31 can also cover one side of multiple first pixel circuits 110 close to the light-emitting layer 2.

[0141] For two different conductive bodies 3 connected to the same row of first pixel circuits 110 and having the second compensation part 32, the parasitic capacitance to be compensated is different, and thus the number and position of the second compensation part 32 can be different, and the area of the second compensation part 32 can also be different.

[0142] In some other embodiments of the present disclosure, the length of the lead 411 can also be increased to increase the area of the lead 411, thereby increasing the parasitic capacitance of the conductive body 3 and making it close to or equal to the standard parasitic capacitance. Specifically, the length of the lead 411 of at least part of the conductive body 3 is greater than the distance between the first pixel circuit 110 and the first light-emitting device 201 connected to the lead 411 in the row direction, and the specific length is not specially limited here and is determined according to the distance from the transparent area 101. If no other conductive structure is arranged to increase the parasitic capacitance, the closer the distance from the transparent area 101, the greater the length of the lead 411. If the space is limited, the lead 411 can be bent to increase the length.

[0143] Any of the conductive bodies 3 can adopt at least one of the above three ways of increasing the parasitic capacitance of the conductive body 3, wherein, in order to reduce the process difficulty and simplify the structure, the first compensation part 31 and the extended lead wire 411 are preferred, that is, the compensation structure is arranged on the same layer of the lead wire 411; if the parasitic capacitance cannot be increased to the standard parasitic capacitance by increasing the first compensation part 31, the second compensation part 32 can be used. Of course, only the second compensation part 32 can also be used. In addition, the parasitic capacitance can also be increased by increasing the width of the lead wire 411, that is, the widths of different lead wires 411 can be different.

[0144] The conductive body 3 is exemplarily described below based on the above three ways of increasing the parasitic capacitance:

[0145] As shown in FIG. 3 , in some embodiments of the present disclosure, each conductive body 3 can include a first conductive body 3a, a second conductive body 3b, a third conductive body 3c, and a fourth conductive body 3d, wherein:

[0146] The first conductive body 3a

[0147] As shown in FIGS. 15-23 , the lead wire 411 of the first conductive body 3a is a first lead wire 411a. The first lead wire 411a can extend along the row direction, and the length is greater than the distance between the first pixel circuit 110 and the first light emitting device 201 connected by the first lead wire 411a in the row direction, so as to increase the parasitic capacitance by increasing the length.

[0148] The first conductive body 3a further includes a first compensation part 31 and a second compensation part 32, wherein: the number of the first compensation part 31 is multiple, and the first compensation part 31 is connected to at least one side of the lead wire 411 along the row direction, and the first compensation part 31 can be a protruding structure protruding along the column direction and integrally formed with the first lead wire 411a. The number of the second compensation part 32 is multiple, and the second compensation part 32 is distributed along the row direction and connected to each other.

[0149] In addition, the first conductive body 3a further includes a third compensation part 33 connected by the first lead wire 411a, and connected to the first compensation part 31 through the second compensation part 32, for example, the third compensation part 33 can be the same layer and material as the second compensation part 32, and connected, and located in part of the transparent area 101, but located outside the shooting range P.

[0150] In combination with the specific application scenario, for the above target light emitting area with 48 columns of first light emitting devices 201, as shown in FIGS. 14-23As shown, the first light-emitting device 201 in the first column is connected to the first pixel circuit 110 in the first column via the first conductor 3a. One end of the first lead 411a extends to the side of the first electrode 211 of the first light-emitting device 201 near the first central axis S1, and the other end extends between the first pixel circuit 110 in the second column and the first pixel circuit 110 in the first column.

[0151] There are multiple first compensation parts 31, which are distributed along the direction of travel on one side of the first lead 411a and are integrally formed with the first lead 411a. At the same time, the first lead 411a is located in the first lead layer 41a.

[0152] The second compensation section 32 is disposed on the same layer and made of the same material as the second source / drain layer 005. There are two second compensation sections 32, located on opposite sides of the first pixel circuit 110 in the first column. The second compensation section 32 located on the side of the first pixel circuit 110 away from the first central axis S1 is located between the 14th and 13th columns of the first pixel circuit 110. The second compensation section 32 located on the side of the first pixel circuit 110 closer to the first central axis S1 and a dummy pixel circuit have at least a partial overlap in their orthogonal projections on the light-emitting layer 2. The two second compensation sections 32 are connected by a connecting line 322 on the same layer as the second compensation section 32.

[0153] The third compensation unit 33 is located in the transparent area 101 outside the shooting range P, and is connected to the second compensation unit 32.

[0154] Second conductor 3b

[0155] like FIGS. 24-28 As shown, the lead 411 of the second conductor 3b is the second lead 411b. The second lead 411b extends along the row direction and its length is greater than the distance between the first pixel circuit 110 and the first light-emitting device 201 connected by the second lead 411b in the row direction.

[0156] The second conductor 3b also includes a first compensation part 31 connected to the second lead 411b.

[0157] In light of the specific application scenario, for the target light-emitting area with 48 columns of first light-emitting devices 201, such as FIGS. 24-28As shown, the first light-emitting device 201 in the 5th column is connected to the first pixel circuit 110 in the 5th column via the second conductor 3b. The second lead 411b extends to the side of the first pixel circuit 110 in the 9th column away from the transparent area 101, and the area between the first pixel circuit 110 in the 6th and 9th columns is a width-increased area, the width of which is greater than the width of other areas. Multiple first compensation parts 31 are connected to both sides of this width-increased area. The second lead 411b is connected to the first pixel circuit 110 via a jumper 400 on the same layer as the second source / drain layer 005.

[0158] like FIGS. 29-37 As shown, the first light-emitting device 201 in the 9th column is connected to the first pixel circuit 110 in the 9th column through the second conductor 3b. However, this second conductor 3b is different from the second conductor 3b of the first pixel circuit 110 in the 5th column, and the difference is as follows:

[0159] The second lead 411b connecting the first light-emitting device 201 in the 9th column extends between the first pixel circuit 110 in the 39th column and the first pixel circuit 110 in the 38th column;

[0160] The first compensation section 31 is located on the outer side of the end of the second lead 411b that faces away from the transparent area 101, and is connected to the second lead 411b via an adapter cable 300 inside the drive backplate 1. Specifically, the first compensation section 31 is located between the 35th column of the first pixel circuit 110 and the 33rd column of the first pixel circuit 110, and is connected to the second lead 411b via an adapter cable 300 made of the same material as the second source / drain layer 005.

[0161] Third conductor 3c

[0162] like FIGS. 38-42 As shown, the lead 411 of the third conductor 3c is the third lead 411c. The third lead 411 includes a first segment 310, a second segment 320, and a third segment 330. The first segment 310 is connected to a first light-emitting device 201 and extends along the row direction to the pixel area 102. The length of the first segment 310 is greater than the distance in the row direction between the first pixel circuit 110 and the first light-emitting device 201 connected by the third lead 411. The second segment 320 extends along the column direction and is connected to the end of the first segment 310 located in the pixel area 102. The third segment 330 extends along the row direction toward the side of the second segment 320 closer to the transparent area 101 and is connected to a first pixel circuit 110. The third segment 330 can extend along a straight trajectory or along a stepped trajectory, but its extension trend is toward the transparent area 101.

[0163] In light of the specific application scenario, for the target light-emitting area with 48 columns of first light-emitting devices 201, such as FIGS. 38-42As shown, the first light-emitting device 201 in the 10th column is connected to the first pixel circuit 110 in the 10th column through the third conductor 3c, and the second segment 320 of the third lead 411c is located on the side of the first pixel circuit 110 in the 33rd column away from the transparent area 101.

[0164] Fourth conductor 3d

[0165] like FIG. 43 As shown, the fourth conductor 3d has a lead 411d, which includes a first segment 310, a second segment 320, and a third segment 330. Its structure is similar to that of the third lead 411c, and will not be described in detail here. The fourth conductor 3d also includes a first compensation portion 31, which is located between the first segment 310 and the third segment 330, and on the side of the first segment 310 closest to the transparent area 101. The first compensation portion 31 of the fourth conductor 3d is connected to at least one of the first segment 310, the second segment 320, and the third segment 330.

[0166] In light of the specific application scenario, for the target light-emitting area with 48 columns of first light-emitting devices 201, such as FIG. 43 As shown, the first light-emitting device 201 in the 39th column is connected to the first pixel circuit 110 in the 39th column via the fourth conductor 3d. The second segment 320 of the fourth lead 411d is located on the side of the first pixel circuit 110 in the 48th column away from the transparent area 101. The first compensation part 31 is rectangular, with one part located on the side of the first pixel circuit 110 in the 48th column away from the transparent area 101, and the other part located between the first pixel circuits 110 in the 47th and 48th columns. Simultaneously, the first compensation part 31 is connected to the first segment 310, the second segment 320, and the third segment 330.

[0167] like FIGS. 44-46 As shown, a portion of the conductors 3 connecting the first light-emitting device 201 in the 40th column and the first pixel circuit 110 in the 40th column can employ a first compensation part 31, while the other portion of the conductors 3 can employ a second compensation part 32. Specifically, the fifth conductor 3e and the sixth conductor 3f shown in the figure have the following leads: the fifth conductor 3e is the fifth lead 411e, and the sixth conductor 3f has the following lead 411f.

[0168] The first compensation part 31 of the fifth conductor 3e is located on the side of the 40th column of the first pixel circuit 110 away from the transparent area 101. There are multiple first compensation parts 31, which are interconnected and are in the same layer and material as the first lead 411a. The fifth lead 411e is in the same layer and material as the first lead 411a and is connected to the first compensation part 31.

[0169] Part of the second compensation part 32 of the sixth conductive body 3f is located on the side of the first pixel circuit 110 in the 40th column away from the transparent area 101, and another part is located on the side of the first pixel circuit 110 in the 40th column close to the transparent area 101, and the sixth lead 411f is connected with the second compensation part 32.

[0170] It should be noted that those skilled in the art can reasonably select and combine the above-mentioned ways of increasing the parasitic capacitance of the conductive body 3 according to the actual situation, and are not limited to the embodiments listed above.

[0171] In addition, the first lead 411a, the second lead 411b, the third lead 411c, the fourth lead 411d, the fifth lead 411e and the sixth lead 411f refer to six types of leads 411, not six specific leads 411, and the structure of the same type of lead 411 can be the same or different, for example: the lead 411 connected between the first pixel circuit 101 in the 5th column and the first pixel circuit 101 in the 9th column is the second lead 411b, but it is not the same second lead 411b, but two second leads 411b with different structures.

[0172] As shown in FIG. 6 , FIG. 11 and 18 , in order to shield the interference of the lead 411 of the adapter layer 4 on the pixel circuit 10, a shielding layer 5 can be arranged on the side of the driving transistor T3 close to the light-emitting layer 2, and a shielding signal can be applied to the shielding layer 5. The electrical signal can be a direct current signal, thereby reducing the interference on the pixel circuit 10, preventing the signal from being hindered from climbing, and thereby improving the response speed.

[0173] In some embodiments of the present disclosure, the transmission line 600 can be shielded by the shielding layer 5 to prevent the adapter layer 4 from interfering with the signal transmitted by the transmission line 600, that is, to prevent the signal jump generated when the lead 411 charges and discharges from interfering with the N1 node, to avoid the signal of the N1 node being hindered from climbing, and to improve the response speed. Specifically, the shielding layer 5 can include a shielding part 51 and a connecting part 52, wherein:

[0174] The orthogonal projection of the transmission line 600 on the light-emitting layer 2 at least partially overlaps the orthogonal projection of the shielding part 51 on the light-emitting layer 2, for example, the orthogonal projection of the transmission line 600 on the light-emitting layer 2 can be located within the orthogonal projection of the shielding part 51 on the light-emitting layer 2. The shielding part 51 can be the same layer and material as the second source-drain layer 005.

[0175] Simultaneously, the connecting part 52 and the shielding part 51 are made of the same layer and material and are connected. The connecting part 52 can be connected to the power supply terminal VDD through the first source / drain layer 004 to receive the VDD signal. Of course, the shielding layer 5 can also be connected to the power supply terminal VDD in other ways, without special limitation. This VDD signal can be used as a shielding signal, thereby producing a shielding effect by inputting the VDD signal to the shielding part 51. Of course, other electrical signals can also be applied to the shielding part 51 as shielding signals, as long as they can produce a shielding effect.

[0176] In addition, interference prevention is achieved by shielding at least one of the driving transistor T1 and the storage capacitor Cst on the side closest to the light-emitting layer 2 through the shielding layer 5.

[0177] Furthermore, the shielding layer 5 can be on the same layer and made of the same material as the second compensation part 32. The second compensation part 32 is provided with a hollow part 321, and the shielding layer 5 is located inside the hollow part 321 and is spaced apart from the inner wall of the hollow part 321.

[0178] This disclosure provides a display device, which may include the display panel of any of the above embodiments. The structure and beneficial effects of the display panel can be referred to the embodiments of the display panel above, and will not be repeated here.

[0179] This disclosure also provides a terminal device, such as... FIG. 47 As shown, the terminal device may include a display panel 100 and a camera device 700, wherein:

[0180] The display panel 100 can be any of the display panels described in the above embodiments. Its structure and beneficial effects can be referred to the embodiments of the display panel described above, and will not be repeated here.

[0181] The camera device 700 can be located on the backlight side of the display panel 100, i.e., the side facing away from the light emission direction. For example, if the OLED light-emitting device of the display panel 100 is a top-emitting structure, i.e., it emits light in a direction away from the driving backplate, then the camera device 700 can be located on the side of the driving backplate 1 away from the light-emitting functional layer 212, and the camera device 700 can be directly opposite the transparent area 101 for capturing images through the transparent area 101. If the OLED light-emitting device of the display panel 100 is a bottom-emitting structure, then the camera device 700 can be located on the side of the light-emitting functional layer 212 away from the driving backplate 1. The camera device 700 may include a lens and a photoelectric sensor, etc. The specific structure of the camera device 700 is not specifically limited here, as long as it can capture images.

[0182] The terminal devices disclosed herein can be electronic devices with display and shooting functions, such as mobile phones, tablets, and televisions, which will not be listed here one by one.

[0183] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the features disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims

1. A display panel, wherein, include: A driving backplate has a transparent area and a pixel area at least partially surrounding the transparent area, wherein the pixel area is provided with a plurality of pixel circuits distributed in an array, the pixel circuits including a plurality of columns of first pixel circuits and a plurality of columns of second pixel circuits distributed along the row direction; An adapter layer is disposed on one side of the drive backplane; the adapter layer includes multiple mutually insulated lead layers, each lead layer including multiple mutually insulated leads; each lead extends from the transparent area to the pixel area; A light-emitting layer is disposed on the surface of the transition layer opposite to the driving backplate, and includes a plurality of light-emitting devices arranged in an array; the light-emitting devices include a plurality of first light-emitting devices located in the transparent area and a plurality of second light-emitting devices located in the pixel area; Each of the first light-emitting devices is connected to a first pixel circuit via a transparent conductor; each of the second pixel circuits is connected to a second light-emitting device; each conductor includes at least one lead; a first light-emitting device is connected to the first pixel circuit via a lead; at least a portion of the conductors also includes a second compensation portion connected to its lead; the second compensation portion is disposed within the driving backplate and located within the pixel area; in the row direction, the orthographic projection of the second compensation portion on the driving backplate overlaps with at least one first pixel circuit. The deviation of the delay time of the signal transmitted by any of the conductors from a standard delay time is not greater than a deviation threshold.

2. The display panel according to claim 1, wherein, In the two conductors of the two first pixel circuits connected in the same row, the area of ​​the conductor of the first pixel circuit that is closer to the transparent area is greater than the area of ​​the conductor of the first pixel circuit that is farther from the transparent area.

3. The display panel according to claim 1, wherein, The lead layer includes at least a first lead layer, a second lead layer, and a third lead layer that are sequentially distributed from the driving backplate to the light-emitting layer; The transition layer also includes: A first planarization layer covers the first lead layer and the surface of the driving backplate near the light-emitting layer; a second lead layer is disposed on the surface of the first planarization layer opposite to the driving backplate. The second planarization layer covers the second lead layer and the surface of the first planarization layer near the light-emitting layer; the third lead layer is disposed on the surface of the second planarization layer opposite to the driving backplate. A third planarization layer covers the surfaces of the third lead layer and the second planarization layer near the light-emitting layer; the light-emitting layer is disposed on the surface of the third planarization layer opposite to the drive backplate.

4. The display panel according to claim 1, wherein, At least part of the conductor also includes a first compensation portion connected to its leads, the first compensation portion being in the same layer and made of the same material as one of the lead layers.

5. The display panel according to claim 4, wherein, The pixel circuit includes at least a driving transistor, a first reset transistor, and a storage capacitor. The first electrode plate of the storage capacitor is multiplexed as the control terminal of the driving transistor. The first terminal of the first reset transistor is connected to the first electrode plate via a transmission line. The drive backplate also includes: A shielding layer is disposed on the side of the driving transistor near the light-emitting layer, and is used to receive shielding signals; The orthographic projection of the shielding layer onto the light-emitting layer at least partially coincides with the orthographic projection of the transmission line onto the light-emitting layer.

6. The display panel according to claim 5, wherein, The shielding layer includes: The shielding portion, wherein the orthogonal projection of the transmission line onto the light-emitting layer is located within the orthogonal projection of the shielding portion onto the light-emitting layer; The connecting part is made of the same layer and material as the shielding part and is connected to the shielding part. The connecting part and the second electrode plate of the storage capacitor are connected to the same power supply terminal. The shielding signal is the power signal output from the power supply terminal.

7. The display panel according to claim 5, wherein, The shielding layer is on the same layer and made of the same material as the second compensation part; the second compensation part has a hollow part, and the shielding layer is located inside the hollow part and is spaced apart from the inner wall of the hollow part.

8. The display panel according to claim 4, wherein, At least a portion of the conductor's lead length is greater than the distance between the first pixel circuit and the first light-emitting device connected to it in the row direction.

9. The display panel according to claim 8, wherein, The conductor includes a first conductor, and the lead of the first conductor is a first lead; the first lead extends along the row direction and its length is greater than the distance in the row direction between the first pixel circuit and the first light-emitting device connected by the first lead; The first conductor includes a first compensation part and a second compensation part; the first compensation part of the first conductor is multiple and is connected to at least one side of the first lead along the row direction; the second compensation part of the first conductor is multiple and is distributed along the row direction and interconnected with each other.

10. The display panel according to claim 9, wherein, The first conductor further includes a third compensation part connected to the first lead, the third compensation part being disposed within the drive back plate and located in a portion of the transparent area.

11. The display panel according to claim 10, wherein, The third compensation section and the second compensation section are made of the same material and layer.

12. The display panel according to claim 4, wherein, The conductor includes a second conductor, and the lead of the second conductor is a second lead; the second lead extends along the row direction and its length is greater than the distance in the row direction between the first pixel circuit and the first light-emitting device connected to the second lead; The second conductor includes the first compensation portion connected to the second lead.

13. The display panel according to claim 8, wherein, The conductor includes a third conductor, and the lead of the third conductor is a third lead; The third lead includes a first segment, a second segment, and a third segment. The first segment is connected to a first light-emitting device and extends along a direction to the pixel area. The length of the first segment is greater than the distance in the row direction between the first pixel circuit and the first light-emitting device connected by the third lead. The second segment extends along the column direction and is connected to one end of the first segment located in the pixel area. The third segment extends along the row direction toward the side of the second segment closer to the transparent area and is connected to a first pixel circuit.

14. The display panel according to claim 8, wherein, The conductor includes a fourth conductor, and the lead of the fourth conductor is a fourth lead; The fourth lead includes a first segment, a second segment, and a third segment. The first segment is connected to a first light-emitting device and extends along a direction to the pixel area. The length of the first segment is greater than the distance in the row direction between the first pixel circuit and the first light-emitting device connected by the fourth lead. The second segment extends along the column direction and is connected to one end of the first segment located within the pixel area. The third segment extends along the row direction toward the side of the second segment closer to the transparent area and is connected to a first pixel circuit. The fourth conductor includes a first compensation part, which is located between the first segment and the third segment, and on the side of the second segment near the transparent area. The first compensation part of the fourth conductor is connected to at least one of the first segment, the second segment, and the third segment.

15. The display panel according to claim 3, wherein, The region of the light-emitting layer corresponding to the transparent area is divided into four light-emitting areas along the first central axis and the second central axis; the first central axis is the central axis extending from the transparent area along the column direction, and the second central axis is the central axis extending from the transparent area along the row direction; The light-emitting area includes a first sub-region, a second sub-region, a third sub-region, and a fourth sub-region that are sequentially close to the first central axis along the row direction; The lead connecting the first light-emitting device in the first sub-region is located in the first lead layer; The lead connecting the first light-emitting device in the second sub-region is located in the second lead layer; The lead connecting the first light-emitting device in the third sub-region is located in the third lead layer; The lead connecting the first light-emitting device in the fourth sub-region is located in at least one of the first lead layer, the second lead layer, and the third lead layer.

16. The display panel according to claim 5, wherein, The pixel circuit includes an active layer, a first gate layer, a second gate layer, a first source / drain layer, and a second source / drain layer distributed in a direction close to the light-emitting layer; the shielding layer is of the same layer and material as the second source / drain layer.

17. The display panel according to claim 16, wherein, The material of the lead includes at least one of indium tin oxide and indium gallium zinc oxide; the material of the second source / drain layer includes a metal.

18. A display device, wherein, Includes the display panel as described in any one of claims 1-17.

19. A terminal device, wherein, include: The display device according to claim 18; A camera device is located on the backlight side of the display device and is positioned directly opposite the transparent area, for capturing images through the transparent area.

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