Bus driver structure and control method

Abstract

The application provides a bus driver structure and a control method, which comprise: a high-side drive circuit; the high-side drive circuit is connected between a power supply and a load. The high-side drive circuit comprises: a high-side first transistor, a high-side second transistor and a high-side reverse current blocking unit; the gate of the high-side first transistor and the gate of the high-side second transistor are respectively connected to a high-side gate control unit; the drain of the high-side first transistor is connected to the power supply, and the source of the high-side first transistor is connected to the positive electrode of the high-side reverse current blocking unit; the drain of the high-side second transistor is connected to the negative electrode of the high-side reverse current blocking unit, and the source of the high-side second transistor is a high-side signal end; and the high-side signal end is used for directly or indirectly connecting the load. The bus driver structure can solve the problems of complex control circuit, high cost and slow overcurrent protection reaction speed in the prior art.

Description

Technical Field

[0001] This invention relates to the field of bus driver technology, and in particular to a bus driver structure and control method. Background Technology

[0002] In addition to enabling switching, the bus driver structure also needs to prevent overcurrent in the output stage. The existing bus driver structure's single-sided drive only includes one transistor, which is used to implement the switching function. The function of preventing overcurrent in the output stage needs to be accomplished by the gate control of this transistor, which increases the complexity of the control circuit, increases the cost, and results in a slow overcurrent protection response. Summary of the Invention

[0003] This invention provides a bus driver structure and control method to solve the problems of complex circuits, high cost, and slow overcurrent protection response in the prior art.

[0004] According to a first aspect of the present invention, a bus driver structure is provided, comprising: a high-side drive circuit connected between a power supply and a load; The high-side driving circuit includes: a high-side first transistor, a high-side second transistor, and a high-side reverse current blocking unit; The gate of the first high-side transistor and the gate of the second high-side transistor are respectively connected to the high-side gate control unit; The drain of the high-side first transistor is connected to the power supply, and the source of the high-side first transistor is connected to the positive terminal of the high-side reverse current blocking unit. The drain of the high-side second transistor is connected to the negative terminal of the high-side reverse current blocking unit, and the source of the high-side second transistor is the high-side signal terminal. The high-side signal terminal is used to directly or indirectly connect to the load.

[0005] Preferably, the high-side reverse current blocking unit includes: a high-side third transistor; The gate of the high-side third transistor is connected to the source of the high-side third transistor; The connection point between the gate and source of the high-side third transistor is the positive terminal of the high-side reverse current blocking unit, and the drain of the high-side third transistor is the negative terminal of the high-side reverse current blocking unit.

[0006] Preferably, the high-side reverse current blocking unit includes: a high-side fourth transistor, a high-side Zener diode, and a high-side current-limiting resistor; wherein, The high-side current-limiting resistor is connected between the power supply and the gate of the high-side fourth transistor; The connection point between the gate of the high-side fourth transistor and the high-side current-limiting resistor is also connected to the negative terminal of the high-side Zener diode, and the positive terminal of the high-side Zener diode is connected to the source terminal of the high-side fourth transistor. The connection point between the high-side Zener diode and the high-side fourth transistor is the positive terminal of the high-side reverse current blocking unit, and the drain of the high-side fourth transistor is the negative terminal of the high-side reverse current blocking unit.

[0007] Preferably, the high-side gate control unit includes a high-side fifth transistor, which, together with the high-side second transistor, forms a high-side current mirror.

[0008] Preferably, it further includes a low-side drive circuit connected between the load and ground.

[0009] Preferably, the low-side driving circuit includes: a low-side first transistor, a low-side second transistor, and a low-side reverse current blocking unit; The gate of the first low-side transistor and the gate of the second low-side transistor are respectively connected to the low-side gate control unit. The source of the first low-side transistor is grounded, and the drain of the first low-side transistor is connected to the source of the second low-side transistor. The drain of the low-side second transistor is connected to the negative terminal of the low-side reverse current blocking unit, and the positive terminal of the low-side reverse current blocking unit is the low-side signal terminal. The low-side signal terminal is used to directly or indirectly connect to the load.

[0010] Preferably, the low-side reverse current blocking unit includes: a low-side third transistor; The gate of the low-side third transistor is connected to the drain of the low-side third transistor. The connection point between the gate and drain of the low-side third transistor is the negative terminal of the low-side reverse current blocking unit, and the source of the low-side third transistor is the positive terminal of the low-side reverse current blocking unit.

[0011] Preferably, the high-side second transistor and the low-side third transistor are P-type high-voltage transistors; The high-side reverse current blocking unit includes a high-side third transistor, wherein the high-side third transistor and the low-side second transistor are N-type high-voltage transistors.

[0012] Preferably, the low-side reverse current blocking unit includes: a low-side fourth transistor, a low-side Zener diode, and a low-side current-limiting resistor; wherein, The low-side current-limiting resistor is connected between ground and the gate of the low-side fourth transistor; The connection point between the gate of the low-side fourth transistor and the low-side current-limiting resistor is also connected to the positive terminal of the low-side Zener diode, and the negative terminal of the low-side Zener diode is connected to the drain of the low-side fourth transistor. The connection point between the low-side Zener diode and the low-side fourth transistor is the negative terminal of the low-side reverse current blocking unit, and the source terminal of the low-side fourth transistor is the positive terminal of the low-side reverse current blocking unit.

[0013] Preferably, the low-side gate control unit includes a low-side fifth transistor, which, together with the low-side second transistor, forms a low-side current mirror.

[0014] Preferably, it also includes: an oscillation damping unit; The oscillation attenuation unit is connected between the high-side driving unit and the low-side driving unit.

[0015] Preferably, the oscillation attenuation unit includes an oscillation attenuation transistor, wherein the gate control of the oscillation attenuation transistor is achieved by gate timing control.

[0016] According to a second aspect of the present invention, a bus driver control method is provided, the control method comprising: when the high-side first transistor and the low-side first transistor are turned off, delaying for a preset time before turning off the high-side second transistor and the low-side second transistor.

[0017] The bus driver structure provided by this invention uses two transistors via high-side driving: a first high-side transistor and a second high-side transistor. The first high-side transistor performs the switching function, while the second high-side transistor prevents overcurrent in the output stage. This eliminates the need for complex control circuitry, separates the switching and overcurrent protection functions, simplifies control, reduces costs, and provides fast overcurrent protection response.

[0018] In an optional embodiment of the present invention, the low-side driving circuit also includes two transistors: a first low-side transistor and a second low-side transistor. The first low-side transistor performs a switching function, while the second high-side transistor prevents overcurrent of the output stage. This eliminates the need for complex control circuits, simplifies control, further reduces costs, and provides fast overcurrent protection response.

[0019] In an optional embodiment of the present invention, the high-side reverse current blocking unit and / or the low-side reverse current blocking unit are in the form of transistors, which have stronger high voltage resistance.

[0020] In one alternative embodiment of the present invention, the high-side second transistor and the low-side third transistor are P-type high-voltage transistors, and both can use the same device type and size, and are symmetrical; in addition, the high-side third transistor and the low-side second transistor are N-type high-voltage transistors, and both can also use the same device type and size, and are symmetrical; therefore, the high-voltage devices of the output stage of the high-side drive and the low-side drive are symmetrical, and thus the current density of the output stage is symmetrical.

[0021] In an optional embodiment of the present invention, the high-side reverse current blocking unit and / or the low-side reverse current blocking unit are in the form of transistors, and there is no need to short-circuit between the gate and source of the transistors. A Zener diode and a current-limiting resistor are added between the gate and source, so that the transistors can be channel-on in certain operating modes, thereby providing a smaller on-resistance and on-state voltage drop, which helps to increase the voltage difference between the high-side signal terminal and the low-side signal terminal when the bus output is high.

[0022] In an optional embodiment of the present invention, for gate control, a high-side current mirror and / or a low-side current mirror are provided to achieve the current limiting function. The maximum output current is limited by the reference current and the ratio of the current mirror. This circuit has the characteristics of fast response speed and faster overcurrent protection response.

[0023] In an optional embodiment of the present invention, by adding an oscillation attenuation unit between the high-side driving circuit and the low-side driving circuit, when the voltage of the low-side signal terminal is higher than the voltage of the high-side signal terminal, the oscillation attenuation unit can discharge the energy stored in the parasitic inductive load, thereby attenuating the energy stored in the parasitic inductive load and reducing the amplitude of the high-side signal terminal being higher than the low-side signal terminal during the oscillation process. This can reduce the probability of the receiver judging an erroneous signal.

[0024] In an optional embodiment of the present invention, the oscillation attenuation unit adopts the form of an oscillation attenuation transistor, and the gate control of the oscillation attenuation transistor adopts a gate timing control method. When the bus is turned off, the channel of the oscillation attenuation transistor can be turned on for a short time by controlling the gate, thereby providing better attenuation performance.

[0025] The bus driver control method provided by the present invention can provide better attenuation performance by delaying the high-side second transistor and the low-side second transistor by a preset time when the bus is turned off, that is, when the high-side first transistor and the low-side first transistor are turned off. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 A circuit diagram of the high-side drive circuit of a bus driver structure according to an embodiment of the present invention; Figure 2 A circuit diagram of the high-side drive circuit of a bus driver structure according to a preferred embodiment of the present invention; Figure 3 A circuit diagram of the high-side drive circuit of a bus driver structure according to another preferred embodiment of the present invention; Figure 4 A circuit diagram of the high-side drive circuit of a bus driver structure according to another preferred embodiment of the present invention; Figure 5 This is a circuit diagram of the low-side drive circuit of a bus driver structure according to an embodiment of the present invention. Figure 6 A circuit diagram of the low-side drive circuit of a bus driver structure according to a preferred embodiment of the present invention; Figure 7 A circuit diagram of the low-side drive circuit of a bus driver structure according to another preferred embodiment of the present invention; Figure 8 A circuit diagram of the low-side drive circuit of a bus driver structure according to another preferred embodiment of the present invention; Figure 9 This is a circuit diagram of a preferred embodiment of the bus driver structure of the present invention; Figure 10a This is a circuit diagram of a bus driver structure according to another preferred embodiment of the present invention; Figure 10b This is a circuit diagram of a bus driver structure according to another preferred embodiment of the present invention; Figure 10c This is a circuit diagram of a bus driver structure according to another preferred embodiment of the present invention; Figure 10d This is a circuit diagram of a bus driver structure according to another preferred embodiment of the present invention; Figure 11 This is a circuit diagram of a bus driver structure according to another preferred embodiment of the present invention; Figure 12 This is a control circuit diagram of a bus driver control method according to an embodiment of the present invention. Detailed Implementation

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] In the description of this invention, it should be understood that the terms "upper part", "lower part", "upper end", "lower end", "lower surface", "upper surface", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention.

[0030] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

[0031] In the description of this invention, "a plurality of" means multiple, such as two, three, four, etc., unless otherwise explicitly specified.

[0032] In the description of this invention, unless otherwise explicitly specified and limited, the term "connection" and other such terms should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can refer to a mechanical connection, an electrical connection, or a connection that allows communication between the components; it can refer to a direct connection or an indirect connection through an intermediate medium; it can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0033] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0034] In one embodiment, a bus driver structure is provided, comprising: a high-side drive circuit connected between a power supply and a load. The high-side drive circuit includes: a first high-side transistor MPH, a second high-side transistor MPDH, and a high-side reverse current blocking unit. (Please refer to...) Figure 1The gates of the first high-side transistor (MPH) and the second high-side transistor (MPDH) are connected to the high-side gate control unit. These two high-side gate control units can be the same or two separate units (two are shown in the diagram). The drain of the first high-side transistor (MPH) is connected to the power supply, and its source is connected to the positive terminal of the high-side reverse current blocking unit. The drain of the second high-side transistor (MPDH) is connected to the negative terminal of the high-side reverse current blocking unit, and its source is the high-side signal terminal CANH. The high-side signal terminal CANH is used to directly or indirectly connect to the load.

[0035] In the above embodiment, the high-side drive circuit includes two transistors and a high-side reverse current blocking unit. Because the signal at the high-side signal terminal CANH may be driven by other external drivers, causing the CANH signal amplitude to exceed the driver's own power supply voltage, the high-side reverse current blocking unit can prevent current backflow. For example, when CANH is higher than the power supply voltage, the high-side reverse current blocking unit blocks the current from CANH to the power supply. Additionally, when the bus driver outputs, and the high-side second transistor MPDH is turned on, the maximum current flowing through MPDH needs to be controlled, i.e., current limiting is required. The high-side drive circuit in the above embodiment includes two transistors: a high-side first transistor MPH and a high-side second transistor MPDH. One transistor controls the switching state of the bus driver, and the other is used for current limiting control. Separating switching and current limiting simplifies the circuit and control, reducing costs. Furthermore, since the high-side second transistor MPDH provides resistance to external high voltage, the high-side first transistor MPH can use low-voltage devices, further reducing costs.

[0036] In one embodiment, the high-side reverse current blocking unit may include: a high-side diode DH, please refer to [reference needed]. Figure 1 The positive terminal of the high-side diode DH is the positive terminal of the high-side reverse current blocking unit, and the negative terminal of the high-side diode DH is the negative terminal of the high-side reverse current blocking unit.

[0037] In one embodiment, the high-side reverse current blocking unit may include: a high-side third transistor MNDH, please refer to [reference needed]. Figure 2 The gate and source of the high-side third transistor MNDH are connected; the connection point between the gate and source of the high-side third transistor MNDH is the positive terminal of the high-side reverse current blocking unit, and the drain of the high-side third transistor MNDH is the negative terminal of the high-side reverse current blocking unit. When the gate and source of the high-side third transistor MNDH are shorted, it becomes a body diode, which can block reverse current.

[0038] In one embodiment, the high-side reverse current blocking unit may include: a high-side fourth transistor MNDH, a high-side Zener diode DZH, and a high-side current-limiting resistor RGH. Please refer to [reference needed]. Figure 3 .Right now: Figure 2 In this embodiment, the high-side third transistor MNDH does not use a gate-source short-circuit method; instead, a high-side Zener diode DZH and a high-side current-limiting resistor RGH are added. The high-side current-limiting resistor RGH is connected between the power supply and the gate of the high-side fourth transistor MNDH. The connection point between the gate of the high-side fourth transistor MNDH and the high-side current-limiting resistor RGH is also connected to the negative terminal of the high-side Zener diode DZH, and the positive terminal of the high-side Zener diode DZH is connected to the source of the high-side fourth transistor MNDH. The connection point between the high-side Zener diode DZH and the high-side fourth transistor MNDH is the positive terminal of the high-side reverse current blocking unit, and the drain of the high-side fourth transistor MNDH is the negative terminal of the high-side reverse current blocking unit. In this embodiment, the high-side reverse resistor blocking unit MNDH can be channel-on in certain operating modes, thereby providing a smaller on-resistance and on-voltage drop. This helps to increase the voltage difference between the high-side signal terminal CANH and the low-side signal terminal CANL when the bus output is high, that is, the signal amplitude is larger, and thus the noise immunity is stronger. Furthermore, adopting this structure can minimize the chip area while ensuring the same amplitude.

[0039] In one embodiment, the high-side gate control unit includes: a high-side fifth transistor MPDHm, which, together with the high-side second transistor MPDH, forms a high-side current mirror. (Please refer to...) Figure 4 The high-side current mirror acts as a current limiter, limiting the maximum output current by using the reference current irefh and the current mirror ratio of 1:N. This circuit is characterized by its fast response speed.

[0040] In one embodiment, the gate control of the high-side first transistor MPH employs a totem-pole-like drive; please refer to [reference needed]. Figure 4 The input drive signal drvb is connected to the gate of the high-side first transistor MPH through the drive enhancement circuit.

[0041] In one embodiment, the bus driver structure further includes a low-side drive circuit connected between the load and ground.

[0042] In one embodiment, the low-side driving circuit includes: a low-side first transistor MNL, a low-side second transistor MNDL, and a low-side reverse current blocking unit. Please refer to [reference needed]. Figure 5The gates of the first low-side transistor MNL and the second low-side transistor MNDL are connected to the low-side gate control unit. The source of the first low-side transistor MNL is grounded, and its drain is connected to the source of the second low-side transistor MNDL. The drain of the second low-side transistor MNDL is connected to the negative terminal of the low-side reverse current blocking unit, and the positive terminal of the low-side reverse current blocking unit is the low-side signal terminal CANL. The low-side signal terminal is used to directly or indirectly connect to the load.

[0043] In the above embodiments, the low-side drive circuit includes a low-side reverse current blocking unit. Because the signal at the low-side signal terminal CANL may be driven by other external drivers, causing the CANL signal amplitude to drop below ground voltage, the low-side reverse current blocking unit can prevent current backflow. For example, when CANL is below ground voltage, the low-side reverse current blocking unit blocks the current from ground to CANL. Additionally, when the bus driver outputs, and the low-side second transistor MNDL is turned on, it is necessary to control the maximum current flowing through MNDL, i.e., current limiting is required. The low-side drive circuit in the above embodiments includes two transistors: a low-side first transistor MNL and a low-side second transistor MNDL. One transistor controls the switching state of the bus driver, and the other is used for current limiting control, separating switching and current limiting, simplifying the circuit and control, and reducing costs. Furthermore, since the low-side second transistor MNDL acts as a shield against external high voltage, the low-side first transistor MNL can use low-voltage devices, further reducing costs.

[0044] In one embodiment, the low-side reverse current blocking unit may include: a low-side diode DL, please refer to Figure 5 The positive terminal of the low-side diode DL is the positive terminal of the low-side reverse current blocking unit, and the negative terminal of the low-side diode DL is the negative terminal of the low-side reverse current blocking unit.

[0045] In one embodiment, the low-side reverse current blocking unit may include: a low-side third transistor MPDL, please refer to Figure 6 The gate of the low-side third transistor MPDL is connected to its drain; the connection point between the gate and drain of the low-side third transistor MPDL is the negative terminal of the low-side reverse current blocking unit, and the source of the low-side third transistor MPDL is the positive terminal of the low-side reverse current blocking unit. When the gate and source of the low-side third transistor MPDL are shorted, it becomes a body diode, which can block reverse current.

[0046] In one embodiment, the high-side second transistor and the low-side third transistor are P-type high-voltage transistors. They can both use the same device type and size, but the connection method is different, and they are symmetrical. Alternatively, the high-side third transistor and the low-side second transistor are N-type high-voltage transistors. They can both use the same device type and size, but the connection method is different, and they are also symmetrical.

[0047] In existing bus driver structures, the high-voltage devices connected to the output in both the high-side and low-side drive circuits are P-type on one side and N-type on the other. This asymmetry in the high-voltage devices of the output stages leads to asymmetry in the output current density. In the embodiments of the present invention, the high-side drive circuit includes one P-type and one N-type device, and the low-side drive circuit also includes one P-type and one N-type device. Therefore, the high-voltage devices in the output stages of the high-side and low-side drives are symmetrical, resulting in symmetrical current densities in the output stages.

[0048] In one embodiment, the low-side reverse current blocking unit may include: a low-side fourth transistor MPDL, a low-side Zener diode DZL, and a low-side current-limiting resistor RGL. Please refer to [reference needed]. Figure 7 .Right now: Figure 6 In this embodiment, the low-side third transistor MPDL does not employ a gate-source short-circuit method. Instead, a low-side Zener diode DZL and a low-side current-limiting resistor RGL are added. The low-side current-limiting resistor RGL is connected between ground and the gate of the low-side fourth transistor MPDL. The connection point between the gate of the low-side fourth transistor MPDL and the low-side current-limiting resistor RGL is also connected to the anode of the low-side Zener diode DZL, and the cathode of the low-side Zener diode DZL is connected to the drain of the low-side fourth transistor MPDL. The connection point between the low-side Zener diode DZL and the low-side fourth transistor MPDL is the cathode of the low-side reverse current blocking unit, and the source of the low-side fourth transistor MPDL is the anode of the low-side reverse current blocking unit. In this embodiment, the low-side reverse resistor blocking unit can be channel-on in certain operating modes, thereby providing a smaller on-resistance and on-voltage drop. This helps to increase the voltage difference between the high-side signal terminal CANH and the low-side signal terminal CANL when the bus output is high, that is, the signal amplitude is larger, and thus the noise immunity is stronger. Furthermore, adopting this structure can minimize the chip area while ensuring the same amplitude.

[0049] In one embodiment, the high-side second transistor and the low-side fourth transistor are P-type high-voltage transistors. They can both use the same device type and size, but the connection method is different, and they are symmetrical. Alternatively, the high-side fourth transistor and the low-side second transistor are N-type high-voltage transistors. They can both use the same device type and size, but the connection method is different, and they are also symmetrical.

[0050] In one embodiment, the low-side gate control unit includes: a low-side fifth transistor MNDLm, wherein the low-side fifth transistor MNDLm and the low-side second transistor MNDL form a low-side current mirror. Please refer to [reference needed]. Figure 8 The low-side current mirror acts as a current limiter, limiting the maximum output current by using the reference current irefl and the current mirror ratio of 1:N. This circuit is characterized by its fast response speed.

[0051] In one embodiment, the gate control of the low-side first transistor MNL employs a totem-pole-like drive; please refer to [reference needed]. Figure 8 The input drive signal drv is amplified and connected to the gate of the low-side first transistor MNL.

[0052] In one embodiment, it further includes: an oscillation attenuation unit; the oscillation attenuation unit is connected between the high-side driving unit and the low-side driving unit.

[0053] In actual operation, due to the inductive load at the bus drive output, significant oscillations occur on the high-side signal terminal CANH and the low-side signal terminal CANL when the bus is turned off, leading to erroneous signals at the receiver. To address this, an oscillation attenuation unit is introduced. When the voltage of CANL is higher than that of CANH, the oscillation attenuation unit discharges the energy stored in the parasitic inductive load, reducing the amplitude of the CANH voltage being higher than that of CANL during oscillation. This reduces the probability of the receiver detecting erroneous signals.

[0054] In one embodiment, when the high-side driving unit includes a high-side first transistor, a high-side second transistor, and a high-side reverse current blocking unit, and the low-side driving unit includes a low-side first transistor, a low-side second transistor, and a low-side reverse current blocking unit: the connection point between the high-side second transistor and the high-side reverse current blocking unit is also connected to one end of the oscillation attenuation unit; the connection point between the low-side second transistor and the low-side reverse current blocking unit is also connected to the other end of the oscillation attenuation unit.

[0055] In one embodiment, the oscillation attenuation unit may include: a diode DRS, please refer to Figure 9 The positive terminal of diode DRS is connected to the connection point between the low-side second transistor and the low-side reverse current blocking unit, and the negative terminal of diode DRS is connected to the connection point between the high-side second transistor and the high-side reverse current blocking unit.

[0056] In one embodiment, the oscillation damping unit may include: the body diode of a transistor, please refer to... Figure 10a , Figure 10b , Figure 10c , Figure 10d .

[0057] In one embodiment, the oscillation attenuation unit may include: an oscillation attenuation transistor (MPDRS), please refer to [reference needed]. Figure 11 The source of the MPDRS (Multi-Mesh Damper) oscillation damping transistor is connected to the junction between the low-side second transistor and the low-side reverse current blocking unit, while the drain is connected to the junction between the high-side second transistor and the high-side reverse current blocking unit. The gate of the MPDRS is controlled by gate timing. When the bus is off, the gate is controlled via gate timing, and the short-term conduction of the channel of the MPDRS provides better damping performance.

[0058] In one embodiment, a bus driver control method is provided. When the high-side driving circuit includes a high-side first transistor, a high-side second transistor, and a high-side reverse current blocking unit, and the low-side driving circuit includes a low-side first transistor, a low-side second transistor, and a low-side reverse current blocking unit, the control method includes: when the high-side first transistor and the low-side first transistor are turned off, delaying for a preset time before turning off the high-side second transistor and the low-side second transistor. This embodiment's control method can provide better attenuation functionality.

[0059] In one embodiment, the delay can be achieved by adding delay circuits to the gate control of the high-side second transistor MPDH and the low-side second transistor MNDL. Please refer to [reference needed]. Figure 12 In different embodiments, this can also be achieved through a delay procedure.

[0060] In the description of this specification, the references to terms such as "an embodiment," "an example," "a specific implementation process," and "an example" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0061] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A bus driver structure, characterized in that, include: A high-side drive circuit, wherein the high-side drive circuit is connected between the power supply and the load; The high-side driving circuit includes: a high-side first transistor, a high-side second transistor, and a high-side reverse current blocking unit; The gate of the first high-side transistor and the gate of the second high-side transistor are respectively connected to the high-side gate control unit; The drain of the high-side first transistor is connected to the power supply, and the source of the high-side first transistor is connected to the positive terminal of the high-side reverse current blocking unit; the high-side first transistor is used to control the switching state of the bus driver. The drain of the high-side second transistor is connected to the negative terminal of the high-side reverse current blocking unit, and the source of the high-side second transistor is the high-side signal terminal; the high-side second transistor is used to limit the output current of the high-side signal terminal. The high-side signal terminal is used to directly or indirectly connect to the load; The high-side gate control unit includes: a high-side fifth transistor, wherein the high-side fifth transistor and the high-side second transistor form a high-side current mirror; Also includes: A low-side drive circuit, wherein the low-side drive circuit is connected between the load and ground; The low-side driving circuit includes: a low-side first transistor, a low-side second transistor, and a low-side reverse current blocking unit. The gate of the first low-side transistor and the gate of the second low-side transistor are respectively connected to the low-side gate control unit. The source of the first low-side transistor is grounded, and the drain of the first low-side transistor is connected to the source of the second low-side transistor. The drain of the low-side second transistor is connected to the negative terminal of the low-side reverse current blocking unit, and the positive terminal of the low-side reverse current blocking unit is the low-side signal terminal. The low-side signal terminal is used to directly or indirectly connect to the load; An oscillation attenuation unit is provided, with one end connected to the connection point between the high-side second transistor and the high-side reverse current blocking unit, and the other end connected to the connection point between the low-side second transistor and the low-side reverse current blocking unit.

2. The bus driver structure according to claim 1, characterized in that, The high-side reverse current blocking unit includes: a high-side third transistor; The gate of the high-side third transistor is connected to the source of the high-side third transistor; The connection point between the gate and source of the high-side third transistor is the positive terminal of the high-side reverse current blocking unit, and the drain of the high-side third transistor is the negative terminal of the high-side reverse current blocking unit.

3. The bus driver structure according to claim 1, characterized in that, The high-side reverse current blocking unit includes: a high-side fourth transistor, a high-side Zener diode, and a high-side current-limiting resistor; wherein... The high-side current-limiting resistor is connected between the power supply and the gate of the high-side fourth transistor; The connection point between the gate of the high-side fourth transistor and the high-side current-limiting resistor is also connected to the negative terminal of the high-side Zener diode, and the positive terminal of the high-side Zener diode is connected to the source terminal of the high-side fourth transistor. The connection point between the high-side Zener diode and the high-side fourth transistor is the positive terminal of the high-side reverse current blocking unit, and the drain of the high-side fourth transistor is the negative terminal of the high-side reverse current blocking unit.

4. The bus driver structure according to claim 1, characterized in that, The low-side reverse current blocking unit includes: a low-side third transistor; The gate of the low-side third transistor is connected to the drain of the low-side third transistor. The connection point between the gate and drain of the low-side third transistor is the negative terminal of the low-side reverse current blocking unit, and the source of the low-side third transistor is the positive terminal of the low-side reverse current blocking unit.

5. The bus driver structure according to claim 4, characterized in that, The high-side second transistor and the low-side third transistor are P-type high-voltage transistors; The high-side reverse current blocking unit includes a high-side third transistor, wherein the high-side third transistor and the low-side second transistor are N-type high-voltage transistors.

6. The bus driver structure according to claim 1, characterized in that, The low-side reverse current blocking unit includes: a low-side fourth transistor, a low-side Zener diode, and a low-side current-limiting resistor; wherein... The low-side current-limiting resistor is connected between ground and the gate of the low-side fourth transistor; The connection point between the gate of the low-side fourth transistor and the low-side current-limiting resistor is also connected to the positive terminal of the low-side Zener diode, and the negative terminal of the low-side Zener diode is connected to the drain of the low-side fourth transistor. The connection point between the low-side Zener diode and the low-side fourth transistor is the negative terminal of the low-side reverse current blocking unit, and the source terminal of the low-side fourth transistor is the positive terminal of the low-side reverse current blocking unit.

7. The bus driver structure according to claim 1, characterized in that, The low-side gate control unit includes a low-side fifth transistor, which, together with the low-side second transistor, forms a low-side current mirror.

8. The bus driver structure according to claim 1, characterized in that, The oscillation attenuation unit includes an oscillation attenuation transistor, wherein the gate control of the oscillation attenuation transistor is implemented using gate timing control.

9. A bus driver control method, characterized in that, It is a control method for the bus driver structure as described in claim 1; The control method includes: when the high-side first transistor and the low-side first transistor are turned off, delaying for a preset time before turning off the high-side second transistor and the low-side second transistor.

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