Semiconductor process method and semiconductor device

Abstract

The present invention discloses a semiconductor process method and a semiconductor device. The semiconductor process method comprises: S100, providing a wafer to be etched, wherein the wafer comprises a mask layer, a silicon film layer and a base layer, and a first pattern is etched on the mask layer; S200, introducing a first process gas into a reaction chamber, ionizing the first process gas to form a first plasma, and etching the silicon film layer by using the first plasma, so as to etch a second pattern having the same contour shape as the first pattern and a preset depth on the silicon film layer; S300, introducing a second process gas into the reaction chamber, wherein the second process gas is an inert gas, ionizing the second process gas to form a second plasma, and bombarding the mask layer on the wafer by using the second plasma; S400, introducing a third process gas into the reaction chamber, wherein the third process gas is oxygen, ionizing the third process gas to form a third plasma, and etching the remaining mask layer by using the third plasma.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor chips, and in particular to a semiconductor process method and a semiconductor device. Background Art

[0002] With the development of integrated circuit technology, the process size of basic circuits is developing towards a smaller size. In the process of processing semiconductor devices, defects and impurities in any link will affect the performance of semiconductor devices. Etching is the main process link of semiconductor process methods, and there are strict requirements on the etching morphology and size of wafers. Once etching defects occur, the yield of the wafer will be affected. Therefore, higher technical requirements are put forward for the etching process of wafers. Among them, silicon etching is the most basic etching process in the front-end process. Its etching yield directly affects the performance of semiconductor devices.

[0003] In related technologies, the size of silicon etching can be transferred by a mask layer, that is, after the critical size is formed by photolithography, the size is transferred to the underlying silicon film layer through the mask layer. After the silicon etching is completed, the mask layer above the silicon film layer is removed with oxygen.

[0004] However, during the silicon etching process, some deposition by-products are usually produced. After using oxygen to remove the mask layer, more by-products will adhere to the sidewalls of the deep grooves formed by the silicon film layer, resulting in poor wafer yield and, in turn, poor performance of semiconductor devices. Summary of the invention

[0005] The invention discloses a semiconductor process method and a semiconductor device to solve the problem of poor performance of semiconductor devices.

[0006] In order to solve the above problems, the present invention adopts the following technical solutions:

[0007] A semiconductor process method, comprising:

[0008] S100, providing a wafer to be etched, wherein the wafer comprises a mask layer, a silicon film layer and a base layer, and the mask layer is etched with a first pattern;

[0009] S200, introducing a first process gas into a reaction chamber, ionizing the first process gas to form a first plasma, and etching the silicon film layer using the first plasma to form a second pattern having the same contour shape as the first pattern and a preset depth on the silicon film layer;

[0010] S300, introducing a second process gas into the reaction chamber, wherein the second process gas is an inert gas, ionizing the second process gas to form a second plasma, and bombarding the mask layer on the wafer with the second plasma;

[0011] S400, introducing a third process gas into the reaction chamber, wherein the third process gas is oxygen, ionizing the third process gas to form a third plasma, and utilizing the third plasma to etch the remaining mask layer.

[0012] A semiconductor device is manufactured by adopting the semiconductor process method mentioned above.

[0013] The technical solution adopted by the present invention can achieve the following beneficial effects:

[0014] In the semiconductor process method disclosed in the present invention, after silicon etching is completed, an inert gas is introduced into the reaction chamber, and the plasma after the inert gas is ionized can physically bombard the mask layer. Since the mask layer is relatively soft, the mask layer is easily detached from the silicon film layer under the action of plasma bombardment, and the by-products connected to the mask layer also fall off with the mask layer. Therefore, the by-products attached to the side wall of the second pattern can be effectively removed, thereby improving the yield of the wafer and further improving the performance of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0016] Figure 1 It is a schematic diagram of the structure of the wafer before etching;

[0017] Figure 2 and Figure 3 A schematic diagram of a wafer structure after etching using a process method in related technology;

[0018] Figure 4 and Figure 5 It is a schematic diagram of the structure of a wafer after being etched by the semiconductor process method disclosed in an embodiment of the present invention;

[0019] Figure 6 The present invention is a flowchart of a semiconductor process method disclosed in an embodiment of the present invention.

[0020] Description of reference numerals:

[0021] 110 - photoresist layer, 120 - anti-reflective film layer, 130 - mask layer, 140 - silicon film layer, 150 - base layer, 160 - byproduct, 170 - first pattern, 180 - second pattern. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the specific embodiments of the present invention and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0023] In related technologies, such as Figure 1 As shown, the wafer includes a photoresist layer 110, an anti-reflection film layer 120, a mask layer 130, a silicon film layer 140 and a base layer 150 stacked in sequence, where the base layer 150 can be a silicon dioxide film layer, or a structure composed of a silicon dioxide film layer and other film layers, which is not limited in this article. The photoresist layer 110, the anti-reflection film layer 120 and the mask layer 130 on the wafer are photolithographically formed into a first pattern 170, and then the silicon film layer 140 is etched by silicon etching, and the mask layer 130 transfers the outline size of the first pattern 170 to the silicon film layer 140 below. It should be noted here that the outer contour of the etched pattern on the silicon film layer 140 is the same as the outer contour of the first pattern 170, and the etching is performed to etch the depth of the contour on the silicon film layer 140.

[0024] like Figure 2 and Figure 3 As shown, during the silicon etching process, some deposition byproducts 160 are usually generated. In addition, after the silicon etching is completed, oxygen is introduced into the chamber body to ionize the oxygen, and the plasma after the ionization of the oxygen reacts chemically with the mask layer 130, thereby removing the mask layer 130. However, the oxygen and the byproducts 160 generated during the silicon etching process will produce byproducts 160 with stronger adhesion, and the byproducts 160 will firmly adhere to the sidewalls of the pattern etched by the silicon film layer 140, making it difficult to remove. When such byproducts 160 are generated, they are difficult to remove even if bombarded with argon gas.

[0025] The technical solutions disclosed in various embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.

[0026] Please refer to Figure 4 and Figure 5 The embodiment of the present invention discloses a semiconductor process method, and the disclosed semiconductor process method can etch a wafer during a silicon etching process. The semiconductor process method disclosed in the embodiment of the present invention is as follows Figure 6 As shown, the specific steps include:

[0027] S100 , providing a wafer to be etched, wherein the wafer comprises a mask layer 130 , a silicon film layer 140 and a base layer 150 , and a first pattern 170 is etched on the mask layer 130 .

[0028] A wafer is provided after the mask layer 130 is initially etched. In the subsequent etching, the contour of the pattern etched on the silicon film layer 140 is the same as the contour of the first pattern 170. Therefore, the contour size of the first pattern 170 is transferred to the silicon film layer 140 below.

[0029] S200, introducing a first process gas into the reaction chamber, ionizing the first process gas to form a first plasma, and etching the silicon film layer 140 using the first plasma to form a second graphic 180 having the same contour shape as the first graphic 170 and a preset depth on the silicon film layer 140.

[0030] This step is to etch the silicon film layer 140 of the wafer, and the above-mentioned photoresist layer 110 and anti-reflective film layer 120 will be etched away during the silicon etching process. The preset depth here can be set according to the process requirements, or the preset depth is that the silicon film layer 140 is etched from its upper surface to the lower surface, that is, the silicon film layer is etched through and etched to the upper surface of the base layer, which can be understood here as the upper surface of the silicon dioxide film layer.

[0031] The first process gas may be a mixed gas of one or more of carbon tetrafluoride, sulfur hexafluoride, difluoromethane, hydrogen bromide, argon and oxygen.

[0032] In this step, it is necessary to turn on the upper RF electrode and the lower RF electrode. The upper RF electrode is used to ionize the first process gas, and the lower RF electrode can apply an electric field to the ionized first process gas, so that the ionized first process gas etches the wafer. In other words, the lower RF electrode provides the etching direction and a certain force for the plasma. The above steps etch the silicon film layer 140. Byproducts 160 are generated during the etching process, and the byproducts 160 adhere to the side walls of the mask layer 130, especially to the junction of the mask layer 130 and the silicon film layer 140.

[0033] S300 , introducing a second process gas into the reaction chamber, where the second process gas is an inert gas, ionizing the second process gas to form a second plasma, and using the second plasma to bombard the mask layer 130 on the wafer.

[0034] At this time, the electric field applied by the upper RF electrode is used to ionize the second process gas, and the lower RF electrode applies a downward electric field to the ionized plasma, so that the second plasma bombards the mask layer 130 downward. At this time, the second plasma physically bombards the mask layer 130. Since the mask layer 130 is relatively soft, the mask layer 130 is easily detached from the silicon film layer 140 under the action of plasma bombardment, and the byproduct 160 connected to the mask layer 130 also detaches with the mask layer 130.

[0035] S400 , introducing a third process gas into the reaction chamber, wherein the third process gas is oxygen, ionizing the third process gas to form a third plasma, and utilizing the third plasma to etch the remaining mask layer 130 .

[0036] The mask layer 130 can react with the ionized oxygen ions. At this time, a chemical reaction occurs between the oxygen and the mask layer, so the oxygen can etch away the mask layer 130 on the wafer.

[0037] In the embodiment disclosed in the present application, since the mask layer 130 is relatively soft, the mask layer 130 is easily detached from the silicon film layer 140 under the action of plasma bombardment, and at the same time, the by-product 160 connected to the mask layer 130 also detaches along with the mask layer 130, so that the by-product 160 attached to the side wall of the second pattern 180 can be effectively removed, thereby improving the yield of the wafer and further improving the performance of the semiconductor device.

[0038] In addition, compared with the related art, before using oxygen to remove the mask layer 130, the present application first uses ionized inert gas to bombard the mask layer 130, so that the byproducts 160 connected to the mask layer 130 fall off together with the mask layer 130. Part of the byproducts 160 can be removed. At the same time, part of the byproducts 160 attached to the mask layer 130 falls off together with the mask layer 130. Therefore, when oxygen is used to remove the mask layer 130, it is not easy to produce byproducts 160 that are difficult to remove on the sidewalls of the second pattern 180 of the silicon film layer 140, thereby further improving the yield rate of the wafer.

[0039] In another optional embodiment, the power of the lower RF electrode in step S200 may be a first power; the power of the lower RF electrode in step S300 may be a second power, and the second power may be less than the first power. In this scheme, the first plasma in step S200 mainly acts on the silicon film layer 140, so the power of the lower RF electrode needs to be set larger, so that the first plasma has a stronger bombardment intensity. The second plasma in step S300 only needs to bombard the mask layer 130, so the power of the lower RF electrode needs to be set smaller. Therefore, the second power is less than the first power, which can ensure that the second plasma is not easy to bombard the silicon film layer 140, so it is not easy to destroy the etching morphology of the silicon film layer 140, thereby further improving the yield rate of the wafer.

[0040] In another optional embodiment, the second power may be 30 W-50 W. The power of the lower RF electrode in step S200 is between 30 W and 50 W, which can ensure the intensity of the downward bombardment and make the bombardment range of the second plasma just act on the mask layer 130 and the byproduct 160, so it is not easy to bombard the silicon film layer 140, thereby preventing the etching morphology of the silicon film layer 140 from being damaged, thereby further improving the yield rate of the wafer.

[0041] In the above embodiment, if the pressure of the reaction chamber is too low, the bombardment intensity of the inert gas downwards is likely to be poor. If the pressure of the reaction chamber is too high, the lateral bombardment capability of the inert gas will be increased, and the lateral bombardment of the inert gas will cause lateral etching of the silicon film layer 140, which will affect the etching morphology of the silicon film layer 140.

[0042] Based on this, in another optional embodiment, in step S300, the pressure of the reaction chamber may be 10mT-30mT. When the pressure of the reaction chamber is within this range, it can not only ensure the downward bombardment intensity of the inert gas, but also avoid the lateral bombardment of the inert gas, thereby avoiding the lateral etching of the silicon film layer 140, so as not to easily affect the etching morphology of the silicon film layer 140, thereby further improving the yield rate of the wafer.

[0043] In another optional embodiment, in step S300, the power of the upper RF electrode may be 800W-1000W, the flow rate of the second process gas may be 200sccm-300sccm, and the first preset process time may be 15s-30s. The first preset process time is the etching process time of step S300.

[0044] In this solution, the upper RF electrode maintains a relatively high power, so that the ionization degree of the inert gas is relatively high, the concentration of the plasma is relatively high, and the inert gas has a relatively high bombardment intensity. In addition, the flow rate of the inert gas is controlled within a relatively preferred range, thereby ensuring the yield rate of the wafer. The first preset process time within this range can not only meet the etching requirements of the wafer, but also is not likely to affect the total etching time.

[0045] Furthermore, the second process gas may be argon gas. The ionized argon gas has good bombardment performance, thus improving the bombardment performance on the mask layer 130 and the byproduct 160 , thereby further improving the removal effect of the byproduct 160 on the side wall of the second pattern 180 .

[0046] In another optional embodiment, the first process gas may include a first etching gas and a second etching gas, the first etching gas may include carbon tetrafluoride, sulfur hexafluoride and difluoromethane, and the second etching gas may include hydrogen bromide, argon and oxygen.

[0047] Step S200 may include:

[0048] S210, introducing a first etching gas into the reaction chamber, ionizing the first etching gas, and etching the silicon film layer 140 for a second preset process time using a first plasma formed by the ionized first etching gas to form a second pattern 180 of a first depth on the silicon film layer 140.

[0049] The etching gas in this step is mainly fluorine-containing gas, so the overall etching rate is faster, thereby increasing the process rate.

[0050] S220, introducing a second etching gas into the reaction chamber, ionizing the second etching gas, and etching the silicon film layer 140 for a third preset process time by forming a first plasma from the ionized second etching gas, so as to etch the second pattern 180 of the first depth to a preset depth.

[0051] This step is used to etch the remaining small amount of silicon. If the etching volume is still fluorine-containing gas, it is easy to etch the base layer 150 under the silicon film layer 140, that is, it is easy to etch the silicon dioxide film layer under the silicon film layer 140. Therefore, this step needs to use a high selectivity ratio gas for etching to prevent the base layer 150 from being etched.

[0052] This solution can not only ensure the overall etching rate of the silicon film layer 140 , but also prevent the base layer 150 from being damaged, thereby further improving the yield rate of the wafer.

[0053] In the above embodiment, although argon gas is used in both step S220 and step S300, the functions of argon gas in step S220 and step S300 are different. In step S220, argon gas, under the condition of a larger power of the lower RF electrode, mainly etches the silicon film layer 140 downward by physical bombardment, ensuring that the sidewall of the etched silicon film layer 140 is relatively straight. In step S300, argon gas needs to bombard the mask layer 130, so in order to ensure the bombardment range of argon gas, the power of the lower RF electrode needs to be controlled within an appropriate range.

[0054] Further, in step S210, the pressure of the reaction chamber may be 5mT-8mT, the power of the upper RF electrode may be 500W-600W, and the power of the lower RF electrode may be 300W-500W. At this time, the pressure of the reaction chamber, the power of the upper RF electrode and the lower RF electrode are all in a more preferred range, so that the reaction chamber can operate stably and the wafer yield is high.

[0055] In the above embodiment, the flow rate of the first etching gas has a great influence on the yield rate of the wafer. Therefore, in another optional embodiment, the flow rate of carbon tetrafluoride can be 100sccm-300sccm, the flow rate of sulfur hexafluoride can be 10sccm-30sccm, and the flow rate of difluoromethane can be 0-20sccm. At this time, the flow rate of the first etching gas is controlled within a more preferred range, so as to improve the yield rate of the wafer.

[0056] Furthermore, the second preset process time may be 35s-45s. The second preset process time within this range can satisfy the etching requirements of the wafer and is not likely to affect the total etching time.

[0057] In another optional embodiment, in step S220, the pressure of the reaction chamber may be 30mT-50mT, the power of the upper RF electrode may be 400W-500W, and the power of the lower RF electrode may be 100W-200W.

[0058] In this solution, the power of the lower RF electrode is relatively large, so that the ionized second etching gas can bombard the silicon film layer 140, ensuring the bombardment range of the ionized second etching gas. In addition, the pressure of the reaction chamber is relatively large, so that the argon gas in the second etching gas can perform side etching on the silicon film layer 140, thereby helping the silicon film layer 140 to form a straighter side wall, which is beneficial to improving the etching morphology of the silicon film layer 140.

[0059] Furthermore, the flow rate of hydrogen bromide is 180 sccm-250 sccm, the flow rate of argon is 100 sccm-200 sccm, and the flow rate of oxygen is 5 scmm-20 scmm. At this time, the flow rate of the second etching gas is controlled within a more preferred range, thereby improving the yield rate of the wafer.

[0060] Furthermore, the third preset process time may be 20s-40s. The third preset process time within this range can meet the etching requirements of the wafer and is not likely to affect the total etching time.

[0061] In order to improve the etching morphology of the silicon film layer 140 , in another optional embodiment, the first etching gas may further include oxygen and nitrogen. Nitrogen and oxygen can increase the selectivity of the first etching gas, thereby facilitating the improvement of the etching morphology of the silicon film layer 140 .

[0062] In another optional embodiment, the flow rate of oxygen in the first etching gas is 5 sccm-10 sccm, and the flow rate of nitrogen is 10 sccm-40 sccm. At this time, the flow rates of nitrogen and oxygen in the first etching gas are controlled within a preferred range, so as to further improve the etching morphology of the silicon film layer 140.

[0063] In another optional embodiment, in step S400, the pressure of the reaction chamber can be 5mT-10mT, the power of the upper RF electrode can be 1000W-1200W, the power of the lower RF electrode can be 0-100W, the flow rate of the third process gas can be 150sccm-200sccm, and the fourth preset process time is 30s-50s. Each process parameter in this solution is controlled within a preferred range, thereby ensuring the yield rate of the wafer 200.

[0064] In another optional embodiment, the temperature of the electrostatic chuck can be 45°C-65°C, the electrostatic adsorption voltage is 2200V-2600V, and the helium pressure on the back of the wafer is 6T-10T. The electrostatic chuck is used to carry and adsorb the wafer. The process parameters of the semiconductor process method in this solution are controlled within a more preferred range, thereby further improving the yield rate of the wafer 200.

[0065] Based on the semiconductor process method of any of the above embodiments of the present application, the embodiments of the present application further disclose a semiconductor device, and the disclosed semiconductor device is manufactured using the semiconductor process method of any of the above embodiments.

[0066] The semiconductor process method mentioned above can be used to manufacture logic devices. Specifically, the silicon etching process in the logic device can adopt the semiconductor process method mentioned above.

[0067] The above embodiments of the present invention focus on the differences between the various embodiments. As long as the different optimization features between the various embodiments are not contradictory, they can be combined to form a better embodiment. Considering the simplicity of the text, they will not be repeated here.

[0068] The above description is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A semiconductor process method, It is characterized in that include: S100, providing a wafer to be etched, the wafer comprising a mask layer (130), a silicon film layer (140) and a base layer (150), the mask layer (130) being etched with a first pattern (170); S200, introducing a first process gas into a reaction chamber, ionizing the first process gas to form a first plasma, and etching the silicon film layer (140) using the first plasma to form a second pattern (180) having the same contour shape as the first pattern (170) and a preset depth on the silicon film layer (140); S300, introducing a second process gas into the reaction chamber, wherein the second process gas is an inert gas, ionizing the second process gas to form a second plasma, and bombarding the mask layer (130) on the wafer with the second plasma; S400, introducing a third process gas into the reaction chamber, wherein the third process gas is oxygen, ionizing the third process gas to form a third plasma, and utilizing the third plasma to etch the remaining mask layer (130).

2. The semiconductor process method according to claim 1, It is characterized in that The power of the lower RF electrode in step S200 is a first power; the power of the lower RF electrode in step S300 is a second power, and the second power is less than the first power.

3. The semiconductor process method according to claim 2, It is characterized in that The second power is 30W-50W.

4. The semiconductor process method according to claim 3, It is characterized in that In step S300, the pressure of the reaction chamber is 10mT-30mT.

5. The semiconductor process method according to claim 4, It is characterized in that In step S300, the power of the upper RF electrode is 800W-1000W, and the flow rate of the second process gas is 200sccm-300sccm; the step S300 is processed for a first preset process time, and the first preset time is 15s-30s.

6. The semiconductor process method according to claim 1, It is characterized in that The second process gas is argon.

7. The semiconductor process method according to claim 1, It is characterized in that The first process gas includes a first etching gas and a second etching gas, the first etching gas includes carbon tetrafluoride, sulfur hexafluoride and difluoromethane, and the second etching gas includes hydrogen bromide, argon and oxygen; Step S200 includes: S210, introducing a first etching gas into the reaction chamber, ionizing the first etching gas, and etching the silicon film layer (140) for a second preset process time using plasma formed by the ionized first etching gas, so as to form the second pattern (180) at a first depth on the silicon film layer (140); S220, introducing a second etching gas into the reaction chamber, ionizing the second etching gas, and etching the silicon film layer (140) for a third preset process time using plasma formed by the ionized second etching gas to etch the second graphic (180) at the first depth to the preset depth.

8. The semiconductor process method according to claim 7, It is characterized in that In step S210, the pressure of the reaction chamber is 5mT-8mT, the power of the upper RF electrode is 500W-600W, the power of the lower RF electrode is 300W-500W, the flow rate of carbon tetrafluoride is 100sccm-300sccm, the flow rate of sulfur hexafluoride is 10sccm-30sccm, the flow rate of difluoromethane is 0-20sccm, and the second preset process time is 35-45s.

9. The semiconductor process method according to claim 7, It is characterized in that In step S220, the pressure of the reaction chamber is 30mT-50mT, the power of the upper RF electrode is 400W-500W, the power of the lower RF electrode is 100W-200W, the flow rate of hydrogen bromide is 180sccm-250sccm, the flow rate of argon is 100sccm-200sccm, the flow rate of oxygen is 5scmm-20scmm, and the third preset process time is 20s-40s.

10. The semiconductor process method according to claim 7, It is characterized in that The first etching gas also includes oxygen and nitrogen, the flow rate of the oxygen is 5 sccm-10 sccm, and the flow rate of the nitrogen is 10 sccm-40 sccm.

11. The semiconductor process method according to claim 1, It is characterized in that In step S400, the pressure of the reaction chamber is 5mT-10mT, the power of the upper RF electrode is 1000W-1200W, the power of the lower RF electrode is 0-100W, and the flow rate of the third process gas is 150sccm-200sccm; the step S400 is processed for the fourth preset process time, and the fourth preset time is 30s-50s.

12. A semiconductor device, It is characterized in that The semiconductor device is manufactured using the semiconductor process method described in any one of claims 1 to 11.

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