A signal digitization method and apparatus based on ADC circuit
By employing multiple ADC conversions and adjusting the least significant bit, the problem of increased chip area requirements for high-precision ADCs was solved, achieving improved ADC accuracy without increasing area and adapting to the needs of different application scenarios.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-16
- Publication Date
- 2026-03-06
AI Technical Summary
In chips, as integration increases, the number of bits in a high-precision ADC increases, leading to increased area requirements and making it difficult to achieve high-precision analog signal digitization without increasing area.
The accuracy of an ADC is improved by performing multiple ADC conversions and adjusting the least significant bit. The specific steps include inputting the analog signal into the ADC circuit for the first conversion, adjusting the least significant bit according to the output value, performing multiple conversions until the accuracy meets the requirements, and then averaging the output values.
Without increasing the ADC circuit area, the accuracy of small-signal ADCs is improved, adapting to the needs of different application scenarios, and achieving high bit-level performance through multiple conversions and least significant bit adjustment.
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Figure CN114944843B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a signal digitization method and apparatus based on an ADC circuit, belonging to the field of analog circuit technology. Background Technology
[0002] During chip usage, it is typically necessary to monitor and report internal analog signals. Generally, this is done by directly outputting the internal signals to the outside of the chip for detection by external circuitry or instruments. However, with increasing integration, more and more systems are looking to use the chip's internal ADC to digitize analog signals and then report them via SPI / I2C.
[0003] like Figure 2 As shown, in the existing technical solution, an n+1 bit ADC obtains n+1 bits of data. As the chip area decreases, if a high-precision ADC is required, such as when a signal with a large dynamic range needs to be reported, a higher bit ADC is required. The problem is that for every bit increase in the ADC, the ADC area also needs to be increased by about double. Summary of the Invention
[0004] The purpose of this invention is to provide a signal digitization method and apparatus based on an ADC circuit, which can improve the accuracy of a small-signal ADC without increasing the ADC circuit area.
[0005] To achieve the above objectives, the present invention provides the following technical solution:
[0006] A signal digitization method based on an ADC circuit, the signal digitization method comprising the following steps:
[0007] S1: Input the analog signal to be converted into the ADC circuit. After one conversion by the ADC circuit, output the first ADC output value M. i i = 1;
[0008] S2, based on the output value M i The value of the high output bit adjusts the least significant bit of the ADC circuit. When the output value M... i The higher-order output bits are all 0, thus lowering the least significant bit of the ADC circuit; the analog signal to be converted is then input back into the ADC circuit, and the (i+1)th ADC output value M is output. i+1 ;
[0009] S3, for the output value M i+1 The accuracy of the value and the output value M i The value of the high output bit is used to determine if the precision of the value meets the output requirements or if the output value M... iIf the value of the highest output bit is 1, go to step S4; otherwise, let i = i + 1 and return to step S2;
[0010] S4. Combine all ADC output values to output the final signal conversion result and the adjusted least significant bit.
[0011] Furthermore, in step S2, according to the output value M i The process of adjusting the least significant bit of the ADC circuit according to the value of the high output bit includes the following steps:
[0012] S21. Let the ADC circuit include n + 1 bit positions. After the analog signal is processed by the ADC circuit once, output the first ADC output value M i ; The output value M i Includes n + 1 output bits from high to low, which are defined as D i,n , D i,n-1 , …, D i,1 , D i,0 ;
[0013] S22. Analyze the values of the output bits of the output value M i . If the values of D i,n , D i,n-1 , …, D i,x are all 0, then let the least significant bit of the ADC circuit be reduced from LSB i to LSB i+1 = LSB i / y, 0 < y ≤ (n + 1) / (x + 1), where x is a positive integer greater than 0 and less than n.
[0014] Furthermore, when the x uses a fixed value specified externally, it is judged whether to adjust the least significant bit of the ADC circuit by judging whether the sum of the high n - x output bits of the output value M i is 1, and only output the final signal conversion result.
[0015] Furthermore, the signal digitization method includes the following steps:
[0016] For the relevant characteristics of different application scenarios, set the corresponding maximum conversion time; according to the maximum conversion time, calculate the maximum number of ADC conversions i max , i ≤ i max ; The relevant characteristics include the signal amplitude change value, the signal output accuracy requirement, and the real - time requirement.
[0017] Furthermore, in step S4, combine all ADC output values and obtain the final signal conversion result by weighted averaging.
[0018] This invention also mentions a signal digitization device based on an ADC circuit, the signal digitization device comprising:
[0019] The conversion control module has its output terminal connected to the input terminal of the ADC circuit, and its input terminal connected to the output terminal of the ADC circuit. The conversion control module is used to input the analog signal to be converted into the ADC circuit, and to judge the accuracy of the output value of the ADC circuit to determine whether to input the analog signal into the ADC circuit again to perform the next conversion.
[0020] An ADC circuit, comprising n+1 bits, is used to convert the analog signal input to the conversion control module into a corresponding digital signal.
[0021] The least significant bit adjustment module has its input connected to the output of the ADC circuit and its output connected to the control terminal of the ADC circuit. The least significant bit adjustment module is used to adjust the least significant bit of the ADC circuit according to the value of the higher output bits of the ADC circuit output value. Specifically, when the values of the higher output bits of the output value are all 0, the least significant bit of the ADC circuit is adjusted down.
[0022] The output value statistics module is connected to the input terminal of the ADC circuit and is used to store all output values of the ADC circuit corresponding to the analog signal.
[0023] The output module is used to retrieve all output values stored in the output value statistics module, and output the final signal conversion result and the adjusted least significant bit.
[0024] The beneficial effects of this invention are as follows:
[0025] First, the signal digitization method based on ADC circuit of the present invention improves the ADC accuracy of small signals by using two or more ADCs; specifically, by using two or more ADCs, a low-bit ADC can achieve the effect of a high-bit ADC; thus reducing the area requirements of the chip.
[0026] Secondly, in the signal digitization method based on ADC circuit of the present invention, the adjustment range of ADC times and least significant bit can be specified, or it can be adaptively adjusted according to the input analog signal, so that the signal digitization method of the present invention can adapt to the needs of different application scenarios.
[0027] Third, the signal digitization method based on ADC circuit of the present invention improves the accuracy of the output value by weighted averaging of multiple ADC output values.
[0028] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings. Attached Figure Description
[0029] Figure 1 This is a flowchart of a signal digitization method based on an ADC circuit according to an embodiment of the present invention.
[0030] Figure 2 This is a schematic diagram of the output principle of an existing ADC circuit.
[0031] Figure 3 This is a schematic diagram illustrating the principle of two-stage signal digitization in an embodiment of the present invention.
[0032] Figure 4 This is a schematic diagram illustrating the accuracy improvement principle of the signal digitization method based on ADC circuit according to an embodiment of the present invention.
[0033] Figure 4 (a) is a schematic diagram illustrating the principle of achieving higher ADC accuracy for small signals using an n+1 bit ADC. Figure 4 (b) is a schematic diagram of an 8-bit ADC achieving higher ADC accuracy (9 bits) for small signals when n=7 and x=3. Detailed Implementation
[0034] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0035] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0036] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0037] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.
[0038] Figure 1 This is a flowchart of a signal digitization method based on an ADC circuit according to an embodiment of the present invention. See also... Figure 1 The signal digitization method includes the following steps:
[0039] S1: Input the analog signal to be converted into the ADC circuit. After one conversion by the ADC circuit, output the first ADC output value M. i i = 1.
[0040] S2, based on the output value M i The value of the high output bit adjusts the least significant bit of the ADC circuit. When the output value M... i The higher-order output bits are all 0, thus lowering the least significant bit of the ADC circuit; the analog signal to be converted is then input back into the ADC circuit, and the (i+1)th ADC output value M is output. i+1 .
[0041] S3, for the output value M i+1 The accuracy of the value and the output value M i The value of the high output bit is used to determine if the precision of the value meets the output requirements or if the output value M... i If the highest output bit is 1, proceed to step S4; otherwise, let i = i + 1 and return to step S2.
[0042] S4 combines all ADC output values to output the final signal conversion result and the adjusted least significant bit.
[0043] In this embodiment, the ADC circuit can be either an internal ADC circuit or an external ADC circuit. For example... Figure 4 As shown in (a), the LSB (least significant bit) of the ADC is controlled by the higher bits (Dn to Dx) of the ADC output. When any one of (Dn to Dx) is high, the LSB of the ADC remains unchanged; when all (Dn to Dx) are low, the LSB becomes LSB / Y, that is, the LSB is reduced, and the accuracy of the ADC is improved.
[0044] Based on this characteristic, in step S2, according to the output value M i The process of adjusting the value of the least significant bit of the ADC circuit by adjusting the value of the high output bit includes the following steps:
[0045] S21, let the ADC circuit include n+1 bits. After the analog signal is converted and processed once by the ADC circuit, the first ADC output value M is output. i Output value Mi including n + 1 output bits from high to low, which are sequentially defined as D i,n , D i,n-1 , …, D i,1 , D i,0 .
[0046] S22 analyzes the values of the output bits of the output value M i . If the values of D i,n , D i,n-1 , …, D i,x are all 0, then the least significant bit of the ADC circuit is changed from LSB i to LSB i+1 = LSB i / y, where 0 < y ≤ (n + 1) / (x + 1) and x is a positive integer greater than 0 and less than n
[0047] As shown in Figure 3 , after the first ADC, the output value of the ADC is M and the ADC accuracy is n + 1 bits; if one of the first few bits (Dn to Dx) of M is high, the LSB of the ADC remains unchanged and the second ADC conversion is continued. The data output by the second ADC is still M and the ADC accuracy is still n + 1 bits. If all of the first few bits (Dn to Dx) of the output value M of the first ADC are zero, then the LSB of the ADC is reduced to LSB / Y and the second ADC conversion is performed. The output value of the second ADC conversion is N (the value of N is closer to the true value of the ADC input, approximately equal to M / Y, but the accuracy is higher than M). Therefore, after two ADCs, especially when (Dn to Dx) are all zero, because the LSB of the ADC is reduced, the ADC accuracy for small signals is improved
[0048] There are various schemes for changing the LSB of the ADC. Since the LSB can be current, voltage, resistance, etc. For example, if the quantization comparator of the ADC is a voltage comparator, the LSB of the ADC is the product of current and resistance: I LSB *R, or I * RLSB. If we reduce this current I LSB by y times, or reduce the resistance R LSB by y times, the LSB / y of the ADC is achieved
[0049] Preferably, y is a positive integer for convenient subsequent data processing. Taking n = 7, that is, an 8-bit ADC as an example, assuming x = 3, LSB i+1 = LSB i / y; y <= (n+1) / (x+1), y can take the value 2; similarly, assuming x = 1, y can take the values 4, 3, 2. Assuming x = 0, y can take the values 8, 7, 6, 5, 4, 3, 2. y does not necessarily have to be 1; if y is 1, the LSB remains unchanged.
[0050] In this embodiment, the value of x can be either specified as a fixed value by an external circuit, or it can adaptively change according to the amplitude of the input signal. The choice between these methods depends on the specific application scenario. For example, in one application scenario where the signal amplitude variation is small or the accuracy requirement for small signals is high, a fixed value can be specified, and two or more ADC operations can be performed. Conversely, in another application scenario where the signal amplitude variation is large and the accuracy requirement for small signals is high, the value of x can be adaptively adjusted according to the signal amplitude. Figure 4 As shown in b, taking n=7 and x=3 as an example, since the LSB is reduced, it is equivalent to achieving the precision of a 9-bit ADC with an 8-bit ADC.
[0051] Similarly, for small signals, since the more conversions there are, the higher the accuracy of the output value, the number of conversions can be adaptively adjusted according to the characteristics of the aforementioned application scenarios. By analyzing the high-order bits of the output value after each conversion, it can be determined whether the ADC operation needs to be performed again.
[0052] Since performing multiple ADC operations requires more time, real-time signal output requirements must be considered in certain scenarios. In this case, a corresponding maximum conversion time can be set for different application scenarios; based on the maximum conversion time, the maximum number of ADC conversions, i, can be calculated. max , i≤i max This ensures that the final number of transformations does not exceed the maximum number i. max .
[0053] Preferably, when x adopts an externally specified fixed value, the output value M is determined by... i The sum of the high nx output bits is used to determine whether to adjust the least significant bit of the ADC circuit and only output the final signal conversion result.
[0054] In step S4, the final signal conversion result is obtained by combining all ADC output values and calculating a weighted average. For large signals where the LSB cannot be reduced, the accuracy of the output signal can still be improved through two conversions. For small signals where the LSB can be reduced, the average can be calculated directly. Since the output value after LSB adjustment has higher accuracy, a weighted average can also be calculated, with the weight value continuously increasing according to the number of conversions.
[0055] Regarding the aforementioned signal digitization method, this embodiment also mentions a signal digitization device based on an ADC circuit, which includes a conversion control module, an ADC circuit, a least significant bit adjustment module, an output value statistics module, and an output module.
[0056] The conversion control module has its output terminal connected to the input terminal of the ADC circuit, and its input terminal connected to the output terminal of the ADC circuit. The conversion control module is used to input the analog signal to be converted into the ADC circuit, and to judge the accuracy of the output value of the ADC circuit to determine whether to input the analog signal into the ADC circuit again to perform the next conversion.
[0057] An ADC circuit, consisting of n bits, is used to convert analog signals input from the conversion control module into corresponding digital signals.
[0058] The least significant bit adjustment module has its input connected to the output of the ADC circuit and its output connected to the control terminal of the ADC circuit. The least significant bit adjustment module is used to adjust the least significant bit of the ADC circuit according to the value of the higher output bits of the ADC circuit output value. Specifically, when the values of the higher output bits of the output value are all 0, the least significant bit of the ADC circuit is adjusted down.
[0059] The output value statistics module is connected to the input terminal of the ADC circuit and is used to store all output values of the ADC circuit corresponding to the analog signal.
[0060] The output module is used to retrieve all output values stored in the output value statistics module, and output the final signal conversion result and the adjusted least significant bit.
[0061] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0062] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.
Claims
1. A method of signal digitization based on an ADC circuit, characterized in that, The signal digitization method comprises the following steps: S1, input the analog signal to be converted to the ADC circuit, after the first conversion processing by the ADC circuit, output the first ADC output value M i ; i = 1; S2, according to the output value M i of the high output bits of the ADC circuit, the least significant bit is adjusted; when the output value M i of the high several bits of the ADC circuit is 0, the least significant bit is adjusted; the analog signal to be converted is input to the ADC circuit again, and the i+1th ADC output value M i+1 is output. S3, judging the value precision of the output value M i+1 and the value of the highest output bit of the output value M i If the value precision meets the output requirement or the value of the highest output bit of the output value M i is 1, go to step S4, otherwise, let i=i+1, return to step S2; S4, combining all the ADC output values, outputting the final signal conversion result and the adjusted least significant bit.
2. The method of signal digitization based on an ADC circuit according to claim 1, characterized in that, In step S2, the value of the most significant bit of the output value M i is adjusted according to the value of the most significant bit of the output value M i . The process of adjusting the least significant bit of the ADC circuit according to the value of the most significant bit of the output value M i includes the following steps: S21, let the ADC circuit include n+1 bits, after the analog signal is converted by the ADC circuit once, output the first ADC output value M i ; the output value M i includes n+1 output bits from high to low, which are defined as D i,n , D i,n-1 ,..., D i,1 , D i,0 ; S22, analyzing the value of the output bit of the output value M i If the value of D i,n , D i,n-1 ,..., D i,x are all 0, the least significant bit of the ADC circuit is reduced from LSB i to LSB i+1 = LSB i / y, 0 < y < = (n+1) / (x+1), x is a positive integer greater than 0 and less than n.
3. The method of signal digitization based on an ADC circuit according to claim 2, characterized in that, When the x takes a fixed value externally designated, whether to adjust the least significant bit of the ADC circuit is judged by judging whether the sum of the high n-x output bits of the output value M i is 1, and only the final signal conversion result is output.
4. The ADC circuit-based signal digitization method of claim 1, wherein, The signal digitization method comprises the following steps: The maximum conversion time is set according to the related characteristics of different application scenarios; and the maximum conversion times i of the ADC are calculated according to the maximum conversion time max , i≤i max ; the related characteristics include a signal amplitude change value, a signal output precision requirement and a real-time requirement.
5. The ADC circuit-based signal digitization method of claim 1, wherein, In step S4, the final signal conversion result is obtained by weighted averaging all the ADC output values.
6. An ADC circuit-based signal digitizing device, characterized by, The signal digitization device comprises: a conversion control module, an input end of which is connected with an output end of the ADC circuit, and an output end of which is connected with an input end of the ADC circuit, the conversion control module being used for inputting the analog signal to be converted into the ADC circuit, and judging the value precision of the output value of the ADC circuit to determine whether the analog signal is inputted into the ADC circuit again to perform the next conversion; the ADC circuit, comprising n+1 bit, being used for converting the analog signal inputted by the conversion control module into the corresponding digital signal; a least significant bit adjustment module, an input end of which is connected with an output end of the ADC circuit, and an output end of which is connected with a control end of the ADC circuit, the least significant bit adjustment module being used for adjusting the least significant bit of the ADC circuit according to the value of the high output bit of the output value of the ADC circuit; wherein when the values of the high several output bits of the output value are all 0, the least significant bit of the ADC circuit is adjusted to be lower; an output value statistical module, being connected with the input end of the ADC circuit, and being used for storing all the output values corresponding to the analog signal outputted by the ADC circuit; an output module, being used for calling all the output values stored in the output value statistical module, and outputting the final signal conversion result and the adjusted least significant bit.
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