Method and circuit device for detecting electric arc and photovoltaic inverter having the circuit device
By using the switching unit in the DC circuit to cyclically interrupt the power flow and detect the arc using the time window difference, the problem of difficulty in efficiently detecting the arc in the DC circuit in the existing technology is solved, and the effective extinguishing and risk reduction of series arcs is achieved .
Patent Information
- Application Number
- CN202180009593.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-01-15
- Filing Date
- 2021-01-15
- Publication Date
- 2025-02-11
- Estimated Expiration
- 2041-01-15
Smart Images

Figure CN114945832B_ABST
Abstract
Description
[0001] Technical field of the invention
[0002] The invention relates to a method and a circuit arrangement for detecting an electric arc, and a photovoltaic (PV) inverter having such a circuit arrangement. Prior art
[0003] Electric arcs can cause non-negligible damage in electrical systems, which can, for example, lead to fires in the electrical system and in the building in which it is located. Injuries to people can also occur. Identifying electric arcs in electrical systems is therefore an important requirement. This is especially true when the electrical system has direct current (DC) circuits, because in DC circuits, unlike alternating current (AC) circuits, there are usually no voltage zero crossings that could extinguish (or at least facilitate extinguishing) a burning arc.
[0004] Two different types of arcs are usually distinguished. A series arc occurs when there is a contact fault, for example when a cable or plug is loose but the contacts are very close together, so that there is a local high electric field strength in the gap between the contacts. An example of a series arc is also a switching arc that occurs between the contacts of a relay during a switching process. Parallel arcs are less common and occur, for example, when the positive and negative wires of an electrical system are close to each other and their insulation is damaged. Here, there may also be local high field strengths between the damaged conductors. The power losses converted in a series arc are usually significantly smaller than those converted in a parallel arc. Therefore, a series arc between a power source and a load supplied by this power source causes a relatively small change in the transmitted power. In contrast, a parallel arc can lead to a large change in the electrical power provided by the power source and ultimately consumed by the load.
[0005] Conventional methods for detecting electric arcs use the noise spectrum that is usually emitted by the electric arc. Here, when there is an electric arc in the electrical system, a high-frequency interference voltage or a high-frequency interference current is superimposed on the useful voltage or the useful current. The high-frequency interference voltage and / or the high-frequency interference current can be electrically filtered and detected on an electrical conductor that simultaneously carries the useful current or the useful voltage. When a certain interference voltage and / or a certain interference current is exceeded, a signal about the electric arc is emitted. This method is described, for example, in WO 2012 / 116 722 A1. In order to increase the sensitivity of the detection, multiple different frequencies within the emitted noise spectrum can also be detected simultaneously.
[0006] Another known method for detecting an electric arc is to use the sudden changes in voltage and / or current that accompany the formation of an electric arc. In this case, the current and / or voltage are usually monitored with a high time resolution in order to detect the sudden changes. In this method, it is also possible to check, if necessary, to what extent the observed changes in current and / or voltage differ from normal fluctuations in the power consumption of the electrical load. If the observed changes in current and / or voltage differ significantly from normal consumption fluctuations of the system, a signal about an electric arc is emitted. This method is disclosed, for example, in document WO 2011 / 017721 A1.
[0007] Finally, document WO 2013 / 171329 A1 discloses a method for arc detection which combines the detection of noise signals with the detection of sudden changes in the current. In this case, the temporal occurrence of the detected noise signal and the temporal occurrence of the detected current change can each be provided with a time stamp. By comparing the two time stamps, an additional plausibility test for the presence of an arc can be determined.
[0008] All methods generally use relatively complex and therefore expensive measuring systems, which become increasingly complex the more reliably a possible arc is detected or the more reliably false signals of an arc and associated downtime of the electrical system are avoided.
[0009] From document DE 102 25 259 B3 an electrical plug connector is known which has a main contact which leads during the unplugging process and an auxiliary contact which lags in parallel with it. When unplugging the plug connector, the main contact inevitably separates first from its mating connector and then the auxiliary contact only lastly from its mating connector. In order to avoid arcs associated with the unplugging process, a semiconductor switch which is connected in series with the auxiliary contact is periodically switched on and off between the contact separations of the main contact and the auxiliary contact.
[0010] Invention Task
[0011] The object of the present invention is to provide a method for detecting arcs, in particular series arcs, in DC circuits, which method can be implemented relatively cost-effectively. In particular, complex detection systems should be avoided as much as possible, and relatively simple and cost-effective measuring techniques should be used. Furthermore, the object of the present invention is to provide a circuit arrangement suitable for implementing the method and a photovoltaic (PV) inverter having such a circuit arrangement.
[0012] Description of the invention
[0013] The method according to the invention is intended to detect an arc in a direct current (DC) circuit, the DC circuit having a DC load, a DC source for supplying power to the DC load, and a circuit arrangement arranged between the DC source and the DC load. Here, the circuit arrangement comprises: an input end having two input terminals for connecting the DC source; an output end having two output terminals for connecting the DC load; and a switching unit arranged between the input end and the output end. The switching unit has at least two operating modes and can be operated in these two operating modes. Specifically, the switching unit is designed to, if necessary, combine an output voltage U applied to the output end of the circuit arrangement with an output voltage U aus , in a first operating mode BM1, a power flow P between the DC source and the output of the circuit arrangement is enabled, and in a second operating mode BM2, a power flow between the DC source and the output of the circuit arrangement is inhibited. The method comprises the following method steps:
[0014] - cyclically interrupting a power flow P between a DC source and an output of the circuit arrangement by means of the switching unit, such that the power flow P is enabled in an active time window having a first duration Δt1, i.e. where P≠0, and is inhibited in a deactivated time window having a second duration Δt2, i.e. where P=0,
[0015] - detecting a current I characteristic of the power flow P and / or a voltage U characteristic of the power flow P in two consecutive active time windows,
[0016] - comparing the values of the current I and / or the voltage U of the detected active time window with the corresponding values of the detected previous active time window, and
[0017] If the value of the current I and / or the voltage U of an active time window differs from the corresponding value of a preceding active time window by more than a threshold value, a signal concerning an arc is emitted.
[0018] In particular, the arc to be detected may be a series arc. The circuit arrangement may be completely or partially a component of an electrical device, such as an energy conversion unit, such as an inverter. The DC load may be constructed as a DC load in the conventional sense and for this purpose only comprises a DC consumer. However, the DC load may also include a DC / AC converter, which is connected to an alternating voltage (AC) load on the output side. The AC load may be an electrical device powered by an alternating voltage. However, alternatively, the AC load may also be a power supply network, into which the DC / AC converter feeds the AC power converted from the DC power. The cyclic interruption of the power flow P refers to the repeated interruption of the power flow P in a manner that satisfies the rules, which interruption may be performed periodically, but need not be performed periodically. In the interruption that is performed periodically, the sum of the first duration Δt1 and the second duration Δt2 is constant, i.e. Δt1+Δt2=constant, while in the interruption that is performed non-periodically, the sum is not constant. If the power fluctuations consumed by the DC load can be classified as being small enough to be negligible, the power flow P may be interrupted periodically. If this cannot be assumed, the cyclic interruption of the power flow is usually carried out non-periodically. The current I to be detected that characterizes the power flow P can be a current flowing between the DC source and the input of the circuit device. Alternatively to this, it can also be a current flowing between the input of the circuit device and the switching unit or a current flowing between the switching unit and the output of the circuit device. The detected voltage U can be a voltage applied to the input of the circuit device and / or a voltage applied to the output of the circuit device. Within the scope of the present invention, only one current characterizing the power flow P between the DC source and the output is detected, but alternatively multiple currents can also be detected. Alternatively or additionally to this, only one voltage characterizing the power flow P between the DC source and the output of the circuit device can be detected, but multiple voltages can also be detected if necessary.
[0019] The present invention utilizes the following effect: the power flow P that is usually continuous between the DC source and the DC load in the DC circuit is converted into a discontinuous power flow P by the switching unit. This applies at least to the first region of the DC circuit, which is arranged between the DC source and the output of the circuit device. Here, in the first region of the DC circuit, that is, on the entire section between the DC source and the output of the circuit device, the power flow P can (but is not absolutely necessary) be interrupted. More precisely, it is sufficient to interrupt the cycle of the power flow only on the partial section between the DC source and the output of the circuit device. Specifically, for example, when the power flow is interrupted only on the partial section between the DC source and the output, the charging process of the capacitance that is still decaying there can be carried out in the remaining partial sections of the first region of the DC circuit. However, by suppressing the power flow on the partial section of the first region of the DC circuit, in response to this, the power flow on the remaining partial sections in the first region of the DC circuit is at least significantly reduced. In the second region of the DC circuit arranged between the output of the circuit device and the DC load, the power flow can be discontinuous or continuous.
[0020] Since there is no power flow from the DC source to the output of the circuit arrangement in the second disabled time window, a zero crossing of the current I is intentionally caused in the DC circuit, at least in the first region of the DC circuit, and at least on a section of the DC circuit extending from the DC source to the first region of the output of the circuit arrangement. In summary, this applies to the entire first region of the DC circuit between the DC source and the output of the circuit arrangement, if the power flow P is not completely interrupted there, then at least it is greatly reduced everywhere. In this case, energy is also simultaneously drawn from a possible series arc in the first region of the DC circuit. By drawing away the energy, the arc can no longer burn, but is extinguished (at least temporarily within the disabled time window). Now, when a power flow P from the DC source to the output of the circuit arrangement is generated again in the active time window after the disabled time window, the risk of the power flow P being accompanied by a burning arc is greatly reduced compared to the previous active time window in which the arc is still burning. In other words: if the arc burns in the active time window that is earlier in the two active time windows, the arc is most likely no longer present in the active time window that is later in the two active time windows. In this case, the probability increases with increasing second duration of the deactivated time window or of a deactivated time window between two activated time windows.
[0021] According to the invention, in each of two temporally offset active time windows, the current I and / or voltage U associated with the power flow P in the corresponding active time window are detected. Since the power loss due to the arc is also associated with the arc, the electrical variables of the current I and / or voltage U change according to the presence of the arc in the DC circuit. Therefore, it can be inferred from the comparison of the values of the detected current I and / or voltage U of the two temporally offset active time windows whether one of the two active time windows has an arc compared to the corresponding other of the two active time windows. This is particularly applicable to the case where the consumption of the DC load over time is known for other reasons and / or does not change in time, at least not significantly. Specifically, if the value of the current I and / or voltage U of the temporally previous active time window differs from the corresponding value of the current I and / or voltage of the subsequent active time window by more than a predefined threshold, a signal about the arc can be issued.
[0022] In the method according to the invention, no special requirements are imposed on the measuring unit for detecting the electrical variable from the current I and / or the voltage U. The measuring unit does not have to have high accuracy nor high time resolution, i.e. high measurement frequency. This is because it is not important to detect sudden changes in the electrical variable. More precisely, it is sufficient to detect only the value of the electrical variable representing the corresponding active time window, such as the average value of the corresponding active time window. For this reason, the measuring unit for detecting the electrical variable can be constructed very low-cost. Usually, the measuring unit already exists in the DC circuit, which is why no additional costs are incurred in this case. Because according to the invention, even in normal operation of the DC load, the power flow P between the DC source and the output of the circuit device in the DC circuit occurs discontinuously, basically in each energy packet (Energiepaket), so no complex detection unit is required to trigger a one-time interruption of the continuously occurring power flow. More precisely, the operation of the method according to the invention is like in each active time window, at least in the first region of the DC circuit, there is an arc, in particular a series arc, which must be extinguished in the disabled time window by generating an interruption of the power flow P from the DC source by means of the switching unit. The information about whether an arc was actually present in the preceding active time window is obtained only from the detection of electrical variables of current I and / or voltage U in a temporally subsequent active time window and a comparison thereof with the correspondingly detected variables of current I and / or voltage U in a temporally preceding active time window.
[0023] In the disable time window, the DC load can be supplied by an energy buffer (e.g., a capacitor) already present at the input of the DC load or by a capacitor additionally provided and connected in parallel with the output of the circuit arrangement. In addition, the second duration Δt2 of the disable time window can be selected to be very small, so that the capacitor is only negligibly discharged, so that insufficient supply of the DC load and possible associated malfunctioning of the DC load can be avoided to a large extent.
[0024] In an advantageous embodiment of the method, the switching unit can respond to the signal regarding the arc, if necessary in conjunction with the output voltage U applied to the output of the circuit arrangement. aus , permanently interrupting the power flow P between the DC source and the output of the circuit arrangement, at least for a period of time that is longer than the second duration Δt2 of the deactivation time window. For example, such interruption in response to the issuance of a signal about an arc may last for several minutes or until manually confirmed. In this way, a professional has the opportunity to identify and repair possible damage in the DC circuit caused by a detected arc.
[0025] The active time window and the previous active time window, whose values of the current I and / or the voltage U are compared with one another, do not necessarily necessarily follow one another directly. Rather, they can be separated from one another by a plurality of disabled time windows and at least one further active time window. However, in an advantageous embodiment of the method, the active time window and the previous active time window can also be separated from one another by exactly one disabled time window. In this way, changes in the consumption of the DC load that occur during this period are less important when comparing the electrical variables.
[0026] In an advantageous embodiment of the method, the second duration Δt2 of the disable time window can be selected so that it is not only high enough to extinguish an arc that may be present in the DC circuit, but more precisely high enough to suppress the previously extinguished arc from reigniting in an active time window that temporally follows the disable time window. In particular, the value of the second duration can depend on a thermal time constant associated with the arc and should in particular be greater than the corresponding thermal time constant. The thermal time constant describes the decrease in the conductivity of the arc column, which is constructed as a plasma, over time when no more electrical energy is supplied to the arc, for example because the power flow in the first region of the DC circuit is interrupted by means of a switching unit. In particular, if the time for which the voltage U is applied to the arc column again after the arc has extinguished is greater than the thermal time constant, reignition of the arc does not occur. In addition, the value of the minimum necessary interruption time of the current flow can also depend on the power converted in the burning arc. Therefore, the value of the second duration Δt2 of the disable time window can also be selected as a function of the detected values of the current I and / or the voltage U of the immediately preceding active time window. In particular, the value of the second time period Δt2 can increase with increasing values of the detected current I and / or detected voltage U of the preceding time window. Experiments have shown that it is sufficient if the value of the second time period Δt2 is between 0.1 ms and 10.0 ms, preferably between 0.3 ms and 4.0 ms.
[0027] In one variant of the method, the power flow P between the input and the output of the circuit arrangement is interrupted by means of a switching unit. The circuit arrangement can have an input capacitor connected in parallel with its input. Advantageously, the input current I flowing at the input can also be detected in the deactivation time window. ein and / or an input voltage U applied at the input between the input terminals ein Now, the second duration Δt2 of the disable time window can be determined according to the detected input current I ein and / or detected input voltage U ein Specifically, for example, the second duration Δt2 of the disable time window is defined in the following manner: the input current I detected in the disable time window ein Below another current threshold I TH2 , above which the input capacitor is no longer significantly charged. This can be achieved, for example, by applying an input voltage U to the input capacitor (and therefore also to the input of the circuit arrangement) ein In addition, another current threshold I TH2is selected so, in particular so low, that if a series arc is present between the DC source and the input of the circuit arrangement, it cannot continue to burn. This can be determined or verified empirically, for example. Thus, if a further current threshold I TH2 This ensures that any series arc that may exist between the DC source and the input of the circuit arrangement is reliably extinguished.
[0028] Of course, the input current I flowing at the input of the circuit arrangement ein The current can be detected by a corresponding current sensor. However, this requires an additional current sensor in addition to the voltage sensor that is usually present anyway. In one embodiment of the method, in which the circuit arrangement has an input capacitor connected in parallel with its input and in which the power flow P between the input and the output is interrupted, the current flowing between the DC source and the input of the circuit arrangement can be at least partially, if necessary also largely or completely, replaced by the input current I flowing at the input. ein Here, in the disable time window, the input voltage U ein The input current I flowing at the input terminal is measured by the time variation of ein , especially the input current I flowing into the input capacitor ein Specifically, the input voltage U applied across the input capacitor (also applied between the input terminals) ein The time derivative of provides a measure of the current flowing between the DC source and the input of the circuit arrangement. In this way, the input voltage U applied at the input between the input terminals can be determined using only one voltage sensor. ein And the input current I flowing at the input terminal ein .
[0029] In another variant of the method, the switching unit of the circuit arrangement is formed by a DC / DC converter, in particular a step-up converter. In addition, the circuit arrangement has an output capacitor connected in parallel with its output. Advantageously, in this case, the voltage U applied to the output capacitor can be amplified by the switching unit in the active time window near the end of the first duration Δt1. aus For example, when at least 50%, preferably at least 75%, particularly preferably at least 90% of the first duration Δt1 of the active time window is reached or exceeded, the voltage U applied to the output capacitor can be amplified. aus Here, at the beginning of the active time window, the voltage U applied to the output capacitor is aus In any case, in the case of a DC / DC converter designed as a step-up converter with a freewheeling diode, the voltage U ausShould be at least or exceed the value of the no-load voltage of the DC source. Only in this way can it be ensured that the switching unit together with the voltage U applied at the output side aus Together, the power flow between the input and output of the circuit device is suppressed. Additionally, in this way, the energy cached in the output capacitor and in particular also in the adjacent disabled time window for supplying power to the DC load can be increased. The upper limit of the second duration Δt2 of the adjacent disabled time window can be increased, and the risk of incorrectly supplying power to the DC load, in particular during the disabled time window, can be avoided or at least reduced. On the other hand, the loss of the DC / DC converter for caching energy only occurs at the end of the active time window, that is, only during a small part of the first duration Δt1, rather than during the entire first time window. Additionally, the component providing the output capacitor is loaded with a high voltage value only in a small part of the first duration.
[0030] In one embodiment of the method, the value of the first duration Δt1 in the active time window can be selected such that the arc energy resulting from the power loss of the assumed arc in the active time window does not exceed a predetermined maximum permissible energy value E max Therefore, in this case, in the current active time window, it is assumed that there is a fictitious (but not necessarily real) arc. However, based on the assumption that the fictitious arc burns in the active time window, the current I in the active time window and the assumed arc voltage drop ΔU can be calculated according to the following formula: LB To estimate the first duration Δt1 of the current active time window:
[0031]
[0032] Depending on the time resolution of the current measuring unit, it is also possible to use a plurality of detected values of the current I. In this case, the average current I can be used in the denominator of the equation given above for the current I Mittelwert For the arc voltage drop ΔU LB There are experimentally determined or empirically based values. For example, in common PV systems, a value between 30 V and 40 V can be used as a good approximation for the arc voltage drop.
[0033] In detecting arcs in DC circuits of photovoltaic (PV) systems, if the maximum possible energy value E max With E also listed in the relevant standards max = 200 J. In particular, when the energy transmitted in the active time window does not exceed the value 200 J, a restart of the PV system can be performed in a simplified form and in particular without the use of electrical specialists in the case that an arc was actually detected in the previous active time window.
[0034] In one embodiment of the method, a plurality of DC sources can be connected to a DC load in parallel with each other via a circuit arrangement in order to jointly supply the DC load with their respective power flows P. In this case, the method for detecting, in particular, a series arc can be performed simultaneously for each DC source, wherein, when the method is performed for different DC sources, the deactivation time windows associated with the respective cyclic interruptions of the power flows P are as far as possible temporally staggered from one another and do not overlap as far as possible. Advantageously, the cyclic interruptions of the power flows P are performed in such a way that the temporal overlap between the deactivation time windows of the different DC sources is at least minimized. In this way, a robust operation of the DC load is ensured by minimizing the fluctuations in the total power flow resulting from the sum of the individual power flows P of the plurality of DC sources.
[0035] A circuit arrangement according to the invention for detecting an arc in a DC circuit comprises:
[0036] - an input terminal having two input terminals for connecting a DC source and an output terminal having two output terminals for connecting a DC load,
[0037] a switching unit arranged between the input and the output, wherein the switching unit is designed and arranged to, if necessary, combine with the output voltage U present at the output of the circuit arrangement aus , in the first operating mode BM1, a power flow P between the input terminal and the output terminal is enabled, and in the second operating mode BM2, a power flow P between the input terminal and the output terminal is inhibited,
[0038] a measuring unit for determining a voltage U applied to the input or output and / or a current I flowing in a connecting line from one of the input terminals to one of the output terminals, and
[0039] A control unit for controlling the switching unit and, if applicable, the measuring unit.
[0040] The circuit arrangement is characterized in that the control unit is designed and provided for carrying out the method according to the invention together with the switching unit and the measuring unit.
[0041] In order to enable the switching unit to suppress the power flow P between the input and the output, the switching unit can have one or more controllable switches, in particular semiconductor switches. Alternatively or additionally, the switching unit for suppressing the power flow P can also have one or more uncontrollable semiconductor switches, such as diodes. The control unit can be designed as a separate control unit. Alternatively, however, the control unit can also be designed as a component of a control unit that is already present in the DC circuit. The advantages already explained in conjunction with the method are obtained.
[0042] In an advantageous embodiment of the circuit arrangement, the switching unit may have a semiconductor switch which is arranged in one of the connecting lines from one of the input terminals to one of the output terminals. The semiconductor switch may not have an intrinsically constructed or separately constructed freewheeling diode connected in parallel with the current-carrying terminals of the semiconductor switch. However, as an alternative to this, the semiconductor switch may also have a freewheeling diode connected in parallel with the current-carrying terminals of the semiconductor switch. Here, the freewheeling diode may be constructed as an intrinsic freewheeling diode or as a separately constructed freewheeling diode. If the semiconductor switch has a freewheeling diode, the freewheeling diode may be arranged in particular such that it is polarized in the cut-off direction relative to the normal current direction of the DC circuit.
[0043] The circuit device may have an energy buffer, in particular a capacitor, connected in parallel with the output. With this capacitor, the circuit device is able to buffer the limited energy of the DC source in the active time window, with the help of which the DC load is powered in the subsequent disabled time window. In this way, even if the DC load does not include the possibility of buffering, it is possible to power the DC load during the disabled time window. In this case, the power flow P is discontinuous only in the first region of the DC circuit, while the power flow P is continuous in the second region of the DC circuit. According to one embodiment, the circuit device or the switching unit of the circuit device according to the present invention can be designed as a DC / DC converter, in particular as a boost converter. Here, the power flow P from the DC source to the output of the circuit device can be interrupted by disabling the circuit device, in particular the switching unit of the circuit device, and the voltage applied at the output of the circuit device is greater than the voltage applied at the input of the circuit device. Experiments have shown that it is sufficient to disable within a few (advantageously, up to 8) switching cycles of the DC / DC converter.
[0044] According to the invention, a photovoltaic (PV) inverter comprises: at least one input having two input terminals for connecting a PV string as a DC source; an output for connecting an alternating voltage (AC) grid; a DC / AC converter for converting a direct voltage into an alternating voltage; and a circuit arrangement according to the invention. Here, the input of the circuit arrangement is connected to at least one input of the PV inverter, and the output of the circuit arrangement is connected to the input of the DC / AC converter. The inverter can be a single-phase PV inverter having at most one phase conductor terminal and one neutral conductor terminal on the output side. Alternatively, the inverter can also be a multi-phase PV inverter having a plurality of (in particular three) phase terminals on the output side and one neutral conductor terminal on the output side. The control unit of the circuit arrangement can be integrated into the control unit of the PV inverter or into a superordinate control unit of a PV system including the PV inverter. As a result, the advantages already mentioned in connection with the method and the circuit arrangement are obtained.
[0045] When the method according to the invention is used to detect an arc in a PV system, in particular a series arc, wherein the DC source comprises a PV string and the DC load comprises a single-phase DC / AC converter connected to an alternating voltage (AC) grid on the output side, it is advantageous to cyclically interrupt the power flow P so that the AC current I flowing through the output terminals of the DC / AC converter AC (t) crosses zero during the second duration Δt2 of the disable time window. That is, in a single-phase DC / AC converter, power is extracted from the buffer of the PV inverter (e.g., the intermediate circuit capacitor of the DC intermediate circuit) in a sinusoidal pulse manner having a frequency corresponding to twice the frequency of the AC grid connected to the PV inverter, wherein the AC current I generated by the DC / AC converter AC Now, if the disable time window is aligned in time with the AC current I AC The zero crossing overlap of (t) can minimize the voltage ripple of the DC intermediate circuit.
[0046] In one embodiment of the invention, the PV inverter may have only one input, to which a PV string as a DC source is connected. However, in another embodiment of the invention, the PV inverter may also have multiple inputs, which are designed to be connected to PV strings as DC sources, respectively. Here, the inputs can be connected in parallel to a common DC intermediate circuit via a DC / DC converter, respectively. The DC intermediate circuit, which may include an intermediate circuit capacitor, can in turn be connected to the input of a DC / AC converter. Here, a circuit device according to the invention can be associated with each input of a PV inverter, wherein each input of the PV inverter is respectively connected to the input of a circuit device associated therewith, and the output of each circuit device is respectively connected to the input of a DC / AC converter. Within the scope of the invention, each circuit device is at least partially, and if necessary also completely, formed by a DC / DC converter.
[0047] In one embodiment of the PV inverter, the control unit of the circuit arrangement can be contained in a superordinate control unit of the PV inverter. Here, the superordinate control unit is simultaneously configured to control the DC / AC converter and the DC / DC converter of the PV inverter so that during operation of the PV inverter, the voltage applied to the DC intermediate circuit remains above the maximum value of the no-load voltage of the individual PV strings.
[0048] Advantageous embodiments of the invention are disclosed in the following description and in the dependent claims, the features of which may be used individually and in any desired combination with one another. BRIEF DESCRIPTION OF THE DRAWINGS
[0050] The present invention is described below with the aid of the accompanying drawings, in which:
[0051] Figure 1 shows a DC circuit having a DC source, a DC load and a circuit arrangement according to a first embodiment of the invention;
[0052] Figure 2 shows a circuit arrangement according to a second embodiment of the invention;
[0053] Figure 3 Shows Figure 2 operating mode of the circuit arrangement during the method according to the invention, time curves of the current and the voltage; and
[0054] Figure 4 A PV system having a PV inverter according to an embodiment of the present invention is shown.
[0055] Description of the drawings
[0056] exist Figure 1In FIG. 1 , a direct current (DC) circuit 6 is shown having a DC source 2, a DC load 3 and a circuit arrangement 1 according to the invention. The DC source 2 may have an internal resistance (at Figure 1 The circuit arrangement 1 has an input 7 with a first input terminal 7.1 and a second input terminal 7.2, to which a DC source 2 is connected. The circuit arrangement 1 also has an output 8 with a first output terminal 8.1 and a second output terminal, which is connected to a DC load 3. Each input terminal 7.1, 7.2 is connected to a corresponding output terminal 8.1, 8.2 via a connecting line 23, 24, respectively. A switching unit 10 is arranged between the input 7 and the output 8. The switching unit 10 is designed to, if necessary, combine with a voltage U applied to the output 8 of the circuit arrangement 1. aus , during the first operating mode BM1, a power flow P between the DC source 2 and the output terminal 8 is enabled, and during the second operating mode BM2, a power flow P between the DC source 2 and the output terminal 8 is inhibited. For example, by means of the switching unit 10, a power flow P between the input terminal 7 and the output terminal 8 can be enabled during the first operating mode BM1, and a power flow P between the input terminal 7 and the output terminal 8 can be blocked during the second operating mode BM2. For this purpose, the switching unit 10 has at least one controllable switch and, if necessary, also a plurality of controllable switches. The switch can be an electromechanical switch and, advantageously, also a semiconductor switch. In addition, the switching unit 10 can also have one or more uncontrollable semiconductor switches, in particular diodes. The switching unit 10 is controlled by the control unit 5. In addition, the circuit arrangement 1 includes a measuring unit 4, which is designed to measure the output voltage U applied to the output terminal 8 of the circuit arrangement 1. aus and / or the output current I flowing through the output terminal 8 aus Alternatively or additionally, the measuring unit 4 can also be designed to measure the input voltage U applied to the input terminal 7. ein and / or the input current I flowing through the input terminal 7 ein ( Figure 1 The measuring unit 4 is connected to the control unit 5 for communication and control. The circuit arrangement 1 may optionally include an output capacitor 11 (in Figure 1 The output capacitor is connected in parallel with the output terminal 8 of the circuit arrangement. Alternatively or additionally, the circuit arrangement 1 may include an input capacitor connected in parallel with the input terminal 7 of the circuit arrangement (indicated by a dashed line in FIG. 1 ). Figure 1 not shown).
[0057] During operation of the circuit arrangement 1 , the switching unit 10 and, if necessary, the output voltage U 2 applied to the output 8 of the circuit arrangement 1 are used to control the output voltage U 2 applied to the output 8 of the circuit arrangement 1 . aus, cyclically (i.e., in a regular manner and repeatedly) interrupting the power flow P. Therefore, the power flow P between the DC source 2 and the output terminal 8 occurs discontinuously, wherein as combined Figure 3 As explained, active time windows 31 with a first duration Δt1 alternate with deactivated time windows 32 with a second duration Δt2. Thus, during the active time windows 31, a non-zero power flow P occurs between the DC source 2 and the output terminal 8, wherein in the deactivated time windows 32, the power flow P takes the value of zero.
[0058] During two consecutive active time windows 31 , the current I and / or the voltage U are now determined by means of the measuring unit 4 and transmitted to the control unit 5 . The current I can be the input current I ein Or the output current I aus , the voltage can be the input voltage U ein Or the output voltage U aus The values of the current I and / or the voltage U of consecutive active time windows 31 are compared with one another by means of the control unit 5. The control unit 5 is configured to emit a signal about an arc 9, in particular a series arc, if the values of the current I and / or the voltage U of a temporally subsequent active time window 31 deviate from the corresponding values of the current I and / or the voltage U of a preceding active time window 31 by at least a threshold value.
[0059] exist Figure 2 , a circuit device 1 according to a second embodiment of the present invention is shown. The circuit device 1 is similar to Figure 1 This is similar to the first embodiment already described in Figure 1 The following mainly describes the differences between the second embodiment and the first embodiment.
[0060] According to a second embodiment, the circuit arrangement 1 is designed as a DC / DC converter 21, in particular a step-up converter, and is configured to convert an input voltage U applied to the input terminal 7 to ein Converted into an output voltage U applied to the output terminal 8 aus For this purpose, the switching unit 10 of the circuit arrangement 1 has an inductor 22 and a first semiconductor switch S1 connected in series therewith in a first connecting line 23 between the first input terminal 7.1 and the first output terminal 8.1. A first terminal of a second semiconductor switch S2 is connected to a connecting point 25 between the inductor 22 and the first semiconductor switch S1, and a second terminal of the second semiconductor switch S2 is connected to a second connecting line 24. The first semiconductor switch S1 and the second semiconductor switch S2 can each have an inherent or separately constructed freewheeling diode D1, D2 (in Figure 2 denoted by dashed lines).
[0061] In other words, during the first operation mode BM1, Figure 3 In the active time window 31 with a first duration Δt1 shown in FIG. 1 , the circuit arrangement 1 is operated as a step-up converter and, by means of suitable clocking of the first semiconductor switch S1 and, if necessary, the second semiconductor switch S2, the input voltage U ein Converted to ratio input voltage U ein Larger output voltage U aus Here, advantageously, the output voltage U aus is selected so that it is greater than the no-load voltage U0 of the DC source 2 connected to the input terminal 7 (at Figure 2 with the output voltage U aus The associated energy is temporarily stored in the output capacitor 11 arranged in parallel with the output terminal 8. In the second operating mode BM2, i.e. Figure 3 In the deactivation time window 32 with the second duration Δt2 shown in FIG. 3 , the clocking of the semiconductor switches S1, S2 is interrupted by the control unit 5. During the second operating mode BM2, the semiconductor switches S1, S2 are permanently disconnected. The second duration Δt2 may last for several clock cycles of the DC / DC converter 21. Now, due to the voltage U applied at the output 8 aus is chosen so that the voltage U aus is greater than the no-load voltage U0 of the DC source 2 connected at the input, so that the freewheeling diode D1 (if present) associated with the first semiconductor switch S1 blocks the current flow from the first input terminal 7.1 to the first output terminal 8.1 and thereby blocks the power flow P from the DC source 2 to the output terminal 8 of the circuit arrangement 1.
[0062] By means of the control unit 5, the circuit arrangement 1 is set in an alternating manner to the first operating mode BM1 during a first duration Δt1 and to the second operating mode BM2 during a second duration Δt2, thereby generating a discontinuous power flow P from the DC source 2 to the output 8 of the circuit arrangement 1. As already described in connection with Figure 1 As described, the values of the current I and / or the voltage U in two temporally consecutive active time windows 31 are detected and evaluated by means of the control unit 5 and a signal concerning an arc is emitted based on the comparison.
[0063] exist Figure 3 , it is shown that during the method according to the invention Figure 2 The time curves of the operating modes BM1 and BM2 of the switching unit 10 of the circuit arrangement 1 (upper figure), and Figure 21 . The time curves of the current I(t) (middle figure) and the voltage U(t) (lower figure) of the circuit arrangement 1 are shown in FIG. By way of example, the time curves of the current and the voltage are respectively variables I detected at the input 7 of the circuit arrangement 1 by means of the measuring unit 4. ein (t), U ein (t). The time curve here reflects the behavior of the circuit arrangement 1 close in time to the ignition of the series arc 9 at the time t0.
[0064] As shown, active time windows 31 of duration Δt1 of the circuit arrangement 1 in the first operating mode BM1 alternate with deactivated time windows 32 of duration Δt2 of the circuit arrangement in the second operating mode BM2. In the first active time window 31, the current I ein (t) takes the value of I1 and voltage U ein (t) takes the value U1. The values of the current I1 and the voltage U1 result from the power consumption of the DC load 3 connected to the output terminal 8 of the circuit arrangement 1. In the adjacent disable time window 32, the power flow P between the DC source 2 and the output terminal 8 of the circuit arrangement 1 is interrupted for a second duration Δt2. The current I flowing through the input terminal 7 ein (t) takes the value of 0A, and the voltage U applied at the input terminal 7 ein (t) corresponds to the no-load voltage U0 of the DC source 2. Since the actual DC source 2 (e.g., PV generator) always has an internal resistance, this no-load voltage U0 is usually higher than the voltage U1 of the loaded DC source 2. In the next (here, second) active time window 31, the current I ein (t) first corresponds to the value of the previous active time window 31 until the time point t0, at which the arc 9 ignites in the DC circuit 6, in particular between the DC source 2 and the input terminal 8 of the circuit arrangement 1. Starting from the time point t0, the current value, and possibly also the voltage value, suddenly drops slightly from the original value I1, U1 to the value I2, U2. The sudden drop in current is based on the power loss and the associated voltage drop of the series arc 9 starting from t0. For example, the series arc 9 burns across a microgap in the broken conductor. In the adjacent disabled time window 32, the series arc 9 is extinguished by interrupting the power flow P between the DC source 2 and the output terminal 8 of the circuit arrangement 1 again. The current I flowing through the input terminal 7 ein (t) takes the value of 0A again. The voltage U applied to the input terminal 7 ein (t) In the second disabled time window 32, due to the microgap located before the input, it is now no longer defined by the DC source 2, but by the voltage U applied at the output 8. aus (t) and the impedance ratio of the disconnected semiconductor switches S1 and S2. This is because they act as the voltage U at the output 8 aus (t) of the voltage divider. For voltage U einThe curve of (t) also takes into account the voltage U applied to the output terminal 8. aus (t) can be discharged more or less depending on the current that may flow through the DC load 3. In each case, the voltage U applied at the input ein (t) is significantly different from the no-load voltage U0 of DC source 2. Figure 3 In the example, it is shown that in the second disabled time window 32, the voltage U ein The value of (t) is almost 0 V. In the subsequent third active time window 31, enabling the power flow P through the switching unit 10 is in principle possible, but now it is blocked by the microgap, which is why Figure 3 shows the voltage U ein (t) and current I ein (t) has negligibly small values.
[0065] The control unit 5 now converts the current I of the active time window 31 detected by the measuring unit 4 into ein (t) and / or voltage U ein The value of (t) is compared with the value of the corresponding previous active time window 31. Figure 3 When the control unit 5 determines that the difference between the values of the second active time window 31 and the third active time window 31 in the DC source 2 exceeds the threshold value, and in response issues a signal about the arc 9. In response to issuing the signal about the arc 9, the switching unit 10 remains in the second operating mode BM2 until manually confirmed by a professional, in which the power flow P between the DC source 2 and the output terminal 8 is suppressed.
[0066] exist Figure 4 , a photovoltaic (PV) system 47 is shown, which has a PV inverter 40 according to one embodiment of the present invention. Here, the PV inverter 40 is constructed as a so-called multi-string inverter, which has multiple (here exemplarily two) DC-side input terminals 43, which have input terminals 43.1 and 43.2 for connecting PV strings 45 as DC sources 2 respectively. Each input terminal 43 is connected in parallel with an intermediate circuit capacitor of a common DC intermediate circuit 42 via a DC / DC converter 21 (here via a boost converter). The intermediate circuit capacitor is connected to the input of the DC / AC converter 41. The output of the DC / AC converter 41 is connected via corresponding AC separation elements (in Figure 4 The PV inverter 40 is connected to an alternating voltage (AC) grid 46 via an output terminal 44 of the PV inverter 40 (not shown).
[0067] The PV inverter 40 comprises a circuit arrangement 1, one for each DC-side input 43. The circuit arrangement 1, in particular its switching unit 10, is designed as a DC / DC converter and is formed at least partially by an already existing DC / DC converter 21 of the PV inverter 40. The input 7 of the circuit arrangement 1 corresponds to the input 43 of the PV inverter 40. The output 8 of the circuit arrangement 1 corresponds to the output of the DC / DC converter 21. The circuit arrangement 1 has a common control unit 5, which is a component of the central control unit of the PV inverter 40 and is designed and provided for controlling the DC / DC converter 21 and the DC / AC converter 41. The measuring unit 4 of the circuit arrangement is likewise a component of the DC / DC converter 21 and is connected to the measuring unit 4 of the circuit arrangement. Figure 4 Not explicitly shown.
[0068] The method according to the invention is carried out by the control unit 5 simultaneously for each DC source 2 configured as a PV string 45. Thus, in normal operation of the PV inverter 40, each PV string 45 has a discontinuous power flow P in the respective DC line between its PV modules and the respective DC-side input 43 of the PV inverter 40. In this case, an active time window 31 with a first duration Δt1 alternates with a deactivation time window 32 with a second duration Δt2. Advantageously, a discontinuous power flow P in two PV strings 45 can be achieved in this case, so that the deactivation time window 32 of one PV string 45 overlaps as little as possible with the deactivation time window of the other PV string 45, i.e. the deactivation time windows are as far as possible offset from one another. If an arc 9 (in particular a series arc) is now detected in one PV string 45 by means of the control unit 5, only the switching unit 10 associated with the PV string in which the series arc was detected, i.e. the DC / DC converter 21 associated with the PV string in which the series arc was detected, is placed in the second operating mode BM2 for a longer period of time and, if necessary, until manual confirmation by an expert. In contrast, the respective other PV string 45 can continue to operate with a discontinuous power flow P in the direction of its associated DC-side input terminal 43 .
[0069] Reference Mark List
[0070] 1 Circuit Device
[0071] 2 DC Source
[0072] 3 DC load
[0073] 4 Measurement units
[0074] 5 Control unit
[0075] 6 Direct current (DC) circuit
[0076] 7 Input
[0077] 7.1, 7.2 Input terminals
[0078] 8 Output
[0079] 8.1, 8.2 Output terminals
[0080] 9 Arc (series)
[0081] 10 Switching unit
[0082] 11 Output Capacitor
[0083] 21 DC / DC Converter
[0084] 22 Inductor
[0085] 23, 24 Connection lines
[0086] 25 Connection points
[0087] 31,32 Time Window
[0088] 40 Photovoltaic (PV) Inverter
[0089] 41 DC / AC Converter
[0090] 42 DC intermediate circuit
[0091] 43 Input
[0092] 43.1, 43.2 Input terminals
[0093] 44 Output
[0094] 45 PV string
[0095] 46 AC voltage (AC) power grid
[0096] 47 Photovoltaic (PV) systems
[0097] Δt1, Δt2 time window
[0098] S1, S2 semiconductor switch
[0099] BM1, BM2 operation mode
[0100] D1, D2 diodes
[0101] P Power Flow
[0102] U ein Input voltage
[0103] U aus Output voltage
[0104] I ein Input Current
[0105] I aus Output current.
Claims
1. A method for detecting an arc in a direct current (DC) circuit, the DC circuit having a DC load, a DC source for supplying the DC load, and a circuit arrangement arranged between the DC source and the DC load, - in, The circuit device comprises: an input end having two input terminals for connecting the DC source; an output end having two output terminals for connecting the DC load; and a switch unit arranged between the input end and the output end. - wherein the switching unit is designed to enable a power flow P between the DC source and the output terminal in a first operating mode BM1 and to inhibit a power flow between the DC source and the output terminal in a second operating mode BM2, or, - wherein the switching unit is designed to combine the output voltage U applied to the output of the circuit arrangement aus , enabling a power flow P between the DC source and the output terminal in a first operating mode BM1, and inhibiting a power flow between the DC source and the output terminal in a second operating mode BM2, The method comprises the following method steps: - cyclically interrupting a power flow P between the DC source and the output by means of the switching unit, such that the power flow P is enabled in an active time window having a first duration Δt1 and is inhibited in a disabled time window having a second duration Δt2, - detecting a current I characteristic of the power flow P and / or a voltage U characteristic of the power flow P in two consecutive active time windows, - comparing the detected values of the current I and / or voltage U of the active time window with the corresponding values detected of a previous active time window, and If the value of the current I and / or the voltage U of the active time window differs from the corresponding value of the previous active time window by more than a threshold value, a signal concerning an arc is emitted.
2. The method according to claim 1, wherein: In response to signaling an electric arc, the power flow P between the DC source and the output is permanently interrupted by means of the switching unit.
3. The method according to claim 1, wherein: The active time window and the previous active time window are separated from each other by exactly one disabled time window.
4. The method according to claim 2, wherein: The active time window and the previous active time window are separated from each other by exactly one disabled time window.
5. The method according to any one of claims 1 to 4, wherein: The value of the second duration Δt2 of the disabled time window is sufficient to extinguish an arc that may be present in the DC circuit and to inhibit the arc extinguished in the disabled time window from reigniting in an active time window immediately following the disabled time window in time.
6. The method according to claim 5, wherein: The value of the second time duration Δt2 is between 0.1 ms and 10.0 ms.
7. The method according to any one of claims 1 to 4 and 6, wherein: The value of the second time duration Δt2 is selected as a function of the detected values of the current I and / or the voltage U of the immediately preceding active time window.
8. The method according to any one of claims 1 to 4 and 6, wherein: The circuit arrangement has an input capacitor connected in parallel with its input, wherein in addition, in the blocking time window, an input current I flowing at the input is detected. ein and / or an input voltage U applied at the input between the input terminals ein , and wherein, according to the detected input current I ein and / or detected input voltage U ein A second duration Δt2 of the disabled time window is determined.
9. The method according to claim 8, wherein: The second duration Δt2 of the disable time window is defined in the following manner: the detected input current I ein Below another current threshold I TH2 .
10. The method according to any one of claims 1 to 4 and 6, wherein: The circuit arrangement has an input capacitor connected in parallel with its input, and wherein, in the disable time window, an input voltage U ein The input current I flowing at the input terminal is measured as a function of time. ein .
11. The method according to any one of claims 1 to 4, 6 and 9, wherein: The switching unit is formed by a DC / DC converter, and the circuit arrangement has an output capacitor connected in parallel with the output, and wherein, in the active time window, the voltage U applied to the output capacitor is amplified by the switching unit near the end of the first time period Δt1. aus .
12. The method according to any one of claims 1 to 4, 6 and 9, wherein: The value of the first duration Δt1 of the active time window is chosen so that the arc energy resulting from the power loss of the arc assumed in the active time window does not exceed a predetermined maximum permissible energy value E max .
13. The method according to any one of claims 1 to 4, 6 and 9, wherein: The DC source has a PV string and the DC load has a single-phase DC / AC converter connected to an AC voltage grid at the output side, and wherein the power flow P is interrupted so that the AC current I flowing through the output of the DC / AC converter AC (t) crosses zero during a second duration Δt2 of the disable time window.
14. The method according to any one of claims 1 to 4, 6 and 9, wherein: A plurality of DC sources are connected to the DC load in parallel via switch units, respectively, so as to jointly power the DC load with their respective power flows P, wherein the method is performed for each DC source simultaneously so that the time overlap of the disabled time windows of the plurality of DC sources is minimized.
15. The method according to claim 1, wherein: By means of the switching unit, the cycle interrupts a power flow P between the input and the output such that the power flow P is enabled in an active time window having a first duration Δt1 and is inhibited in a disabled time window having a second duration Δt2.
16. The method according to claim 2, wherein: In response to signalling an arc, the power flow P between the DC source and the output is interrupted for a period of several minutes by means of the switching unit.
17. The method according to claim 2, wherein: In response to signaling an arc, the power flow P between the DC source and the output is interrupted by means of the switching unit until manual acknowledgement.
18. The method according to claim 6, wherein: The value of the second duration Δt2 is between 0.3 ms and 4.0 ms.
19. The method according to claim 7, wherein: The second time duration Δt2 increases as the value of the current I and / or the voltage U increases.
20. The method according to claim 11, wherein: The switching unit is formed by a boost converter.
21. The method according to claim 12, wherein: The predetermined maximum allowable energy value is E max =200J.
22. A circuit arrangement for detecting an arc in a DC circuit, comprising: - an input terminal having two input terminals for connecting a DC source and an output terminal having two output terminals for connecting a DC load, - a switching unit arranged between the input terminal and the output terminal, wherein: The switching unit is designed to release a power flow P between the input and the output in a first operating mode (BM1) and to inhibit a power flow P between the input and the output in a second operating mode (BM2), or wherein the switching unit is designed to, in combination with an output voltage U applied at the output of the circuit arrangement aus , enabling a power flow P between the DC source and the output terminal in a first operating mode BM1, and inhibiting a power flow between the DC source and the output terminal in a second operating mode BM2, a measuring unit for determining a voltage U applied at the input or at the output and / or a current I flowing in a connecting line from one of the input terminals to one of the output terminals, and - a control unit for controlling the switching unit, It is characterized in that The control unit is designed and arranged to execute the method according to any one of claims 1 to 21 together with the switching unit and the measuring unit.
23. The circuit arrangement according to claim 22, characterized in that The switching unit has a semiconductor switch which is arranged in one of the connecting lines, wherein the semiconductor switch has no freewheeling diode or wherein the semiconductor switch has an intrinsic freewheeling diode which is polarized in a blocking direction with respect to a normal current flow direction of the DC circuit.
24. The circuit arrangement according to claim 22 or 23, characterized in that The circuit arrangement or the switching unit of the circuit arrangement is designed as a DC / DC converter.
25. The circuit arrangement according to claim 22, characterized in that The control unit is further used to control the measuring unit.
26. The circuit arrangement according to claim 24, characterized in that The circuit arrangement or the switching unit of the circuit arrangement is designed as a step-up converter.
27. A photovoltaic (PV) inverter, comprising: - at least one input having two input terminals for connecting a PV string as a DC source; and an output terminal for connecting to an AC voltage grid, - a DC / AC converter for converting a DC voltage into an AC voltage, and - A circuit arrangement according to any one of claims 22 to 26, the input of the circuit arrangement being connected to the at least one input of the PV inverter and the output of the circuit arrangement being connected to the input of the DC / AC converter.
28. The PV inverter according to claim 27, comprising: a plurality of input terminals for respectively connecting PV strings as DC sources, wherein: The input ends are respectively connected in parallel to a common DC intermediate circuit via DC / DC converters, and wherein the DC intermediate circuit is connected to the input end of the DC / AC converter; and a plurality of circuit devices according to any one of claims 22 to 26, wherein each input end of the PV inverter is respectively connected to the input end of the circuit device associated therewith, and wherein the output end of each circuit device is respectively connected to the input end of the DC / AC converter.
29. The PV inverter of claim 28, wherein: The control unit is simultaneously configured to control the DC / AC converter and the DC / DC converter of the PV inverter so that in operation of the PV inverter the voltage applied at the DC intermediate circuit remains above a maximum value of the no-load voltage of each PV string.
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