Light-emitting substrate and display device

Abstract

A light-emitting substrate (10) and a display device (20) comprising: a substrate (01); a first wiring layer (011) comprising: a first signal wire (210) and a second signal wire (220) extending along a first direction (F1); a second wiring layer (012) comprising: a plurality of first connection wires (310) and a plurality of second connection wires (320); the first signal wire (210) comprises a plurality of first sub-signal wires (211) extending along the first direction (F1) and arranged at intervals; the second signal wire (220) is a continuous structure extending along the first direction (F1); at least one first sub-signal wire (211) of the plurality of first sub-signal wires (211) is coupled with at least one first connection wire (310) of the plurality of first connection wires (310), and the second signal wire (220) is coupled with at least one second connection wire (320) of the plurality of second connection wires (320); the projection of the plurality of first connection wires (310) on the substrate (01) does not overlap with the projection of the plurality of second signal wires (220) on the substrate (01), and at least one of the plurality of second connection wires (320) has an overlapping area with at least one of the plurality of first sub-signal wires (211) on the substrate (01).

Description

Technical Field

[0001] This disclosure relates to the field of light-emitting technology, and in particular to a light-emitting substrate and a display device. Background Technology

[0002] With the development of LED technology, backlights using LEDs at the sub-millimeter or even micrometer scale have been widely adopted. This allows backlights that utilize transmissive displays to achieve the same contrast ratio as OLED displays, while retaining the technological advantages of liquid crystal displays (LCDs), thus enhancing the display effect and providing users with a superior visual experience. Summary of the Invention

[0003] The light-emitting substrate provided in this embodiment includes:

[0004] Substrate;

[0005] A first wiring layer is located on the substrate; the first wiring layer includes: a first signal trace and a second signal trace extending along a first direction;

[0006] The first insulating layer is located on the side of the first conductive layer that is away from the substrate.

[0007] The second wiring layer is located on the side of the first insulating layer away from the substrate; and the second wiring layer includes: a plurality of first connection lines and a plurality of first connection lines.

[0008] The first signal trace includes a plurality of first sub-signal traces that extend along the first direction and are spaced apart; the second signal trace is a continuous structure that extends along the first direction.

[0009] At least one of the plurality of first sub-signal traces is coupled to at least one of the plurality of first connection lines, and the first connection line is coupled to at least one of the plurality of first connection lines.

[0010] The orthographic projections of the plurality of first connection lines on the substrate do not overlap with the orthographic projections of the plurality of second signal traces on the substrate, and there is an overlap area between the orthographic projection of at least one of the plurality of first connection lines on the substrate and the orthographic projection of at least one of the plurality of first sub-signal traces on the substrate.

[0011] In some examples, the first routing layer includes multiple first signal traces and multiple second signal traces;

[0012] Multiple first signal traces are arranged sequentially along the second direction, and multiple second signal traces are arranged sequentially along the second direction, with at least two first signal traces on both sides of each second signal trace.

[0013] In some examples, two first signal traces are provided between two adjacent second signal traces.

[0014] In some examples, the orthographic projection of one of the plurality of first sub-signal traces on the substrate overlaps once with the orthographic projection of at least one of the plurality of first connection lines on the substrate.

[0015] In some examples, the first routing layer further includes: a drive signal trace extending along the first direction; the line width of the drive signal trace is greater than the line width of the first signal trace or the line width of the second signal trace.

[0016] In some examples, the first routing layer includes multiple drive signal traces;

[0017] Two first signal traces are located between two adjacent second signal traces, and one of the plurality of drive signal traces is provided between the two first signal traces.

[0018] In some examples, the first routing layer includes multiple of the aforementioned common voltage signal traces;

[0019] One of the multiple common voltage signal traces is provided between the nearest neighboring first signal trace and a drive signal trace.

[0020] In some examples, it also includes: a plurality of light-emitting units arranged in an array; each light-emitting unit includes a driving circuit and a light-emitting group coupled to the driving circuit, the light-emitting group including a plurality of light-emitting elements;

[0021] The driving circuit includes a first input terminal and an output terminal;

[0022] The first input terminal of the driving circuit is coupled to one end of at least one of the plurality of first connection lines, and the other end of the at least one first connection line is coupled to at least one of the plurality of first sub-signal traces.

[0023] The output terminal of the driving circuit is coupled to one end of at least one of the plurality of third connection lines, and the other end of the at least one third connection line is coupled to at least one of the plurality of first sub-signal lines.

[0024] The first sub-signal traces coupled to the first input terminal and the output terminal of the same driving circuit are different.

[0025] In some examples, the plurality of light-emitting units are arranged in N rows and M columns and divided into a plurality of light-emitting unit groups, and each of the plurality of light-emitting unit groups includes N rows and Y columns, a total of N*Y light-emitting units;

[0026] In the same light-emitting unit group, the N*Y light-emitting units are sequentially numbered according to their row and column distribution positions. The first input terminal of the driving circuit of the light-emitting unit numbered 1 is coupled to a first sub-signal trace through the first connection line. The output terminal of the driving circuit of the light-emitting unit numbered P is coupled to the first sub-signal trace to which the first input terminal of the driving circuit of the light-emitting unit numbered P+1 is coupled through the third connection line. The output terminal of the driving circuit of the light-emitting unit numbered P+1 is coupled to another first sub-signal trace through the third connection line;

[0027] The first sub-signal trace coupled to the first input terminal of the driving circuit of the light-emitting unit numbered 1, and the second sub-signal trace coupled to the output terminal of the driving circuit of the light-emitting unit numbered P+1 are located at the driving circuits of the light-emitting units with other numbers;

[0028] N is an integer greater than 0, M is an integer greater than 0, 0 < Y ≤ M and Y is an integer, 0 < P < N*Y and P is an integer.

[0029] In some examples, the driving circuit includes a second input terminal; one driving circuit is coupled to at least one of the first connection lines;

[0030] The second input terminals of all the driving circuits in each of the light-emitting unit groups are coupled to the same second signal trace through the first connection line.

[0031] In some examples, one light-emitting unit group among the plurality of light-emitting unit groups includes two columns of the light-emitting units;

[0032] A second signal trace and first signal traces located on both sides of the second signal trace are provided between the two columns of light-emitting units in each of the light-emitting unit groups.

[0033] In some examples, the light-emitting group is coupled between the driving voltage terminal and the output terminal of the driving circuit;

[0034] A driving signal trace is provided between adjacent light-emitting unit groups, and the driving voltage terminals in two adjacent columns of light-emitting units located in different light-emitting unit groups are both coupled to the same driving signal trace.

[0035] In some examples, the orthographic projection of the drive signal trace onto the substrate covers the orthographic projection of at least one of the plurality of light-emitting elements coupled to the drive signal trace onto the substrate.

[0036] In some examples, the light-emitting substrate further includes a driving signal conduction line; the driving signal conduction line extends along a second direction and is coupled to a plurality of driving signal traces.

[0037] In some examples, the driving circuit includes a common voltage terminal; a column of light-emitting units is coupled to a common voltage signal trace;

[0038] The common voltage signal trace's orthographic projection on the substrate covers the orthographic projection of the driving circuit and at least two light-emitting elements in the light-emitting unit coupled to the common voltage signal trace on the substrate.

[0039] In some examples, the second routing layer also includes auxiliary routings spaced apart from the first connecting line, the first connecting line and the third connecting line;

[0040] The auxiliary routing connects each of the common voltage signal routing lines.

[0041] The display device provided in this disclosure includes the above-described light-emitting substrate. Attached Figure Description

[0042] Figure 1 Schematic diagrams of some light-emitting substrates provided for embodiments of this disclosure;

[0043] Figure 2 for Figure 1 A schematic diagram of the arrangement of light-emitting units on the light-emitting substrate shown;

[0044] Figure 3 A waveform diagram of the second input signal in the driving circuit provided in an embodiment of this disclosure;

[0045] Figure 4 A schematic diagram illustrating the working process of the driving circuit provided in the embodiments of this disclosure;

[0046] Figure 5 Signal timing diagram of the driving circuit provided in the embodiments of this disclosure;

[0047] Figure 6 A schematic diagram illustrating the numbering method of the light-emitting units of the light-emitting substrate provided in the embodiments of this disclosure;

[0048] Figure 7 This is a schematic diagram of some layout structures of the light-emitting substrate provided in the embodiments of this disclosure;

[0049] Figure 8Further schematic diagrams of the layout structure of the light-emitting substrate provided in the embodiments of this disclosure;

[0050] Figure 9a This is a schematic diagram of the structure of the first wiring layer of the light-emitting substrate provided in an embodiment of the present disclosure;

[0051] Figure 9b This is a schematic diagram of the structure of the second wiring layer of the light-emitting substrate provided in an embodiment of the present disclosure;

[0052] Figure 10 These are some partial cross-sectional structural schematic diagrams of the light-emitting substrate provided in the embodiments of this disclosure;

[0053] Figure 11 Simplified structural schematic diagrams of the light-emitting substrate provided in the embodiments of this disclosure;

[0054] Figure 12 This is a schematic diagram of the structure of a display device provided in an embodiment of this disclosure. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Furthermore, the embodiments and features in the embodiments of this disclosure can be combined with each other without conflict. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0056] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “coupled” or “connected” are not limited to physical or mechanical coupling, but can include electrical coupling, whether direct or indirect.

[0057] It should be noted that the dimensions and shapes of the figures in the accompanying drawings do not reflect actual proportions and are intended only to illustrate the content of this disclosure. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

[0058] Mini-LEDs (or micro-LEDs) are small in size and high in brightness, making them widely used in display devices or their backlight modules. By finely adjusting the backlight, they enable the display of High-Dynamic Range (HDR) images. For example, the typical size (e.g., length) of a Micro-LED is less than 100 micrometers, such as 10 to 80 micrometers; the typical size (e.g., length) of a Mini-LED is 80 to 350 micrometers, such as 80 to 120 micrometers. Because LEDs are current-driven devices, signal lines are needed to transmit current signals from the driver chip to the LEDs. If each LED in the backlight module is controlled independently, multiple signal lines are required to couple to the corresponding LED, and due to wiring space limitations, signal interference may occur between the signal lines.

[0059] This disclosure provides at least one embodiment of a light-emitting substrate and a display device. It includes: a substrate 01; a first wiring layer on the substrate 01; a first insulating layer on the side of the first conductive layer facing away from the substrate 01; and a second wiring layer on the side of the first insulating layer facing away from the substrate 01. The first wiring layer may include: first signal lines and second signal lines. The second wiring layer includes: a plurality of first connection lines 310 and a plurality of first connection lines 320. The first signal lines include a plurality of first sub-signal lines 211 extending along a first direction and spaced apart; the second signal lines are a continuous structure extending along the first direction. At least one of the plurality of first sub-signal lines 211 is coupled to at least one of the plurality of first connection lines 310, and the first connection lines 320 are coupled to at least one of the plurality of first connection lines 320. The orthographic projections of the plurality of first connection lines 310 onto the substrate 01 do not overlap with the orthographic projections of the plurality of second signal traces onto the substrate 01, and there is an overlap between the orthographic projection of at least one of the plurality of first connection lines 320 onto the substrate 01 and the orthographic projection of at least one of the plurality of first sub-signal traces 211 onto the substrate 01. This light-emitting substrate enables independent regional control of light emission brightness, has low power consumption, high integration, and a simple control method. It can be used with passive display devices such as liquid crystal panels to achieve high-contrast displays. Furthermore, this light-emitting substrate can reduce signal interference and improve display effects. In some embodiments, the linewidths of the first signal traces and the second signal traces are different.

[0060] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that the same reference numerals will be used to refer to the same elements described in different drawings.

[0061] like Figure 1 As shown, at least one embodiment of this disclosure provides a light-emitting substrate, which includes a substrate 01 and a plurality of light-emitting units 100 arranged in an array. Each light-emitting unit 100 may include a driving circuit 110 and a light-emitting group coupled to the driving circuit 110, the light-emitting group including a plurality of light-emitting elements 120. Exemplarily, the driving circuit 110 may include a first input terminal Di, a second input terminal Pwr, an output terminal OT, and a common voltage terminal GND, and the plurality of light-emitting elements 120 in the light-emitting group are connected in series and coupled between the driving voltage terminal Vled and the output terminal OT of the driving circuit.

[0062] like Figure 1 and Figure 2 As shown, the light-emitting substrate 10 includes a substrate 01 and a plurality of light-emitting units 100 arranged in an array on the substrate 01. For example, the plurality of light-emitting units 100 are arranged in N rows and M columns, where N is an integer greater than 0 and M is an integer greater than 0. For example, the number of light-emitting units 100 can be determined according to actual needs, such as the size of the light-emitting substrate 10 and the required brightness. Figure 1 Only 4 rows and 4 columns of light-emitting units 100 are shown in the figure, but it should be understood that the number of light-emitting units 100 is not limited to this.

[0063] For example, such as Figure 1 and Figure 2 As shown, each column of light-emitting units 100 is arranged along a first direction F1, and each row of light-emitting units 100 is arranged along a second direction F2. For example, the light-emitting substrate is rectangular, wherein the first direction F1 is parallel to the long side of the light-emitting substrate 10, and the second direction F2 is parallel to the short side of the light-emitting substrate 10; of course, the first direction F1 can also be parallel to the short side of the light-emitting substrate 10, and the second direction F2 can also be parallel to the long side of the light-emitting substrate 10. Alternatively, the first direction F1 is the column direction of the light-emitting units 100, and the second direction F2 is the row direction of the light-emitting units 100; or, the first direction F1 is the row direction of the light-emitting units 100, and the second direction F2 is the column direction of the light-emitting units 100. Of course, the embodiments of this disclosure are not limited to these, and the first direction F1 and the second direction F2 can be any direction, as long as the first direction F1 and the second direction F2 intersect. Furthermore, the multiple light-emitting units 100 are not limited to being arranged in a straight line, but can also be arranged along a broken line, in a ring, or in any other way, depending on actual needs. The embodiments disclosed herein do not impose any restrictions on this.

[0064] For example, the material of the substrate 01 can be selected from plastic, polyimide, silicon, ceramic, glass, quartz, etc., and the embodiments disclosed herein do not limit this.

[0065] In some examples, in specific implementations, such as Figure 1 As shown, each light-emitting unit 100 may include a driving circuit 110, multiple light-emitting elements 120, and a driving voltage terminal Vled. The driving circuit 110 includes a first input terminal Di, a second input terminal Pwr, an output terminal OT, and a common voltage terminal GND. The light-emitting group is coupled between the driving voltage terminal Vled and the output terminal OT of the driving circuit 110. For example, the light-emitting elements 120 in the light-emitting group are connected in series and coupled between the driving voltage terminal Vled and the output terminal OT of the driving circuit 110. Alternatively, the light-emitting elements 120 in each light-emitting group can also be connected in parallel to couple between the driving voltage terminal Vled and the output terminal OT of the driving circuit 110. Or, some of the light-emitting elements 120 in each light-emitting group can be connected in parallel first and then in series to couple between the driving voltage terminal Vled and the output terminal OT of the driving circuit 110. In practical applications, the design can be determined according to actual needs, and no limitation is made here.

[0066] In some examples, in specific implementations, the driving circuit 110 can be configured to output a relay signal through the output terminal OT during a first time period based on a first input signal received at the first input terminal Di and a second input signal received at the second input terminal Pwr, and to provide a driving signal through the output terminal OT to a plurality of sequentially connected light-emitting elements 120 during a second time period. Exemplarily, the first input terminal Di receives a first input signal, such as an address signal, to select the driving circuit 110 corresponding to a given address. For example, the addresses of different driving circuits 110 may be the same or different. The first input signal can be an 8-bit address signal, and the address to be transmitted can be determined by parsing this address signal. The second input terminal Pwr receives a second input signal, such as a power line carrier communication signal. For example, the second input signal not only provides power to the driving circuit 110 but also transmits communication data to the driving circuit 110, which can be used to control the light-emitting duration of the corresponding light-emitting unit 100, thereby controlling its visual brightness. The output terminal OT can output different signals during different time periods, such as relay signals and driving signals respectively. For example, the relay signal is an address signal provided to other driving circuits 110. That is, the first input terminal Di of other driving circuits 110 receives the relay signal as its first input signal, thereby obtaining the address signal. For example, the driving signal can be a driving current used to drive the light-emitting element 120 to emit light. The common voltage terminal GND receives a common voltage signal, such as a ground signal.

[0067] The driving circuit 110 is configured to output a relay signal through the output terminal OT during a first time period based on a first input signal received at the first input terminal Di and a second input signal received at the second input terminal Pwr, and to provide a driving signal through the output terminal OT to a plurality of sequentially connected light-emitting elements 120 during a second time period. Specifically, during the first time period, the output terminal OT outputs a relay signal, which is provided to other driving circuits 110 to provide address signals. During the second time period, the output terminal OT outputs a driving signal, which is provided to the plurality of sequentially connected light-emitting elements 120, causing the light-emitting elements 120 to emit light during the second time period. For example, the first time period and the second time period are different time periods; the first time period may, for example, be earlier than the second time period. The first time period may be consecutive to the second time period, with the end time of the first time period being the start time of the second time period; alternatively, there may be other time periods between the first and second time periods, which can be used to implement other required functions, or these other time periods may only be used to separate the first and second time periods to avoid interference between the signals from the output terminal OT during the first and second time periods.

[0068] It should be noted that when the driving signal is a driving current, the driving current can flow from the output terminal OT to the light-emitting element 120, or it can flow from the light-emitting element 120 into the output terminal OT. The direction of the driving current flow can be determined according to actual needs, and the embodiments disclosed herein do not impose any restrictions on this. In this document, "output terminal OT outputs driving signal" means that the output terminal OT provides a driving signal, and the direction of the driving signal can be either from the output terminal OT or into the output terminal OT.

[0069] For example, such as Figure 1 As shown, multiple light-emitting elements 120 are connected in series and coupled in series between the driving voltage terminal Vled and the output terminal OT. For example, the light-emitting elements 120 can be micro-LEDs or mini-LEDs. For example, each light-emitting element 120 includes a positive (+) and a negative (-) electrode (or, may also be referred to as an anode and a cathode), and the positive and negative electrodes of multiple light-emitting elements 120 are connected in series sequentially, thereby forming a current flow path between the driving voltage terminal Vled and the output terminal OT. Furthermore, the driving voltage terminal Vled can provide a driving voltage, for example, a high voltage during the period when the light-emitting elements 120 need to emit light (the second period), and a low voltage during other periods. Thus, during the second period, the driving signal (e.g., driving current) flows sequentially from the driving voltage terminal Vled through the multiple light-emitting elements 120 and then into the output terminal OT of the driving circuit 110. The multiple light-emitting elements 120 emit light when the driving current flows, and by controlling the duration of the driving current, the duration of light emission of the light-emitting elements 120 can be controlled, thereby controlling the visual brightness of the light emission.

[0070] Exemplarily, as Figure 1 shown, in some examples, a light-emitting unit 100 may include four light-emitting elements 120, and the four light-emitting elements 120 are arranged in two rows and four columns. For example, when the four light-emitting elements 120 are connected in series, the light-emitting element 120 coupled to the driving voltage terminal Vled is taken as the starting point of the series connection of the four light-emitting elements 120, and the light-emitting element 120 coupled to the output terminal OT of the driving circuit 110 is taken as the end point of the series connection of the four light-emitting elements 120. For example, the driving voltage terminal Vled is coupled to the positive electrode of the light-emitting element 120, and the output terminal OT of the driving circuit 110 is coupled to the negative electrode of the light-emitting element 120. By adopting this distribution method and series connection method, the overlapping of wiring can be effectively avoided, which is convenient for design and preparation. Moreover, the lengths of the signal connections between any two adjacent light-emitting elements 120 on the series connection line can be set to be approximately the same, so that the resistance of the signal connection itself is relatively balanced, the load balance can be improved, and the stability of the circuit can be improved.

[0071] It should be noted that in the embodiments of the present disclosure, the number of light-emitting elements 120 in each light-emitting unit 100 is not limited, and can be any number such as 5, 6, 7, 8, etc., rather than being limited to 4. The multiple light-emitting elements 120 can be arranged in any arrangement, for example, arranged according to the required pattern, rather than being limited to the matrix arrangement. The setting position of the driving circuit 110 is not limited, and it can be set in any gap between the light-emitting elements 120, which can be determined according to actual needs, and the embodiments of the present disclosure do not limit this.

[0072] In some examples, in specific implementation, in combination with Figures 1 to 8 shown, the light-emitting elements 120 in the same light-emitting unit 100 are sequentially connected, and a polygon can be formed. For example, when the light-emitting unit includes four light-emitting elements 120, the sequential connection of the four light-emitting elements 120 can form a quadrilateral. Two sides of the quadrilateral can be parallel to the row direction, and the other two sides can be parallel to the column direction. Or, two sides of the quadrilateral can also form an angle with the row direction, and the other two sides can also form an angle with the column direction.

[0073] In some examples, in specific implementation, in combination with Figures 1 to 10 shown, the multiple light-emitting units 100 in the light-emitting substrate 10 can be divided into multiple light-emitting unit groups, and each light-emitting unit group 100 can include N rows and Y columns of a total of N*Y light-emitting units 100. Exemplarily, the light-emitting units 100 can be divided into M / Y groups. Among them, N is an integer greater than 0, M is an integer greater than 0, 0 < Y ≤ M and Y is an integer. For example, Y = 2 can be set, and then two adjacent columns of light-emitting units 100 can form a light-emitting unit group. For example, Figure 1As shown, the first column of light-emitting units 100 and the second column of light-emitting units 100 can form a first light-emitting unit group FGZ-1. The third column of light-emitting units 100 and the fourth column of light-emitting units 100 can form a second light-emitting unit group FGZ-2.

[0074] In some examples, in specific implementation, combined with Figures 1 to 8 As shown, in the same light-emitting unit group, the relative positional relationship of the light-emitting elements 120 in each light-emitting unit 100 adjacent in the row direction is the same, and they are periodically repeated along the column direction F1. Further, in different light-emitting unit groups, the relative positional relationship of the light-emitting elements 120 in each light-emitting unit 100 adjacent in the column direction is also the same. Exemplarily, in the same light-emitting unit group, among multiple light-emitting units 100 arranged sequentially in the column direction, the light-emitting elements 120 located at the same position in each light-emitting unit 100 can be arranged along the column direction F1. For example, among multiple light-emitting units 100 arranged in the column direction, the light-emitting elements 120 located at the same position in each light-emitting unit 100 can be arranged approximately on the same straight line along the column direction. Exemplarily, combined with... Figure 1 As shown, line L1 extends along the column direction, and the light-emitting elements 120 that line L1 passes through are the light-emitting elements 120 at the same position among the light-emitting units 100 arranged in the column direction. That is, the light-emitting elements 120 at the same position among the light-emitting units 100 arranged in the column direction can be roughly arranged along a line L1 along the column direction. Line L2 extends along the column direction, and the light-emitting elements 120 that line L2 passes through are the other light-emitting elements 120 at the same position among the light-emitting units 100 arranged in the column direction. That is, the other light-emitting elements 120 at the same position among the light-emitting units 100 arranged in the column direction can be roughly arranged along a line L2 along the column direction.

[0075] In some embodiments, combined with Figure 1 As shown, in adjacent light-emitting units 100 in the row direction, the light-emitting elements 120 located at the same position in each light-emitting unit 100 can be arranged approximately on the same straight line along the row direction F2. For example, the straight line L3 extends along the row direction, and the light-emitting elements 120 that the straight line L3 passes through are the light-emitting elements 120 located at the same position in the light-emitting units 100 arranged in the row direction. That is, the light-emitting elements 120 located at the same position in the light-emitting units 100 arranged in the column direction can be arranged approximately on a straight line L3 along the row direction F2.

[0076] In some examples, in specific implementation, combined with Figures 1 to 8As shown, in the same light-emitting unit group, the relative positions of the driving circuits in adjacent light-emitting units 100 in the row direction can be different, while the positions of the driving circuits in adjacent light-emitting units 100 in the column direction can be the same. Furthermore, the driving circuits in two adjacent columns of light-emitting units in the same light-emitting unit group can be arranged in a staggered manner.

[0077] For ease of description, the light-emitting units in the light-emitting substrate are labeled according to their row and column arrangement using coordinates. For example, the coordinates of the light-emitting unit in column b, row a can be (a, b), where 1 ≤ a ≤ N and 1 ≤ b ≤ M. For example, in a group of light-emitting units, such as the first group FGZ-1:

[0078] The driving circuits in the light-emitting unit (1,1), the light-emitting unit (1,2), and the light-emitting unit (2,1) are located at the three vertices of a triangle, for example, at the three vertices of a first equilateral triangle; the driving circuits in the light-emitting unit (2,1), the light-emitting unit (1,2), and the light-emitting unit (2,2) can be located at the three vertices of a triangle, for example, at the three vertices of a second equilateral triangle; the driving circuits in the light-emitting unit (2,1), the light-emitting unit (2,2), and the light-emitting unit (3,1) can be located at the three vertices of a triangle, for example, at the three vertices of a third equilateral triangle; the driving circuits in the light-emitting unit (3,1), the light-emitting unit (2,2), and the light-emitting unit (3,2) can be located at the three vertices of a triangle, for example, at the three vertices of a fourth equilateral triangle.

[0079] The line connecting the center of the first equilateral triangle and the center of the third equilateral triangle is parallel to the column direction F1; and the line connecting the center of the second equilateral triangle and the center of the fourth equilateral triangle is also parallel to the column direction F1.

[0080] The arrangement of the driving circuits in other light-emitting units belonging to the same light-emitting unit group follows the same pattern as above, and so on, so it will not be repeated here.

[0081] For two adjacent groups of light-emitting units: the first group of light-emitting units FGZ-1 and the second group of light-emitting units FGZ-2:

[0082] The driving circuits of light-emitting units (1, 2) in the first light-emitting unit group FGZ-1, and the driving circuits of light-emitting units (1, 3) and (2, 3) in the second light-emitting unit group FGZ-2 can be located at the three vertices of a triangle, for example, at the three vertices of the fifth equilateral triangle; the driving circuits of light-emitting units (2, 3) in the second light-emitting unit group FGZ-2, and the driving circuits of light-emitting units (1, 2) and (2, 2) in the first light-emitting unit group FGZ-1 can be located at the three vertices of a triangle, for example, at the three vertices of the sixth equilateral triangle; the driving circuits of light-emitting units (1, 3), (1, 4), and (2, 3) in the second light-emitting unit group FGZ-2 can be located at the three vertices of a triangle, for example, at the three vertices of the seventh equilateral triangle.

[0083] The line connecting the centers of the first, fifth, and seventh equilateral triangles is parallel to the row direction F2; while the line connecting the centers of the second and sixth equilateral triangles is parallel to the row direction F2.

[0084] The arrangement of the driving circuits in the multiple light-emitting units on the light-emitting substrate can be designed according to the above rules, and will not be elaborated here. In some examples, in specific implementation, combined with... Figures 1 to 8 As shown, along the row direction, the arrangement of the light-emitting elements and driving circuits in a light-emitting unit group is considered as a repeating unit. The light-emitting substrate 10 can include multiple repeating units, with adjacent repeating units spaced apart and arranged periodically along the row direction. This allows a light-emitting unit group to be repeatedly arranged as a repeating unit to form the light-emitting substrate 10. This ensures that the relative positions of the multiple light-emitting elements 120 and driving circuits 110 in each light-emitting unit 100 arranged in the row direction are substantially the same.

[0085] In some examples, the drive circuit 110 may include a demodulation circuit, a physical layer interface circuit, a data processing control circuit, a pulse width modulation circuit, a drive signal generation circuit, a relay signal generation circuit, and a power supply circuit.

[0086] Exemplarily, the demodulation circuit is coupled to the second input terminal Pwr and the physical layer interface circuit, and is configured to demodulate the second input signal to obtain communication data and transmit the communication data to the physical layer interface circuit. For example, the second input signal input to the second input terminal Pwr is a power line carrier communication signal, and the power line carrier communication signal contains information corresponding to the communication data. For example, the communication data is data reflecting the light emission duration, and thus represents the required light emission brightness. Compared with the conventional Serial Peripheral Interface (SPI) protocol, in the embodiments of the present disclosure, by adopting the Power Line Carrier Communication (PLC) protocol, the communication data is superimposed on the power supply signal, thereby effectively reducing the number of signal lines.

[0087] Figure 3 Schematically shows a waveform diagram of the second input signal of the driving circuit 110. As Figure 3 shown, the dashed oval frame represents an enlarged view of the corresponding waveform. When the second input signal is at a high level, the amplitude of its high level fluctuates near the threshold amplitude Vth. For example, it varies between the first amplitude V1 and the second amplitude V2, where V2 < Vth < V1. By modulating the variation law of the first amplitude V1 and the second amplitude V2, the communication data can be modulated into the second input signal, so that the second input signal transmits the information corresponding to the communication data while transmitting electrical energy. For example, the demodulation circuit filters out the DC power supply component of the second input signal, thereby obtaining the communication data. For a detailed description of the second input signal, reference can be made to the conventional power line carrier communication signal, which will not be elaborated here. Correspondingly, for a detailed description of the demodulation circuit, reference can also be made to the demodulation circuit of the conventional power line carrier communication signal, which will not be elaborated here.

[0088] Exemplarily, the physical layer interface circuit is further coupled to the data processing and control circuit, and is configured to process the communication data to obtain a data frame (such as frame frequency data) and transmit the data frame to the data processing and control circuit. The data frame obtained by the physical layer interface circuit contains the information to be transmitted to the driving circuit 110, such as information related to the light emission time (such as the specific duration of the light emission time). For example, the physical layer interface circuit can be a conventional port physical layer (Physical, PHY), and for a detailed description, reference can be made to the conventional design, which will not be elaborated here.

[0089] For example, the data processing control circuit is also coupled to the first input terminal Di, the pulse width modulation circuit, and the relay signal generation circuit. The data processing control circuit is configured to generate a pulse width control signal based on a data frame and transmit the pulse width control signal to the pulse width modulation circuit, and to generate a relay control signal based on the first input signal and transmit the relay control signal to the relay signal generation circuit. For example, the required light emission duration of the light-emitting element 120 connected to the driving circuit 110 can be determined from the data frame, and a corresponding pulse width control signal is generated based on this light emission duration. For example, the relay control signal is a signal generated by the data processing control circuit after processing the first input signal. By processing the first input signal (e.g., parsing, latching, decoding, etc.), the address signal corresponding to the driving circuit 110 can be determined, and a relay control signal corresponding to a subsequent address, which corresponds to another driving circuit 110, can be generated. For example, the data processing control circuit can be implemented as a microcontroller, a central processing unit (CPU), a digital signal processor, etc.

[0090] Exemplarily, the pulse width modulation circuit is also coupled to the drive signal generation circuit and configured to generate a pulse width modulation signal in response to a pulse width control signal, and transmit the pulse width modulation signal to the drive signal generation circuit. For example, the pulse width modulation signal generated by the pulse width modulation circuit corresponds to the light emission duration required by the light-emitting element 120, such as an effective pulse width duration equal to the light emission duration required by the light-emitting element 120. For example, a detailed description of the pulse width modulation circuit can be found in conventional pulse width modulation circuits, and will not be detailed here.

[0091] For example, the drive signal generation circuit is also coupled to the output terminal OT and is configured to generate a drive signal in response to a pulse width modulation signal and output the drive signal from the output terminal OT. Here, outputting the drive signal from the output terminal OT can mean that the drive signal (e.g., drive current) flows from the output terminal OT to the light-emitting element 120, or it can mean that the drive signal (e.g., drive current) flows from the light-emitting element 120 into the output terminal OT, and the specific current direction is not limited.

[0092] For example, in some examples, when the drive signal is a drive current, the drive signal generation circuit may include a current source and a metal-oxide-semiconductor (MOS) field-effect transistor (FET), referred to as a MOS transistor. The control terminal of the MOS transistor receives a pulse-width modulation (PWM) signal transmitted by the pulse-width modulation (PWM) circuit, thereby turning it on or off under the control of the PWM signal. The first terminal of the MOS transistor is coupled to the output terminal OT, and the second terminal of the MOS transistor is coupled to the first terminal of the current source. The second terminal of the current source is coupled to the common voltage terminal GND to receive the common voltage. For example, the current source may be a constant current source.

[0093] When the pulse width modulation signal is at an active level, the MOSFET is turned on, and the current source provides drive current through the output terminal OT. When the pulse width modulation signal is at an inactive level, the MOSFET is turned off, and the output terminal OT does not provide drive current. The duration of the active level of the pulse width modulation signal is equal to the conduction duration of the MOSFET, and the conduction duration of the MOSFET is equal to the duration for which the output terminal OT provides drive current. Therefore, the light-emitting duration of the light-emitting element 120 can be further controlled, thereby controlling the visual brightness. For example, in some examples, when the MOSFET is turned on, the drive current flows from the OT terminal into the drive circuit 110, and sequentially flows through the MOSFET and the current source, and then into the ground terminal (e.g., the common voltage terminal GND). It should be noted that in the embodiments of this disclosure, the drive signal generation circuit can also adopt other circuit structures, and the embodiments of this disclosure do not limit this.

[0094] Exemplarily, the relay signal generation circuit is also coupled to the output terminal OT and configured to generate a relay signal based on a relay control signal, and output the relay signal from the output terminal OT. For example, the relay control signal corresponds to a subsequent address, and the relay signal generated based on the relay control signal contains the subsequent address, which corresponds to another drive circuit 110. After the relay signal is output from the output terminal OT, it is provided to the first input terminal Di of the separately provided drive circuit 110. The relay signal is input to the separately provided drive circuit 110 as a first input signal, thereby enabling the separately provided drive circuit 110 to obtain the corresponding address signal. The relay signal generation circuit can be implemented by a latch, decoder, encoder, etc., and the embodiments of this disclosure are not limited thereto.

[0095] It should be noted that, in the embodiments of this disclosure, although both the drive signal generation circuit and the relay signal generation circuit are coupled to the output terminal OT, the drive signal generation circuit and the relay signal generation circuit output drive signals and relay signals at different time periods. The drive signals and relay signals are transmitted through the output terminal OT in a time-division manner, so they will not affect each other.

[0096] For example, the power supply circuit is coupled to both the demodulation circuit and the data processing control circuit, and is configured to receive electrical energy and supply power to the data processing control circuit. For instance, if the second input signal is a power line carrier communication signal, after demodulation by the demodulation circuit, the DC power component (i.e., electrical energy) in the second input signal is transmitted to the power supply circuit, which then supplies power to the data processing control circuit. Of course, the embodiments of this disclosure are not limited to this; the power supply circuit can also be coupled to other circuits in the drive circuit 110 to provide electrical energy. The power supply circuit can be implemented using a switching circuit, a voltage conversion circuit, a voltage regulator circuit, etc., and the embodiments of this disclosure do not limit this.

[0097] It should be noted that, in the embodiments of this disclosure, the driving circuit 110 may also include more circuits and components, not limited to the demodulation circuit, physical layer interface circuit, data processing control circuit, pulse width modulation circuit, driving signal generation circuit, relay signal generation circuit and power supply circuit described above. This can be determined according to the functions to be implemented, and the embodiments of this disclosure do not limit this.

[0098] Figure 4 The schematic diagram illustrates the working process of the drive circuit 110. Figure 5 The signal timing diagram of the drive circuit 110 is shown. For example... Figure 4 and Figure 5 As shown, when the drive circuit 110 is working, it first powers on (i.e., is powered on) to complete initialization, and then performs an address writing operation during time period S1. That is, during time period S1, the first input signal Di_1 is input to the drive circuit 110 through the first input terminal Di, thereby writing the address. For example, the first input signal Di_1 is sent through a separately provided transmitter.

[0099] Next, during time period S2, drive configuration is performed, and a relay signal Di_2 is output through the output terminal OT. For example, the relay signal Di_2 is input as a first input signal to the first input terminal Di of the separately provided drive circuit 110. For example, the aforementioned first time period is time period S2.

[0100] Then, during period S3, the drive voltage terminal Vled is energized. For example, after multiple drive circuits 110 have obtained the corresponding address, period S3 begins approximately 10 microseconds later. At this time, the drive voltage provided by the drive voltage terminal Vled becomes high.

[0101] Next, during period S4, the driving circuit 110 is in normal operating mode, and the output terminal OT provides a driving signal (e.g., driving current) according to the required duration, so that the light-emitting element 120 coupled to the driving circuit 110 emits light for the required duration. For example, the aforementioned second period is period S4. For example, in the case of a backlight unit of a display device, the light-emitting substrate 10 using the driving circuit 110 can achieve local dimming, thereby achieving a high dynamic range effect.

[0102] Finally, during period S5, the system is shut down, that is, the drive circuit 110 is de-energized, and the drive voltage provided by the drive voltage terminal Vled becomes low, and the light-emitting element 120 stops emitting light.

[0103] It should be noted that the above workflow is merely illustrative and not restrictive. The actual workflow of the drive circuit 110 can be determined according to actual needs, and the embodiments of this disclosure do not impose any limitations on it. Figure 5 In this context, VREG, POR, Vreg_1.8, OSC, and Res_B are all internal signals of the driver circuit 110 and will not be input or output through the first input terminal Di, the second input terminal Pwr, the output terminal OT, and the common voltage terminal GND. Di_1 is the first input signal received by the driver circuit 110, Di_2 is the relay signal output by the driver circuit 110 (that is, the first input signal received by the next connected driver circuit 110), and Di_n is the first input signal received by the nth driver circuit 110 among the multiple driver circuits 110 coupled in sequence.

[0104] For example, in a specific implementation, the control circuit 110 can be configured as a chip. The chip size (e.g., length) can be tens of micrometers, and the chip area is approximately several hundred square micrometers or even smaller, similar in size to a Mini-LED. This miniaturization feature facilitates integration into the light-emitting substrate 10 (e.g., bonding to the surface of the light-emitting substrate 10), saving space on the printed circuit board, simplifying the structure, and contributing to a thinner and lighter design. Each control circuit 110 directly drives one light-emitting unit 100, avoiding the problems of complex operation and flickering inherent in line scanning control methods. Furthermore, the driving circuit 110 has fewer ports, requires fewer signals, has a simple control method, simple wiring, and low cost.

[0105] In some examples, in specific implementations, such as Figures 1 to 8 , Figure 9a as well as Figure 10As shown, the first trace layer 011 may include: a first signal trace 210 extending along a first direction F1, a second signal trace 220 extending along the first direction F1, a drive signal trace 240 extending along the first direction F1, and a common voltage signal trace 250 extending along the first direction F1. The linewidths of the first signal trace 210 and the second signal trace 220 are different. For example, the linewidth of the second signal trace 220 is greater than the linewidth of the first signal trace 210. Alternatively, the linewidth of the first signal trace 210 is greater than the linewidth of the second signal trace 220. It should be noted that the linewidth of the first signal trace 210 is the width of its orthographic projection onto the substrate 01 in a direction perpendicular to its own extension, i.e., its width in the second direction F2. The linewidth of the second signal trace 220 is the width of its orthographic projection onto the substrate 01 in a direction perpendicular to its own extension, i.e., its width in the second direction F2.

[0106] In some examples, in specific implementations, such as Figures 1 to 9a As shown, the linewidth of the drive signal trace 240 can be greater than the linewidth of the first signal trace 210. Alternatively, the linewidth of the drive signal trace 240 can also be greater than the linewidth of the second signal trace 220. It should be noted that the linewidth of the drive signal trace 240 is the width of the drive signal trace projected onto the substrate 01 in a direction perpendicular to its own extension direction, that is, the width in the second direction F2.

[0107] In some examples, in specific implementations, such as Figures 1 to 9a As shown, the linewidth of the common voltage signal trace 250 can be greater than the linewidth of the first signal trace 210. Alternatively, the linewidth of the common voltage signal trace 250 can also be greater than the linewidth of the second signal trace 220. It should be noted that the linewidth of the common voltage signal trace is the width of the common voltage signal trace projected onto the substrate 01 in a direction perpendicular to its own extension direction, that is, the width in the second direction F2.

[0108] In some examples, in specific implementations, such as Figures 1 to 9a As shown, the line width of the common voltage signal trace 250 can be greater than the line width of the drive signal trace 240; or, the line width of the common voltage signal trace 250 can be less than the line width of the drive signal trace 240; or, the line width of the common voltage signal trace 250 is approximately equal to the line width of the drive signal trace 240.

[0109] It should be noted that in practical applications, the line width of the above-mentioned traces can be designed according to the specifications of the light-emitting substrate and the application requirements, and no limitation is made here.

[0110] In some examples, in specific implementations, such as Figures 1 to 9aAs shown, by coupling the first signal trace 210 to the first input terminal Di of the driving circuit 110, a first input signal can be input to the first input terminal Di of the driving circuit 110 through the first signal trace 210. The first trace layer may include multiple first signal traces 210. That is, multiple first signal traces extending along a first direction are provided in the light-emitting substrate. Furthermore, the multiple first signal traces are arranged sequentially along a second direction. For example, each first signal trace 210 may include multiple first sub-signal traces 211 spaced apart. Furthermore, the multiple first sub-signal traces 211 in the same first signal trace 210 extend along the first direction F1. This makes each first signal trace 210 divided into segments of multiple first sub-signal traces 211.

[0111] In some examples, in specific implementations, such as Figures 1 to 9a As shown, by coupling the second signal trace 220 to the second input terminal Pwr of the driving circuit 110, a second input signal can be input to the second input terminal Pwr of the driving circuit 110 through the second signal trace 220. The second signal trace can be a continuous structure extending along the first direction, that is, the second signal trace is not segmented and is a single trace. For example, the first trace layer may include multiple second signal traces 220. That is, multiple second signal traces 220 extending along the first direction F1 are provided in the light-emitting substrate. Furthermore, these multiple second signal traces 220 are arranged sequentially along the second direction F2.

[0112] In some examples, in specific implementations, such as Figures 1 to 9a As shown, at least two first signal traces 210 are provided on both sides of a second signal trace 220. For example, two first signal traces 210 may be provided on both sides of a second signal trace 220. Alternatively, three first signal traces 210 may be provided on both sides of a second signal trace 220. Or, four or more first signal traces 210 may be provided on both sides of a second signal trace 220. In practical applications, the configuration can be adjusted according to the specific application requirements, and is not limited here.

[0113] In some examples, in specific implementations, such as Figures 1 to 9a As shown, two first signal lines 210 are disposed between two adjacent second signal lines 220. For example, two first signal lines 210 are disposed between the two nearest adjacent second signal lines 220. Thus, the number of first signal lines 210 in the light-emitting substrate is twice the number of second signal lines 220.

[0114] In some examples, in specific implementations, such as Figures 1 to 9aAs shown, by coupling the drive signal trace 240 to the drive voltage terminal Vled, a signal can be input to the drive voltage terminal Vled through the drive signal trace 240. Furthermore, the drive signal trace 240 can also be a continuous structure extending along the first direction, i.e., the drive signal trace 240 is not segmented and is a single, continuous trace. For example, the first trace layer 011 may include multiple drive signal traces 240. That is, the light-emitting substrate is provided with multiple drive signal traces 240 extending along the first direction F1. Furthermore, these multiple drive signal traces 240 are arranged sequentially along the second direction F2. Moreover, for two first signal traces 210 located between two adjacent second signal traces 220, one of the multiple drive signal traces 240 is provided between these two first signal traces 210.

[0115] In some examples, in specific implementations, such as Figures 1 to 9a As shown, by coupling the common voltage signal trace 250 to the common voltage terminal GND, a signal can be input to the common voltage terminal GND through the common voltage signal trace 250. Furthermore, the common voltage signal trace 250 can also be a continuous structure extending along the first direction, i.e., the common voltage signal trace 250 is not segmented and is a single trace. For example, the first trace layer 011 may include multiple common voltage signal traces 250. That is, the light-emitting substrate is provided with multiple common voltage signal traces 250 extending along the first direction F1. Furthermore, these multiple common voltage signal traces 250 are arranged sequentially along the second direction F2. Moreover, one of the multiple common voltage signal traces 250 is disposed between the nearest neighboring first signal trace 210 and a driving signal trace 240. This allows the drive signal trace 240 and the first signal trace 210 to be isolated via the common voltage signal trace 250, reducing interference between the signals transmitted in the drive signal trace 240 and the first signal trace 210.

[0116] In some examples, in specific implementations, such as Figures 1 to 8 as well as Figure 9b As shown, the second wiring layer 012 may include: multiple first connecting lines 310, multiple first connecting lines 320, multiple third connecting lines 330, multiple fourth connecting lines 340, multiple fifth connecting lines 350, multiple sixth connecting lines 360, and auxiliary wiring 520 arranged at intervals between each other.

[0117] In some examples, in specific implementations, such as Figures 1 to 8 as well as Figure 9bAs shown, at least one of the multiple first sub-signal traces 211 is coupled to at least one of the multiple first connection lines 310, and the first connection line 320 is coupled to at least one of the multiple first connection lines 320. Furthermore, the orthographic projections of the multiple first connection lines 310 onto the substrate 01 do not overlap with the orthographic projections of the multiple second signal traces onto the substrate 01, and there is an overlap region between the orthographic projection of at least one of the multiple first connection lines 320 onto the substrate 01 and the orthographic projection of at least one of the multiple first sub-signal traces 211 onto the substrate 01.

[0118] For example, the orthographic projection of one of the plurality of first sub-signal traces 211 onto the substrate 01 overlaps once with the orthographic projection of at least one of the plurality of first connection lines 320 onto the substrate 01. For instance, the orthographic projection of one first sub-signal trace 211 onto the substrate 01 overlaps once with the orthographic projection of one first connection line 320 onto the substrate 01. Alternatively, the orthographic projection of one first sub-signal trace 211 onto the substrate 01 may also overlap once with the orthographic projections of two first connection lines 320 onto the substrate 01; this is not limited to this.

[0119] It is understandable that when a substrate has multiple conductive patterns, overlapping areas inevitably exist between the conductive patterns. During signal transmission, parasitic effects caused by the resistance (R) of the conductive patterns themselves and the capacitance (C) formed by the overlapping areas between the conductive patterns can cause transmission delays (RC-delay) in the conductive patterns (e.g., signal lines), affecting the accuracy of electrical components (e.g., driving circuits) on the substrate in receiving electrical signals over time. RC-delay typically occurs in signal lines transmitting fluctuating signals (e.g., DC signals with varying amplitudes but very low frequencies, or AC signals, i.e., power line carrier signals). Therefore, in some embodiments, at least one of the first signal trace 210 and the second signal trace 220 transmits a fluctuating signal. The wiring method of this embodiment can significantly reduce the transmission delay caused by excessive overlapping areas in signal lines transmitting fluctuating signals, thereby affecting the light-emitting effect of the light-emitting substrate.

[0120] In some examples, in specific implementations, such as Figures 1 to 8 as well as Figure 9b , Figure 10As shown, the first input terminal Di of the driving circuit 110 is coupled to one end of at least one of the multiple first connection lines 310, and the other end of the at least one first connection line 310 is coupled to at least one of the multiple first sub-signal lines 211. Furthermore, the output terminal OT of the driving circuit 110 is coupled to one end of at least one of the multiple third connection lines 330, and the other end of the at least one third connection line 330 is coupled to at least one of the multiple first sub-signal lines 211. The first input terminal Di and the output terminal OT of the same driving circuit 110 are coupled to different first sub-signal lines 211. This allows the driving circuits 110 in different light-emitting units 100 to be coupled through the first connection lines 310, the first sub-signal lines 211, and the third connection lines 330.

[0121] In some examples, in specific implementations, such as Figures 1 to 8 As shown, the driving circuits 110 in at least two different light-emitting units 100 along the first direction F1 are coupled together. For example, the driving circuits 110 in the two different light-emitting units 100 can be coupled together by a first connecting line 310, a first sub-signal trace 211 and a third connecting line 330.

[0122] For example, in Figure 1 In the example shown, taking N=4 as an example, each light-emitting unit group 100 can include 8 light-emitting units 100 in 4 rows and 2 columns. Of course, in practical applications, the specific values ​​of M, N, and Y can be designed and determined according to the actual application requirements, and are not limited here.

[0123] Exemplarily, in the same light-emitting unit group, N*Y light-emitting units 100 are numbered in sequence according to their row and column distribution positions. The first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 1 is coupled to a first sub-signal trace 211 through a first connection line 310. The output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered P is coupled to the first sub-signal trace 211 to which the first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered P+1 is coupled through a third connection line 330. The output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered P+1 is coupled to another first sub-signal trace 211 through a third connection line 330. Moreover, the first sub-signal trace 211 to which the first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 1 is coupled, and the second sub-signal trace to which the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered P+1 is coupled are coupled to the driving circuits 110 of other numbered light-emitting units 100. Here, 0<P<N*Y and P is an integer. For example, the light-emitting units 100 arranged in the column direction can be coupled in cascade in sequence through the first sub-signal traces 211.

[0124] For example, in some examples, as Figure 6 shown, N*Y light-emitting units 100 can be numbered in sequence in an n shape, Figure 6 where each dotted rectangle represents a light-emitting unit 100, and the numbers of each light-emitting unit 100 are marked in each rectangle. Combining Figure 1 with Figure 6 shown, in the same light-emitting unit group, the light-emitting unit 100 numbered 1 and the light-emitting unit 100 numbered N*Y are adjacent in the second direction F2, and are the two light-emitting units closest to the bonding area in the light-emitting unit group; the light-emitting unit 100 numbered N*Y / 2 and the light-emitting unit 100 numbered N*Y / 2+1 are adjacent in the second direction. Moreover, when 1≤P≤N*Y / 2-1, the output terminal OT of the driving circuit of the light-emitting unit numbered P is sequentially coupled to the first input terminal Di of the driving circuit of the light-emitting unit numbered P+1 along the first direction F1. When N*Y / 2+1≤P≤N*Y-1, the output terminal OT of the driving circuit of the light-emitting unit numbered P is sequentially coupled to the first input terminal Di of the driving circuit of the light-emitting unit numbered P+1 along the first direction F1.

[0125] For example, in the same group of light-emitting units, light-emitting unit 100 numbered 1 and light-emitting unit 100 numbered 8 are arranged adjacent to each other in the second direction F2, and light-emitting unit 100 numbered 4 and light-emitting unit 100 numbered 5 are arranged adjacent to each other in the second direction. The output terminal OT of the driving circuit of light-emitting unit 100 numbered 1 is coupled to the first input terminal Di of the driving circuit of light-emitting unit 2 numbered 2. The output terminal OT of the driving circuit of light-emitting unit 100 numbered 2 is coupled to the first input terminal Di of the driving circuit of light-emitting unit 3 numbered 3. The output terminal OT of the driving circuit of light-emitting unit 100 numbered 3 is coupled to the first input terminal Di of the driving circuit of light-emitting unit 4 numbered 4. The output terminal OT of the driving circuit of light-emitting unit 100 numbered 4 is coupled to the first input terminal Di of the driving circuit of light-emitting unit 5 numbered 5. The output terminal OT of the driving circuit of light-emitting unit 100 numbered 5 is coupled to the first input terminal Di of the driving circuit of light-emitting unit 6 numbered 6. The output terminal OT of the driving circuit of the light-emitting unit 100 numbered 6 is coupled to the first input terminal Di of the driving circuit of the light-emitting unit numbered 7. The output terminal OT of the driving circuit of the light-emitting unit 100 numbered 7 is coupled to the first input terminal Di of the driving circuit of the light-emitting unit numbered 8.

[0126] For example, combining Figure 1 and Figure 6As shown, in the first light-emitting unit group FGZ-1 formed by the first column of light-emitting units 100 and the second column of light-emitting units 100, the first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 1 is coupled to the first signal terminal 610 of the first light-emitting unit group FGZ-1 through a first sub-signal line 211. The output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered P+1 is coupled to the first signal terminal 610 of the first light-emitting unit group FGZ-1 through another first sub-signal line 211. The output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered P is coupled to the first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered P+1, that is, the first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered P+1 receives the relay signal output by the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered P as the first input signal. In the second light-emitting unit group FGZ-2 formed by the third and fourth columns of light-emitting units 100, the first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 1 is coupled to the first signal terminal 610 of the second light-emitting unit group FGZ-2 via a first sub-signal line 211. The output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered P+1 is coupled to the first signal terminal 610 of the second light-emitting unit group FGZ-2 via another first sub-signal line 211. The output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered P is coupled to the first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered P+1, that is, the first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered P+1 receives the relay signal output by the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered P as the first input signal.

[0127] For example, combining Figure 1 , Figures 7 to 9bAs shown, taking the first light-emitting unit group FGZ-1 as an example, in the first light-emitting unit group FGZ-1, light-emitting unit 100 numbered 1 is located in the fourth row and first column, light-emitting unit 100 numbered 2 is located in the third row and first column, light-emitting unit 100 numbered 3 is located in the second row and first column, light-emitting unit 100 numbered 4 is located in the first row and first column, light-emitting unit 100 numbered 5 is located in the first row and second column, light-emitting unit 100 numbered 6 is located in the second row and second column, light-emitting unit 100 numbered 7 is located in the third row and second column, and light-emitting unit 100 numbered 8 is located in the fourth row and second column. The first input terminal Di of the driving circuit 110 of light-emitting unit 100 numbered 1 is coupled to the corresponding first signal terminal 610 of the first light-emitting unit group FGZ-1 through a first sub-signal trace 211. The first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 2 is coupled to the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered 1 through a first sub-signal line 211, a first connection line 310, and a third connection line 330. The first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 3 is coupled to the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered 2 through a first sub-signal line 211, a first connection line 310, and a third connection line 330. The first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 4 is coupled to the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered 3 through a first sub-signal line 211, a first connection line 310, and a third connection line 330. The first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 5 is coupled to the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered 4 through a first sub-signal line 211, a first connection line 310, and a third connection line 330. The first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 6 is coupled to the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered 5 through a first sub-signal line 211, a first connection line 310, and a third connection line 330. The first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 7 is coupled to the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered 6 through a first sub-signal line 211, a first connection line 310, and a third connection line 330. The first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 8 is coupled to the output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered 7 through a first sub-signal line 211, a first connection line 310, and a third connection line 330. The output terminal OT of the driving circuit 110 of the light-emitting unit 100 numbered 8 is coupled to the corresponding output terminal of the first light-emitting unit group FGZ-1 through another first sub-signal line.The same principle applies to the others, and so on, so I will not elaborate further here.

[0128] In some examples, in specific implementations, such as Figures 1 to 8 As shown, the second signal trace 220 is coupled to the second input terminal Pwr of the driving circuit 110. This allows the second input signal to be transmitted to the second input terminal Pwr of the driving circuit 110 via the second signal trace 220. For example, one driving circuit is coupled to at least one first connection line 320. Furthermore, the second input terminals Pwr of all driving circuits in each light-emitting unit group can be coupled to the same second signal trace 220 via the first connection line 320. This allows one second signal trace 220 to be provided for each light-emitting unit group.

[0129] In some examples, in specific implementations, such as Figures 1 to 8 As shown, the second signal trace 220 can extend along the first direction F1. This allows the first signal trace 210 and the second signal trace 220 to extend in the same direction, which facilitates wiring design.

[0130] In some examples, in specific implementations, such as Figures 1 to 8 As shown, multiple second signal traces 220 can be configured. To minimize the number of second signal traces 220 and reduce wiring density, the second input terminals Pwr of all driving circuits 110 in a light-emitting unit group can be coupled to the same second signal trace 220. That is, one light-emitting unit group corresponds to one second signal trace 220. For example, the first light-emitting unit group FGZ-1 corresponds to one second signal trace 220, and the second input terminals Pwr of all driving circuits 110 in the first light-emitting unit group FGZ-1 are coupled to their corresponding second signal trace 220. The second light-emitting unit group FGZ-2 corresponds to another second signal trace 220, and the second input terminals Pwr of all driving circuits 110 in the second light-emitting unit group FGZ-2 are coupled to their corresponding second signal trace 220. This allows the number of second signal traces in the light-emitting substrate 10 to be M / 2.

[0131] In some examples, in specific implementations, such as Figures 1 to 8 As shown, a light-emitting unit group may include two columns of light-emitting units 100; and a second signal trace 220 and first signal traces 210 located on both sides of the second signal trace 220 are provided between the two columns of light-emitting units in each light-emitting unit group. This also allows two first signal traces 210 and one second signal trace 220 to be provided between two adjacent columns of light-emitting units. This ensures that the extension direction of most of the first connecting lines 310 and the second signal trace 220 is consistent, rationally designing the wiring space and reducing signal interference.

[0132] In some examples, in specific implementations, such as Figures 1 to 8 As shown, a driving signal line 240 is provided between adjacent light-emitting unit groups, and the driving voltage terminals Vled in two adjacent columns of light-emitting units located in different light-emitting unit groups are all coupled to the same driving signal line. For example, a driving signal line 240 is provided between the first light-emitting unit group FGZ-1 and the second light-emitting unit group FGZ-2, and the driving voltage terminals Vled in the second column of light-emitting units in the first light-emitting unit group FGZ-1 and the third column of light-emitting units in the second light-emitting unit group FGZ-2 are all coupled to the same driving signal line 240.

[0133] In some examples, in specific implementations, such as Figures 1 to 8 As shown, the orthographic projection of the drive signal trace Vled onto the substrate 01 covers the orthographic projection of at least one of the multiple light-emitting elements 120 coupled to the drive signal trace Vled onto the substrate 01.

[0134] In some examples, in specific implementations, such as Figures 1 to 8 As shown, a row of light-emitting units 100 corresponds to a common voltage signal trace 250. That is, the common voltage terminal GND of the driving circuits 110 in a row of light-emitting units 100 is coupled to the same common voltage signal trace 250. Further, the orthographic projection of the common voltage signal trace 250 onto the substrate 01 covers the orthographic projections of the driving circuits 110 and at least two light-emitting elements 120 in the light-emitting units coupled to the common voltage signal trace 250 onto the substrate 01. For example, the orthographic projection of the common voltage signal trace 250 onto the substrate 01 covers the orthographic projections of the driving circuits 110 and all light-emitting elements 120 in the light-emitting units coupled to the common voltage signal trace 250 onto the substrate 01. Alternatively, the orthographic projection of the common voltage signal trace 250 onto the substrate 01 covers the orthographic projections of the driving circuits 110 and two light-emitting elements 120 in the light-emitting units coupled to the common voltage signal trace 250 onto the substrate 01. Alternatively, the orthographic projection of the common voltage signal line 250 onto the substrate 01 covers the orthographic projection of the driving circuit 110 and the three light-emitting elements 120 in the light-emitting unit coupled to the common voltage signal line 250 onto the substrate 01.

[0135] In some examples, in specific implementations, such as Figures 1 to 8 As shown, both the common voltage signal trace 250 and the drive signal trace 240 extend along the first direction F1. This allows the drive signal trace 240 to transmit the drive voltage to the light-emitting unit, and the common voltage trace 250 to transmit the common voltage to the drive circuit 110. Furthermore, this also ensures that the common voltage signal trace 250, the drive signal trace 240, the first signal trace 210, the second signal trace 220, and most of the first connecting lines 310 extend in the same direction, thus optimizing the wiring space and reducing signal interference.

[0136] In some examples, in specific implementations, such as Figures 1 to 8 As shown, for a row of light-emitting units 100, the common voltage signal trace 250, the driving signal trace 240, and the second signal trace are located between the driving signal trace 240 and the second signal trace. For example, the width of the common voltage signal trace 250 in the second direction F2 is greater than the width of the driving signal trace 240 in the second direction F2. The width of the driving signal trace 240 in the second direction F2 is greater than the width of the second signal trace in the second direction F2. The width of the second signal trace in the second direction F2 is greater than the width of the first signal trace in the second direction F2. The width of the first signal trace in the second direction F2 is approximately equal to the width of the first coupling trace in the second direction F2.

[0137] In some examples, in specific implementations, such as Figures 1 to 8 As shown, a light-emitting unit group may include two columns of light-emitting units 100; and the orthographic projections of two driving signal lines (e.g., 240 and 240') corresponding to the same light-emitting unit group onto the substrate 01 are symmetrically arranged with respect to the orthographic projection of the second signal line 220 onto the substrate 01. For example, in the first light-emitting unit group FGZ-1, the orthographic projections of two driving signal lines (e.g., 240 and 240') onto the substrate 01 are symmetrically arranged with respect to the orthographic projection of the second signal line 220 onto the substrate 01. In the second light-emitting unit group FGZ-2, the orthographic projections of two driving signal lines (e.g., 240 and 240') onto the substrate 01 are axially symmetrical with respect to the orthographic projection of the second signal line 220 onto the substrate 01.

[0138] In some examples, in specific implementations, such as Figures 1 to 8 As shown, a light-emitting unit group includes two columns of light-emitting units 100; and the orthographic projections of two common voltage signal traces (e.g., 250 and 250') corresponding to the same light-emitting unit group onto the substrate 01 are axially symmetrical about the orthographic projection of the second signal trace 220 onto the substrate 01. For example, in the first light-emitting unit group FGZ-1, the orthographic projections of two common voltage signal traces (e.g., 250 and 250') onto the substrate 01 are axially symmetrical about the orthographic projection of the second signal trace 220 onto the substrate 01. In the second light-emitting unit group FGZ-2, the orthographic projections of two common voltage signal traces (e.g., 250 and 250') onto the substrate 01 are axially symmetrical about the orthographic projection of the second signal trace 220 onto the substrate 01. This facilitates patterning and reduces design complexity.

[0139] In some examples, in specific implementations, such as Figure 7As shown, the first signal trace 210, the second signal trace 220, the common voltage signal trace 250, and the drive signal trace 240 can be located on the same layer, i.e., the first trace layer. This allows the same patterning process to be used to form the patterns of the first signal trace 210, the second signal trace 220, the common voltage signal trace 250, and the drive signal trace 240. In other words, the patterns of the first signal trace 210, the second signal trace 220, the common voltage signal trace 250, and the drive signal trace 240 can be formed in one patterning process after a single film deposition process, reducing the complexity of the manufacturing process.

[0140] For example, the material of the first trace layer can be a metallic material, such as any one or an alloy of at least two of copper, molybdenum, titanium, aluminum, and nickel.

[0141] In some examples, in specific implementations, such as Figure 10 As shown, the first connecting line 310, the first connecting line 320, the third connecting line 330, the fourth connecting line 340, the fifth connecting line 350, and the sixth connecting line 360 ​​can be located on the same layer, namely the second light-emitting layer. This allows the same patterning process to be used to form the patterns of the first connecting lines 310, 320, 330, 340, 350, and 360. In other words, the patterns of the first connecting lines 310, 320, 330, 340, 350, and 360 can be formed in one step after a single film-forming process using a patterning process, reducing the complexity of the manufacturing process.

[0142] For example, the material of the second wiring layer can be a metallic material, such as any one or an alloy of at least two of copper, molybdenum, titanium, aluminum, and nickel.

[0143] In some examples, in specific implementations, such as Figure 7 and Figure 10As shown, a first insulating layer 410 is disposed between the first wiring layer 011 and the second wiring layer 012. The light-emitting substrate may further include a second insulating layer 420 located on the side of the second wiring layer 012 facing away from the substrate 01, and a driving circuit 110 and a light-emitting element 120 located on the side of the second insulating layer 420 facing away from the substrate 01. A first input terminal Di of one driving circuit 110 corresponds to a first connection line 310, and an output terminal OT of one driving circuit 110 corresponds to a third connection line 330. For example, the first input terminal Di of the driving circuit 110 of the light-emitting unit 100 numbered 1 can be coupled to the corresponding first connection line 310 through a first input via GKD penetrating the second insulating layer, and the first connection line 310 is coupled to the corresponding first sub-signal trace 211 through a first via GK1 penetrating the first insulating layer. The output terminal OT of the driving circuit 110 of the light-emitting unit 100 labeled P can be coupled to the corresponding third connection line 330 through the output via GKO that penetrates the second insulating layer. The third connection line 330 is coupled to the corresponding first sub-signal trace 211 through the third via GK3 that penetrates the first insulating layer.

[0144] In some examples, in specific implementations, such as Figure 7 and Figure 9b As shown, the second input terminal Pwr of a driving circuit 110 corresponds to a first connection line 320, and the common voltage terminal GND of a driving circuit 110 corresponds to a fourth connection line 340. The second input terminal Pwr of the driving circuit 110 in each light-emitting unit 100 can be coupled to the corresponding first connection line 320 through a second input via GKP penetrating the second insulating layer. The first connection line 320 can be coupled to the corresponding second signal trace 220 through a ninth via penetrating the first insulating layer. The common voltage terminal GND of the driving circuit 110 in each light-emitting unit 100 can be coupled to the corresponding fourth connection line 340 through a common voltage via GKG penetrating the second insulating layer. The fourth connection line 340 can be coupled to the corresponding common voltage signal trace 250 through an eleventh via penetrating the first insulating layer.

[0145] In some examples, in specific implementations, such as Figure 7 and Figure 9b As shown, the driving voltage terminal Vled of one light-emitting unit 100 corresponds to a fifth connection line 350. One end of the fifth connection line 350 in each light-emitting unit 100 is coupled to the corresponding driving signal trace 240 through a driving via GKV penetrating the first insulating layer, and the other end of the fifth connection line 350 in each light-emitting unit 100 is coupled to the positive or negative terminal of the corresponding light-emitting element 120 through a light-emitting via GKY penetrating the second insulating layer.

[0146] In some examples, in specific implementations, such as Figure 7 and Figure 9b As shown, one light-emitting group corresponds to multiple sixth connecting lines 360, and the light elements in the light-emitting group can be connected in series through the sixth connecting lines 360. Furthermore, the sixth connecting line 360 ​​is also coupled to the positive or negative terminal of the corresponding light-emitting element 120 through a light-emitting via GKY that penetrates the second insulating layer.

[0147] In some examples, in specific implementations, such as Figure 7 and Figure 8 As shown, the auxiliary trace 520 can couple the common voltage signal traces 250. For example, the auxiliary trace 520 may include multiple first sub-auxiliary traces 5201 extending along the first direction F1. The first sub-auxiliary traces 5201 are arranged sequentially along the second direction F2. A first sub-auxiliary trace 5201 is provided between adjacent light-emitting unit groups. Each first sub-auxiliary trace 5201 can be coupled to each common voltage signal trace through a via penetrating the first insulating layer. This allows the first sub-auxiliary traces 5201 and the common voltage signal traces 250 to form a parallel structure, reducing the resistance of the common voltage signal traces 250, reducing the impact of voltage drop on light emission, and improving light emission uniformity.

[0148] In some examples, in specific implementations, such as Figure 7 and Figure 8 As shown, the auxiliary trace 520 may include multiple second sub-auxiliary traces 5202 extending along the second direction F2. The second sub-auxiliary traces 5202 are arranged sequentially along the first direction F1. A second sub-auxiliary trace 5202 is provided between two adjacent rows of light-emitting unit groups. Each second sub-auxiliary trace 5202 can be coupled to each common voltage signal trace 250 through a second auxiliary via 521 penetrating the first insulating layer. This allows the second auxiliary traces 520 and the common voltage signal trace 250 to form a parallel structure, reducing the resistance of the common voltage signal trace 250, reducing the impact of voltage drop on light emission, and improving light emission uniformity.

[0149] In some examples, the second sub-auxiliary trace 5202 can be multiple segmented traces or a single trace, which is not limited here.

[0150] In some examples, in specific implementations, such as Figure 7 As shown, the second sub-auxiliary trace 5202 and the first sub-auxiliary trace 5201 can form a mesh-like integrated structure to further reduce the resistance of the common voltage signal trace 250. Alternatively, the second sub-auxiliary trace 5202 and the first sub-auxiliary trace 5201 can also be arranged alternately.

[0151] In some examples, in specific implementations, such as Figure 7 , Figure 8 and Figure 9bAs shown, the light-emitting substrate also includes a driving signal conduction line 510; the driving signal conduction line 510 extends along a second direction and is coupled to multiple driving signal traces. For example, the driving signal conduction line 510 is located in the second trace layer. Exemplarily, the driving signal conduction line 510 can be configured as a single line located on the side of the first row of light-emitting units opposite to the second row of light-emitting units. Furthermore, the driving signal conduction line 510 extends along the second direction. The driving signal conduction line 510 is coupled to each driving signal trace 240 through a first auxiliary via 511 penetrating the first insulating layer. This allows the driving signal conduction line 510 to electrically couple each driving signal trace 240, ensuring that the voltage on each driving signal trace 240 is approximately the same. Furthermore, by forming a parallel structure between the driving signal conduction line 510 and the driving signal traces 240, the resistance of the driving signal traces 240 can be reduced, the impact of voltage drop on light emission can be reduced, and the uniformity of light emission can be improved.

[0152] In some examples, in specific implementations, such as Figure 7 As shown, the orthographic projections of the drive signal conduction line 510 and the auxiliary trace 520 onto the substrate 01 do not overlap.

[0153] Exemplarily, multiple drive signal conduction lines 510 may also be provided. For example, the orthographic projection of the drive signal conduction line 510 on the substrate 01 may be located between the orthographic projections of the light-emitting elements in two adjacent rows of light-emitting units 100 on the substrate 01. The orthographic projection of the second sub-auxiliary trace 5202 on the substrate 01 may be located between the orthographic projections of the light-emitting elements in two adjacent rows of light-emitting units 100 on the substrate 01. Exemplarily, the orthographic projection of the drive signal conduction line 510 on the substrate 01 may be located between the orthographic projections of the drive circuits in two adjacent rows of light-emitting units 100 on the substrate 01. The orthographic projection of the second sub-auxiliary trace 5202 on the substrate 01 may be located between the orthographic projections of the drive circuits in two adjacent rows of light-emitting units 100 on the substrate 01.

[0154] It should be noted that, Figure 7 The diagram only shows a top view of a light-emitting substrate with a driver circuit 110 attached, but without any light-emitting elements attached. (Combined with...) Figure 7 Only the light-emitting unit at coordinate (1,1) shows the driving circuit 110 that is bonded and coupled to the corresponding pad. The other light-emitting units do not show the driving circuit, but only the pads to be bonded to the driving circuit. It can be understood that the pads to be bonded to the driving circuit are the areas exposed by the multiple output vias GKO, GKP, GKD, and GKG that penetrate the second insulating layer.

[0155] In other words, at other locations where driver circuitry needs to be bonded, only the exposed pad areas to be bonded to the driver circuitry are shown. The driver circuitry will subsequently be bonded and coupled to these pads. Similarly, only the exposed pad areas to be bonded to the light-emitting elements are shown. The light-emitting elements will subsequently be bonded and coupled to these pads. It can be understood that the pads to be bonded to the light-emitting elements are the areas exposed by the multiple output vias (GKY) penetrating the second insulating layer.

[0156] For example, during the fabrication process, the locations of the pads used to bond the driving circuitry and the pads used to bond the light-emitting elements need to be exposed. To ensure good electrical coupling and transmission, the pads are typically made of metallic materials. To mitigate the problem of metal material oxidation, an anti-oxidation layer can be applied to the pads. For example, the material of the anti-oxidation layer can be a copper-nickel alloy, nickel metal, or indium tin oxide. This improves the problem of pad oxidation by providing an anti-oxidation layer at least in the pad area.

[0157] In some examples, in specific implementations, such as Figure 1 and Figure 11 As shown, the light-emitting substrate may further include a bonding region FB; the bonding region FB may include a plurality of signal terminals spaced apart from each other. Exemplarily, the plurality of signal terminals may include a plurality of first signal terminals 610. A first signal trace 210 may be coupled to at least one first signal terminal 610. For example, a first signal trace 210 may correspond to and be coupled to one first signal terminal 610, or a first signal trace 210 may correspond to and be coupled to two first signal terminals 610. Of course, in practical applications, the number of first signal terminals 610 coupled to a first signal trace 210 can be designed and determined according to the requirements of the actual application, and is not limited here.

[0158] In some examples, in specific implementations, such as Figure 1 and Figure 11 As shown, the multiple signal terminals may include multiple second signal terminals 620. A second signal trace 220 may be coupled to at least one second signal terminal 620. For example, a second signal trace 220 may be coupled to one second signal terminal 620, or a second signal trace 220 may be coupled to two second signal terminals 620. Of course, in practical applications, the number of second signal terminals 620 coupled to a second signal trace 220 can be designed and determined according to the actual application requirements, and is not limited here.

[0159] Similarly, in some examples, such as Figure 1 and Figure 11As shown, the multiple signal terminals may include multiple drive signal terminals 640 and multiple common voltage signal terminals 650. Specifically, one drive signal trace 240 is coupled to at least one drive signal terminal 640; one common voltage signal trace 250 is coupled to at least one common voltage signal terminal 650. For example, one drive signal trace 240 is coupled to one drive signal terminal 640; one common voltage signal trace 250 is coupled to one common voltage signal terminal 650. Alternatively, one drive signal trace 240 is coupled to two drive signal terminals 640; one common voltage signal trace 250 is coupled to two common voltage signal terminals 650. Of course, in practical applications, the number of drive signal terminals 640 and common voltage signal terminals 650 can be designed and determined according to the actual application requirements, and is not limited here.

[0160] In some examples, in specific implementations, such as Figure 1 , Figure 7 as well as Figure 11 As shown, the driving signal terminals 640, common voltage signal terminals 650, first signal terminals 610, and second signal terminals 620 coupled to the driving signal trace 240, two common voltage signal traces 250, two first signal traces 210, and second signal trace 220 corresponding to a light-emitting unit group can be considered as a terminal group, that is, one light-emitting unit group corresponds to one terminal group. Furthermore, in a terminal group, the driving signal terminals 640, common voltage signal terminals 650, first signal terminals 610, second signal terminals 620, first signal terminals 610', and common voltage signal terminals 650' can be arranged sequentially in the second direction F2 according to the arrangement order of the driving signal traces 240, common voltage signal traces 250, first signal traces 210, second signal traces 220, first signal traces 210', and common voltage signal traces 250' in the corresponding light-emitting unit group. For example, in the first light-emitting unit group FGZ-1, the driving signal line 240, the common voltage signal line 250, the first signal line 210, the second signal line 220, the first signal line 210', and the common voltage signal line 250' are arranged sequentially along the second direction F2. Then, the driving signal terminal 640, the common voltage signal terminal 650, the first signal terminal 610, the second signal terminal 620, the first signal terminal 610', and the common voltage signal terminal 650' corresponding to the first light-emitting unit group FGZ-1 are also arranged sequentially along the second direction F2.

[0161] In some examples, in specific implementations, such as Figure 1 , Figure 7 as well as Figure 11 As shown, one light-emitting unit group can correspond to one terminal group. When multiple light-emitting unit groups are repeated and spaced apart along the second direction, the corresponding terminal groups can also be repeated and spaced apart along the second direction.

[0162] In some examples, in specific implementations, such as Figure 1 , Figure 7 as well as Figure 11 As shown, the multiple signal terminals also include dummy signal terminals 700; wherein, for the first signal terminal 610 and the common voltage signal terminal 650 corresponding to the same light-emitting unit group, a dummy signal terminal 700 is provided between the first signal terminal 610 and the common voltage signal terminal 650. By setting the dummy signal terminal 700, not only can the signal terminals set in the fan-out area be evenly distributed, but the risk of signal interference between the first signal terminal 610 and the common voltage signal terminal 650 can also be reduced.

[0163] In some examples, in specific implementations, such as Figure 1 , Figure 7 as well as Figure 11 As shown, for the first signal terminal 610' and the common voltage signal terminal 650 corresponding to the same light-emitting unit group, a dummy signal terminal is provided between the first signal terminal 610' and the common voltage signal terminal 650'.

[0164] In some examples, in specific implementations, the orthographic projection of the second signal trace 220 in the first direction F1 overlaps with the orthographic projections of the two signal terminals in the first direction F1. For example, the two signal terminals overlapping the orthographic projection of the second signal trace 220 in the first direction F1 are both second signal terminals (620, 620'). Figure 1 , Figure 7 as well as Figure 11 As shown, a second signal trace 220 can be coupled to two second signal terminals 620. In this way, a second input signal is input to a second signal trace 220 through the two second signal terminals (620, 620'), thereby ensuring that a second signal trace 220 can provide a second input signal to two adjacent rows of light-emitting units 100.

[0165] In some examples, in specific implementations, for two signal terminals that overlap with the orthographic projection of the second signal trace 220 in the first direction F1, one of the two signal terminals can be designated as the second signal terminal 620, and the other signal terminal can be designated as a dummy signal terminal.

[0166] In some examples, the light-emitting substrate may further include a flexible printed circuit (FPC) in specific implementations. The FPC can be coupled to the aforementioned first signal terminal 610, second signal terminal 620, drive signal terminal 640, and common voltage signal terminal 650 via bonding. Furthermore, the FPC is also used to bond with other components, such as a light-emitting control circuit. This light-emitting control circuit can provide multiple first input signals and multiple second input signals. These first input signals and second output signals are transmitted through the FPC to each of the first signal traces 210 and second signal traces 220, and further to each light-emitting unit group 100, to control the light-emitting substrate 10 to emit light. The light-emitting control circuit can also provide a drive voltage and a common voltage, which can be transmitted to the drive signal trace 240 and the common voltage signal trace 250 respectively via the drive signal terminal 640 and the common voltage signal terminal 650.

[0167] In some examples, mass transfer methods and processes such as reflow soldering can be used to electrically couple the light-emitting element to the light-emitting substrate.

[0168] In some examples, mass transfer methods and reflow soldering processes can also be used to electrically couple the driving circuit to the light-emitting substrate.

[0169] At least one embodiment of this disclosure also provides a display device, which includes a display panel and a light-emitting substrate provided in any embodiment of this disclosure. This display device can achieve independent regional control of light emission brightness, has low power consumption, high integration, and a simple control method, and can be used with a liquid crystal display device to achieve high-contrast display.

[0170] In some examples, in specific implementations, such as Figure 12 As shown, in some embodiments, the display device 20 includes a display panel 210 and a light-emitting substrate 220. For example, the light-emitting substrate 220 can be a light-emitting substrate provided in any embodiment of this disclosure, such as the aforementioned light-emitting substrate 10.

[0171] For example, the display panel 210 has a display side P1 and a non-display side P2 opposite to the display side P1, and the light-emitting substrate 220 is disposed on the non-display side P2 of the display panel 210 as a backlight unit. For example, the light-emitting substrate 220 can serve as a surface light source to provide backlight to the display panel 210. For example, the display panel 210 can be an LCD panel, an electronic paper display panel, etc., and the embodiments disclosed herein are not limited thereto.

[0172] For example, the display device 20 can be an LCD device, an electronic paper display device, or other devices with display functions, and the embodiments of this disclosure do not limit this. For example, the display device 20 can be any product or component with display functions, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigator, e-book, etc., and the embodiments of this disclosure do not limit this.

[0173] It should be noted that the light-emitting substrate 10 provided in the embodiments of this disclosure can be used as a backlight unit in the above-mentioned display device 20, or it can be used alone as a substrate with display function or light-emitting function. The embodiments of this disclosure do not limit this.

[0174] For a detailed description and technical effects of the display device 20, please refer to the description of the light-emitting substrate 10 above, which will not be repeated here. The display device 20 may also include more components and structures, which can be determined according to actual needs, and the embodiments disclosed herein do not limit this.

[0175] At least one embodiment of this disclosure provides a light-emitting substrate and a display device. The light-emitting substrate enables independent regional control of light emission brightness, has low power consumption, high integration, and a simple control method. It can be used with liquid crystal display devices to achieve high-contrast display. Furthermore, the light-emitting substrate can reduce signal interference and improve display performance.

[0176] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

[0177] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of the embodiments of this disclosure. Therefore, if these modifications and variations to the embodiments of this disclosure fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include these modifications and variations.

Claims

1. A light-emitting substrate, wherein, include: Substrate; The first wiring layer is located on the substrate. The first routing layer includes: a first signal trace and a second signal trace; The first insulating layer is located on the side of the first conductive layer that is away from the substrate. The second wiring layer is located on the side of the first insulating layer away from the substrate; and the second wiring layer includes: multiple first connection lines and multiple second connection lines; The first signal trace includes multiple first sub-signal traces that extend along a first direction and are spaced apart; the second signal trace is a continuous structure that extends along the first direction. At least one of the plurality of first sub-signal traces is coupled to at least one of the plurality of first connection lines, and the second signal line is coupled to at least one of the plurality of second connection lines. The projections of the plurality of first connection lines onto the substrate do not overlap with the projections of the plurality of second signal traces onto the substrate, and there is an overlap between the projections of at least one of the plurality of first connection lines onto the substrate and the projections of at least one of the plurality of first sub-signal traces onto the substrate.

2. The light-emitting substrate as described in claim 1, wherein, The first routing layer includes multiple first signal traces and multiple second signal traces; Multiple first signal traces are arranged sequentially along the second direction, and multiple second signal traces are arranged sequentially along the second direction, with at least two first signal traces on both sides of each second signal trace.

3. The light-emitting substrate as described in claim 2, wherein, Two first signal traces are provided between two adjacent second signal traces.

4. The light-emitting substrate as described in claim 3, wherein, The orthographic projection of one of the plurality of first sub-signal traces on the substrate overlaps once with the orthographic projection of at least one of the plurality of first connection lines on the substrate.

5. The light-emitting substrate according to any one of claims 1-4, wherein, The first routing layer further includes: a drive signal trace extending along the first direction; the line width of the drive signal trace is greater than the line width of the first signal trace or the line width of the second signal trace.

6. The light-emitting substrate as described in claim 5, wherein, The first routing layer includes multiple drive signal traces; Two first signal traces are located between two adjacent second signal traces, and one of the plurality of drive signal traces is provided between the two first signal traces.

7. The light-emitting substrate as claimed in claim 1, wherein, The first routing layer includes multiple common voltage signal traces; One of the multiple common voltage signal traces is provided between the nearest neighboring first signal trace and a drive signal trace.

8. The light-emitting substrate as described in claim 1, further comprising: Multiple light-emitting units arranged in an array; Each of the light-emitting units includes a driving circuit and a light-emitting group coupled to the driving circuit, the light-emitting group including a plurality of light-emitting elements; The driving circuit includes a first input terminal and an output terminal; The first input terminal of the driving circuit is coupled to one end of at least one of the plurality of first connection lines, and the other end of the at least one first connection line is coupled to at least one of the plurality of first sub-signal traces. The output terminal of the driving circuit is coupled to one end of at least one of the plurality of third connection lines, and the other end of the at least one third connection line is coupled to at least one of the plurality of first sub-signal traces; The first sub-signal traces coupled to the first input terminal and the output terminal of the same driving circuit are different.

9. The light-emitting substrate as claimed in claim 8, wherein, The plurality of light-emitting units are arranged in N rows and M columns and divided into a plurality of light-emitting unit groups, and each of the plurality of light-emitting unit groups includes N rows and Y columns, a total of N*Y light-emitting units; In the same light-emitting unit group, the N*Y light-emitting units are sequentially numbered according to their row and column distribution positions. The first input terminal of the driving circuit of the light-emitting unit numbered 1 is coupled to one first sub-signal trace through the first connection line. The output terminal of the driving circuit of the light-emitting unit numbered P is coupled to the first sub-signal trace to which the first input terminal of the driving circuit of the light-emitting unit numbered P+1 is coupled through the third connection line. The output terminal of the driving circuit of the light-emitting unit numbered P+1 is coupled to another first sub-signal trace through the third connection line; The first sub-signal trace coupled to the first input terminal of the driving circuit of the light-emitting unit numbered 1, and the second sub-signal trace coupled to the output terminal of the driving circuit of the light-emitting unit numbered P+1 are located at the driving circuits of the light-emitting units with other numbers; N is an integer greater than 0, M is an integer greater than 0, 0 < Y ≤ M and Y is an integer, 0 < P < N*Y and P is an integer.

10. The light-emitting substrate as claimed in claim 9, wherein, The driving circuit includes a second input terminal; one driving circuit is coupled to at least one of the second connection lines; The second input terminals of all the driving circuits in each of the light-emitting unit groups are coupled to the same second signal trace through the second connection lines.

11. The light-emitting substrate as claimed in claim 10, wherein, One of the plurality of light-emitting unit groups includes two columns of the light-emitting units; A second signal trace and first signal traces on both sides of the second signal trace are provided between the two columns of light-emitting units in the light-emitting unit group.

12. The light-emitting substrate as claimed in claim 11, wherein, The light-emitting group is coupled between the driving voltage terminal and the output terminal of the driving circuit; A driving signal trace is provided between adjacent light-emitting unit groups, and the driving voltage terminals in two adjacent columns of light-emitting units in different light-emitting unit groups are coupled to the same driving signal trace.

13. The light-emitting substrate as claimed in claim 12, wherein, The orthographic projection of the driving signal trace on the substrate covers the orthographic projection of at least one of the plurality of light-emitting elements coupled to the driving signal trace on the substrate.

14. The light-emitting substrate as claimed in claim 13, wherein, The light-emitting substrate further includes a driving signal conduction line; the driving signal conduction line extends in the second direction, and the driving signal conduction line is coupled to all the driving signal traces.

15. The light-emitting substrate as claimed in claim 8, wherein, The driving circuit includes a common voltage terminal; one column of light-emitting units is coupled to a common voltage signal trace; The orthographic projection of the common voltage signal trace on the substrate covers the orthographic projection of the driving circuit and at least two light-emitting elements of the light-emitting units coupled to the common voltage signal line on the substrate.

16. The light-emitting substrate as claimed in claim 15, wherein, The second trace layer further includes auxiliary traces spaced apart from the first connection line, the second connection line, and the third connection line; The auxiliary routing connects each of the common voltage signal routing lines.

17. A display device, wherein, Includes the light-emitting substrate as described in any one of claims 1-16.

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