A data writing method and system for a data storage device and the data storage device

Abstract

The present invention provides a data writing method, a system and a data storage device for a data storage device, and the data writing method for the data storage device includes: receiving write data sent by a host and storing the write data in a buffer; determining whether all of the write data is zero data; and when all of the write data is zero data, discarding the write data and replying to the host that the writing of the write data is completed; when the write data is non-zero data, performing data writing. By the data writing method for the data storage device provided by the present invention, the writing performance of the data storage device can be improved.

Description

Technical Field

[0001] The present invention relates to the field of storage technology, and particularly to a data writing method and system for a data storage device and a data storage device. Background Art

[0002] Write amplification (WA) is an adverse phenomenon existing in flash memory and solid state disks (SSDs), that is, the actual amount of physical data written is multiple times the amount of data that the host needs to write. And the multiplication effect will increase the number of write requests, shorten the life of the solid state disk, and thus reduce the reliable operation time of the solid state disk. The increased writes will also consume the bandwidth of the flash memory.

[0003] Many factors affect the write amplification of solid state disks. Some can be controlled by users, while others are the direct result of data writing and the use of solid state disks. When writing data, there is some writing of invalid data. The writing of invalid data will not only increase the operation time of the host controller, but also increase the write amplification and affect the writing effect of the data. Summary of the Invention

[0004] In view of the defects of the above-mentioned prior art, the present invention provides a data writing method and system for a data storage device and a data storage device, so as to reduce the writing of invalid data and further improve the read and write performance.

[0005] To achieve the above and other purposes, a data writing method for a data storage device includes the following steps:

[0006] Receive the write data sent by the host and save the write data in the buffer;

[0007] Judge whether the write data is all zero data; and

[0008] When the write data is all zero data, discard the write data and reply to the host that the writing of the write data is completed; when the write data is non-all-zero data, write the write data.

[0009] In an embodiment of the present invention, when the write data is all zero data, the data writing method for the data storage device further includes:

[0010] Judge whether the logical mapping relationship corresponding to the logical address of the write data is in an available state;

[0011] When the logical mapping relationship corresponding to the logical address of the write data is in an available state, discard the write data and reply to the host that the writing of the write data is completed.

[0012] In an embodiment of the present invention, when the logical mapping relationship corresponding to the logical address of the written data is in an unavailable state, the logical mapping relationship corresponding to the logical address of the written data is deleted, then the written data is discarded, and the host is replied that the writing of the written data is completed.

[0013] In an embodiment of the present invention, when the logical mapping relationship corresponding to the logical address of the written data is in an available state, the logical address of the written data has never been written, or the previous logical mapping relationship corresponding to this logical address was in an invalid state.

[0014] In an embodiment of the present invention, when judging whether the written data is all-zero data, first use the sampling method to judge whether part of the written data is zero data, and then use the full detection method to judge whether all of the written data is zero data.

[0015] In an embodiment of the present invention, using the sampling method to judge whether part of the written data is zero data includes the following steps:

[0016] Judge whether the first data of the written data is zero data;

[0017] If the first data is zero data, then judge whether the tail data of the written data is zero data; and

[0018] If the tail data is zero data, then judge whether the middle data of the written data is zero data.

[0019] In an embodiment of the present invention, the steps of using the full detection method to judge whether all of the written data is zero data are:

[0020] Judge whether the written data is all zero data according to the writing order of the written data.

[0021] In an embodiment of the present invention, before judging whether the written data is all zero data, the data writing method of the data storage device further includes the following steps:

[0022] According to the data length of the written data, divide the written data into one or more segments; and

[0023] And judge whether each segment of the written data is zero data according to the writing order of the data.

[0024] In an embodiment of the present invention, the length of each segment of the written data is one transmission unit length.

[0025] In an embodiment of the present invention, after dividing the written data into multiple segments, the data writing method of the data storage device further includes the following steps:

[0026] Determine whether the logical mapping relationship corresponding to the logical address of the written data described in each segment is in an available state;

[0027] When the logical mapping relationship corresponding to the logical address of the written data in this segment is in an available state, discard the written data in this segment, and reply to the host that the writing of the written data in this segment is completed;

[0028] When the logical mapping relationship corresponding to the logical address of the written data in this segment is in an unavailable state, delete the logical mapping relationship corresponding to the logical address of the written data in this segment, then discard the written data in this segment, and reply to the host that the writing of the written data in this segment is completed; until all the written data is discarded or written.

[0029] The present invention also provides a data writing system for a data storage device, including: a receiving unit for receiving the written data sent by the host and storing the written data in a buffer;

[0030] A first judgment unit for judging whether all the written data is zero data; and

[0031] An execution unit, when all the written data is zero data, is used to discard the written data and reply to the host that the writing of the written data is completed; when the written data is non-zero data, write the written data.

[0032] The present invention also provides a data storage device, including:

[0033] A buffer storing program instructions;

[0034] A control unit, and the buffer runs the program instructions to implement the data writing method of the data storage device as described above.

[0035] In summary, the present invention provides a data writing method and system for a data storage device, and a data storage device. The present invention sets a first-level mapping table in the storage area. The first-level mapping table includes multiple logical address segments, and the multiple logical address segments can be arranged in segment addresses. Each logical address segment can correspond to a storage space in the storage area. At the same time, a second-level mapping table and a dynamic mapping table are set in the buffer area. The second-level mapping table includes multiple static mapping units. One static mapping unit corresponds to one logical address segment. Each static mapping unit includes a flag bit and a physical address segment. The physical address segment corresponds to the logical address segment, and the flag bit has a first state and a second state. When data is written, it is judged whether the written data is zero data. When the written data is zero data, the written data is discarded. When the written data is non-zero data, the data is written into the storage area, and a dynamic mapping unit is used to store the mapping relationship between the logical address and the corresponding physical address of the written data. Before data storage, invalid zero data is discarded to avoid storing invalid data, increasing the write amplification value and affecting the write performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 : Schematic block diagram of the storage system in the present invention.

[0037] Figure 2 : In the present invention Figure 1 Schematic block diagram of the data storage device in the present invention.

[0038] Figure 3 : Schematic diagram of managing physical blocks in the present invention.

[0039] Figure 4 : Mapping relationship diagram of the first-level mapping table and the second-level mapping in the present invention.

[0040] Figure 5 : Schematic structural diagram of the dynamic mapping table in the present invention.

[0041] Figure 6 : Schematic structural diagram of the dynamic mapping unit in the present invention.

[0042] Figure 7 : Flowchart of a data writing method for a data storage device in the present invention.

[0043] Figure 8 : Flowchart of a method for judging whether written data is all-zero data in the present invention.

[0044] Figure 9 : Flowchart of another data writing method for a data storage device in the present invention.

[0045] Figure 10 : Schematic block diagram of a data writing system for a data storage device in the present invention. Detailed implementation manners

[0046] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0047] It should be noted that the illustrations provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the drawings, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0048] The system described herein includes a novel structure for controlling a mass storage module including flash memory chips. The overall system is shown in Figure 1 in a highly summarized form. Like other boxes here, Figure 1 the elements shown Figure 1 are conceptual in nature, showing the nature of the interrelationships between these functional blocks and not intended to represent the actual physical circuit-level implementation.

[0049] Please refer to Figure 1 shown. In an embodiment of the present invention, a storage system is proposed. The storage system may include a host 110 and a data storage device 200 to which the host 110 transfers commands and / or data. The storage system can be implemented as a personal computer (PC), a workstation, a data center, an Internet data center, a storage area network, a network-attached data storage device (NAS), or a mobile computing device, but the inventive concept is not limited to these examples.

[0050] Please refer to Figure 1 shown. The data storage device 200 may be a flash-based data storage device, but is not limited thereto. The data storage device 200 can be implemented as an SSD, an embedded SSD (eSSD), a universal flash storage device (UFS), an MMC, an embedded MMC (eMMC), or a managed NAND, but the inventive concept is not limited to these examples.

[0051] Please refer to Figure 1 shown. The data storage device 200 includes a rewritable non-volatile memory module and a controller. The data storage device 200 can be used with the host 100 so that the host 100 can write data to the data storage device 200 or read data from the data storage device 200.

[0052] Please refer to Figure 1 as shown Figure 1 in the schematic diagram of a storage system showing a host 100 and a data storage device 200. Among them, the host 100 includes a computer 110 and an input / output (I / O) device 120. The computer 110 includes a microprocessor 111, a random access memory (RAM) 112, a data transfer interface 113, and a system bus 114. The input / output device 120 may include a mouse, a keyboard, a display, and a printer.

[0053] Please refer to Figure 1 as shown. In an embodiment of the present invention, the data storage device 200 is electrically connected to other components of the host 100 through the data transfer interface 113. Through the operation of the microprocessor 111, the random access memory 112, and the input / output device 120, data can be written into the data storage device 200 or read from the data storage device 200. For example, the data storage device 200 may be a rewritable non-volatile data storage device such as a USB flash drive, a memory card, or a solid state drive (SSD).

[0054] Please refer to Figure 1 as shown. In an embodiment of the present invention, the host 100 is any system that can substantially cooperate with the data storage device 200 to store data. Although in this exemplary embodiment, the host 100 is described as a computer system, however, in some embodiments, the host 100 may be a system such as a digital camera, a video camera, a communication device, an audio player, or a video player. For example, when the host 100 is a digital camera, the data storage device is an SD card, an MMC card, a memory stick, a CF card, or an embedded storage device used by it. The embedded storage device includes an embedded multimedia card, and the embedded multimedia card is directly electrically connected to the substrate of the host 100.

[0055] Please refer to Figure 1 as shown. In an embodiment of the present invention, when the user issues a request to the data storage device 200 at the application layer of the host 100 operating system, the file system of the host 100 converts the read / write request into corresponding protocol-compliant read / write and other instruction data through the underlying driver. After receiving the instruction data through the interface, the data storage device 200 executes the used instruction data through internal calculation and processing logic and feeds back a corresponding reply to the host 100.

[0056] Please refer to Figure 2 as shown Figure 2 shown as Figure 1System block diagram of data storage device 200. The data storage device 200 includes a connection interface 201, a front-end layer 202 provided with a control unit 2021 and a buffer 2022, a storage area 205 provided with a plurality of flash memory blocks 2050, and a flash translation layer (FTL) 203 provided between the front-end layer 202 and the storage area 205.

[0057] Please refer to Figure 2 As shown, in an embodiment of the present invention, the connection interface 201 is electrically connected to the data storage device management circuit and is used to receive and identify the instructions and data transmitted by the host 100. That is to say, the instructions and data transmitted by the host 100 will be transmitted to the front-end layer 202 through the connection interface 201. In this embodiment, the connection interface 201 is compatible with the SATA standard. Of course, the connection interface 201 may also be compatible with the PATA standard, IEEE1394 standard, PCI Express standard, USB standard, SD standard, MS standard, MMC standard, CF standard, IDE standard or other suitable data transmission standards.

[0058] Please refer to Figure 2 As shown, in an embodiment of the present invention, the control unit 2021 in the front-end layer 202 is used to execute a plurality of logic gates or control instructions implemented in hardware form or firmware form, and perform operations such as data writing, reading, and erasing in the storage area 205 according to the instructions of the host 100.

[0059] Please refer to Figure 2 As shown, in an embodiment of the present invention, the flash memory block interface 204 is electrically connected to the front-end layer 202 and is an interface for accessing the data in the storage area 205. That is to say, the data to be written into the storage area 205 will be converted into a format acceptable to the flash memory block 2050 through the flash memory block interface 204.

[0060] Please refer to Figure 2As shown, in an embodiment of the present invention, the storage area 205 is connected to the front-end layer 202 and is used to store the data written by the host 100. The storage area 205 is a rewritable non-volatile data storage device module. In this embodiment, the storage area 205 includes a plurality of flash memory blocks 2050. The flash memory blocks 2050 are physical blocks, and the physical blocks can belong to the same data storage device die or different data storage device dies. Each physical block respectively has a plurality of physical pages, and each physical page has at least one physical sector, wherein the physical pages belonging to the same physical block can be independently written and simultaneously erased. For example, each physical block is composed of 128 physical pages, and each physical page has 8 physical sectors. That is to say, in the example where each physical sector is 512 bytes (byte), the capacity of each physical page is 4 kilobytes (Kilobyte, K). However, in an embodiment, each physical block can be composed of 64 physical pages, 256 physical pages or any other number of physical pages.

[0061] Please refer to Figure 2 As shown, in an embodiment of the present invention, the physical block is the smallest unit of erasure. That is, each physical block contains the smallest number of storage units that are erased together. The physical page is the smallest programmable unit. That is, the physical page is the smallest unit for writing data. However, in some embodiments, the smallest unit for writing data can also be a physical sector or other sizes. Each physical page generally includes a data bit area and a redundant bit area. The data bit area is used to store the user's data, and the redundant bit area is used to store the system's data (for example, error checking and correction codes).

[0062] Please refer to Figure 2 As shown, in an embodiment of the present invention, the storage area 205 is a multi-level cell (MLC) NAND flash memory module. In other embodiments, the storage area 205 can also be a single-level cell (SLC) NAND flash memory module, other flash memory modules or other data storage device modules with the same characteristics.

[0063] Please refer to Figure 2As shown, in an embodiment of the present invention, to manage the flash memory blocks 2050 in the storage area 205, a flash translation layer 203 is provided within the data storage device 200. An address translation unit 2032 is provided in the flash translation layer 203, which can complete the conversion or mapping from logical data blocks to the physical space of the flash memory. At the same time, a garbage collection unit 2033 for erasing invalid data is also included in the flash translation layer 203. As user data is continuously written, garbage data (invalid data) will be generated within the flash memory blocks 2050. The garbage data will occupy the space of the flash memory blocks 2050. When the available space of the flash memory blocks 2050 is insufficient, the garbage collection unit 2033 in the flash translation layer 203 can perform garbage collection, that is, move the valid data on several flash memory blocks 2050 out and write it to a new flash memory block 2050, and then erase these previous flash memory blocks 2050 to obtain available flash memory blocks. The flash translation layer 203 also includes a wear leveling unit 2034 for ensuring balanced writing of each flash memory block 2050, and a bad block management unit 2031 for implementing bad block management. Among them, the bad block management unit 2031 can implement bad block management in the storage area 205.

[0064] Please refer to Figure 3 As shown, in an embodiment of the present invention, the control unit 2021 logically groups the physical blocks (0) to physical blocks (N) into a data area 2051, a blank area 2052, a system area 2053, and a replacement area 2054, for example.

[0065] Please refer to Figure 3 As shown, in an embodiment of the present invention, the physical blocks logically belonging to the data area 2051 and the blank area 2052 are used to store data from the host 100. Specifically, the physical blocks in the data area 2051 are regarded as physical blocks storing data, and the physical blocks in the blank area 2052 are used to replace the physical blocks in the data area 2051. That is to say, when a write instruction and the data to be written are received from the host 100, a physical block is extracted from the blank area 2052, and the data is written into the extracted physical block to replace the physical block in the data area 2051.

[0066] Please refer to Figure 3 As shown, in an embodiment of the present invention, the physical blocks logically belonging to the system area 2053 are used to record system data. For example, the system data includes information about the manufacturer and model of the rewritable non-volatile data storage device module, the number of physical blocks of the rewritable non-volatile data storage device module, the number of physical pages of each physical block, etc.

[0067] Please refer to Figure 3As shown, in an embodiment of the present invention, the physical blocks logically belonging to the replacement area 2054 are used for the bad physical block replacement program to replace the damaged physical blocks. Specifically, if there are still normal physical blocks in the replacement area 2054 and the physical blocks in the data area 2051 are damaged, normal physical blocks will be extracted from the replacement area 2054 to replace the damaged physical blocks.

[0068] Please refer to Figure 4 As shown, in an embodiment of the present invention, the data storage device 200 includes a buffer area 2022 and a storage area 205, and the buffer area 2022 is arranged in the front-end layer 202. The data storage device 200 can be a solid-state drive, for example, a solid-state drive without a dynamic random access data storage device, that is, a DRAM-Less SSD.

[0069] Please refer to Figure 4 As shown, in an embodiment of the present invention, the buffer area 2022 includes a secondary mapping table 207 and a dynamic mapping table 208. A primary mapping table 206 is provided in the address conversion unit in the flash translation layer 203. The data storage device 200 reads or writes based on a page, but the erase operation can only be based on a flash block. The erase operation means setting all bits of this block to "1". Before erasing, the flash controller needs to first copy the valid data in this storage block to the blank pages of another block. The valid data in the storage block refers to the data stored in this block that has not been modified, and this part of the data may be read. The invalid data in the storage block refers to the data stored in this block that has been modified, and this part of the data cannot be read. The primary mapping table 206 contains the mapping relationship between all logical addresses and corresponding physical addresses, and manages the segmented writing and reading of logical addresses.

[0070] Please refer to Figures 5 - 6 As shown, in this embodiment, the primary mapping table 206 includes multiple logical address segments, such as Figure 6 shows logical address segment 0, logical address segment 1, logical address segment 2, logical address segment 3, and logical address segment 4. The logical lengths of logical address segments 0 to 4 are the same. For example, logical address segment 0 ranges from logical address 0 to logical address 9, logical address segment 1 ranges from logical address 10 to logical address 19, logical address segment 2 ranges from logical address 20 to logical address 29, logical address segment 3 ranges from logical address 30 to logical address 39, and logical address segment 4 ranges from logical address 40 to logical address 49. From Figure 6It can be seen that the logical address segment 0 corresponds to the physical addresses from the physical address 2061 corresponding to the logical address (N) to the physical address 2062 corresponding to the logical address (N + the number of logical addresses within the segment - 1). The physical addresses from the physical address 2061 corresponding to the logical address (N) to the physical address 2062 corresponding to the logical address (N + the number of logical addresses within the segment - 1) are also the storage space in the storage area 205 corresponding to the logical address segment 0. The said storage space can be used to store the written data. It should be noted that the number of logical addresses within the segment represents the number of logical addresses included in this logical address segment.

[0071] Please refer to Figures 5 - 6 As shown, in this embodiment, the secondary mapping table 207 includes a plurality of static mapping units, such as static mapping units 2071 to 2075. The static mapping units 2071 to 2075 all have a flag bit and a physical address segment, and the physical address segment is used to index the mapping relationship in the logical address segment. For example, the status of the flag bit in the static mapping unit 2071 is the first status, that is, the status of the flag bit is 0. At the same time, the static mapping unit 2071 also includes a physical address segment 0, and the physical address segment 0 corresponds to the logical address segment 0 in the primary mapping table 206. Similarly, the status of the flag bit in the static mapping unit 2072 is the first status, that is, the status of the flag bit is 0. At the same time, the static mapping unit 2072 also includes a physical address segment 1, and the physical address segment 1 corresponds to the logical address segment 1 in the primary mapping table 206. In this embodiment, since the secondary mapping table 207 is located in the flash translation layer 203. The flash translation layer 203 is used to store the correspondence between the logical address with data and the actual address. Therefore, the flash translation layer 203 is used to convert the logical address in the write data request or read data request sent by the system controller into the actual address of the data in the solid-state drive. Therefore, when the logical address is input, the physical address segment corresponding to this logical address can be found from the secondary mapping table 207, and then the logical address segment can be found in the primary mapping table 206, so as to write data in the storage space. In this embodiment, the first status means that the logical address segment index area is located in the primary mapping table 206.

[0072] Please refer to Figure 4 and Figure 6As shown, in an embodiment of the present invention, a plurality of dynamic mapping units 2081 are further provided in the buffer 2022, and the plurality of dynamic mapping units 2081 can form a dynamic mapping table 208. Among them, the dynamic mapping table 208 is, for example, a hash linked list, and each dynamic mapping unit 2081 is a mapping relationship node. When performing a write data operation, the control unit applies for at least one dynamic mapping unit 2081 to temporarily store the mapping relationship between the logical address and the corresponding physical address of the data. The plurality of dynamic mapping units 2081 are connected together to form a dynamic mapping table (hash linked list) 208. And in each hash linked list, the dynamic mapping units 2081 with the same logical address segment can be set in the same vertical linked list. When the relationship between the number of mappings of the logical address and the corresponding physical address stored in the dynamic mapping table 208 (the number of dynamic mapping units) reaches a threshold, the mapping relationship between the logical address range and the physical address range stored in the dynamic mapping table 208 is flushed down to the first-level mapping table 206 in the flash translation layer 203, and the corresponding relationship in the second-level mapping table 207 is updated.

[0073] Specifically, please refer to Figure 4 and 6 As shown, in an embodiment of the present invention, after adding the dynamic mapping unit 2081 to the dynamic mapping table 208, the status of the static mapping unit in the second-level mapping table can be updated. When the logical address of the input data is 2 and the length of the data is 3, the logical address of the data is also the logical start address of the data. Therefore, the logical address of the input data is located in the logical address segment 0. Therefore, the control unit applies for a blank dynamic mapping unit 2081, and then stores the logical address and the data length of the data in the dynamic mapping unit 2081. Since the logical address of the data is located in the logical address segment 0, and the static mapping unit 2071 in the second-level mapping table corresponds to the logical address segment 0, the flag bit in the static mapping unit 2071 in the second-level mapping table is updated from the first state to the second state, that is, the state of the flag bit is updated from "0" to "1", thus completing the update of the second-level mapping table 207. When the number of dynamic mapping units 2081 in the dynamic mapping table 208 reaches a preset value, the mapping relationship between the logical address and the corresponding physical address stored in the dynamic mapping units 2081 in the dynamic mapping table 208 is flushed down to the first-level mapping table 206.

[0074] Please refer to Figure 1 and Figure 2As shown, in an embodiment of the present invention, when the data storage device 200 receives the write data and write name transmitted by the host 100, the control unit 2021, according to the command and in accordance with the logical address of the write data, allocates a physical address for the write data. When there is no valid data stored in the storage area corresponding to the physical address, the write data can be stored in the physical address corresponding to the logical address. During the process of writing data, no screening is performed on the write data, but it is directly written, and this process may cause an increase in write amplification.

[0075] Please refer to Figure 7 As shown, for the data storage device provided by the present invention, the present invention provides a data writing method for a data storage device, including steps S100 - S106.

[0076] S100. Receive the write command and write data sent by the host.

[0077] S101. Store the write data in the buffer area.

[0078] S102. Determine whether the write data is all zero data. If so, execute step S103; if not, execute step S106.

[0079] S103. Determine whether the logical mapping relationship corresponding to the logical address of the write data is in an available state. If so, execute step S105; if not, execute step S104.

[0080] S104. Delete the logical mapping relationship corresponding to the logical address of the write data, and execute step S105.

[0081] S105. Discard the write data and reply to the host that the write command has been completed.

[0082] S106. Store the write data in the storage area.

[0083] Please refer to Figure 1 、 Figure 2 and Figure 7 As shown, in an embodiment of the present invention, in step S100, during the writing process of the host 100 to the data storage device 200, when the host 100 sends data to the data storage device 200, the data sent includes a write command and write data. Among them, the write command includes the logical address range allocated for the write data, and the logical address range includes the starting logical address and the length of the logical address. The write data is the data that needs to be stored and saved in the data storage device 200.

[0084] Please refer to Figure 1 、 Figure 2 and Figure 7As shown, in an embodiment of the present invention, in step S101, when the host 100 sends a write command and write data to the data storage device 200, after receiving the logical start address and data length information in the write command, the data storage device 200 directly stores the write data in the buffer 2022.

[0085] Please refer to Figure 1 、 Figure 2 and Figure 7 As shown, in an embodiment of the present invention, after storing the write data in the buffer 2022, it is determined whether the write data is all zero data. In the present application, the methods for determining the write data include the sampling method, the full detection method, and the method combining the sampling method and the full detection method.

[0086] Please refer to Figure 7 and Figure 8 As shown, in an embodiment of the present invention, the method for determining whether the write data is all zero data may, for example, first use the sampling method and then use the full detection method for judgment. In the present invention, the number of samples in the sampling method is not limited. Sampling can be performed at intervals of a preset number of write data. The preset data is, for example, 512, 1024, 2048, etc., and there is no further limitation here. It is also possible to preset the number of samples, and then divide the data length of the write data equally and sample at the equal division points.

[0087] Please refer to Figure 7 and Figure 8 As shown, in an embodiment of the present invention, in the sampling method, the number of samples is, for example, 3, and the sampled data is the first data, the tail data, and the middle data of the write data. Then, step S102 for determining whether the write data is all zero data includes steps S1021 - S1024.

[0088] S1021. Determine whether the first data of the write data is zero data. If so, execute step S1022. If not, it means that the written data is not all zero data, and execute step S106 according to Figure 7 Execute step S106.

[0089] S1022. Determine whether the tail data of the write data is zero data. If so, execute step S1023. If not, it means that the written data is not all zero data, and execute step S106 according to Figure 7 Execute step S106.

[0090] S1023. Determine whether the middle data of the write data is zero data. If so, execute step S0124. If not, it means that the written data is not all zero data, and execute step S106 according to Figure 7 Execute step S106.

[0091] S1024. Determine whether the written data is all zero data according to the writing order of the written data. If so, it means that the written data is all zero data, and then Figure 7 perform step S103. If not, it means that the written data is not all zero data, and then Figure 7 perform step S106.

[0092] In this embodiment, first use the sampling method to determine whether the first data, the tail data, and the middle data of the written data are all zero data, so that the valid written data (non-zero data) can be written into the storage area as soon as possible, reducing the impact of the process of judging whether the written data is zero data on the function of the data storage device and the data writing process, and thus reducing the impact on the data writing performance.

[0093] Please refer to Figure 7 and Figure 8 As shown in, in an embodiment of the present invention, when performing step S1024, when determining whether the written data is all zero data according to the writing order, the written data can also be divided into multiple segments first, and each segment of the written data is judged by the first sampling method such as steps S1021 - S1023, and then judged by the full detection method such as step S1024.

[0094] Please refer to Figure 1 、 Figure 2 and Figure 9 As shown in, in another embodiment of the present invention, the data storage device 200 receives too much written data at one time, and there are some zero data and some non-zero data in the written data written at one time. At this time, when the data storage device 200 performs data writing, before judging whether the written data is all zero data, the written data can be divided into multiple segments according to the data length of the written data first, and then judge whether each segment of the written data is zero data and whether the logical address of each segment of the written data is in an available state, and write or discard according to the judgment result. Specifically, the data writing method at this time includes steps S110 - S117.

[0095] S110. Receive the write command and the written data sent by the host.

[0096] S111. Store the written data in the buffer.

[0097] S112. Divide the written data into multiple segments according to the data length of the written data. And perform the content of steps S113 to S117 on each segment of the written data until all the written data is written.

[0098] S113. Judge whether each segment of the written data is all zero data. If so, perform step S114. If not, perform step S117.

[0099] S114. Determine whether the logical mapping relationship corresponding to the logical address of the written data in this segment is in an available state. If so, execute step S116; if not, execute step S115.

[0100] S115. Delete the logical mapping relationship of the logical address corresponding to the written data in this segment, and execute step S11.

[0101] S116. Discard the written data in this segment, and reply to the host that the write command has been completed.

[0102] S117. Store the written data in this segment in the storage area.

[0103] Please refer to Figure 9 As shown, in another embodiment of the present invention, when segmenting the written data, the length of each segment of written data can be set according to specific new requirements, and specifically, it can be segmented according to the data length of the written data. When segmenting the data, the smaller the data length of each segment of written data, the better, and the writing of zero data can be minimized as much as possible. However, if the data length of each segment of written data is too small, the frequency of steps S113 - S117 will increase, which will lead to too long writing time and too heavy load on the control unit, affecting the data writing performance. In this embodiment, the data length of each segment of written data can be set to a transmission unit length, that is, a physical sector, 512 bytes, according to the performance during data writing. That is, when the length of the written data does not exceed 512 bytes, there is no need to segment the written data; when the written data exceeds 512 bytes, the written data is segmented, and the length of each segment of written data is 512 bytes. This segmentation method can balance code loss and write performance improvement, and on the basis of ensuring the writing performance, minimize the size of each segment of written data as much as possible, that is, discard invalid zero data as much as possible.

[0104] Please refer to Figure 7 and Figure 9 As shown, in an embodiment of the present invention, in steps S102 and S113, after detecting whether the written data is all-zero data, when the written data written at one time or each segment of written data has non-zero data, the written data written at one time or each segment of written data is stored in the storage area, and the mapping relationship between the logical address and the corresponding physical address of the written data written at one time or each segment of written data is updated in the secondary mapping table and the primary mapping table (or dynamic mapping table).

[0105] Please refer to Figure 7 and Figure 9As shown, in an embodiment of the present invention, in step S102 and step S113, after detecting whether the written data is all-zero data, when all of the written data written at one time or each segment of written data is zero data, step S103 or step S114 is executed to determine whether the logical mapping relationship corresponding to the logical address of the written data written at one time or each segment of written data is in an available state, that is, whether the logical address corresponding to the written data written at one time or each segment of written data has never been written, or whether the logical mapping relationship corresponding to the previously written logical address has been invalidated.

[0106] Please refer to Figure 7 and Figure 9 As shown, in an embodiment of the present invention, in step S103 or step S114, when the logical mapping relationship corresponding to the logical address of the written data written at one time or each segment of written data is in an available state, that is, the logical address corresponding to the written data written at one time or each segment of written data has never been written, or the logical mapping relationship corresponding to the previous logical address is in an invalid state. Step S105 or step S116 is executed to discard the written data written at one time or each segment of written data, and reply to the host that the write command has been completed. At this time, the written data written at one time or each segment of written data is not stored in the storage area, and the logical address corresponding to the discarded written data has never been written or the logical mapping relationship corresponding to the previous logical address is in an invalid state, that is, the logical address corresponding to the discarded written data is in a blank state. When the host reads the content of this logical address, the data storage device will reply with zero.

[0107] Please refer to Figure 7 and Figure 9As shown, in an embodiment of the present invention, in step S103 or step S114, when the logical mapping relationship corresponding to the write data written at one time or the logical address of each segment of write data is in an unavailable state, that is, the write data written at one time or the logical address corresponding to each segment of write data has been written, and the logical mapping relationship corresponding to the logical address is in a valid state. Execute step S104 or step S115 to delete the logical mapping relationship corresponding to the logical address of the write data written at one time or each segment of write data, and execute step S105 or step S116 to discard the write data written at one time or each segment of write data. At this time, the write data written at one time or each segment of write data is not stored in the storage area, and the logical mapping relationship corresponding to the logical address of the discarded write data is in an invalid state, that is, the logical mapping relationship corresponding to the logical address of the discarded write data is in a blank state. When the host reads the content of this logical address, the data storage device will reply with zero. If step S104 or step S115 is not executed, because the write data written at one time or each segment of write data will be discarded, the logical address of the discarded write data still has the previous logical mapping relationship. When the host reads the content of this logical address again, it will still read the data stored in the physical address corresponding to the previous logical address. By deleting the logical mapping relationship corresponding to the discarded write data, when the host reads again, the data storage device will feedback zero data to the host, avoiding the response error of the data storage device.

[0108] Please refer to Figure 4 As shown, in an embodiment of the present invention, when deleting the logical mapping relationship corresponding to the logical address of the write data, the mapping relationship between the logical address and the physical address corresponding to the write data in the first-level mapping table and the second-level mapping table can be marked as invalid.

[0109] Please refer to Figure 1 、 Figure 2 and Figure 10As shown in the figure, the present invention also provides a data writing system for a data storage device, including a receiving unit 301, a storage unit 302, a first judgment unit 303, a second judgment unit 304, and an execution unit 305. Among them, the receiving unit 301 is used to receive the writing command and writing data sent by the host, such as the receiving interface 201 in the present application. The storage unit 302 is used to store the temporarily stored writing data, such as the buffer 2022 in the present application. The first judgment unit 303 is used to judge whether the writing data is all zero data, the second judgment unit 304 is used to judge whether the logical address of the writing data is in an available state, and the execution unit 305 is used to delete the logical mapping relationship corresponding to the writing data, discard the writing data, and reply to the host 100 that the writing command has been completed, and to store the writing data in the storage area 205. Among them, the first judgment unit 303, the second judgment unit 304, and the execution unit 305 are, for example, set in the control unit 2021 in the present application.

[0110] In summary, the present invention proposes a data writing method, a system, and a data storage device for a data storage device. When receiving writing data, the data is first stored in the buffer, and it is judged whether the writing is zero data. When the writing data is non-zero data, the data is stored in the storage area. When the writing data is invalid zero data, it is judged whether the logical address of the writing data is in an available state. When the logical address of the writing data is in an available state, the logical mapping relationship corresponding to the logical address of the writing data is deleted, the writing data is discarded, and the host is replied that the writing command has been completed. When the logical address of the writing data is in an unavailable state, the writing data is directly discarded, and the host is replied that the writing command has been completed.

[0111] The above description is only a preferred embodiment of the present application and an explanation of the applied technical principles. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the technical solution formed by the specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept, such as the technical solution formed by mutually replacing the above features with the (but not limited to) technical features with similar functions disclosed in the present application.

[0112] Except for the technical features described in the specification, the remaining technical features are known to those skilled in the art. To highlight the innovative features of the present invention, the remaining technical features are not described in detail here.

Claims

1. A data writing method for a data storage device, characterized in that, Including the following steps: Receiving the write data sent by the host and storing the write data in the buffer; Judging whether all the write data is zero data; And When all the write data is zero data, discarding the write data and replying to the host that the writing of the write data is completed; when the write data is non-zero data, writing the write data; Wherein, when the write data is all zero data, the data writing method of the data storage device further includes: Judging whether the logical mapping relationship corresponding to the logical address of the write data is in an available state; When the logical mapping relationship corresponding to the logical address of the write data is in an available state, discarding the write data and replying to the host that the writing of the write data is completed; when the logical mapping relationship corresponding to the logical address of the write data is in an unavailable state, deleting the logical mapping relationship corresponding to the logical address of the write data, then discarding the write data, and replying to the host that the writing of the write data is completed.

2. The data writing method of the data storage device according to claim 1, wherein When the logical mapping relationship corresponding to the logical address of the write data is in an available state, it means that the logical address of the write data has never been written, or the previous logical mapping relationship corresponding to this logical address was in an invalid state.

3. The data writing method of the data storage device according to claim 1, wherein When judging whether the write data is all zero data, first use the sampling method to judge whether part of the write data is zero data, and then use the full detection method to judge whether all the write data is zero data.

4. The data writing method of the data storage device according to claim 3, characterized in that Using the sampling method to judge whether part of the write data is zero data includes the following steps: Judging whether the first data of the write data is zero data; If the first data is zero data, then judging whether the tail data of the write data is zero data; and If the tail data is zero data, then judging whether the middle data of the write data is zero data.

5. The data writing method of the data storage device according to claim 3, characterized in that The steps of using the full detection method to judge whether all the write data is zero data are: Judging whether the write data is all zero data according to the writing order of the write data.

6. The data writing method of the data storage device according to claim 1, characterized in that, Before judging whether the write data is all zero data, the data writing method of the data storage device further includes the following steps: Dividing the write data into one or more segments according to the data length of the write data; and And judging whether each segment of the write data is zero data according to the writing order of the data.

7. The data writing method of the data storage device according to claim 6, wherein, The length of each segment of the write data is one transmission unit length.

8. The method for writing data into the data storage device according to claim 6, characterized in that, After dividing the write data into multiple segments, the data writing method of the data storage device further includes the following steps: Judging whether the logical mapping relationship corresponding to the logical address of each segment of the write data is in an available state; When the logical mapping relationship corresponding to the logical address of this segment of the write data is in an available state, discarding this segment of the write data and replying to the host that the writing of this segment of the write data is completed; When the logical mapping relationship corresponding to the logical address of this segment of the write data is in an unavailable state, deleting the logical mapping relationship corresponding to the logical address of this segment of the write data, then discarding this segment of the write data, and replying to the host that the writing of this segment of the write data is completed; until all the write data is discarded or written.

9. A data writing system for a data storage device, characterized in that, Comprising: A receiving unit, configured to receive write data sent by a host and store the write data in a buffer; A first determination unit, configured to determine whether all of the write data is zero data; And An execution unit, when all of the write data is zero data, configured to discard the write data and reply to the host that the writing of the write data is completed; when the write data is non-zero data, write the write data; A second determination unit, configured to determine whether the logical address of the write data is in an available state. When the logical mapping relationship corresponding to the logical address of the write data is in an available state, discard the write data and reply to the host that the writing of the write data is completed; when the logical mapping relationship corresponding to the logical address of the write data is in an unavailable state, delete the logical mapping relationship corresponding to the logical address of the write data, then discard the write data, and reply to the host that the writing of the write data is completed.

10. A data storage device, characterized in that, Comprising: A buffer, storing program instructions; A control unit, the buffer runs the program instructions to implement the data writing method of the data storage device according to claim 1.

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