A storage device, its testing method, and testing system

Abstract

The present invention discloses a test method for a storage device, which at least includes: providing a storage device, and establishing a data area, a system block area, and a bad block table mapping area in the storage device according to the types of stored information; performing a first read / write test on the data area, and establishing a first bad block area and a working block area in the data area according to the result of the first read / write test; adjusting the timing information of the storage device, and obtaining the read / write error information of the working block area, and repeatedly tuning the read / write parameter information of the storage device according to the read / write error information; performing a second read / write test on the working block area and the system block area according to the read / write parameter information, and marking out a second bad block area in the working block area and the system block area according to the result of the second read / write test; and obtaining the bad block information of the first bad block area and the second bad block area, and recording the bad block information in the bad block table mapping area. The present invention can quickly and stably screen out the bad blocks in the storage device.

Description

Technical Field

[0001] The present invention belongs to the field of storage device testing, and particularly relates to a storage device, a testing method thereof, and a testing system thereof. Background Art

[0002] Flash Memory is a long-life non-volatile memory. Flash Memory can perform deletion and adaptation in a storage unit called a block. And the write operation of Flash Memory must be performed in a blank area. If there is already data in the target area, it must be erased first and then written. Therefore, the erase operation is a basic operation of Flash Memory. In the manufacturing process of Flash Memory, due to process limitations and Flash Memory performance issues, bad block problems will occur.

[0003] When bad blocks appear in Flash Memory, the storage device cannot accurately detect the bad blocks. If bad blocks are used when storing data, it will cause errors in data reading, writing, and erasing. The existence of bad blocks will seriously affect the performance of the hard disk, and even cause the hard disk to be scrapped and data to be lost. Summary of the Invention

[0004] The purpose of the present invention is to provide a storage device, a testing method thereof, and a testing system thereof, which can quickly and stably screen out bad blocks in the storage device, thereby improving the stability of the storage device.

[0005] To solve the above technical problems, the present invention is realized through the following technical solutions:

[0006] A testing method for a storage device provided by the present invention at least includes:

[0007] Providing a storage device, and establishing a data area, a system block area, and a bad block table mapping area in the storage device according to the type of stored information;

[0008] Performing a first read / write test on the data area, and establishing a first bad block area and a working block area in the data area according to the result of the first read / write test;

[0009] Adjusting the timing information of the storage device, and obtaining the read / write error information of the working block area. According to the read / write error information, repeatedly tuning the read / write parameter information of the storage device;

[0010] Performing a second read / write test on the working block area and the system block area according to the read / write parameter information, and marking a second bad block area in the working block area and the system block area according to the result of the second read / write test; and

[0011] Obtaining the bad block information of the first bad block area and the second bad block area, and recording the bad block information in the bad block table mapping area.

[0012] In one embodiment of the present invention, the step of tuning the read and write parameters of the storage device includes:

[0013] Writing data to the working block area at single data rate and then reading the data from the working block area at double data rate; and

[0014] According to the error correction code generated by reading and writing data, correcting the timing information in the reading stage to obtain the optimal reading timing information.

[0015] In one embodiment of the present invention, the step of tuning the read and write parameters of the storage device includes:

[0016] Adjusting the timing information of the storage device to the optimal reading timing information and writing data to the working block area at double data rate;

[0017] Reading data from the working block area and correcting the timing information in the writing stage according to the error correction code generated by reading and writing data to obtain the optimal writing timing information.

[0018] In one embodiment of the present invention, after repeatedly tuning the read and write parameter information of the storage device, searching the result page of the storage block in the storage device, and establishing a bad block mapping table in the bad block table mapping area, the bad block mapping table includes the bad block address and bad block information of the first bad block area.

[0019] In one embodiment of the present invention, the steps of the first read and write test include:

[0020] Providing a plurality of preset data, and writing the preset data to the working block area in descending order of the preset data until the working block area is full; and

[0021] Reading the preset data and recording the error correction code generated during the process of reading and writing data.

[0022] In one embodiment of the present invention, after establishing the bad block mapping table and before the second read and write test, pre-testing the storage device.

[0023] In one embodiment of the present invention, the steps of the second read and write test include:

[0024] Erasing the storage information of the storage block to be tested;

[0025] Writing data to all storage pages of the storage block to be tested; and

[0026] Reading all storage pages of the storage block to be tested.

[0027] In one embodiment of the present invention, the step of marking the second bad block area includes:

[0028] Edit the logical address of the system block area, and establish a first test section and a second test section in the system block area;

[0029] Perform a second read / write test on the first test section and the second test section; and

[0030] Mark and replace the bad blocks in the system block area according to the error correction code during the second read / write test.

[0031] In an embodiment of the present invention, the step of marking the second bad block area includes: during the second read / write test, backup and store the stored information of the first test section and the second test section with each other.

[0032] In an embodiment of the present invention, the step of establishing the first test section and the second test section includes:

[0033] Edit the logical address of the system block area, so that the first test section and the second test section include an equal number of parameter blocks, code blocks, and power-on reset data storage blocks.

[0034] A test system for a storage device provided by the present invention includes:

[0035] A partitioning module for establishing a data area, a system block area, and a bad block table mapping area in the storage device according to the type of stored information;

[0036] A first read / write test module for performing a first read / write test on the data area, and establishing a first bad block area and a working block area in the data area according to the result of the first read / write test;

[0037] A tuning module for adjusting the timing information of the storage device, obtaining the read / write error information of the working block area, and repeatedly tuning the read / write parameter information of the storage device according to the read / write error information;

[0038] A second read / write test module for performing a second read / write test on the working block area and the system block area according to the read / write parameter information, and marking a second bad block area in the working block area and the system block area according to the result of the second read / write test

[0039] An archiving and recording module for obtaining the bad block information of the first bad block area and the second bad block area, and recording the bad block information in the bad block table mapping area.

[0040] A storage device provided by the present invention stores a computer program, and when the computer program is executed by a processor, it implements the test method of the storage device as described above.

[0041] As described above, the present invention provides a storage device, a testing method thereof, and a testing system, which can quickly and stably screen out bad blocks in the storage device in an aging test environment, and the testing method can eliminate parameter interference and take into account the influence of environmental factors on the storage device as much as possible, thereby ensuring a high accuracy rate of bad block testing. The testing method and testing system provided by the present invention have a precise testing architecture, which is beneficial to reducing code redundancy in the testing process and is also beneficial to multiple tests.

[0042] Of course, it is not necessary for any product implementing the present invention to achieve all the above-mentioned advantages simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention, and those of ordinary skill in the art can obtain other drawings based on these drawings without creative efforts.

[0044] Figure 1 It is a schematic structural diagram of a flash memory chip.

[0045] Figure 2 It is a schematic diagram of the partition structure of the flash memory chip obtained according to the testing method of the present invention.

[0046] Figure 3 It is a flowchart of the testing method of the storage device of the present invention.

[0047] Figure 4 It is a testing flowchart of step S20.

[0048] Figure 5 It is a testing flowchart of step S30.

[0049] Figure 6 It is a testing flowchart of step S34.

[0050] Figure 7 It is a testing flowchart of step S35.

[0051] Figure 8 It is a testing flowchart of step S40.

[0052] Figure 9 It is a testing flowchart of step S42.

[0053] Figure 10 It is a testing structure diagram of the system block area.

[0054] Figure 11 It is a testing flowchart of step S50.

[0055] Figure 12 It is a test structure diagram for the bad block area.

[0056] Figure 13 It is a schematic structural diagram of the test system.

[0057] Figure 14 It is a block diagram of the structural principle of a storage device.

[0058] Figure 15 It is a block diagram of the structural principle of a computer-readable storage medium.

[0059] Label description: 1. Flash memory chip; 10. Flash memory particles; 20. Storage module; 30. Storage block; 40. Data area, 401. Working block area; 402. Bad block area; 4021. Original factory bad block area; 4022. First bad block area; 4023. Second bad block area; 4024. First bad block; 4025. Second bad block; 50. System block area; 51. First test unit; 52. Second test unit; 501. Parameter block; 5011. First parameter block; 5012. Second parameter block; 502. Code block; 5021. First code block; 5022. Second code block; 503. Power-on reset data storage block; 5031. First power-on reset data storage block; 5032. Second power-on reset data storage block; 60. Bad block table mapping area, 70. Test system, 701. Partition module; 702. First read / write test module; 703. Tuning module; 704. Second read / write test module; 705. File creation record module; 80. Processor; 90. Memory; 100. Computer instruction; 1001. Computer-readable storage medium. Specific implementation mode

[0060] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0061] The storage device is, for example, a solid-state drive. Whether the solid-state drive is durable and whether its performance degrades severely during use largely depend on the quality of the flash memory and the flash memory testing capabilities of the solid-state drive manufacturer. Under different application requirements, the quality requirements for the storage device also vary. For example, when the flash memory is applied in military, vehicle-mounted, aerospace, and other fields, it is necessary to ensure that the bad block rate does not exceed, for example, 2%. And when the flash memory is in use, the solid-state drive controller still needs to execute strategies such as bad block management and bad block replacement on the flash memory to ensure the lifespan and performance of the solid-state drive. In application fields with relatively strict requirements for bad blocks, such as military, vehicle-mounted, and aerospace fields, once a bad block is found, the solid-state drive, such as NAND, will face scrapping. Therefore, the testing of flash memory chips by upstream manufacturers still has limitations. Only when the solid-state drive manufacturer has strong flash memory testing capabilities can the final quality of the solid-state drive be ensured. Among them, the flash memory chip can be a NAND flash memory, and the NAND flash memory can be a chip-type flash memory with a controller, such as an eMMC chip (Embedded Multi Media Card), an SD NAND flash memory, an SPI NAND flash memory, and so on.

[0062] A testing method for a storage device provided by the present invention includes steps S10 to S50, wherein the content of step S10 is as follows.

[0063] S10. Provide a storage device, and establish a data area, a system block area, and a bad block table mapping area in the storage device according to the types of stored information.

[0064] Please refer to Figures 1 - 3As shown, in an embodiment of the present invention, a storage device is provided. The storage device is, for example, a flash memory chip 1. In step S10, the flash memory chip 1 is divided into a plurality of data regions 40, a plurality of system block regions 50, and a plurality of bad block table mapping regions 60. Among them, the data region is used to store data information, the system block region is used to store system information, and the bad block table mapping region 60 is used to store bad block information. In this embodiment, the flash memory chip 1 includes a plurality of flash memory particles 10, and the flash memory particles 10 include at least one storage module 20, and the storage module 20 includes a plurality of storage blocks 30. In the flash memory chip 1, each storage block 30 has a corresponding physical address. According to the physical address of the storage block 30, the flash memory chip 1 can be divided into a plurality of regions. Specifically, at least one data region 40, at least one system block region 50, and at least one bad block table mapping region 60 are correspondingly established in the storage module 20 to facilitate bad block screening. It should be noted that the data region 40, the system block region 50, and the bad block table mapping region 60 are divided according to the storage information types of the storage blocks 30. Specifically, the physical addresses of the storage blocks 30 of the same storage information type form a storage block set, and the logical address of the storage block set is set. In the flash memory chip 1, the data region 40, the plurality of system block regions 50, and the plurality of bad block table mapping regions 60 all have corresponding logical addresses.

[0065] Please refer to Figure 2 and Figure 3 As shown, in an embodiment of the present invention, in step S10, the original factory bad blocks in the flash memory chip 1 are divided into the data region 40, and the original factory bad block region 4021 is established. Among them, the information of the original factory bad blocks is stored in the bad block mapping table, and the storage blocks corresponding to the bad block mapping table are divided into the bad block table mapping region 60. Among them, the original factory bad blocks are the bad blocks tested by the upstream manufacturer when the flash memory chip 1 leaves the factory. Among them, the address information of the original factory bad blocks is stored in the bad block mapping table, and the original factory bad block region 4021 is established according to the address information of the original factory bad blocks. It should be noted that the above regions may not be continuous in physical address.

[0066] Please refer to Figures 1 - 3 As shown, the content of step S20 in the test method of the storage device of the present invention is as follows.

[0067] S20: Perform a first read / write test on the data region, and establish a first bad block region and a working block region in the data region according to the result of the first read / write test.

[0068] Please refer to Figure 2 and Figure 4As shown, in an embodiment of the present invention, excluding the original factory bad block area 4021, a first read / write test is performed on the data area 40, so as to screen out the unmarked bad blocks in the data area 40. Specifically, step S20 includes steps S21 to S26.

[0069] S21. Write preset data into the storage blocks in the data area.

[0070] S22. Read the preset data from the data area.

[0071] S23. Determine whether the read and written preset data are consistent.

[0072] S24. If the read and written preset data are consistent, divide the measured storage block into the working area.

[0073] S25. If the read and written preset data are inconsistent, divide the measured storage block into the first bad block area.

[0074] S26. Determine whether the measured storage module has been written completely. If so, execute step S30. If not, repeat step S21.

[0075] Please refer to Figure 2 and Figure 4 As shown, in an embodiment of the present invention, in step S21, before performing the first read / write test, multiple preset data of different sizes are set. Taking the storage module 20 as a test unit, a read / write test is performed on the storage block 30. Among them, the storage module 30 includes multiple storage blocks 30, and the storage block 30 is the minimum erasure unit of the storage module 30. In this embodiment, as Figure 1As shown, the storage blocks 30 are sorted and numbered in the order of their physical addresses. For example, they are the first storage block, the second storage block, and so on, up to the nth storage block. And the first storage block, the second storage block, and the nth storage block can be numbered 1, 2... n respectively, where n is a natural number greater than 2. In step S21, the preset data can be continuously written into the corresponding storage blocks 30 according to the number order of the storage blocks 30 until the storage module 20 is full. This can maximize the test accuracy and eliminate the interference caused by the randomness of reading and writing. The storage block 30 includes multiple storage pages, and the storage page is the smallest writing unit of the storage module 20. Among them, the size of the preset data can occupy one to multiple storage pages, or one to multiple storage blocks. The present invention does not specifically limit the size of the preset data. The size of the preset data can be 16KB, or dozens of MB to several GB, such as 20MB or 1GB, etc. The maximum value of the preset data does not exceed the storage capacity of the storage device, and the minimum value of the preset data is the smallest unit that the storage device can write, so as to fill the storage device with the preset data according to different storage devices and check the read and write information of each storage block 30. Among them, the selection order of the preset data is from large to small, that is, the preset data with the largest data volume is written first. When the remaining space does not meet the requirement for writing the largest preset data, the second largest preset data is selected until the preset data can be written into the corresponding storage page. Thus, the writing efficiency of the preset data is improved. By continuously writing the preset data, not only can the read and write bad block conditions of the storage block 30 be detected, but also the performance of the storage module 20 for continuously writing data can be tested at the same time. During the test process, the experimental results of continuously writing the preset data can be recorded for easy tracing. The above writing process is applicable to the writing of large-volume data and applicable to storage devices with small storage capacities. For example, writing 2GB of preset data, such as for detecting storage devices with a storage size of 8GB to 64GB. It should be noted that in the above embodiments, the limitation on the size of the applicable storage device can be adjusted according to the actual tested device. The present invention only gives an example of the size of the applicable storage device and does not specifically limit the specific volume of the applicable storage device.

[0076] Please refer to Figure 1 、 Figure 2 and Figure 4As shown, in another embodiment of the present invention, in step S21, preset data of different sizes is set and randomly written into the storage device. It can be written until the storage module 20 is full until the system reports an error automatically, or the storage module 20 may not be filled to achieve a quick test. In this embodiment, the accuracy of the test is improved by writing and reading the preset data in multiple loops into the storage module 20. Among them, the total amount of the preset data written into the storage device is greater than one-half of the storage capacity of the storage module 20 to ensure the accuracy of the multi-loop test. Moreover, in this embodiment, by randomly writing the preset data, the performance of the storage module 20 for randomly writing data can also be tested simultaneously. During the test, the experimental results of continuously writing the preset data can be recorded for easy traceability. The above writing process is applicable to the writing of small-volume data and to storage devices with a large storage capacity. For example, preset data of 50MB or 64KB is written, for example, to detect a storage device with a storage size of 32GB to 256GB. It should be noted that in the above embodiment, the limitation on the applicable storage device size can be adjusted according to the actual device to be tested. The present invention only gives an example of the applicable storage device size and does not limit the specific volume of the applicable storage device.

[0077] Please refer to Figure 1 、 Figure 2 and Figure 4 As shown, in an embodiment of the present invention, in step S22, the preset data is read from the storage block 30 written with the preset data. In this embodiment, the preset data can be read once after it is written once, so as to directly compare the written and read preset data. In other embodiments, the prepared preset data can also be written first and then step S22 is executed to read all the written preset data and compare all the written and read preset data. In this embodiment, the writing order and the reading order also need to be compared to avoid errors in the comparison process. In step S23, the written and read data are compared to exclude the bad blocks with read-write errors. Among them, the number of misaligned bits (bit) of the error correction code (Error Correcting Code, ECC) can be used to determine whether there is an error in reading and writing. Specifically, the low density parity-check code (LDPC code) can be used to check whether there is an error in the reading and writing process. In step S24, the physical address of the storage block 30 with read-write errors is recorded, so as to mark the bad blocks that appear in the first read-write test, and the storage blocks 30 without bad blocks are also listed as a set, thus forming a working block area 401. In step S25, the storage blocks 30 marked with bad blocks are listed as a set, thus forming a first bad block area 4022.

[0078] Please refer to Figure 1 、Figure 2 and Figure 4 As shown in Figure 4 , in an embodiment of the present invention, in step S26, when the preset data is read once after being written once, it is further determined whether the storage module 20 is finished writing. Specifically, when the storage module 20 finishes writing the preset data once and reads the data once, the difference between the total amount of the preset data written at this time and the capacity of the storage module 20 is judged to determine whether the storage module 20 is finished writing. If the preset data is continuously written into the storage module 20 until the storage module 20 is full, in step S26, the difference between the total amount of the preset data written and the capacity of the storage module 20 is judged. If the storage module 20 is not finished writing, the preset data of an appropriate size is continuously written into the storage module 20 according to the number. If the preset data is randomly written into the storage module 20 to a preset capacity, in step S26, the difference between the total amount of the preset data written and the preset capacity is judged. If the storage module 20 is not finished writing, the preset data is continuously and randomly written into the storage module 20.

[0079] Please refer to Figures 1 - 4 As shown in Figures 1 - 4 , in an embodiment of the present invention, step S20 includes multiple rounds of first read-write tests, where one execution of steps S21 to S26 is one round. In this embodiment, step S20 is executed, for example, 4 to 8 rounds, specifically, for example, 6 rounds. Through multiple rounds of first read-write tests, the storage blocks 30 with bad blocks are excluded, thereby improving the test accuracy of the storage device and reducing the interference caused by noise information to this test method. Among them, the noise information is, for example, the signal of the effective signal caused by the environmental temperature and operation error.

[0080] Please refer to Figures 1 - 4As shown, in an embodiment of the present invention, a storage device, such as a flash memory chip 1, is placed in an aging tester. Before performing step S21, the preset temperature of the test environment is set to, for example, 85°C ± 3°C. Specifically, the detected temperature of the temperature sensor of the flash memory particles in the flash memory chip 1 is read. Only when the temperature values that meet the preset temperature are read multiple times can the aging test of the storage device be started. Among them, the number of times the temperature values that meet the requirements are read is at least, for example, 5 times to ensure that the test environment of the storage device is stable, thereby ensuring the accuracy of the aging test. Before the first read / write test, the supply voltage (Volt Current Condenser, VCC) of the test is set to, for example, 2 - 5V, specifically, for example, 3.3V. The initial frequency is, for example, 2 - 4MHz, specifically, for example, 3MHz. The Command Prompt (CMD) is pulled low. After the above settings are completed, the first read / write test can be started. After finding a bad block, the bad block mark and bad block information are stored in the result page of the bad block. Among them, the result page can be the last storage page of the bad block. After the test is completed, the first bad block area 4022 is searched, the storage page storing the bad block information and bad block mark is found, and a bad block mapping table is constructed. Specifically, the bad block mapping area is used as a redundant area to store bad block data and establish a bad block mapping table that can correspond to the bad block address. Among them, the bad block information includes the reasons for the bad block, such as inability to read normally, inability to write normally, inability to erase normally, timeout read / write, data error, and ECC code overrun, etc.

[0081] Please refer to Figures 1 - 3 As shown, the content of step S30 in the test method of the storage device of the present invention is as follows.

[0082] S30. Adjust the timing information of the storage device, obtain the read / write error information of the working block area, and repeat tuning the read / write parameter information of the storage device according to the read / write error information.

[0083] Please refer to Figure 1 、 Figure 2 and Figure 5 As shown, in an embodiment of the present invention, during the data storage process of the storage block 20, due to reasons such as read / write parameters, data errors may occur. In the first read / write test, bad blocks may still occur. Therefore, in step S30, the read / write parameters of the data are tuned to reduce the number of error information during the test and improve the accuracy of the test. Specifically, step S30 includes steps S31 to S36.

[0084] S31. Erase the data stored in the working block area.

[0085] S32. Set the initial timing information of the storage device and write data to the working block area at a single data rate.

[0086] S33. Read data from the working block area at double data rate.

[0087] S34. Compare the written and read data, correct the timing information in the read stage, and obtain the optimal read timing information.

[0088] S35. Adjust the timing information of the storage device to the optimal read timing information, write data to the working block area, correct the timing information in the write stage, and obtain the optimal write timing information.

[0089] S36. Store the optimal read timing information and the optimal write timing information as card-opening parameters.

[0090] Please refer to Figure 1 、 Figure 2 and Figure 5 、 Figure 6 As shown in, in an embodiment of the present invention, in step S31, erase the preset data written into the storage module 20 in step S20. Specifically, erase the preset data located in the working block area 401 and the first bad block area 4022. In step S32, set the initial timing information of the storage device. Specifically, the timing information can be set to the lowest timing, and data is written to the working block area 401 at single data rate (SDR). Among them, the written data can be preset data to reduce information redundancy. In step S33, read data from the working block area 401 at double data rate (DDR). And in step S34, use the error correction code to confirm the data error situation, so as to adjust and obtain the optimal timing information. Specifically, step S34 includes steps S341 to S345.

[0091] S341. Determine whether the data read from the working block area 401 is consistent with the written data information. If the data read and written from the working block area 401 is consistent, execute step S342. If the data read and written from the working block area 401 is inconsistent, execute step S344.

[0092] S342. Obtain and record the timing information.

[0093] S343. Determine whether the timing information of the storage device has been traversed. If it has been traversed, execute step S345. If it has not been traversed, execute step S344.

[0094] S344. Adjust the timing information of the storage device to the next gear and re-execute step S341.

[0095] S345. Screen the recorded timing information to obtain the optimal read timing information.

[0096] Please refer to Figure 1 、 Figure 2 and Figure 5 、 Figure 6 As shown, in an embodiment of the present invention, in step S341, an error correction code can be used to determine whether the read and write information of the working block area 401 is consistent. If the read and write are consistent, the current timing information is available. Therefore, in step S342, the timing information of the storage device at this time is recorded. Among them, the recorded timing information includes the column address access time (Column Address Strobe Latency, CL), the delay time from the row address to the column address (Row Address Strobe to Column Address Strobe Delay, tRCD), the row address strobe precharge time (Row Address Strobe Precharge Time, tRP), and the row address activation time (Row AddressStrobe Active Time, tRAS). If the read and write data information of the working block area 401 is inconsistent, it means that the current timing information is not applicable to the current storage device and is not sufficient to enable the storage device to stably read information at double data rate. Therefore, in step S344, the timing information of the storage device is adjusted to the next level, and then the operation in step S341 is performed again to select the available timing information. Specifically, the clock information of the storage device can be adjusted, such as increasing the command ratio (Command Per Clock, CPC) of the storage device, increasing the CL parameter, tRP parameter, tRCD parameter, tRAS parameter, etc. Applied in the aging test process, performing this step can effectively avoid the influence of environmental and device factors on the test, resulting in a high bad block rate, and minimize the bad block problem caused by parameter problems, so as to screen out the device bad blocks that cannot be adjusted.

[0097] Please refer to Figure 1 、 Figure 2 and Figure 5 、 Figure 6As shown, in one embodiment of the present invention, after obtaining and recording the current timing information in step S342, step S343 is then executed to determine whether the timing information has been traversed. Specifically, the timing information of a storage device involves multiple parameters. Therefore, after completing the test of one timing level, the next timing level is tested. This allows the storage device to select as much available timing information as possible, thereby improving the accuracy of calculating the optimal read timing information and reducing errors caused by random data values and errors caused by the aging test environment. Once all timing information has been tested, it is determined that the timing has been traversed, and step S345 can be executed. In this embodiment, the initial level of the timing information is the lowest level, which is also the level with the highest overall performance and lowest fault tolerance of the storage device. The timing is then initially increased from the lowest level until it reaches the level corresponding to the maximum rated parameters of the storage device, at which point the test is terminated. In step S343, the judgment criterion can be to determine whether the current timing information is at the maximum rated parameters, thereby terminating the test. In step S345, the timing information filtered out in the above steps is further filtered to obtain the optimal read timing information. Specifically, the middle value of the timing information can be selected to improve the fault tolerance of parameter selection and reduce the error impact of random values. For example, the storage device can be optionally set to 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9 gears in automatic (Auto) mode. After testing, it is found that the gears that can ensure that the storage device can complete data reading at double the data rate are 1, 5, 6, 7, and 8, then gear 6 is selected as the optimal read timing information. If it is 5, 6, 7, and 8, then gear 6 or 7 is selected as the optimal read timing information. Among them, the middle value refers to the median of the timing information, not the average value, to improve the rapidity of adjusting the device during the aging test, and have both accuracy, can eliminate the error interference of the measurement, improve parameter fault tolerance, and is suitable for adjusting the device parameters during the aging test.

[0098] See also Figure 1 , Figure 2 and Figure 5 , Figure 7 As shown, in one embodiment of the present invention, in step S35, the timing information of the storage device is adjusted to the optimal read timing information, and then data is written to the working block area 401. The data written to the working block area 401 in step S34 can be erased first to free up the working block area 401. After the data is written to the working block area 401, the data is read from the working block area 401, and the written data and the read data of the working block area 401 are compared. Step S35 specifically includes steps S351 to S356.

[0099] S351 , erasing data in the working block area, and setting the read timing information to the optimal read timing information.

[0100] S352. Adjust the timing information of the storage device, write data to the working block area, and then read it out.

[0101] S353. Determine whether the written data information is consistent with the preset data information. If the read and written data information is consistent, execute step S354; if the read and written data information is inconsistent, execute step S352.

[0102] S354. Record the current read timing information.

[0103] S355. Determine whether the timing information has been traversed. If it has been traversed, execute step S356; if it has not been traversed, execute step S352.

[0104] S356. Obtain the optimal read timing information.

[0105] Please refer to Figure 1 、 Figure 2 and Figure 5 、 Figure 7 As shown in

[0106] Please refer to Figure 2 、 Figures 5 - 7As shown, it should be noted that in steps S34 and S35, the data written to the working block area 401 does not need to fill the storage module 20 completely. Only write data randomly to improve the test efficiency and maintain the balance between environmental factors and the test process during the aging test, so as to obtain better test results. Through steps S31 to S35, the optimal read timing information and the optimal write timing information can be obtained. The optimal read timing information and the optimal write timing information can be set as the standard parameters of the test, or the optimal read timing information and the optimal write timing information can be set as the card opening parameters. Through the above step S30, the parameter tuning of the storage device is completed.

[0107] Please refer to Figures 1 - 3 As shown, the content of step S40 in the test method of the storage device according to the present invention is as follows.

[0108] S40: According to the read and write parameter information, perform a second read and write test on the working block area and the system block area, and mark the second bad block area in the working block area and the system block area according to the results of the second read and write test.

[0109] Please refer to Figures 1 - 3 and Figure 8 As shown, in an embodiment of the present invention, after tuning the parameters, a more detailed test can be performed on the data area 40. Specifically, a second read and write test is performed on the working block area 401 to further screen out bad blocks. Among them, step S40 specifically includes steps S41 to S43.

[0110] S41: Perform a pre-test on the working block area and the system block area.

[0111] S42: Perform a second read and write test on the working block area.

[0112] S43: Perform a second read and write test on the system block area.

[0113] Please refer to Figures 1 - 3 and Figure 8As shown, in an embodiment of the present invention, in step S41, before formally testing the working block area 401 and the system block area 50, the working block area 401 and the system block area 50 are predicted first. Specifically, the data stored in the working block area 401 and the system block area 50 is erased, and then data is written into the working block area 401 and the system block area 50. The process of erasing data and writing data is repeated multiple times to warm up the working block area 401 and the system block area 50, which can effectively reduce the random error in subsequent tests, so as to improve the measurement accuracy in steps S42 and S43. Specifically, in the storage block 30 to be tested, the data in the storage block 30 is first erased, then data such as "0" is written into all storage pages of the storage block 30, and then the data "0" is read out from all storage pages of the storage block 30, thus completing the pre-test. During the pre-test, no statistics and error detection are performed on the test.

[0114] Please refer to Figures 1 - 3 and Figure 8 As shown, in an embodiment of the present invention, after the pre-test is completed, a second read / write test is performed on the working block area 401. The process of the second read / write test includes: first erasing the data stored in the working block area 401, then writing data into the working block area 401, and then reading out the data from the working block area 401. Among them, in the storage module 20, data is written into all storage pages of the storage block 30 in the working block area 401. Then the data is read out from all storage pages of the storage block 30. The ECC error reporting data in the second read / write test is statistically analyzed, the storage blocks 30 with errors are recorded and formed into a set, and this set is used as the second bad block area 4023. Among them, according to the ECC error reporting data, bad block flag information is stored in the result page of the storage block 30, and a bad block mapping table corresponding to the second bad block area 4023 is established in the bad block table mapping area 60 to avoid using the already determined bad blocks in the future. In this embodiment, for the flash memory chip 1, the flash memory particles 10 can be one of single-level cell (SLC), multi-level cell (MLC), and triple-level cell (TLC). When the flash memory chip 1 includes multiple types of flash memory particles 10, the single-level cells are tested first, and then the multi-level cells and triple-level cells are tested to order the test process. Each type of flash memory particle has to undergo a second read / write test.

[0115] Please refer to Figures 1 - 3 、 Figure 8 and Figure 9As shown, in an embodiment of the present invention, after completing the second read / write test on the working block area 401, in step S42, a read / write test is performed on the system block area 50. In this embodiment, the storage device is a flash chip 1, and the proportion of the working block area of the flash chip 1 can reach, for example, 90%. Therefore, testing the working block area 401 first can ensure the stability of the test. Among them, step S42 specifically includes steps S421 to S424.

[0116] S421. Edit the logical address of the system block area and divide the system block area.

[0117] S422. Perform a second read / write test on the parameter block, code block, and power-on reset data storage block.

[0118] S423. Mark and replace the bad blocks in the system block area.

[0119] S424. Establish a mapping relationship with the bad blocks in the bad block table mapping area, and use the marked bad block set as the second bad block area.

[0120] Please refer to Figures 1 - 3 、 Figures 8 - 10 As shown, in an embodiment of the present invention, in the aging test environment, to improve the test efficiency, each storage module 20 is divided. Specifically, a part of the area in the storage module 20 is divided into multiple test parts. In this embodiment, in step S421, the system block area 50 is divided into, for example, 2 test parts, namely the first test part 51 and the second test part 52. Among them, the first test part 51 and the second test part 52 can be realized by editing the logical address of the storage block 30. Specifically, the first test part 51 and the second test part 52 include the same number of storage blocks 30. Among them, in the system block area 50, according to the different types of stored information, a parameter block 501, a code block 502, and a power-on reset data storage block 503 are divided in the system block area 50. Among them, the parameter block 501 is used to store parameter information during the test, the code block 502 is used to store programming data, and the power-on reset data storage block 503 is used to store relevant data for power-on reset (Power On Reset, POR). Specifically, the first test part 51 includes a first parameter block 5011, a first code block 5021, and a first power-on reset data storage block 5031, and the second test part 52 includes a second parameter block 5012, a second code block 5022, and a second power-on reset data storage block 5032. The test is performed in the first test part 51 and the second test part 52. In the high-temperature environment of the aging test, it can not only ensure the stability of the test but also improve the test efficiency.

[0121] Please refer to Figures 1 - 3 、 Figures 8 - 10As shown, in an embodiment of the present invention, in step S422, second read-write tests are respectively performed on the parameter block 501, the code block 502, and the power-on reset input data storage block 503. Among them, the tests are performed in groups of two identical parameter blocks 501, two identical code blocks 502, and two identical power-on reset input data storage blocks 503. Herein, "identical" means the same storage size, storage information type, distribution structure of the storage block 30, and stored information. Through the test structure of two in a group, an effective mutual backup can be formed between the two tested blocks in the same group. The test process of each group is the same. Taking the test of two identical parameter blocks 501 as an example below, the steps of the second read-write test in the system block area 50 are described. First, the stored information in the first parameter block 5011 is erased, then the stored information in the second parameter block 5021 is written into the first parameter block 5011, and the error data during the storage process is recorded in the database of the aging tester. Secondly, the stored information in the second parameter block 5021 is erased, then the stored information in the first parameter block 5011 is written into the second parameter block 5021, and the error data that occurs during the storage process is recorded in the database of the aging tester. The steps of the second read-write test are repeated for the two code blocks 502 and the two power-on reset input data storage blocks 503, and the error data is also recorded in the database of the aging tester. Among them, if the test process of the machine fails, the data of the test failure is stored in the database of the aging tester for subsequent traceability.

[0122] Please refer to Figures 1 - 3 , Figures 8 - 10 As shown, in an embodiment of the present invention, in step S423, according to the error data that occurs during the second read-write test, bad blocks are marked in the system block area 50, and the set formed by the bad blocks is divided into the second bad block area 4023. Good blocks are selected from the working block area 401 to replace the bad blocks detected in the system block area 50. Among them, if the parameter block 501 includes bad blocks. When replacing the parameter block 501, a new block for replacing the parameter block 501 is edited through the code block 502 so that it can directly replace the parameter block 501. Among them, the replacement of the block can be achieved by editing the logical address of the block. If the code block 502 includes bad blocks, then the new block for replacing the code block 502 should meet the storage search rules of a read-only memory (ROM). Through steps S421 to S423, the bad blocks located in the system block area 50 are selected and the bad blocks located in the data area 40 are finely screened, forming the second bad block area 4023. In step S424, the addresses of the second bad block area 4023 are recorded in the bad block table mapping area 60 to form a reference correspondence to prevent the subsequent use of bad blocks when the storage device works.

[0123] Please refer to Figures 1 - 3As shown, through step S10 to step S40, the first bad block area 4022 and the second bad block area 4023 are marked in the flash memory chip 1. The first bad block area 4022 and the second bad block area 4023, combined with the original factory bad block area 4021, form the bad block area 402 in the flash memory chip 1. There is a mapping relationship between the bad block area 402 and the bad block table mapping area 60. The content of step S50 in the test method of the storage device according to the present invention is as follows.

[0124] S50. Obtain the bad block information of the first bad block area and the second bad block area, and record the bad block information in the bad block table mapping area.

[0125] Please refer to Figures 1 - 3 、 Figure 11 As shown, in an embodiment of the present invention, in step S50, the bad block table mapping area 60 is tested. And step 50 specifically includes step S51 to step S53.

[0126] S51. Edit the logical addresses of the bad block areas, and divide the bad block areas into multiple first bad blocks and second bad blocks.

[0127] S52. Erase the stored information of the first bad blocks, and update the stored information of the first bad blocks according to the bad block information of the bad block areas during the test process.

[0128] S53. Erase the stored information of the second bad blocks, and write the stored information of the first bad blocks into the second bad blocks.

[0129] Please refer to Figures 1 - 3 、 Figure 11 and Figure 12As shown, in an embodiment of the present invention, in step S51, the bad block area 402 is divided into a plurality of first bad blocks 4024 and second bad blocks 4025. Among them, the number of the first bad blocks 4024 and the second bad blocks 4025 is equal, and the original factory bad block area 4021 includes an equal number of the first bad blocks 4024 and the second bad blocks 4025. The first bad block area 4021 includes an equal number of the first bad blocks 4024 and the second bad blocks 4025. The second bad block area 4021 includes an equal number of the first bad blocks 4024 and the second bad blocks 4025, so as to form a mutually backup data structure between the first bad blocks 4024 and the second bad blocks 4025. In step S52, the storage information of the first bad blocks 4024 is erased, and the bad block information obtained by testing in steps S10 to S40 is written into the first bad blocks 4024. Among them, the bad block information includes the bad block address, the bad block result page data, the bad block timeout information, the number of error bits of the ECC code, the address of the storage page 301 with relatively poor physical quality, and so on. So that after power-on, the corresponding information of the bad block can be read. In step S53, the storage information of the second bad blocks 4025 is erased, and the storage information of the first bad blocks 4024 is written into the second bad blocks 4025 to form backup data and avoid redoing in case of power failure. Among them, the results of the above tests are stored in the database of the burn-in tester. In step S50, if a failure alarm occurs during the storage process, the failure situation is recorded in the SBBT, and in the storage module 20, search forward from the storage block 30 at the last row of the address until the problem storage block 30 is determined.

[0130] Please refer to Figures 1 - 12 As shown, in an embodiment of the present invention, after steps S10 to S50 are executed, the data in the code block 502 is retained to avoid redoing the test after the system is powered on, and then the stored data information in the flash memory chip 1 is erased as shown to remove redundant information. During the test process of steps S10 to S50, the test criteria for determining bad blocks can be set in multiple ways. In this embodiment, the determination criteria for bad blocks are, for example, that the block cannot be normally erased in the reading stage, the block cannot be normally programmed and written in the reading stage, the time for erasing the block does not meet the set threshold range, the time for writing the block does not meet the set threshold range, the number of error bits for reading and writing is greater than the threshold set during card opening, the uncorrectable error correction code (Uncorrectable Error Correction Code) for reading is greater than, for example, 200 / 4000 bits, and the time for reading the block does not meet the set threshold range, and so on.

[0131] Please refer to Figures 1 - 3 and Figure 13As shown in the figure, the present invention also provides a test system 70 for a storage device. The test system 70 includes a partitioning module 701, a first read / write test module 702, a tuning module 703, a second read / write test module 704, and a filing and recording module 705. Among them, the partitioning module 701 is used to establish a data area 40, a system block area 50, and a bad block table mapping area 60 in the storage device according to the types of stored information. The first read / write test module 702 is used to perform a first read / write test on the data area 40, and according to the results of the first read / write test, establish a first bad block area 4022 and a working block area 401 in the data area 40. The tuning module 703 is used to adjust the timing information of the storage device, obtain the read / write error information of the working block area 401, and according to the read / write error information, repeatedly tune the read / write parameter information of the storage device. The second read / write test module 704 is used to perform a second read / write test on the working block area 401 and the system block area 50 according to the read / write parameter information, and according to the results of the second read / write test, mark a second bad block area 4023 in the working block area 401 and the system block area 50. The filing and recording module 705 is used to obtain the bad block information of the first bad block area 4022 and the second bad block area 4023, and record the bad block information in the bad block table mapping area 60.

[0132] Please refer to Figure 14As shown in the figure, the present invention also provides a storage device, which includes a processor 80 and a memory 90. The memory 90 stores program instructions, and the processor 80 runs the program instructions to implement the above data model configuration method. The processor 80 may be a general-purpose processor, including a central processing unit (CPU for short), a network processor (NP for short), etc.; it may also be a digital signal processor (DSP for short), an application specific integrated circuit (ASIC for short), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components; the memory 90 may include a random access memory (RAM for short), and may also include a non-volatile memory, such as at least one disk memory. The memory 90 may also be an internal memory of the random access memory (RAM) type, and the processor 80 and the memory 90 may be integrated into one or more independent circuits or hardware, such as: an application specific integrated circuit (ASIC). It should be noted that when the computer program in the above memory 90 can be implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a storage device, or a network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention.

[0133] Please refer to Figure 14As shown, the present invention also provides a computer-readable storage medium 1001. The computer-readable storage medium 1001 stores computer instructions 100, and the computer instructions 100 are used to cause the computer to execute the above-described configuration method of the data model. The computer-readable storage medium 1001 may be an electronic medium, a magnetic medium, an optical medium, an electromagnetic medium, an infrared medium, or a semiconductor system or a propagation medium. The computer-readable storage medium 1001 may also include semiconductor or solid-state memories, magnetic tapes, removable computer disks, random access memories (RAMs), read-only memories (ROMs), hard disks, and optical disks. The optical disks may include compact disk-read only memories (CD-ROMs), compact disk-read / write (CD-RWs), and digital versatile disks (DVDs).

[0134] In summary, the present invention provides a testing method and a testing system for a storage device, and also provides a storage device loaded with the testing system provided by the present invention. Among them, the testing method provided by the present invention divides the storage device into a data area, a system block area, and a bad block table mapping area, and performs a first read / write test on the data area to mark out the first bad block area and the working block area, then tunes the read / write parameters of the storage device, and performs a second read / write test on the working block area and the system block area to mark out the second bad block area. Finally, it processes the bad block table mapping area and the bad block area, records the bad block information, and completes the complete bad block testing process.

[0135] In the description of this specification, the descriptions referring to the terms "this embodiment", "example", "specific example", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0136] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of this specification. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of the present invention, so that those skilled in the art in the relevant technical field can well understand and utilize the present invention. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. A testing method for a storage device, characterized in that, At least include: Provide a storage device, and establish a data area, a system block area, and a bad block table mapping area in the storage device according to the types of stored information; Conduct a first read / write test on the data area, and establish a first bad block area and a working block area in the data area according to the results of the first read / write test; Adjust the timing information of the storage device, and obtain the read / write error information of the working block area. According to the read / write error information, repeatedly tune the read / write parameter information of the storage device. The steps of tuning the read / write parameter information of the storage device include: Write data to the working block area at a single data rate, and then read the data from the working block area at a double data rate; and According to the error correction code generated by reading and writing data, correct the timing information in the reading stage to obtain the optimal reading timing information; Adjust the timing information of the storage device to the optimal reading timing information, and write data to the working block area at a double data rate; and Read data from the working block area, and according to the error correction code generated by reading and writing data, correct the timing information in the writing stage to obtain the optimal writing timing information; According to the read / write parameter information, conduct a second read / write test on the working block area and the system block area, and mark a second bad block area in the working block area and the system block area according to the results of the second read / write test; and Obtain the bad block information of the first bad block area and the second bad block area, and record the bad block information in the bad block table mapping area.

2. The testing method of a storage device according to claim 1, wherein, After repeatedly tuning the read / write parameter information of the storage device, search the result page of the storage blocks in the storage device, and establish a bad block mapping table in the bad block table mapping area. The bad block mapping table includes the bad block addresses and bad block information of the first bad block area.

3. The test method of a storage device according to claim 1, characterized in that, The steps of the first read / write test include: Provide a plurality of preset data, and write the preset data into the working block area in descending order of the preset data until the working block area is full; and Read out the preset data, and record the error correction code generated during the read / write data process.

4. The testing method of a storage device according to claim 2, characterized in that, After establishing the bad block mapping table and before the second read / write test, conduct a pre-test on the storage device.

5. The test method of a storage device according to claim 1, characterized in that, The steps of the second read / write test include: Erase the stored information of the storage block to be tested; Write data to all the storage pages of the storage block to be tested; and Read all the storage pages of the storage block to be tested.

6. The test method of a storage device according to claim 1, characterized in that The steps of marking the second bad block area include: Edit the logical addresses of the system block area, and establish a first test section and a second test section in the system block area; Conduct a second read / write test on the first test section and the second test section; and According to the error correction code during the second read / write test, mark and replace the bad blocks in the system block area.

7. The test method of a storage device according to claim 6, wherein, The steps of marking the second bad block area include: During the second read / write test, back up the stored information of the first test section and the second test section to each other.

8. A test method for a storage device according to claim 6, characterized in that, The steps of establishing the first test section and the second test section include: Edit the logical address of the system block area so that the first test unit and the second test unit include an equal number of parameter blocks, code blocks, and power-on reset data storage blocks.

9. A test system for a storage device, characterized in that, Comprising: A partitioning module for establishing a data area, a system block area, and a bad block table mapping area in the storage device according to the types of stored information; A first read / write test module for performing a first read / write test on the data area and establishing a first bad block area and a working block area in the data area according to the result of the first read / write test; A tuning module for adjusting the timing information of the storage device, obtaining the read / write error information of the working block area, and repeatedly tuning the read / write parameter information of the storage device according to the read / write error information, wherein the step of tuning the read / write parameter information of the storage device includes: Writing data to the working block area at a single data rate and then reading the data from the working block area at a double data rate; and Correcting the timing information in the read stage according to the error correction code generated by the read / write data to obtain the optimal read timing information; Adjusting the timing information of the storage device to the optimal read timing information and writing data to the working block area at a double data rate; and Reading data from the working block area and correcting the timing information in the write stage according to the error correction code generated by the read / write data to obtain the optimal write timing information; A second read / write test module for performing a second read / write test on the working block area and the system block area according to the read / write parameter information and marking a second bad block area in the working block area and the system block area according to the result of the second read / write test; and A filing and recording module for obtaining the bad block information of the first bad block area and the second bad block area and recording the bad block information in the bad block table mapping area.

10. A storage device, characterized in that, A computer program is stored on the storage device, and when the computer program is executed by a processor, it implements the test method of the storage device as described in claim 1.

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