Variable resistance memory device and method of forming the same

Abstract

A variable resistance memory device and a method of forming the same are disclosed. The variable resistance memory device includes a bottom electrode, a high work function layer, a resistive material layer, a top electrode, and a high work function spacer. The bottom electrode, the high work function layer, the resistive material layer, and the top electrode are sequentially stacked on a substrate. The resistive material layer includes a bottom portion and a top portion. The high work function spacer covers sidewalls of the bottom portion, thereby forming a variable resistance memory cell. A method of forming the variable resistance memory device is also provided.

Description

TECHNICAL FIELD

[0001] The present application relates to a variable resistance memory device and a method of forming the same, and more particularly to a variable resistance memory device using a high work function spacer and a method of forming the same. BACKGROUND

[0002] In a circuit of a semiconductor manufacturing process, a basic variable resistance memory is composed of two metal electrodes and a transition metal oxide (TMO) layer therebetween. The main operating principle is that the resistance of the TMO layer changes with the applied bias voltage. The stored value is determined by the resistance of the TMO layer. SUMMARY

[0003] The present application provides a variable resistance memory device and a method of forming the same. A high work function spacer is formed to cover a resistance material layer to prevent oxygen in a dielectric layer from entering oxygen vacancies in the resistance material layer, thereby avoiding affecting the resistance state switching of the variable resistance.

[0004] The present application provides a variable resistance memory (RRAM) device. The device includes a bottom electrode, a high work function layer, a resistance material layer, a top electrode, and a high work function spacer. The bottom electrode, the high work function layer, the resistance material layer, and the top electrode are sequentially stacked on a substrate. The resistance material layer includes a bottom portion and a top portion. The high work function spacer covers the sidewall of the bottom portion, thereby forming a variable resistance memory cell.

[0005] The present application provides a method of forming a variable resistance memory device. The method includes the following steps. First, a bottom electrode layer, a high work function material layer, a bottom resistance layer, a top resistance layer, and a top electrode layer are sequentially deposited on a substrate. Next, the top electrode layer and the top resistance layer are patterned to form a top electrode and a top portion of a resistance material layer. Then, a spacer is formed to cover the sidewall of the top portion. After that, the bottom resistance layer, the high work function material layer, and the bottom electrode layer are patterned to form a bottom portion of the resistance material layer, a high work function layer, and a bottom electrode. Finally, a high work function spacer is formed to cover the sidewall of the bottom portion, thereby forming a variable resistance memory cell.

[0006] Based on the above, the present application provides a variable resistance memory device and a forming method thereof, which forms a high work function spacer covering a resistance material layer. For example, the present application first sequentially deposits a bottom electrode layer, a high work function material layer, a bottom resistance layer, a top resistance layer, and a top electrode layer on a substrate; patterns the top electrode layer and the top resistance layer to form a top electrode and a top part of a resistance material layer, and to form a spacer covering the sidewall of the top part; patterns the bottom resistance layer, the high work function material layer, and the bottom electrode layer to form a bottom part of the resistance material layer, a high work function layer, and a bottom electrode, and to form a high work function spacer covering the sidewall of the bottom part, thereby forming a variable resistance memory cell. Therefore, the present application can prevent oxygen in a dielectric layer covering the variable resistance memory cell from entering oxygen vacancies in the resistance material layer, thereby avoiding affecting the resistance state switching of the variable resistance. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 A cross-sectional schematic view of a method for forming a variable resistance memory device in a preferred embodiment of the present application;

[0008] Figure 2 A cross-sectional schematic view of a method for forming a variable resistance memory device in a preferred embodiment of the present application;

[0009] Figure 3 A cross-sectional schematic view of a method for forming a variable resistance memory device in a preferred embodiment of the present application;

[0010] Figure 4 A cross-sectional schematic view of a method for forming a variable resistance memory device in a preferred embodiment of the present application;

[0011] Figure 5 A cross-sectional schematic view of a method for forming a variable resistance memory device in a preferred embodiment of the present application;

[0012] Figure 6 A cross-sectional schematic view of a method for forming a variable resistance memory device in a preferred embodiment of the present application.

[0013] Explanation of main element symbols

[0014] 10: spacer

[0015] 10a: spacer material layer

[0016] 20: high work function spacer

[0017] 100: variable resistance memory cell

[0018] 110: dielectric layer

[0019] 120: bottom electrode layer

[0020] 120a: bottom electrode

[0021] 130: High work function material layer

[0022] 130a: High work function layer

[0023] 142: Bottom resistor layer

[0024] 142': Partial

[0025] 12, 142a: bottom

[0026] 144: Top resistance layer

[0027] 22, 144a: Top

[0028] 150: Top electrode layer

[0029] 150a: Top electrode

[0030] 160: Interlayer dielectric layer

[0031] R: resistance material layer

[0032] S1, S2: side walls DETAILED DESCRIPTION

[0033] Figures 1-6 FIG. 1 is a cross-sectional view illustrating a method for forming a variable resistance memory device according to a preferred embodiment of the present invention. Figure 1 As shown, a substrate 110 is provided. The substrate 110 can be, for example, a semiconductor substrate such as a silicon substrate, a silicon-containing substrate (e.g., SiC), a Group IIIV substrate (e.g., GaN), a Group IIIV silicon-on-silicon substrate (e.g., GaN-on-silicon), a graphene-on-silicon substrate, a silicon-on-insulator (SOI) substrate, or a substrate including an epitaxial layer. In the diagram of this embodiment, only the substrate 110 in the variable resistance memory region is shown.

[0034] A bottom electrode layer 120, a high work function material layer 130, a bottom resistive layer 142, a top resistive layer 144, and a top electrode layer 150 are sequentially deposited on the substrate 110. In the present embodiment, the bottom electrode layer 120 and the top electrode layer 150 comprise a tantalum nitride or a titanium nitride, and the bottom resistive layer 142 and the top resistive layer 144 comprise a metal oxide layer. Preferably, the bottom resistive layer 142 and the top resistive layer 144 can comprise a tantalum oxide or a hafnium oxide. In the operation mechanism of the variable resistive memory device with the bottom electrode layer 120 and the top electrode layer 150 being a tantalum nitride or a titanium nitride and the resistive layers being a metal oxide layer, a high voltage is first applied to induce oxygen vacancies in part of the resistive layers, and then a voltage is changed to cause a resistance state change by changing the distribution of the oxygen vacancies, to perform write and erase operations of the memory device. In the present embodiment, the high work function material layer 130 is iridium, the bottom resistive layer 142 and the top resistive layer 144 are tantalum oxide, and the bottom electrode layer 120 and the top electrode layer 150 are tantalum nitride, but the present application is not limited thereto. In particular, in the present embodiment, the bottom resistive layer 142 is tantalum pentoxide (Ta2O5) and the top resistive layer 144 is tantalum oxide (TaO x ), so that oxygen vacancies are formed in the bottom resistive layer 142 by a subsequent high voltage.

[0035] As shown in Figure 2 , the top electrode layer 150 and the top resistive layer 144 are patterned to form a top electrode 150a and a top portion 144a, and expose a portion 142' of the bottom resistive layer 142. In the present embodiment, the top portion 144a and the top electrode 150a constitute a ladder-shaped cross-sectional structure, but the present application is not limited thereto. In other embodiments, the top portion 144a and the top electrode 150a may, for example, have a stepped cross-sectional structure.

[0036] Referring to Figures 3-4 , a spacer 10 is formed to cover the sidewall S1 of the top portion 144a. This is to avoid a subsequent conductive structure formed above from being electrically connected to the top portion 144a, causing a short circuit. In a preferred embodiment, the spacer 10 may, for example, be a silicon nitride spacer, but the present application is not limited thereto. Specifically, as shown in Figure 3 , a spacer material layer 10a is first deposited to conformally cover the bottom resistive layer 142, the top portion 144a, and the top electrode 150a. Then, the spacer material layer 10a is etched to form the spacer 10. In the present embodiment, the spacer 10 overlaps and covers part of the top electrode 150a to ensure isolation of the top portion 144a, but the present application is not limited thereto.

[0037] Afterwards, the bottom resistive layer 142, the high work function material layer 130 and the bottom electrode layer 120 are patterned to form a bottom portion 142a, a high work function layer 130a and a bottom electrode 120a. In this way, the bottom portion 142a and the top portion 144a form a resistive material layer R. In the present embodiment, the bottom electrode 120a, the high work function layer 130a and the bottom portion 142a form a ladder-shaped cross-sectional structure, but the present application is not limited thereto. In other embodiments, the bottom electrode 120a, the high work function layer 130a and the bottom portion 142a can have, for example, a stepped cross-sectional structure. Alternatively, the bottom electrode 120a, the high work function layer 130a, the resistive material layer R and the top electrode 150a all have a ladder-shaped cross-sectional structure, depending on the actual fabrication process or the structure required.

[0038] A high work function spacer 20 is formed to cover the sidewall S2 of the bottom portion 142a of the resistive material layer R, thereby forming a variable resistive memory cell 100. In the present embodiment, the high work function spacer 20 is iridium, but the present application is not limited thereto. In this way, the present application forms a high work function spacer 20 on the sidewall of the bottom portion 142a of the resistive material layer R, so as to avoid oxygen diffusion from a dielectric layer covering the variable resistive memory cell 100 into the oxygen vacancies in the bottom portion 142a, affecting the resistance state transition of the variable resistance.

[0039] In a preferred embodiment, the bottom resistive layer 142, the high work function material layer 130 and the bottom electrode layer 120 are patterned in-situ, and the high work function spacer 20 is formed, so as to avoid fabrication process contamination and improve fabrication process efficiency. In a more preferred embodiment, the high work function material layer 130 is re-sputtered when etching to pattern the bottom resistive layer 142, the high work function material layer 130 and the bottom electrode layer 120, so as to form the high work function spacer 20. In this way, the high work function material layer 130 and the high work function spacer 20 have the same material, for example, iridium in the present embodiment. In the present embodiment, the high work function spacer 20 is directly formed on the high work function layer 130a by re-sputtering. Furthermore, in the present embodiment, the spacer 10 is directly formed on the bottom portion 142a of the resistive material layer R. In addition, the top portion 22 of the high work function spacer 20 of the present embodiment overlaps the bottom portion 12 of the spacer 10, so as to ensure that the resistive material layer R, especially the bottom portion 142a of the resistive material layer R, is not exposed.

[0040] As shown in FIG. 1C, the bottom resistive layer 142, the high work function material layer 130 and the bottom electrode layer 120 are patterned to form a bottom portion 142a, a high work function layer 130a and a bottom electrode 120a. In this way, the bottom portion 142a and the top portion 144a form a resistive material layer R. In the present embodiment, the bottom electrode 120a, the high work function layer 130a and the bottom portion 142a form a ladder-shaped cross-sectional structure, but the present application is not limited thereto. In other embodiments, the bottom electrode 120a, the high work function layer 130a and the bottom portion 142a can have, for example, a stepped cross-sectional structure. Alternatively, the bottom electrode 120a, the high work function layer 130a, the resistive material layer R and the top electrode 150a all have a ladder-shaped cross-sectional structure, depending on the actual fabrication process or the structure required. Figure 6As shown, an interlayer dielectric layer 160 is formed to fully cover the variable resistance memory cell R. The interlayer dielectric layer 160 is, for example, an oxide layer. The present invention provides high work function spacers 20 to prevent oxygen in the interlayer dielectric layer 160 from diffusing into the bottom portion 142a of the resistance material layer R. Subsequently, before operating the variable resistance memory cell 100, the variable resistance memory cell 100 is pressurized to form an oxygen vacancy portion in the bottom portion 142a, thereby enabling operation of the variable resistance memory cell 100.

[0041] In summary, the present invention provides a variable resistive memory device and a method for forming the same, wherein a high work function spacer is formed to cover a resistive material layer to prevent oxygen in a dielectric layer covering the formed variable resistive memory cell from entering oxygen vacancies in the resistive material layer, thereby avoiding affecting the resistive switching of the variable resistor. For example, the present invention first sequentially deposits a bottom electrode layer, a high work function material layer, a bottom resistor layer, a top resistor layer, and a top electrode layer on a substrate; patterning the top electrode layer and the top resistor layer to form a top electrode and a top portion of the resistive material layer, and forming a spacer to cover the sidewalls of the top portion; patterning the bottom resistor layer, the high work function material layer, and the bottom electrode layer to form a bottom portion of the resistive material layer, a high work function layer, and a bottom electrode, and forming a high work function spacer to cover the sidewalls of the bottom portion, thereby forming a variable resistive memory cell.

[0042] Preferably, the bottom resistor layer, the high work function material layer, and the bottom electrode layer are patterned in situ to form the high work function spacers. More preferably, during the etching process to pattern the bottom resistor layer, the high work function material layer, and the bottom electrode layer, re-sputtering of the high work function material layer is simultaneously performed to form the high work function spacers.

[0043] The above descriptions are merely preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.

Claims

1. A variable resistance memory device, characterized in that: Includes: A bottom electrode, a high work function layer, a resistive material layer and a top electrode are sequentially stacked on the substrate, wherein the resistive material layer includes a bottom and a top; High work function spacers covering the sidewalls of the bottom portion, thereby forming a variable resistance memory cell, wherein the high work function layer and the high work function spacers comprise iridium; and The spacers cover the top and the sidewalls of the top electrode, wherein the high work function spacers are directly located on the high work function layer, and the high work function spacers do not cover the top of the resistance material layer. 2 . The variable resistance memory device as claimed in claim 1 , wherein the bottom electrode and the top electrode comprise tantalum nitride or titanium nitride. 3 . The variable resistance memory device as claimed in claim 1 , wherein the bottom electrode, the high work function layer, the resistance material layer, and the top electrode all have a ladder-type cross-sectional structure. 4 . The variable resistance memory device as claimed in claim 1 , wherein the bottom electrode, the high work function layer and the bottom portion form a ladder-type cross-sectional structure, and the top portion and the top electrode form another ladder-type cross-sectional structure. 5 . The variable resistance memory device as claimed in claim 1 , wherein the resistance material layer comprises a metal oxide layer. 6 . The variable resistance memory device as claimed in claim 5 , wherein the metal oxide layer comprises tantalum oxide or hafnium oxide. 7 . The variable resistance memory device as claimed in claim 1 , wherein the high work function layer and the high work function spacers comprise the same material. 8 . The variable resistance memory device as claimed in claim 1 , wherein the spacers comprise silicon nitride spacers. 9 . The variable resistance memory device as claimed in claim 1 , wherein tops of the high work function spacers overlap bottoms of the spacers. 10 . The variable resistance memory device as claimed in claim 1 , wherein the spacers are directly located on the bottom of the resistive material layer.

11. The variable resistance memory device according to claim 1 , further comprising: The interlayer dielectric layer completely covers the variable resistance memory unit.

12. A method of forming a variable resistance memory device, comprising: Depositing a bottom electrode layer, a high work function material layer, a bottom resistor layer, a top resistor layer and a top electrode layer on the substrate in sequence; patterning the top electrode layer and the top resistor layer to form a top electrode and a top portion of the resistive material layer; forming a spacer to cover the sidewall of the top portion; Patterning the bottom resistor layer, the high work function material layer, and the bottom electrode layer to form a bottom portion of the resistor material layer, the high work function layer, and a bottom electrode; as well as High work function spacers are formed to cover the sidewalls of the bottom, thereby forming a variable resistance memory cell, wherein the high work function layer and the high work function spacers contain iridium, and the high work function spacers do not cover the top of the resistance material layer. 13 . The method for forming a variable resistance memory device as claimed in claim 12 , wherein the bottom resistor layer, the high work function material layer, and the bottom electrode layer are patterned in situ, and the high work function spacers are formed.

14. The method for forming a variable resistance memory device as claimed in claim 13, wherein when etching to pattern the bottom resistor layer, the high work function material layer and the bottom electrode layer, the high work function material layer is re-sputtered to form the high work function spacers.

15. The method of forming a variable resistance memory device according to claim 12, further comprising: The variable resistance memory cell is pressurized to form an oxygen vacancy portion in the bottom portion. 16 . The method for forming a variable resistance memory device according to claim 12 , wherein the spacers comprise silicon nitride spacers.

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