Capacitive interface closed loop control readout circuit

Abstract

The application discloses a capacitive interface closed-loop control readout circuit, and compared with the prior art, the application realizes system closed-loop control through the mode of PID control and voltage feedback, thereby realizing the requirements of high system precision and high reliability of the device. Meanwhile, the system PID parameters and the signal output position can be adjusted, which greatly facilitates the system-level integration of various sensors. And the signal output position can be configured through a pin or a memory signal.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of micro motor control, and particularly relates to a capacitive interface closed-loop control readout circuit. BACKGROUND

[0002] MEMS (Micro Electro Mechanical System) is widely used in sensor field, such as inertial measurement, pressure measurement, etc. due to its high sensitivity, low noise, small drift, small size and low cost. In the MEMS structure, a small mass (10-7g level) is integrated, and the mass senses a physical quantity and then generates displacement, thereby causing a corresponding change in capacitance. A circuit can detect the capacitance change to measure the corresponding physical quantity data. This method is called capacitive detection method. For example, a classical MEMS accelerometer has a structure diagram and an equivalent circuit diagram (as shown in Figure 1 ). Therefore, such a sensor structure needs an interface circuit to convert the measured physical quantity into an electrical signal. The interface circuit needs to take a series of measures to improve the precision and reliability of the device. The classical capacitive interface circuit (as shown in Figure 2 ) is generally in an open-loop control mode, which is difficult to meet the technical requirements of high precision and high reliability. SUMMARY

[0003] The present application aims to provide a capacitive interface closed-loop control readout circuit.

[0004] To achieve the above-mentioned purpose, the present application is implemented according to the following technical scheme:

[0005] The present application comprises a capacitive voltage conversion circuit and a programmable amplifier A connected to the capacitive voltage conversion circuit. The input end of the capacitive voltage conversion circuit serves as a signal input end of a single-axis acceleration readout circuit. The output end of the programmable amplifier A is connected to the input ends of an adjustable gain amplifier, an adjustable integral amplifier and an adjustable differential amplifier. The output end of the adjustable gain amplifier is connected to a programmable amplifier B. The output of the adjustable integral amplifier is connected to a programmable amplifier C. The output end of the adjustable differential amplifier is connected to a programmable amplifier D. The output ends of the programmable amplifier B, the programmable amplifier C and the programmable amplifier D are connected to the input end of an adder. The output end of the adder is connected to the input end of a programmable amplifier E. The output end of the programmable amplifier E is connected to the input end of a voltage feedback amplifier. The output ends of the programmable amplifier A, the programmable amplifier B, the programmable amplifier C, the programmable amplifier D and the programmable amplifier E are connected to the input end of a signal channel selector. The output end of the signal channel selector is connected to the input end of a low-pass filter.

[0006] Further, the programmable amplifier A, the programmable amplifier B, the programmable amplifier C, the programmable amplifier D and the programmable amplifier E all have low-pass filtering functions, and the circuit parameters can be adjusted and configured through the system memory to meet the needs of different types of sensors.

[0007] Further, the voltage feedback amplifier can output multiple voltage amplitudes to realize closed-loop control through electrostatic force balance.

[0008] Further, the programmable gain amplifier, the adjustable integral amplifier and the adjustable differential amplifier constitute a PID control, which is realized through serial, hybrid and parallel modes.

[0009] Further, the signal channel selector outputs signals from different circuit nodes to meet the needs of different types of devices, and the control method is realized through pin configuration or memory configuration.

[0010] The beneficial effects of the present application are:

[0011] The present application is a capacitive interface closed-loop control readout circuit, which realizes system closed-loop control through PID control and voltage feedback, thereby meeting the requirements of high system accuracy and high reliability of the device. At the same time, the system PID parameters and signal output positions can be adjusted, which greatly facilitates the system-level integration of various sensors. Moreover, the signal output positions can be configured through pins or memory signals. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 It is a schematic diagram of the internal structure and equivalent circuit of a classic MEMS accelerometer;

[0013] Figure 2 It is a schematic diagram of a classic sensor readout circuit structure;

[0014] Figure 3 It is a schematic diagram of a specific embodiment of the capacitive interface closed-loop control readout circuit of the present application;

[0015] Figure 4 It is a schematic diagram of a specific embodiment of the signal channel selector of the present application;

[0016] Figure 5 It is a schematic diagram of the stress analysis of the system structure mass block of the present application.

[0017] 1 - detection electrode positive, 2 - detection comb, 3 - elastic support beam, 4 - anchor point (fixed body), 5 - drive electrode positive, 6 - drive comb, 7 - drive electrode negative, 8 - detection electrode negative, 9 - mass; Cd+ is drive positive equivalent capacitor, Cd- is drive negative equivalent capacitor, Cs+ is detection positive equivalent capacitor, Cs- is detection negative equivalent capacitor. 11 - capacitor interface circuit detection input, 12 - circuit signal output; C2V is capacitor voltage conversion circuit, PGA & LPF is programmable gain amplifier with low pass filter function. 001 - capacitor interface circuit detection input, 002 - capacitor interface circuit drive output, 003 - circuit signal output, 004 - circuit output position selection configuration input; C2V is capacitor voltage conversion circuit, PGA & LPF-A / B / C / D / E is programmable gain amplifier with low pass filter function, PID-P is adjustable gain amplifier, PID-I is adjustable integral amplifier, PID-D is adjustable differential amplifier, ADD is adder, MUX is signal path selector, LPF is low pass filter amplifier, VFB is signal feedback amplifier. 21 ~ 25 - selectable input channels, 26 - output channel, 27 - channel selection configuration input, 28 - switch group. Fe - electrostatic force, Fa - inertial force. DETAILED DESCRIPTION

[0018] The application will be further described below in conjunction with the drawings and specific embodiments, the schematic embodiments and the description of the application are used to explain the application, but not as a limitation of the application.

[0019] As Figure 3As shown: the application includes a capacitor voltage conversion circuit C2V and a programmable amplifier PGA&LPF-A connected with the capacitor voltage conversion circuit C2V, the input end of the capacitor voltage conversion circuit C2V is used as the signal input end 001 of the single-axis acceleration readout circuit, the output end of the programmable amplifier PGA&LPF-A is connected with the input end of the adjustable gain amplifier PID-P, the adjustable integral amplifier PID-I and the adjustable differential amplifier PID-D, the output end of the adjustable gain amplifier PID-P is connected with the programmable amplifier PGA&LPF-B, the output of the adjustable integral amplifier PID-I is connected with the programmable amplifier PGA&LPF-C, the output end of the adjustable differential amplifier PID-D is connected with the programmable amplifier PGA&LPF-D, the output ends of the programmable amplifier PGA&LPF-B, the programmable amplifier PGA&LPF-C and the programmable amplifier PGA&LPF-D are connected with the input end of the adder ADD, the output end of the adder ADD is connected with the input end of the programmable amplifier PGA&LPF-E, the output end of the programmable amplifier PGA&LPF-E is connected with the input end of the voltage feedback amplifier VFB, the output ends of the programmable amplifier PGA&LPF-A, the programmable amplifier PGA&LPF-B, the programmable amplifier PGA&LPF-C, the programmable amplifier PGA&LPF-D and the programmable amplifier PGA&LPF-E are connected with the input end of the signal channel selector MUX, the output end of the signal channel selector MUX is connected with the input end of the low-pass filter LPF, the output of VFB is connected with the feedback port of the sensor through the signal port 002, and the output of the LPF is used for outputting the sensor signal voltage through the signal port 003. The signal channel selection signal is input through the signal port 004.

[0020] The typical transfer function of the PID controller is as follows:

[0021]

[0022] As can be seen from the PID transfer function, the PID control mainly has three items, P is a proportional amplification item, mainly providing a full-band gain, which is realized by PID-P in the circuit; I is an integral item, mainly providing a large low-frequency gain, improving the low-frequency control accuracy of the closed-loop system, which is realized by PID-I in the circuit; D is a differential item, mainly providing stability compensation, wherein s is the frequency, and N is the differential item filtering parameter, which is used for improving stability, and is realized by PID-D in the circuit. Among them, P, I, D and N are configurable in the circuit design, and can be customized and configured through a memory.

[0023] The signal channel selector MUX selects the output of the circuit voltage signal, and according to different control signals, PGA&LPF-A, PGA&LPF-B, PGA&LPF-C, PGA&LPF-D and PGA&LPF-E can be selected to output the sensor voltage signal.

[0024] As shown in Figure 4 a specific embodiment of the signal channel selector MUX is given, Figure 5 The left side is the input signal end 1-5, the upper side is the control signal end 7, and the right side is the output signal end 6. The MUX is composed of five switch connection groups to select the logic. According to different control signals, the output signal at different output ends is selected.

[0025] When the closed-loop control is performed, the differential voltage signal is applied to the feedback driving electrode of the sensor by VFB, so as to form a driving force to offset the measured inertial force, and a force balance state is formed, as shown in Figure 5 When the device is affected by force, the mass block is subjected to force Fs and moves downward. The feedback voltage signal is applied to the feedback upper plate and the feedback lower plate, respectively. At this time, the upper plate applies a large voltage, and the lower plate applies a small voltage. The electrostatic resultant force Fe formed on the mass block is equal in size and opposite in direction to the force of the mass block, and the mass block is pulled to the balance position, that is, the upper plate and the lower plate are in the middle. Finally, the two forces are equal. At this time, the mass block is in a force balance position, and the system will be in a stable state. At this time, the output of the system is proportional to the input force of the system.

[0026] The technical scheme of the present application is not limited to the above specific embodiments, and any technical modification made according to the technical scheme of the present application falls within the protection scope of the present application.

Claims

1. A capacitance interface closed loop control readout circuit, characterized by: The circuit comprises a capacitance voltage conversion circuit and a programmable amplifier A connected to the capacitance voltage conversion circuit, the input end of the capacitance voltage conversion circuit serving as a signal input end of a single-axis acceleration reading circuit, the output end of the programmable amplifier A being connected to the input ends of an adjustable gain amplifier, an adjustable integral amplifier and an adjustable differential amplifier, the output end of the adjustable gain amplifier being connected to a programmable amplifier B, the output end of the adjustable integral amplifier being connected to a programmable amplifier C, the output end of the adjustable differential amplifier being connected to a programmable amplifier D, the output ends of the programmable amplifier B, the programmable amplifier C and the programmable amplifier D being connected to the input end of an adder, the output end of the adder being connected to the input end of a programmable amplifier E, the output end of the programmable amplifier E being connected to the input end of a voltage feedback amplifier, the output ends of the programmable amplifier A, the programmable amplifier B, the programmable amplifier C, the programmable amplifier D and the programmable amplifier E being connected to the input end of a signal channel selector, the output end of the signal channel selector being connected to the input end of a low-pass filter, and the programmable amplifier A, the programmable amplifier B, the programmable amplifier C, the programmable amplifier D and the programmable amplifier E all having low-pass filter functions.

2. The capacitive interface closed loop control readout circuit of claim 1, wherein: The programmable amplifier A, the programmable amplifier B, the programmable amplifier C, the programmable amplifier D and the programmable amplifier E all have low-pass filter functions, and circuit parameters can be adjusted and configured through a system memory to meet the needs of different types of sensors.

3. The capacitive interface closed loop control readout circuit of claim 1, wherein: The voltage feedback amplifier can output multiple voltage amplitudes to realize closed-loop control through electrostatic force balance.

4. The capacitive interface closed loop control readout circuit of claim 1, wherein: The PID control composed of the adjustable gain amplifier, the adjustable integral amplifier and the adjustable differential amplifier is realized through serial, mixed and parallel modes.

5. The capacitive interface closed loop control readout circuit of claim 1, wherein: The signal channel selector outputs signals from different circuit nodes to meet the needs of different types of devices, and the control method is realized through pin configuration or memory configuration.

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