A neural network circuit for visually induced emotional habituation
Through the visually induced emotional habituation characteristics neural network circuit, combined with vision and emotions, emotional habituation and spontaneous recovery under different stimuli, solving the problem of single functions in the existing technology, and achieving emotional habituation and spontaneous recovery Diversity and biological characteristics conformity.
Patent Information
- Application Number
- CN202210751267.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-06-28
- Publication Date
- 2024-12-10
- Estimated Expiration
- 2042-06-28
AI Technical Summary
The existing habituation neural network circuit has a single function, and it is not possible to effectively combine vision and emotions, and it is impossible to achieve emotional habituation and spontaneous recovery under different stimuli.
A visually induced emotional habituation characteristic neural network circuit is designed, including input signal source, input module, logic control module, habituation module, reinforcement module and spontaneous recovery module. Through picture stimulation of different polarity and intensity, emotions are realized. Habit, de-habit and spontaneous recovery, outputting fear or happiness emotional signals.
Emotional habituation caused by different stimuli is achieved. De-habitization stimuli can restore habituation emotions that have been formed. Emotional habituation spontaneously recovers in a state without stimulation and enters the reinforcement stage, forming faster and recovering faster. Slow cycle process, consistent with biological characteristics.
Smart Images

Figure CN114997387B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of neural network circuits, and in particular to a neural network circuit with visually induced emotion habituation characteristics. Background Art
[0002] The memristor was first proposed by Professor Shao-Tang Tsai of the University of California, Berkeley in 1971. He believed that resistance, capacitance and inductance represent the relationship between the four important elements of voltage, current, charge and magnetic flux in electronics, but the element representing the relationship between charge and magnetic flux did not exist yet, so it was named memristor. In 2007, HP announced that a team led by Richard Stanley Williams had successfully developed a solid-state memristor, which uses inorganic titanium dioxide as a raw material to form a double-layer film. The memristor can still "remember" the charge passing through it after the power is turned off. This characteristic is similar to the synapse, which makes it have the potential to acquire autonomous learning functions.
[0003] Behavioral plasticity establishes a link between information and appropriate behavioral responses, enabling organisms to adjust their behavior according to stimuli from the external environment. Habituation is a basic and universal form of behavioral plasticity. In neuroscience, the general description of habituation is: "assuming that a particular stimulus triggers a response, repeated use of that stimulus leads to a decrease in the response." In addition, habituation exhibits 9 parameter characteristics, including the negative exponential nature of habituation, spontaneous recovery, stimulus intensity and frequency dependence, dehabituation, subzero habituation, generalization of habituated stimuli, and dehabituation of habituation.
[0004] The habituation of emotional responses plays an important role in the survival and adaptation of individuals. Studies have found that emotional responses induced by positive stimuli of any intensity have a significant habituation effect, while emotional responses induced by negative stimuli of various intensities have no habituation effect. In addition, the study of the relationship between the habituation of the knee flexion reflex and the intensity of the stimulus showed that the habituation effect of low-intensity stimulation is more significant than that of high-intensity stimulation. Summary of the invention
[0005] In view of the technical problems that the existing habituation neural network circuits have relatively simple functions and are not combined with vision and emotions, the present invention proposes a visually induced emotion habituation characteristic neural network circuit, which induces emotion habituation through picture stimulation of different polarities and intensities, realizes habituation and spontaneous recovery under different stimuli, habituation of dehabituation, and secondary emotion habituation and spontaneous recovery, thereby realizing a more comprehensive emotion habituation characteristic.
[0006] In order to achieve the above-mentioned purpose, the technical scheme of the present invention is implemented as follows: a visually induced emotion habituation characteristic neural network circuit comprises an input signal source, an input module, a logic control module, a habituation module, a reinforcement module and a spontaneous recovery module, wherein the input signal source is connected to the input module and the logic control module respectively, the input module is connected to the logic control module, the logic control module is connected to the habituation module, the reinforcement module and the spontaneous recovery module respectively, the reinforcement module is connected to the habituation module and the spontaneous recovery module respectively, the spontaneous recovery module is connected to the habituation module, and the habituation module outputs a fear or happiness emotion signal; the input module transforms the amplitude and effective level of the input signal source; the logic control module generates control signals for controlling the habituation module, the reinforcement module and the spontaneous recovery module respectively according to the output of the input signal source and the input module; the habituation module realizes the functions of habituation formation, recovery and output; the reinforcement module outputs habituation and spontaneous recovery feedback signals according to the stimulus received previously; the spontaneous recovery module recovers the formed habituation when no stimulus is applied.
[0007] Preferably, the input signal source includes a positive strong stimulation dehabituation signal source N1, a positive weak stimulation habituation signal source N2, a positive medium stimulation habituation signal source N3, a negative weak stimulation habituation signal source N4 and a negative medium stimulation habituation signal source N5; the positive strong stimulation dehabituation signal source N1, the positive weak stimulation habituation signal source N2, the positive medium stimulation habituation signal source N3, the negative weak stimulation habituation signal source N4 and the negative medium stimulation habituation signal source N5 are all connected to the input module, and the positive strong stimulation dehabituation signal source N1, the positive weak stimulation habituation signal source N2, the positive medium stimulation habituation signal source N3, the negative weak stimulation habituation signal source N4 and the negative medium stimulation habituation signal source N5 are all connected to the logic control module;
[0008] The input module includes a positive strong stimulus dehabituation signal receiving and processing unit, a positive weak stimulus habituation signal receiving and processing unit, a positive medium stimulus habituation signal receiving and processing unit, a negative weak stimulus habituation signal receiving and processing unit, and a negative medium stimulus habituation signal receiving and processing unit. The positive strong stimulus dehabituation signal source N1 is connected to the input end of the positive strong stimulus dehabituation signal receiving and processing unit, and the output end of the positive strong stimulus dehabituation signal receiving and processing unit is connected to the logic control module; the positive weak stimulus habituation signal source N2 is connected to the input end of the positive weak stimulus habituation signal receiving and processing unit, and the output end of the positive weak stimulus habituation signal receiving and processing unit is connected to the logic control module. The positive medium stimulation habituation signal source N3 is connected to the input end of the positive medium stimulation habituation signal receiving and processing unit, and the output end of the positive medium stimulation habituation signal receiving and processing unit is connected to the logic control module; the negative weak stimulation habituation signal source N4 is connected to the input end of the negative weak stimulation habituation signal receiving and processing unit, and the output end of the negative weak stimulation habituation signal receiving and processing unit is connected to the logic control module; the negative medium stimulation habituation signal source N5 is connected to the input end of the negative medium stimulation habituation signal receiving and processing unit, and the output end of the negative medium stimulation habituation signal receiving and processing unit is connected to the logic control module;
[0009] The positive strong stimulation dehabituation signal receiving and processing unit includes a first voltage control unit and a same logic gate D1, a positive strong stimulation dehabituation signal source N1 is connected to the input end of the first voltage control unit, an output end of the first voltage control unit is connected to the input end of the same logic gate D1, and an output end of the same logic gate D1 is connected to a logic control module; the positive weak stimulation habituation signal receiving and processing unit includes a second voltage control unit and a same logic gate D2, a positive weak stimulation habituation signal source N2 is connected to the input end of the second voltage control unit, an output end of the second voltage control unit is connected to the input end of the same logic gate D2, and an output end of the same logic gate D2 is connected to the logic control module; the positive medium stimulation habituation signal receiving and processing unit includes a third voltage control unit and a same logic gate D3, a positive medium stimulation habituation signal source N3 is connected to the third The input end of the voltage control unit and the output end of the third voltage control unit are connected to the input end of the same logic gate D3, and the output end of the same logic gate D3 is connected to the logic control module; the negative weak stimulation habituation signal receiving and processing unit includes a fourth voltage control unit and a same logic gate D4, the negative weak stimulation habituation signal source N4 is connected to the input end of the fourth voltage control unit, the output end of the fourth voltage control unit is connected to the input end of the same logic gate D4, and the output end of the same logic gate D4 is connected to the logic control module; the negative medium stimulation habituation signal receiving and processing module includes a fifth voltage control unit and a same logic gate D5, the negative medium stimulation habituation signal source N5 is connected to the input end of the fifth voltage control unit, the output end of the fifth voltage control unit is connected to the input end of the same logic gate D5, and the output end of the same logic gate D5 is connected to the logic control module.
[0010] Preferably, the logic control module includes a summing module, a dehabituation control module, a habituation control module, and a reinforcement and recovery control module; the output end of the input module is respectively connected to the input end of the summing module and the dehabituation control module, and the input signal source is respectively connected to the input end of the summing module and the reinforcement and recovery control module; the positive strong stimulation dehabituation signal source N1 is connected to the input end of the spontaneous recovery module, the positive weak stimulation habituation signal source N2, the positive medium stimulation habituation signal source N3, the negative weak stimulation habituation signal source N4, and the negative medium stimulation habituation signal source N5 are all connected to the input end of the summing module; the input end of the dehabituation control module is connected to the input end of the signal source. The output end of the positive strong stimulus dehabituation signal receiving and processing unit of the input module is connected, the output ends of the positive weak stimulus habituation signal receiving and processing unit, the positive medium stimulus habituation signal receiving and processing unit, the negative weak stimulus habituation signal receiving and processing unit and the negative medium stimulus habituation signal receiving and processing unit of the input module are all connected to the input end of the summing module, the output end of the summing module is respectively connected to the input end of the habituation control module and the habituation control module; the output ends of the dehabituation control module and the habituation control module are both connected to the input end of the habituation module, and the output ends of the reinforcement and recovery control module are respectively connected to the input ends of the reinforcement module and the spontaneous recovery module.
[0011] Preferably, the dehabituation control module includes a same logic gate D6, a same logic gate D7 and a voltage-controlled switch S6, the input ends of the same logic gate D6 and the same logic gate D7 and the input voltage of the controlled voltage side of the voltage-controlled switch S6 are all connected to the output end of the positive strong stimulation dehabituation signal receiving and processing unit of the input module, the output ends of the same logic gate D6 and the same logic gate D7 and the output voltage of the controlled voltage side of the voltage-controlled switch S6 are all connected to the input end of the habituation module, the output end of the same logic gate D7 is connected to the positive input end of the voltage-controlled switch S6, and the negative input end of the voltage-controlled switch S6 is grounded;
[0012] The summing module includes a first summing module and a second summing module, the input end of the first summing module is respectively connected to the output ends of the positive weak stimulation habituation signal receiving and processing unit and the positive medium stimulation habituation signal receiving and processing unit of the input module, the input end of the second summing module is respectively connected to the output ends of the negative weak stimulation habituation signal receiving and processing unit and the negative medium stimulation habituation signal receiving and processing unit of the input module, the output ends of the first summing module and the second summing module are both connected to the sixth summing module, the output ends of the sixth summing module are respectively connected to the habituation control module and the reinforcement module, and the output ends of the second summing module and the first summing module are both connected to the habituation module;
[0013] The habituation control module includes a same logic gate D10, a same logic gate D12, an AND gate D13, a NOT gate D14, a voltage-controlled switch S7 and a seventh summing module. The output end of the sixth summing module is respectively connected to the input ends of the same logic gate D10, the same logic gate D12 and an input end of the seventh summing module. The output end of the AND gate D16 of the strengthening and recovery control module is connected to the input end of the NOT gate D14. The output ends of the same logic gate D12 and the NOT gate D14 are both connected to the input end of the gate D13. The voltage-controlled switch S7 is connected to the input end of the gate D14. The positive input terminal of the switch S7 is connected to the output terminal of the AND gate D13, and the negative input terminal of the voltage-controlled switch S7 is grounded; the other input terminal of the seventh summing module is connected to the output terminal of the strengthening module, the output terminal of the seventh summing module is connected to the input terminal of the controlled voltage side of the voltage-controlled switch S7, the input terminal of the same logic gate D9 is connected to the output terminal of the first summing module, and the output terminals of the same logic gate D9 and the same logic gate D10, and the output terminal of the controlled voltage side of the voltage-controlled switch S7 are all connected to the habituation module;
[0014] The positive weak stimulus habituation signal source N2 is connected to an input end of the third summing module, the other input end of the third summing module is connected to the positive medium stimulus habituation signal source N3, the negative weak stimulus habituation signal source N4 is connected to an input end of the fourth summing module, the other input end of the fourth summing module is connected to the negative medium stimulus habituation signal source N5, the output end of the third summing module is connected to an input end of the fifth summing module, the other input end of the fifth summing module is connected to the output end of the fourth summing module, and the output end of the fifth summing module is connected to the input end of the same logic gate D19 in the reinforcement and recovery control module;
[0015] The reinforcement and recovery control module includes a third summing module, a fourth summing module, a fifth summing module, a NOT gate D15, a NOT gate D17, a NOT gate D20, a NOT gate D22, a same logic gate D19, a same logic gate D21, an AND gate D16, an AND gate D18, a D flip-flop DFF1 and a sixth voltage control unit, a positive strong stimulation dehabituation signal source N1 is respectively connected to the CLK terminal of the D flip-flop DFF1 and the input terminal of the NOT gate D15, and a D terminal of the D flip-flop DFF1 is connected to the D terminal of the D flip-flop DFF1. The output end of the fifth summing module is connected to the input end of the same logic gate D19, the output end of the same logic gate D19 is connected to the input end of the non-gate D20, the output end of the non-gate D20 is connected to the input end of the AND gate D18, the output ends of the non-gate D15 and the AND gate D18 are both connected to the input end of the AND gate D16, the output end of the AND gate D16 is respectively connected to the input end of the sixth voltage control unit, the input end of the non-gate D14 in the habituation control module, the input end of the same logic gate D21, the input end of the strengthening module and the input end of the spontaneous recovery module, the input end and the output end of the controlled voltage side of the sixth voltage control unit are both connected to the spontaneous recovery module, the output end of the fourth summing module is connected to the input end of the non-gate D22, and the output ends of the non-gate D22 and the same logic gate D21 are both connected to the input end of the strengthening module.
[0016] Preferably, the habituation module includes a habituation synapse module and a habituation output module, the output ends of the dehabituation control module and the habituation control module in the logic control module are connected to the habituation synapse module, the output ends of the dehabituation control module and the habituation control module are connected to the habituation output module, the habituation synapse module is connected to the habituation output module, and the habituation output module outputs the fear emotion signal N6 or the happiness emotion signal N7.
[0017] Preferably, the habituation synapse module includes a memristor M1, an NMOS tube T1, an NMOS tube T2 and a first proportional module, the output end of the controlled voltage side of the voltage-controlled switch S6 of the dehabituation control module is respectively connected to the positive terminal of the memristor M1 and the drain of the NMOS tube T2, the output end of the same logic gate D6 is connected to the gate of the NMOS tube T1, the output end of the same logic gate D10 of the habituation control module is connected to the gate of the NMOS tube T2, the output end of the voltage-controlled switch S7 of the habituation control module is connected to the negative terminal of the memristor M1, the positive terminal of the memristor M1 is connected to the drain of the NMOS tube T2, the negative terminal of the memristor M1 is connected to the drain of the NMOS tube T1, the source of the NMOS tube T1 is connected to the first proportional module, the resistor R35 and the capacitor C1 are connected in parallel; the source of the NMOS tube T2 is connected to the first proportional module;
[0018] The habituation output module includes a voltage-controlled switch S9, a voltage-controlled switch S11, a seventh voltage-controlled unit, an eighth voltage-controlled unit, an eighth summing module, a first difference-finding module, a second difference-finding module and a second proportional module. The output end of the same logic gate D7 of the de-habituation control module is respectively connected to the positive input end of the voltage-controlled switch S9 and the input end of the seventh voltage-controlled unit. The output end of the same logic gate D9 in the habituation control module is connected to the positive input end of the voltage-controlled switch S11. The negative input ends of the voltage-controlled switch S9 and the voltage-controlled switch S11 are both grounded. The input ends of the controlled voltage sides of the voltage-controlled switch S9 and the voltage-controlled switch S11 are both connected to the output end of the first proportional module of the habituation synapse module. The output end of the voltage-controlled switch S9 is respectively connected to one end of the resistor R40 and an input end of the first difference-finding module. The output end of the controlled voltage side of the voltage-controlled switch S11 is connected to the resistor R One end of the resistor R41 is connected to an input end of the second proportional module, and the other ends of the resistor R40 and the resistor R41 are both grounded; the output end of the seventh voltage control unit is connected to the other input end of the first difference module, the input end of the eighth summing module is connected to the output ends of the first difference module and the second proportional module respectively, the output end of the eighth summing module is connected to an input end of the second difference module, the other input end of the second difference module is connected to the output end of the third proportional module in the reinforcement module, and the output end of the second difference module is output as a happy emotion signal N7; the input end of the eighth voltage control unit is connected to the output end of the same logic gate D8 in the habituation control module, the input end of the controlled voltage side of the eighth voltage control unit is connected to the output end of the first proportional module in the habituation synapse module, and the output end of the controlled voltage side of the eighth voltage control unit is output as a fear emotion signal N6.
[0019] Preferably, the reinforcement module includes a rate change module, a habituation feedback module and a spontaneous recovery feedback module. The input end of the rate change module is connected to the output end of the recovery control module of the reinforcement and logic control module, the output end of the rate change module is connected to the input ends of the habituation feedback module and the spontaneous recovery feedback module respectively, the output end of the habituation feedback module is connected to the input end of the habituation control module of the logic control module, and the output end of the spontaneous recovery feedback module is connected to the spontaneous recovery module. The rate change module outputs a feedback signal according to the habituation stimulus signal previously applied; the habituation feedback module amplifies the output of the rate change module and feeds it back to the habituation signal source; the spontaneous recovery feedback module amplifies the output of the rate change module and feeds it back to the spontaneous recovery module as a spontaneous recovery signal source;
[0020] The spontaneous recovery module includes a voltage comparison module, a startup module and a recovery voltage module. The voltage comparison module is connected to the logic control module and the habituation module, the startup module is connected to the logic control module, and the recovery voltage module is connected to the voltage comparison module, the startup module, the logic control module and the reinforcement module respectively. The voltage comparison module stops outputting signals to the recovery voltage module when the resistance value of the memristor M1 of the habituation synaptic module of the habituation module is restored to the initial value of 1K; the startup module generates a 0.09S pulse signal at the moment of spontaneous recovery to make the voltage comparison module work at the beginning of spontaneous recovery; the recovery voltage module applies a spontaneous recovery voltage to the habituation module.
[0021] Preferably, the rate change module includes a ninth voltage control unit, a tenth voltage control unit, a ninth summing module, a third difference module and an NMOS tube T3, the output end of the NOT gate D22 of the strengthening and recovery control module of the logic control module is respectively connected to the positive input ends of the ninth voltage control unit and the tenth voltage control unit, the output end of the same logic gate D19 of the strengthening and recovery control module is connected to the input end of the controlled voltage side of the ninth voltage control unit, the output end of the same logic gate D21 in the strengthening and recovery control module is respectively connected to an input end of the ninth summing module and the input end of the controlled voltage side of the tenth voltage control unit, the ninth voltage control unit is connected to the positive input end of the ninth voltage control unit and the positive input end of the tenth voltage control unit, the output end of the same logic gate D19 of the strengthening and recovery control module is connected to the input end of the controlled voltage side of the ninth voltage control unit, the output end of the same logic gate D21 in the strengthening and recovery control module is respectively connected to an input end of the ninth summing module and the input end of the controlled voltage side of the tenth voltage control unit, The output end of the controlled voltage side of the control unit is connected to the other input end of the ninth summing module, the output end of the controlled voltage side of the tenth voltage control unit is connected to the gate of the NMOS tube T3, the output end of the ninth summing module is connected to an input end of the third difference module, the other input end of the third difference module is connected to the positive electrode of the power supply V7, and the negative electrode of the power supply V7 is grounded; the output end of the third difference module is connected to the drain of the NMOS tube T3, the source of the NMOS tube T3 is respectively connected to the input ends of the habituation feedback module and the spontaneous recovery feedback module and one end of the capacitor C3, and the other end of the capacitor C3 is grounded;
[0022] The habituation feedback module includes a voltage-controlled switch S13 and a third proportional module, the output of the same logic gate D11 of the habituation control module of the logic control module is connected to the positive input end of the voltage-controlled switch S13, the negative input end of the voltage-controlled switch S13 is grounded, the source of the NMOS tube T3 is connected to the input end of the controlled voltage side of the voltage-controlled switch S13, the output end of the voltage-controlled switch S13 is connected to the input end of the third proportional module, and the output end of the third proportional module is connected to the other input end of the seventh summing module in the habituation control module;
[0023] The spontaneous recovery feedback module includes a voltage-controlled switch S14 and a fourth proportional module. The output end of the AND gate D16 in the strengthening and recovery control module is connected to the positive input end of the voltage-controlled switch S14, the negative input end of the voltage-controlled switch S14 is grounded, the source of the NMOS tube T3 is connected to the input end of the controlled voltage side of the voltage-controlled switch S14, the output end of the controlled voltage side of the voltage-controlled switch S14 is connected to the input end of the fourth proportional module, and the output end of the fourth proportional module is connected to the spontaneous recovery module.
[0024] Preferably, the voltage comparison module includes a voltage-controlled switch S17, a diode, a fifth proportional module, a fourth difference module, a tenth summing module, an NMOS tube T4, a PMOS tube T5 and a logic gate D23; the output end of the AND gate D16 of the reinforcement and recovery control module of the logic control module is connected to the positive input end of the voltage-controlled switch S17; the negative terminal of the memristor M1 in the habituation synapse module of the habituation module is connected to the input end of the controlled voltage side of the voltage-controlled switch S17; the output end and the negative input end of the controlled voltage side of the voltage-controlled switch S17 are both grounded; the output end of the controlled voltage side of the voltage-controlled switch S6 of the sixth voltage-controlled unit of the reinforcement and recovery control module is respectively connected to the input end of the diode and one end of the resistor R77; the output end of the diode is connected to the input end of the fifth proportional module; the other end of the resistor R77 is respectively connected to the positive electrode of the memristor M1 in the habituation module The output end of the fifth proportional module is connected to an input end of the fourth difference module, an input end of the tenth summing module and one end of the resistor R86 respectively, the other input end of the fourth difference module is connected to the positive electrode of the power supply V8, the other input end of the tenth summing module is connected to the positive electrode of the power supply V9, and the negative electrodes of the power supplies V8 and V9 are both grounded; the output end of the fourth difference module is connected to the source of the NMOS tube T4, the output end of the tenth summing module is connected to the source of the PMOS tube T5, the drain of the NMOS tube T4 is connected to the other end of the resistor R86 and the gate of the PMOS tube T5, the drain of the PMOS tube T5 is connected to one end of the resistor R87 and the input end of the same logic gate D23, and the other end of the resistor R87 is grounded; the output end of the same logic gate D23 is connected to the input end of the recovery voltage module;
[0025] The startup module includes an eleventh voltage control unit and a fifth difference module, the output end of the AND gate D16 of the strengthening and recovery control module is respectively connected to the input end and the positive input end of the controlled voltage side of the eleventh voltage control unit and one input end of the fifth difference module, the output end of the controlled voltage side of the eleventh voltage control unit is connected to the other input end of the fifth difference module, and the output end of the fifth difference module is connected to the input end of the recovery voltage module;
[0026] The recovery voltage module includes a voltage-controlled switch S19, an eleventh summing module and a twelfth summing module. The output end of the same logic gate D23 of the voltage comparison module is connected to an input end of the eleventh summing module, the output end of the fifth difference module of the startup module is connected to the other input end of the eleventh summing module, the output end of the eleventh summing module is connected to the positive input end of the voltage-controlled switch S19, the negative input end of the voltage-controlled switch S19 is grounded, the output end of the controlled voltage side of the voltage-controlled switch S19 is connected to the input end of the controlled voltage side of the sixth voltage-controlled unit of the enhancement and recovery control module, one input end of the twelfth summing module is connected to the output end of the fourth proportional module in the spontaneous recovery feedback module of the enhancement module, the other input end of the twelfth summing module is connected to the positive pole of the power supply V10, and the negative pole of the power supply V10 is grounded; the output end of the twelfth summing module is connected to the input end of the controlled voltage side of the voltage-controlled switch S19.
[0027] Preferably, the output end of the first summing module is connected to the input end of the same logic gate D8, and the output end of the same logic gate D8 is connected to the habituation module; the output end of the second summing module is connected to the same logic gate D9, and the same logic gate D9 is connected to the habituation module;
[0028] The source of the NMOS transistor T1 is connected to one end of the resistor R35 and the capacitor C1 respectively, and the resistor R36 and the capacitor C2 are connected in parallel; the source of the NMOS transistor T2 is connected to one end of the resistor R36 and the capacitor C2 respectively, and the other ends of the resistor R35, the capacitor C1, the resistor R36 and the capacitor C2 are grounded;
[0029] The first voltage-controlled unit, the second voltage-controlled unit, the third voltage-controlled unit, the fourth voltage-controlled unit, the fifth voltage-controlled unit and the seventh voltage-controlled unit all include a first voltage-controlled switch, a positive input terminal of the first voltage-controlled switch is connected to an input signal, a negative input terminal of the first voltage-controlled switch is grounded, an input terminal of a controlled voltage side of the first voltage-controlled switch is connected to a first power supply, and an output terminal of the controlled voltage side of the first voltage-controlled switch is connected to a first resistor and an output signal, respectively;
[0030] The sixth voltage-controlled unit, the eighth voltage-controlled unit, the ninth voltage-controlled unit, the tenth voltage-controlled unit and the eleventh voltage-controlled unit all include a second voltage-controlled switch and a second resistor, a positive input terminal of the second voltage-controlled switch is connected to an input signal, a negative input terminal of the second voltage-controlled switch is grounded, an input terminal of a controlled voltage side of the second voltage-controlled switch is connected to one end of the second resistor, the other end of the second resistor is grounded, and an output terminal of the controlled voltage side of the second voltage-controlled switch is connected to an output signal;
[0031] The first summing module, the second summing module, the third summing module, the fourth summing module, the fifth summing module, the sixth summing module, the seventh summing module, the eighth summing module, the ninth summing module, the tenth summing module, the eleventh summing module and the twelfth summing module all include a first operational amplifier, a non-inverting input terminal of the first operational amplifier is respectively connected to the third resistor and the fourth resistor, the third resistor and the fourth resistor are respectively connected to two input signals, an inverting input terminal of the first operational amplifier is respectively connected to the fifth resistor and the sixth resistor, the fifth resistor is grounded, the sixth resistor is connected to the output terminal of the first operational amplifier, and the output terminal of the first operational amplifier outputs the added signal;
[0032] The first proportional module includes a second operational amplifier, a third operational amplifier, an NMOS tube T1 and a memristor M1, the positive terminal of the memristor M1 is the input terminal of the first proportional module, the drain of the NMOS tube T1 is connected to the negative terminal of the memristor M1, the source of the NMOS tube T1 is respectively connected to the inverting input terminal of the second operational amplifier and the seventh resistor, the seventh resistor is connected to the output terminal of the second operational amplifier, and the non-inverting input terminal of the second operational amplifier is grounded; the output terminal of the second operational amplifier is connected to the eighth resistor, the eighth resistor is respectively connected to the inverting input terminal of the third operational amplifier and the tenth resistor, the tenth resistor is connected to the output terminal of the third operational amplifier, the non-inverting input terminal of the third operational amplifier is grounded, and the output of the third operational amplifier is the output of the first proportional module;
[0033] The second proportion module, the third proportion module, the fourth proportion module and the fifth proportion module all include a fourth operational amplifier and a fifth operational amplifier, the inverting input terminal of the fourth operational amplifier is connected to one end of the eleventh resistor, one end of the first resistor is the input terminal of the second proportion module, the inverting input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier through the twelfth resistor, the non-inverting input terminal of the fourth operational amplifier is grounded, the output terminal of the fourth operational amplifier is connected to one end of the thirteenth resistor, the other end of the thirteenth resistor is respectively connected to the inverting input terminal of the fifth operational amplifier and the fourteenth resistor, the fourteenth resistor is connected to the output terminal of the fifth operational amplifier, the non-inverting input terminal of the fifth operational amplifier is grounded, and the output of the fifth operational amplifier is the output of the second proportion module;
[0034] The first difference-finding module, the second difference-finding module, the fourth difference-finding module and the fifth difference-finding module all include a sixth operational amplifier, the in-phase input terminal of the sixth operational amplifier is connected to one end of the fifteenth resistor, the inverting input terminal of the sixth operational amplifier is connected to the other end of the sixteenth resistor, one end of the fifteenth resistor and one end of the sixteenth resistor are two input terminals thereof, the in-phase input terminal of the sixth operational amplifier is grounded through a seventeenth resistor; the inverting input terminal of the sixth operational amplifier is connected to the output terminal of the sixth operational amplifier through an eighteenth resistor, and the output of the sixth operational amplifier is its output;
[0035] The third difference module includes a seventh operational amplifier, the non-inverting input terminal of the seventh operational amplifier is connected to one end of the memristor M2, the inverting input terminal of the seventh operational amplifier is connected to one end of the nineteenth resistor, the other end of the memristor M2 and the nineteenth resistor are its two input terminals respectively, the non-inverting input terminal of the seventh operational amplifier is grounded through the twentieth resistor; the inverting input terminal of the sixth operational amplifier is connected to the output terminal of the seventh operational amplifier through the twenty-first resistor, and the output of the seventh operational amplifier is its output.
[0036] Compared with the prior art, the present invention has the following beneficial effects:
[0037] 1) By applying pictures of positive or negative stimuli of different intensities, emotional habituation caused by different stimuli was achieved. Positive stimuli led to significant emotional habituation of happiness, while negative stimuli did not lead to emotional habituation of fear. In addition, the weaker the intensity of the same polarity stimulus, the easier it is to habituate to emotion, which makes the stimulation more diverse and the circuit more in line with biological characteristics.
[0038] 2) In the case of emotional habituation, applying a dehabituation stimulus signal with a higher intensity can restore the habituated emotion that has been formed. If the dehabituation stimulus signal continues to be applied, the emotion induced by the dehabituation stimulus signal will gradually become habituated.
[0039] 3) When the emotion is habituated and there is no other stimulus signal, the habituated emotion will gradually return to the state before habituation. This is the spontaneous recovery process of habituation. If the habituation stimulus is applied again after the spontaneous recovery is completed, habituation will enter the reinforcement stage. After reinforcement, habituation is formed faster and spontaneous recovery is slower.
[0040] The present invention realizes the emotion habituation characteristics induced by stimulation of pictures of different polarities and intensities through the connection between visual neurons and emotion neurons, and realizes emotion habituation and spontaneous recovery under different stimulations, habituation of de-habituation stimulation in the emotion habituation state, and second emotion habituation and spontaneous recovery after the first emotion habituation and spontaneous recovery. The emotion habituation characteristic circuit of the present invention is more in line with biological characteristics and helps to build a more intelligent neural network circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0042] Figure 1 It is a circuit schematic diagram of the present invention.
[0043] Figure 2 for Figure 1 Circuit diagram of the input module and logic control module.
[0044] Figure 3 for Figure 1 Circuit diagram of the habituation module.
[0045] Figure 4 for Figure 1 Circuit diagram of the reinforcement module.
[0046] Figure 5 for Figure 1 Circuit diagram of the spontaneous recovery module.
[0047] Figure 6 The diagrams are simulation results of emotion habituation and spontaneous recovery under positive and negative stimulation of the present invention, wherein (a) is when a positive weak stimulation habituation signal source is input, (b) is when a positive medium stimulation habituation signal source is input, and (c) is when both a negative weak stimulation habituation signal source and a negative medium stimulation habituation signal source are input.
[0048] Figure 7 The habituation simulation result diagram of the dehabituation stimulus of the present invention, wherein (a) is under the habituation condition of positive weak stimulus, and (b) is under the habituation condition of positive medium stimulus.
[0049] Figure 8 Graphs showing the secondary habituation and spontaneous recovery simulation results of the present invention, wherein (a) is under a positive weak stimulation signal source, and (b) is under a positive medium stimulation signal source. DETAILED DESCRIPTION
[0050] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0051] like Figure 1 As shown, a visually induced emotion habituation characteristic neural network circuit includes an input signal source, an input module, a logic control module, a habituation module, a reinforcement module and a spontaneous recovery module. The input signal source is connected to the input module and the logic control module respectively, the input module is connected to the logic control module, the logic control module is connected to the habituation module, the reinforcement module and the spontaneous recovery module respectively, the reinforcement module is connected to the habituation module and the spontaneous recovery module respectively, the spontaneous recovery module is connected to the habituation module, and the habituation module outputs a fear / happiness emotion signal. The input module converts the amplitude and effective level of the input signal source; the logic control module generates a control signal for controlling the habituation module, the reinforcement module and the spontaneous recovery module according to the output of the input signal source and the input module; the habituation module realizes the functions of habituation formation, recovery and output; the reinforcement module outputs habituation and spontaneous recovery feedback signals according to the previously received stimulus; the spontaneous recovery module recovers the formed habituation when no stimulus is applied.
[0052] The input signal source includes a 10V positive strong stimulus dehabituation signal source N1, a 2V positive weak stimulus habituation signal source N2, a 4V positive medium stimulus habituation signal source N3, a 6V negative weak stimulus habituation signal source N4, and an 8V negative medium stimulus habituation signal source N5. In a specific implementation, the input end inputs the picture stimulus signal voltage, and the output end outputs the induced fear / happiness emotion signal. The signal N6 output by the habituation module represents the fear emotion signal, and the signal N7 represents the happiness emotion signal. The positive strong stimulation dehabituation signal source N1, the positive weak stimulation habituation signal source N2, the positive medium stimulation habituation signal source N3, the negative weak stimulation habituation signal source N4 and the negative medium stimulation habituation signal source N5 are respectively connected to the input module, and the positive strong stimulation dehabituation signal source N1, the positive weak stimulation habituation signal source N2, the positive medium stimulation habituation signal source N3, the negative weak stimulation habituation signal source N4 and the negative medium stimulation habituation signal source N5 are respectively connected to the logic control module.
[0053] like Figure 2As shown, the input module includes a positive strong stimulus dehabituation signal receiving and processing unit, a positive weak stimulus habituation signal receiving and processing unit, a positive medium stimulus habituation signal receiving and processing unit, a negative weak stimulus habituation signal receiving and processing unit, and a negative medium stimulus habituation signal receiving and processing unit. The positive strong stimulus dehabituation signal source N1 is connected to the input end of the positive strong stimulus dehabituation signal receiving and processing unit, and the output end of the positive strong stimulus dehabituation signal receiving and processing unit is connected to the logic control module; the positive weak stimulus habituation signal source N2 is connected to the input end of the positive weak stimulus habituation signal receiving and processing unit, and the output end of the positive weak stimulus habituation signal receiving and processing unit is connected to the logic control module. The positive medium stimulus habituation signal source N3 is connected to the input end of the positive medium stimulus habituation signal receiving and processing unit, and the output end of the positive medium stimulus habituation signal receiving and processing unit is connected to the logic control module. The negative weak stimulation habituation signal source N4 is connected to the input end of the negative weak stimulation habituation signal receiving and processing unit, and the output end of the negative weak stimulation habituation signal receiving and processing unit is connected to the logic control module; the negative medium stimulation habituation signal source N5 is connected to the input end of the negative medium stimulation habituation signal receiving and processing unit, and the output end of the negative medium stimulation habituation signal receiving and processing unit is connected to the logic control module. The positive strong stimulation dehabituation signal receiving and processing unit, the positive weak stimulation habituation signal receiving and processing unit, the positive medium stimulation habituation signal receiving and processing unit, the negative weak stimulation habituation signal receiving and processing unit, and the negative medium stimulation habituation signal receiving and processing unit all perform amplitude and effective level conversion on their respective input signal sources.
[0054] The positive strong stimulus dehabituation signal receiving and processing unit includes a first voltage control unit and a same logic gate D1, a positive strong stimulus dehabituation signal source N1 is connected to the input end of the first voltage control unit, an output end of the first voltage control unit is connected to the input end of the same logic gate D1, the same logic gate D1 performs amplitude conversion on the input high-level voltage, and the output of the same logic gate D1 is the output signal of the positive strong stimulus dehabituation signal receiving and processing module. The positive weak stimulus habituation signal receiving and processing unit includes a second voltage control unit and a same logic gate D2, a positive weak stimulus habituation signal source N2 is connected to the input end of the second voltage control unit, an output end of the second voltage control unit is connected to the input end of the same logic gate D2, and the same logic gate D2 performs amplitude conversion on the input high-level voltage. The output of the same logic gate D2 is the output signal of the positive weak stimulus habituation signal receiving and processing unit. The positive medium stimulation habituation signal receiving and processing unit includes a third voltage control unit and a same logic gate D3, the positive medium stimulation habituation signal source N3 is connected to the input end of the third voltage control unit, the output end of the third voltage control unit is connected to the input end of the same logic gate D3, the same logic gate D3 performs amplitude conversion on the input high level voltage, and the output of the same logic gate D3 is the output signal of the positive medium stimulation habituation signal receiving and processing unit. The negative weak stimulation habituation signal receiving and processing unit includes a fourth voltage control unit and a same logic gate D4, the negative weak stimulation habituation signal source N4 is connected to the input end of the fourth voltage control unit, the output end of the fourth voltage control unit is connected to the input end of the same logic gate D4, the same logic gate D4 performs amplitude conversion on the input high level voltage, and the output of the same logic gate D4 is the output signal of the negative weak stimulation habituation signal receiving and processing module. The negative moderate stimulation habituation signal receiving and processing module includes a fifth voltage control unit and a same logic gate D5. The negative moderate stimulation habituation signal source N5 is connected to the input end of the fifth voltage control unit. The output end of the fifth voltage control unit is connected to the input end of the same logic gate D5. The same logic gate D5 converts the amplitude of the input high-level voltage. The output of the same logic gate D5 is the output signal of the negative moderate stimulation habituation signal receiving and processing unit.
[0055] The first voltage-controlled unit includes a voltage-controlled switch S1, the positive input end of the voltage-controlled switch S1 is connected to the positive strong stimulus dehabituation signal source N1, the reverse input end of the voltage-controlled switch S1 is grounded, the output end of the voltage-controlled switch S1 is connected to the power supply V1, the output end of the voltage-controlled switch S1 is respectively connected to one end of the resistor R1 and the input end of the same logic gate D1, and the other end of the resistor R1 is grounded. The second voltage-controlled unit includes a voltage-controlled switch S2, the positive input end of the voltage-controlled switch S2 is connected to the positive strong stimulus dehabituation signal source N2, the reverse input end of the voltage-controlled switch S2 is grounded, the input end of the voltage-controlled switch S2 is connected to the power supply V2, the output end of the voltage-controlled switch S2 is respectively connected to one end of the resistor R2 and the input end of the same logic gate D2, and the other end of the resistor R2 is grounded. The second voltage-controlled unit includes a voltage-controlled switch S2, the positive input end of the voltage-controlled switch S2 is connected to the positive strong stimulus dehabituation signal source N2, the reverse input end of the voltage-controlled switch S2 is grounded, the input end of the voltage-controlled switch S2 is connected to the power supply V2, the output end of the voltage-controlled switch S2 is respectively connected to one end of the resistor R2 and the input end of the same logic gate D2, and the other end of the resistor R2 is grounded. The third voltage-controlled unit includes a voltage-controlled switch S3, the positive input end of the voltage-controlled switch S3 is connected to the positive strong stimulus dehabituation signal source N3, the reverse input end of the voltage-controlled switch S3 is grounded, the input end of the voltage-controlled switch S3 is connected to the power supply V3, the output end of the voltage-controlled switch S3 is respectively connected to one end of the resistor R3 and the input end of the same logic gate D3, and the other end of the resistor R3 is grounded. The fourth voltage-controlled unit includes a voltage-controlled switch S4, the positive input end of the voltage-controlled switch S4 is connected to the positive strong stimulus dehabituation signal source N4, the reverse input end of the voltage-controlled switch S4 is grounded, the input end of the voltage-controlled switch S4 is connected to the power supply V4, the output end of the voltage-controlled switch S4 is respectively connected to one end of the resistor R4 and the input end of the same logic gate D4, and the other end of the resistor R4 is grounded. The fifth voltage-controlled unit includes a voltage-controlled switch S5, the positive input end of the voltage-controlled switch S5 is connected to the positive strong stimulus dehabituation signal source N5, the reverse input end of the voltage-controlled switch S5 is grounded, the input voltage of the controlled voltage side of the voltage-controlled switch S5 is the power supply V5, the output voltage of the controlled voltage side of the voltage-controlled switch S5 is connected to one end of the resistor R5 and the input end of the same logic gate D5, and the other end of the resistor R5 is grounded. When the input ends of the first voltage control unit, the second voltage control unit, the third voltage control unit, the fourth voltage control unit and the fifth voltage control unit exceed their own thresholds, the controlled voltage side of each voltage control unit is turned on and outputs the voltage of the power supply V1~V5 respectively, wherein the power supply V1~V5 are all 3V high-level periodic square wave signals with a period of 1s and an effective level of 0.5s.
[0056] like Figure 2As shown, the logic control module includes a summing module, a dehabituation control module, a habituation control module, and a reinforcement and recovery control module. The output end of the input module is respectively connected to the input end of the summing module and the dehabituation control module, and the input signal source is respectively connected to the input end of the summing module and the reinforcement and recovery control module; the positive strong stimulation dehabituation signal source N1 is connected to the input end of the spontaneous recovery module, and the positive weak stimulation habituation signal source N2, the positive medium stimulation habituation signal source N3, the negative weak stimulation habituation signal source N4, and the negative medium stimulation habituation signal source N5 are all connected to the input end of the summing module. The output end of the positive strong stimulus dehabituation signal receiving and processing unit is connected to the input end of the dehabituation control module, the output ends of the positive weak stimulus habituation signal receiving and processing unit, the positive medium stimulus habituation signal receiving and processing unit, the negative weak stimulus habituation signal receiving and processing unit and the negative medium stimulus habituation signal receiving and processing unit are connected to the input end of the summing module, the output end of the summing module is connected to the input end of the habituation control module and the habituation control module respectively; the output ends of the dehabituation control module and the habituation control module are both connected to the input end of the habituation module, and the output end of the reinforcement and recovery control module is connected to the input end of the reinforcement module and the spontaneous recovery module respectively. The summing module performs addition operation on two inputs; the dehabituation control module performs logical control on the dehabituation signal source; the habituation control module performs logical control on the habituation signal source; the reinforcement and recovery control module performs logical control on the reinforcement module and the recovery module.
[0057] The dehabituation control module includes a same logic gate D6, a same logic gate D7 and a voltage-controlled switch S6. The input ends of the same logic gate D6 and the same logic gate D7 and the input voltage of the voltage-controlled switch S6 are all connected to the output end of the positive strong stimulation dehabituation signal receiving and processing unit. The output ends of the same logic gate D6 and the same logic gate D7 and the output voltage of the voltage-controlled switch S6 are all connected to the input end of the habituation module. In addition, the output end of the same logic gate D7 is connected to the positive input end of the voltage-controlled switch S6, and the negative input end of the voltage-controlled switch S6 is grounded. When the positive strong stimulus dehabituation signal source N1 is input, the signal N1 outputs the signal D1 after passing through the positive strong stimulus dehabituation signal receiving and processing unit. When the signal D1 is at a high level, the same logic gate D6 will output a high level voltage signal to control the NMOS tube T1 in the habituation module to turn on. After T1 is turned on, the dehabituation circuit will be turned on. The same logic gate D7 will also output a high level voltage signal to control the conduction of the voltage-controlled switch S6. After the voltage-controlled switch S6 is turned on, the dehabituation voltage signal D1 will be output to the habituation module. In addition, the same logic gate D7 also controls the voltage-controlled switch S9 so that its controlled voltage side only outputs the dehabituation voltage.
[0058] The summing module includes a first summing module and a second summing module, the input end of the first summing module is respectively connected to the output end of the positive weak stimulus habituation signal receiving and processing unit and the positive medium stimulus habituation signal receiving and processing unit, the input end of the second summing module is respectively connected to the output end of the negative weak stimulus habituation signal receiving and processing unit and the negative medium stimulus habituation signal receiving and processing unit, the output end of the first summing module and the second summing module are both connected to the sixth summing module, the output end of the sixth summing module is connected to the habituation control module and the reinforcement module, the second summing module and the first summing module are also connected to the habituation module, the output end of the second summing module is connected to the input end of the same logic gate D8, and the output end of the same logic gate D8 is connected to the habituation module. When the negative stimulus voltage signal is input, the high level signal input to the same logic gate D8 will output a logic control signal to the voltage-controlled switch S12 in the habituation module, and S12 will control the output of the voltage signal N6 of the fear emotion. The output end of the second summing module is connected to the same logic gate D9, and the same logic gate D9 is connected to the positive input end of the voltage-controlled switch S11 in the habituation module. The same logic gate D9 controls the controlled voltage side of the voltage-controlled switch S11 to output only the habituation voltage. The first summing module adds the outputs of the same logic gate D2 and the same logic gate D3 as the output of the first summing module, the second summing module adds the outputs of the same logic gate D4 and the same logic gate D5 as the output of the second summing module, and the sixth summing module adds the outputs of the first summing module and the second summing module as the output of the sixth summing module. The first summing module includes resistors R6~R9 and an operational amplifier OP1, the second summing module includes resistors R10~13 and an operational amplifier OP2, and the sixth summing module includes resistors R26~R29 and an operational amplifier OP6.
[0059] The first summing module, the second summing module, the third summing module, the fourth summing module, the fifth summing module, the sixth summing module, the seventh summing module, the eighth summing module, the ninth summing module, the tenth summing module, the eleventh summing module and the twelfth summing module are all first operational amplifiers, the non-inverting input terminal of the first operational amplifier is respectively connected to the third resistor and the fourth resistor, the third resistor and the fourth resistor are respectively connected to two input signals, the inverting input terminal of the first operational amplifier is respectively connected to the fifth resistor and the sixth resistor, the fifth resistor is grounded, the sixth resistor is connected to the output terminal of the first operational amplifier, and the output terminal of the first operational amplifier outputs the added signal.
[0060] The habituation control module includes a same logic gate D9, a same logic gate D10, a same logic gate D12, an AND gate D13, a NOT gate D14, a voltage-controlled switch S7 and a seventh summing module. The output of the sixth summing module is respectively connected to the input ends of the same logic gate D10, the same logic gate D12 and an input end of the seventh summing module. The input end of the NOT gate D14 is connected to the output end of the AND gate D16 in the strengthening and recovery control module. The output ends of the same logic gate D12 and the NOT gate D14 are connected to the input end of the AND gate D13. The positive input end of the voltage-controlled switch S7 is connected to the AND gate D16. The output end of the seventh summing module is connected to the output end of the strengthening module, the negative input end of the voltage-controlled switch S7 is grounded; the other input end of the seventh summing module is connected to the output end of the strengthening module, the output end of the seventh summing module is connected to the output end of the voltage-controlled switch S7, the input end of the same logic gate D9 is connected to the output end of the first summing module, the output ends of the same logic gate D9 and the same logic gate D10, and the output end of the voltage-controlled switch S7 are all connected to the input end of the habituation module, and the seventh summing module adds the output of the sixth summing module and the third proportional module of the strengthening module as the output of the seventh summing module. The output end of the seventh summing module is connected to the input end of the voltage-controlled switch S7. The seventh summing module includes resistors R30~R33 and an operational amplifier OP7. The same logic gate D10 outputs a logic signal based on the habituation signal output by the sixth summation module, and the output logic signal controls the on and off of the NMOS tube T2 in the habituation circuit; the same logic gate D12 inputs the habituation logic control signal, and the signal of the same logic gate D12 and the NOT gate D14 are input to the AND gate D13. The high-level output signal of the AND gate D13 controls the voltage-controlled switch S7 to open. After the voltage-controlled switch S7 is turned on, the habituation voltage will be input to the habituation module.
[0061] One input end of the third summing module is connected to the positive weak stimulus habituation signal source N2, another input end of the third summing module is connected to the positive medium stimulus habituation signal source N3, one input end of the fourth summing module is connected to the negative weak stimulus habituation signal source N4, another input end of the fourth summing module is connected to the negative medium stimulus habituation signal source N5, one input end of the fifth summing module is connected to the output of the third summing module, input 2 of the fifth summing module is connected to the output of the fourth summing module, and the output of the fifth summing module is connected to the input end of the same gate D19 in the reinforcement and restoration control module. The third summing module adds the positive weak stimulus signal source N2 and the positive medium stimulus signal source N3 as the output of the third summing module; the fourth summing module adds the negative weak stimulus signal source N4 and the negative medium stimulus signal source N5 as the output of the fourth summing module; the fifth summing module adds the outputs of the third summing module and the fourth summing module as the output of the fifth summing module. The third summing module includes an operational amplifier OP3 and resistors R14 to R17 , the fourth summing module includes an operational amplifier OP4 and resistors R18 to R21 , and the fifth summing module includes an operational amplifier OP5 and resistors R22 to R25 .
[0062] The reinforcement and recovery control module includes a third summing module, a fourth summing module, a fifth summing module, a NOT gate D15, a NOT gate D17, a NOT gate D20, a NOT gate D22, a same logic gate D19, a same logic gate D21, an AND gate D16, an AND gate D18, a D flip-flop DFF1 and a sixth voltage control unit, a positive strong stimulus dehabituation signal source N1 is respectively connected to the CLK terminal of the D flip-flop DFF1 and the input terminal of the NOT gate D15, and a D terminal of the D flip-flop DFF1 is connected to the D terminal of the D flip-flop DFF1. The input end of the NOT gate D17 is connected to the Q end of the D flip-flop DFF1. When the dehabituation signal is input, the D flip-flop DFF1 outputs a logic signal for controlling the shutdown of the spontaneous recovery voltage. When the CLK end of the D flip-flop DFF1 receives a rising edge signal, the Q end will output a high level signal. If there is no dehabituation signal input, the Q end will output a low level signal. The output end of the NOT gate D17 is connected to the input end of the AND gate D18; the input end of the same logic gate D19 is connected to the output end of the fifth summing module, the output end of the same logic gate D19 is respectively connected to the input end of the NOT gate D20 and the strengthening module, the output end of the NOT gate D20 is connected to the input end of the AND gate D18, the output ends of the NOT gate D15 and the AND gate D18 are both connected to the input end of the AND gate D16, the output end of the AND gate D16 is respectively connected to the input end of the sixth voltage control unit, the input end of the NOT gate D14 in the habituation control module, the input end of the same logic gate D21, the strengthening module and the input of the spontaneous recovery module, the input end and the output end of the controlled voltage side of the sixth voltage control unit are both connected to the spontaneous recovery module, the output end of the fourth summing module is connected to the input end of the NOT gate D22, and the output ends of the NOT gate D22 and the same logic gate D21 are both connected to the input end of the strengthening module. When the input terminal of the sixth voltage control unit exceeds the set threshold voltage VT of 3.5V, the controlled voltage side of the voltage control unit is turned on. The input of the NOT gate D22 in the reinforcement and recovery control module is connected to the positive habituated voltage signal output by the operational amplifier OP4, and the logic signal output by the NOT gate D22 controls the voltage-controlled switch S15 and the voltage-controlled switch S16 in the reinforcement module. When the NOT gate D22 outputs a high level, the logic gate D19 outputs a logic control voltage signal according to the input habituated voltage signal to change the resistance value of the memristor M2. When the logic gate D21 is input during the spontaneous recovery period, the reinforcement module outputs a variable feedback voltage signal; during the spontaneous recovery period, the AND gate D16 in the reinforcement and recovery control module will output a high-level logic control signal to control the voltage-controlled switch S8 to open, and the controlled voltage side of the voltage-controlled switch S8 will output a spontaneous recovery voltage signal. The AND gate D16 outputs a low-level signal when the spontaneous recovery is completed, and the output of the AND gate D16 is also input to the voltage-controlled switch S18 in the spontaneous recovery module. The voltage-controlled switch S18 enables the voltage comparison module in the spontaneous recovery module to function as soon as the spontaneous recovery voltage signal is input.
[0063] like Figure 3As shown, the habituation module includes a habituation synapse module and a habituation output module. The output ends of the dehabituation control module and the habituation control module in the logic control module are connected to the habituation synapse module, the output ends of the dehabituation control module and the habituation control module are connected to the habituation output module, the habituation synapse module is connected to the habituation output module, and the habituation output module outputs a fear emotion signal N6 or a happy emotion signal N7. The habituation synapse module realizes the change of the resistance value of the memristor M1 according to the input positive and negative voltages; the habituation output module generates an emotional habit output signal according to the input habituation and dehabituation stimulus signals.
[0064] The habituation synaptic module includes a memristor M1, an NMOS tube T1, an NMOS tube T2, a capacitor C1, a capacitor C2, a resistor R35, a resistor R36 and a first proportional module (including the memristor M1). The output end of the controlled voltage side of the voltage-controlled switch S6 in the dehabituation control module is respectively connected to the positive terminal of the memristor M1 and the drain of the NMOS tube T2, the output of the same logic gate D6 is connected to the gate of the NMOS tube T1, the output of the same logic gate D10 in the habituation control module is connected to the gate of the NMOS tube T2, and the output end of the voltage-controlled switch S7 of the habituation control module is connected to the memristor M1. 1, the positive terminal of the memristor M1 is connected to the drain of the NMOS tube T2, the negative terminal of the memristor M1 is connected to the drain of the NMOS tube T1, the source of the NMOS tube T1 is respectively connected to the resistor R35, one end of the capacitor C1 and the first proportional module, the resistor R33 and the capacitor C1 are connected in parallel to achieve filtering, the other ends of the resistor R35 and the capacitor C1 are both grounded, the source of the NMOS tube T2 is respectively connected to the resistor R36, one end of the capacitor C2 and the first proportional module, the resistor R36 and the capacitor C2 are connected in parallel to achieve filtering, and the other ends of the resistor R36 and the capacitor C2 are grounded. The first proportional module performs proportional operations; the positive and negative voltages applied to the two ends of the memristor M1 can be realized by turning on and off the NMOS tube T1 and the NMOS tube T2.
[0065] The habituation output module includes a voltage-controlled switch S9, a voltage-controlled switch S11, a resistor R40, a resistor R41, a seventh voltage-controlled unit, an eighth voltage-controlled unit, an eighth summing module, a first difference-finding module, a second difference-finding module and a second proportional module. The output end of the same logic gate D7 in the de-habituation control module is respectively connected to the positive input end of the voltage-controlled switch S9 and the input end of the seventh voltage-controlled unit, the output end of the same logic gate D9 in the habituation control module is connected to the positive input end of the voltage-controlled switch S11, the negative input ends of the voltage-controlled switch S9 and the voltage-controlled switch S11 are both grounded, the input ends of the controlled voltage sides of the voltage-controlled switch S9 and the voltage-controlled switch S11 are both connected to the output of the first proportional module in the habituation synapse module, the output end of the voltage-controlled switch S9 is respectively connected to one end of the resistor R40 and an input end of the first difference-finding module, the output voltage of the controlled voltage side of the voltage-controlled switch S11 is connected to one end of the resistor R41 and an input end of the second proportional module, and the other ends of the resistor R40 and the resistor R41 are both grounded. The output end of the seventh voltage control unit is connected to the other input end of the first difference module, the input end of the eighth summation module is connected to the output ends of the first difference module and the second proportional module respectively, the output end of the eighth summation module is connected to one input end of the second difference module, the other input end of the second difference module is connected to the output end of the third proportional module in the reinforcement module, and the output end of the second difference module is output as a happy emotion signal N7; the input end of the eighth voltage control unit is connected to the output end of the same logic gate D8 in the habituation control module, the input end of the controlled voltage side of the eighth voltage control unit is connected to the output end of the first proportional module in the habituation synapse module, and the output end of the controlled voltage side of the eighth voltage control unit is output as a fear emotion signal N6. When the input terminals of the seventh voltage control unit and the eighth voltage control unit exceed the set 3.5V threshold voltage VT, the controlled voltage side of each voltage control unit is turned on; the eighth summing module adds the output of the first difference module and the output of the second proportional module as the output of the eighth summing module; the first difference module subtracts the output voltage of the controlled voltage side of the voltage-controlled switch S9 from the output power supply V6 of the controlled voltage side of the seventh voltage control unit as the output of the first difference module; the second difference module subtracts the output of the third proportional module from the output of the eighth summing module as the output of the second difference module. The second proportional module performs proportional operation; the seventh voltage control unit includes a voltage-controlled switch S10, a power supply V6 and a resistor R42; the eighth voltage control unit includes a voltage-controlled switch S12 and a resistor R50.
[0066] The first voltage-controlled unit, the second voltage-controlled unit, the third voltage-controlled unit, the fourth voltage-controlled unit, the fifth voltage-controlled unit and the seventh voltage-controlled unit all include a first voltage-controlled switch, a positive input end of the first voltage-controlled switch is connected to an input signal, a negative input end of the first voltage-controlled switch is grounded, an input end of a controlled voltage side of the first voltage-controlled switch is connected to a first power supply, and an output end of a controlled voltage side of the first voltage-controlled switch is respectively connected to a first resistor and an output signal.
[0067] The sixth voltage-controlled unit, the eighth voltage-controlled unit, the ninth voltage-controlled unit, the tenth voltage-controlled unit and the eleventh voltage-controlled unit all include a second voltage-controlled switch and a second resistor, the positive input end of the second voltage-controlled switch is connected to the input signal, the negative input end of the second voltage-controlled switch is grounded, the input end of the controlled voltage side of the second voltage-controlled switch is connected to one end of the second resistor, the other end of the second resistor is grounded, and the output end of the controlled voltage side of the second voltage-controlled switch outputs a controlled voltage signal.
[0068] like Figure 4 As shown, the reinforcement module includes a rate change module, a habituation feedback module and a spontaneous recovery feedback module. The input end of the rate change module is connected to the output end of the recovery control module of the reinforcement and logic control module, the output end of the rate change module is connected to the input end of the habituation feedback module and the spontaneous recovery feedback module respectively, the output end of the habituation feedback module is connected to the input end of the habituation control module of the logic control module, and the output end of the spontaneous recovery feedback module is connected to the spontaneous recovery module. The rate change module outputs a feedback signal according to the habituation stimulus signal previously applied; the habituation feedback module amplifies the output of the rate change module and feeds it back to the habituation signal source; the spontaneous recovery feedback module amplifies the output of the rate change module and feeds it back to the spontaneous recovery module as a spontaneous recovery signal source.
[0069] The rate change module includes a ninth voltage control unit, a tenth voltage control unit, a ninth summing module, a third difference module, an NMOS tube T3, a power supply V7 and a capacitor C3. The output end of the NOT gate D22 in the strengthening and recovery control module is respectively connected to the positive input ends of the ninth voltage control unit and the tenth voltage control unit. The output end of the IN logic gate D19 in the strengthening and recovery control module is connected to the input end of the controlled voltage side of the ninth voltage control unit. The output end of the IN logic gate D21 in the strengthening and recovery control module is respectively connected to an input end of the ninth summing module and the input end of the controlled voltage side of the tenth voltage control unit. The output end of the controlled voltage side of the control unit is connected to the other input end of the ninth summing module, the output end of the controlled voltage side of the tenth voltage control unit is connected to the gate of the NMOS tube T3, the output end of the ninth summing module is connected to an input end of the third difference module, the other input end of the third difference module is connected to the positive electrode of the power supply V7, the negative electrode of the power supply V7 is grounded, the output end of the third difference module is connected to the drain of the NMOS tube T3, the source of the NMOS tube T3 is respectively connected to the input ends of the habituation feedback module and the spontaneous recovery feedback module and one end of the capacitor C3, and the other end of the capacitor C3 is grounded. The on and off of the NMOS tube T3 controls whether the output of the third difference module is input to the capacitor C3 as a sample holder. The sample holder C3 collects the voltage signal output by the third difference module when the NMOS tube T3 is turned on, and the collected signal is amplified by the proportional module and outputs the feedback voltage signal. When the voltage input to the controlled voltage side of the ninth and tenth voltage control units exceeds the set 3.5V threshold voltage VT, the controlled voltage side of each voltage control unit is turned on. The ninth summing module adds the output of the controlled voltage side of the ninth voltage control unit and the output of the same logic gate D21 as the output of the ninth summing module; the third difference module subtracts the power supply V7 from the output of the ninth summing module as the output of the third difference module. The ninth voltage control unit includes a voltage control switch S16 and a resistor R76; the tenth voltage control unit includes a voltage control switch S15 and a resistor R73; the ninth summing module includes an operational amplifier OP20, a resistor R71, a resistor R72, a resistor R74 and a resistor R75; the third difference module includes an operational amplifier OP19, a resistor R68, a resistor R69, a resistor R70 and a memristor M2.
[0070] The habituation feedback module includes a voltage-controlled switch S13 and a third proportional module. The output of the same logic gate D11 in the habituation control module is connected to the positive input terminal of the voltage-controlled switch S13, the negative input terminal of the voltage-controlled switch S13 is grounded, the source of the NMOS tube T3 is connected to the input terminal of the controlled voltage side of the voltage-controlled switch S13, the output terminal of the voltage-controlled switch S13 is connected to the input terminal of the third proportional module, the output terminal of the third proportional module is connected to the other input terminal of the seventh summation module in the habituation control module, and the voltage-controlled switch S13 outputs the voltage signal collected by the sample holder C3 during the habituation period. The spontaneous recovery feedback module includes a voltage-controlled switch S14 and a fourth proportional module. The output end of the AND gate D16 in the reinforcement and recovery control module is connected to the positive input end of the voltage-controlled switch S14, the negative input end of the voltage-controlled switch S14 is grounded, the source of the NMOS tube T3 is connected to the input end of the controlled voltage side of the voltage-controlled switch S14, the output end of the controlled voltage side of the voltage-controlled switch S14 is connected to the input end of the fourth proportional module, the output end of the fourth proportional module is connected to the spontaneous recovery module, and the voltage-controlled switch S14 outputs the voltage signal collected by the sample holder C3 during the spontaneous recovery period. The third proportional module and the fourth proportional module perform proportional operations. The third proportional module includes an operational amplifier OP15, an operational amplifier OP16 and resistors R60~R63; the fourth proportional module includes an operational amplifier OP17, an operational amplifier OP18 and resistors R64~R67.
[0071] like Figure 5 As shown, the spontaneous recovery module includes a voltage comparison module, a start-up module and a recovery voltage module. The voltage comparison module is connected to the logic control module and the habituation module, the start-up module is connected to the logic control module, and the recovery voltage module is connected to the voltage comparison module, the start-up module, the logic control module and the reinforcement module respectively. The voltage comparison module stops outputting signals to the recovery voltage module when the resistance value of the memristor M1 of the habituation synapse module of the habituation module is restored to the initial value of 1K; the start-up module generates a 0.09S pulse signal at the moment of spontaneous recovery to make the voltage comparison module work at the beginning of spontaneous recovery; the recovery voltage module applies a spontaneous recovery voltage to the habituation module.
[0072] The voltage comparison module includes a voltage-controlled switch S17, a diode Diode1, a fifth proportional module, a fourth difference module, a tenth summation module, a power supply V8, a power supply V9, an NMOS tube T4, a PMOS tube T5, a resistor R77, a resistor R86 and a resistor R87 and a logic gate D23. The output end of the AND gate D16 in the reinforcement and recovery control module is connected to the positive input end of the voltage-controlled switch S17, the negative end of the memristor M1 in the habituation synapse module is connected to the input end of the controlled voltage side of the voltage-controlled switch S17, the output end and the negative input end of the controlled voltage side of the voltage-controlled switch S17 are both grounded, and the voltage-controlled switch S17 is a spontaneous recovery circuit when a spontaneous recovery voltage signal exists. The output end of the controlled voltage side of the voltage-controlled switch S6 of the sixth voltage-controlled unit in the strengthening and recovery control module is respectively connected to the input end of the diode Diode1 and one end of the resistor R77, the output end of the diode Diode1 is connected to the input end of the fifth proportional module, the other end of the resistor R77 is respectively connected to the positive end of the memristor M1 in the habituation module and the gate of the NMOS tube T4, the output end of the fifth proportional module is respectively connected to an input end of the fourth difference module, an input end of the tenth summation module and one end of the resistor R86, the positive electrode of the power supply V8 The output terminal of the fourth difference module is connected to the other input terminal of the fourth difference module, the positive electrode of the power supply V9 is connected to the other input terminal of the tenth summation module, the negative electrodes of the power supply V8 and the power supply V9 are both grounded, the output terminal of the fourth difference module is connected to the source of the NMOS tube T4, the output terminal of the tenth summation module is connected to the source of the PMOS tube T5, the drain of the NMOS tube T4 is connected to the other end of the resistor R86 and the gate of the PMOS tube T5, the drain of the PMOS tube T5 is connected to one end of the resistor R87 and the input terminal of the same logic gate D23, and the other end of the resistor R87 is grounded. The output terminal of the same logic gate D23 is connected to the input terminal of the recovery voltage module. The fifth proportion module performs proportion operation; the fourth difference module subtracts the power supply V8 from the output of the fifth proportion module as the output of the fourth difference module; the tenth summation module adds the output of the fifth proportion module and the power supply V9 as the output of the tenth summation module.
[0073] Diode Diode1 ensures that the voltage comparison module can only input voltage signals; NMOS tube T4 and PMOS tube T5 are turned on and off according to the voltage signal applied by the gate. NMOS tube T4 and PMOS tube T5 are the core components of the voltage comparison module. The logic gate D23 outputs a logic signal to the input of the eleventh summing module according to the voltage signal output by the drain of the PMOS tube T5. The output of the eleventh summing module controls the application of the spontaneous recovery voltage signal by controlling the on and off of the voltage-controlled switch S19. When the difference between the output voltage of the fifth proportional module and the gate input voltage of the NMOS tube T4 is greater than 0.8V, the NMOS tube T4 is turned on and the output of the fourth source difference module is input to the gate of the PMOS tube T5. When the difference between the source voltage signal of the NMOS tube T4 and the gate input voltage of the PMOS tube T5 is less than -1.7V, the PMOS tube T5 is turned on and the output of the tenth source summing module of the PMOS tube T5 is input to the same logic gate D23. The same logic gate D23 outputs a high-level signal. When the voltage across the resistor R77 is reduced to about half of the spontaneous recovery input voltage, the same logic gate D23 outputs a low-level signal. When the difference between the output voltage of the fifth proportional module and the gate input voltage of the NMOS tube T4 is less than 0.8V, both the NMOS tube T4 and the PMOS tube T5 are not turned on, and the same logic gate D23 outputs a low-level signal.
[0074] The startup module includes an eleventh voltage control unit and a fifth difference module. The output end of the AND gate D16 in the strengthening and recovery control module is respectively connected to the input end and the positive input end of the controlled voltage side of the eleventh voltage control unit and an input end of the fifth difference module. The output end of the controlled voltage side of the eleventh voltage control unit is connected to the other input end of the fifth difference module, and the output end of the fifth difference module is connected to the input end of the recovery voltage module. When the input end of the eleventh voltage control unit exceeds its own threshold, the controlled voltage side of the eleventh voltage control unit is turned on. The fifth difference module is to subtract the output of the controlled voltage side of the eleventh voltage control unit from the output of the AND gate D16 as the output of the fifth difference module. The eleventh voltage control unit includes a voltage-controlled switch S18 and a resistor R95; the fifth difference module includes an operational amplifier OP25, a resistor R92, a resistor R93, a resistor R94 and a resistor R96.
[0075] The recovery voltage module includes a voltage-controlled switch S19, a power supply V10, an eleventh summing module and a twelfth summing module. The output end of the same logic gate D23 in the voltage comparison module is connected to an input end of the eleventh summing module. The output end of the fifth difference module in the startup module is connected to another input end of the eleventh summing module. The output end of the eleventh summing module is connected to the positive input end of the voltage-controlled switch S19. The negative input end of the voltage-controlled switch S19 is grounded. The output end of the controlled voltage side of the voltage-controlled switch S19 is connected to the input end of the controlled voltage side of the sixth voltage-controlled unit in the reinforcement and recovery control module. One input end of the twelfth summing module is connected to the output end of the fourth proportional module in the spontaneous recovery feedback module. The other input end of the twelfth summing module is connected to the positive pole of the power supply V10, and the negative pole of the power supply V10 is grounded. The output end of the twelfth summing module is connected to the input end of the controlled voltage side of the voltage-controlled switch S19. The eleventh summing module adds the output of the fifth difference module and the output of the same logic gate D23 as the output of the eleventh summing module; the twelfth summing module adds the output of the fourth proportional module and the power supply V10 as the output of the twelfth summing module. The eleventh summing module includes an operational amplifier OP26 and resistors R97~R100; the twelfth summing module includes an operational amplifier OP27 and resistors R101~R104.
[0076] The first proportional module includes an operational amplifier OP8, an operational amplifier OP9, a resistor R37, a resistor R38, a resistor R39, an NMOS tube T1 and a memristor M1, the positive terminal of the memristor M1 is the input terminal of the first proportional module, the drain of the NMOS tube T1 is connected to the negative terminal of the memristor M1, the source of the NMOS tube T1 is connected to the inverting input terminal of the operational amplifier OP8, one end of the resistor R37 is connected to the inverting input terminal of the operational amplifier OP8, the other end of the resistor R37 is connected to the output terminal of the operational amplifier OP8, the non-inverting input terminal of the operational amplifier OP8 is grounded, one end of the resistor R38 is connected to the output terminal of the operational amplifier OP8, the other end of the resistor R38 is connected to the inverting input terminal of the operational amplifier OP9, one end of the resistor R39 is connected to the inverting input terminal of the operational amplifier OP9, the other end of the resistor R39 is connected to the output terminal of the operational amplifier OP9, the non-inverting input terminal of the operational amplifier OP9 is grounded, and the output of the operational amplifier OP9 is the output of the first proportional module. The second proportional module, the third proportional module, the fourth proportional module and the fifth proportional module all include an operational amplifier OP12, an operational amplifier OP13, a resistor R51, a resistor R52, a resistor R53 and a resistor R54, one end of the resistor R51 is the input end of the second proportional module, the other end of the resistor R51 is connected to the inverting input end of the operational amplifier OP12, one end of the resistor R52 is connected to the inverting input end of the operational amplifier OP12 and the other end of the resistor R52 is connected to the output end of the operational amplifier OP12, the non-inverting input end of the operational amplifier OP12 is grounded, one end of the resistor R53 is connected to the output end of the operational amplifier OP12, the other end of the resistor R53 is connected to the inverting input end of the operational amplifier OP13, one end of the resistor (R54) is connected to the inverting input end of the operational amplifier OP13, the other end of the resistor R54 is connected to the output end of the operational amplifier OP13, the non-inverting input end of the operational amplifier OP13 is grounded, and the output of the operational amplifier OP13 is the output of the second proportional module.
[0077] The first difference-finding module, the second difference-finding module, the third difference-finding module, the fourth difference-finding module and the fifth difference-finding module all include a resistor R43 or a memristor M2, a resistor R44, a resistor R45, a resistor R46 and an operational amplifier OP10, one end of the resistor R43 and the resistor R45 are respectively two input ends of the first difference-finding module, the other end of the resistor R43 is connected to the in-phase input end of the operational amplifier OP10, the other end of the resistor R45 is connected to the inverting input end of the operational amplifier OP10, one end of the resistor R44 is connected to the in-phase input end of the operational amplifier OP10, the other end of the resistor R44 is grounded, one end of the resistor R46 is connected to the inverting input end of the operational amplifier OP10, the other end of the resistor R46 is connected to the output end of the operational amplifier OP10, and the output of the operational amplifier OP10 is the output of the first difference-finding module.
[0078] Figure 6 (a) is a simulation diagram of emotion habituation and spontaneous recovery when a positive weak stimulus habituation signal source is input. 0~5s is the habituation stage of happy emotion. The happy emotion signal does not change when the positive weak stimulus habituation signal is continuously applied for 5~6s, indicating that the happy emotion has become habituated. 6~12.3s is the spontaneous recovery stage of habituation. Figure 6 (b) is a simulation diagram of emotion habituation and spontaneous recovery when a positive moderate stimulus habituation signal source is input. 0~6s is the habituation stage of happy emotion. The happy emotion signal does not change when the positive moderate stimulus habituation signal is continued to be applied for 6~7s, indicating that the happy emotion has become habituated. 7~13.5s is the habituation spontaneous recovery stage. Figure 6 (c) is the emotion habituation simulation diagram when the negative weak stimulus habituation signal source and the negative medium stimulus habituation signal source are input. The fear emotion signal output when the negative stimulus signal source is input does not change. Figure 2 It can be seen that the emotional responses induced by positive stimuli, regardless of their intensity, showed significant habituation, while the emotional responses induced by negative stimuli of different intensities did not show habituation. In addition, low-intensity stimuli showed more significant habituation than high-intensity stimuli.
[0079] Figure 7 (a) is a habituation simulation diagram of the dehabituation stimulus under the condition of positive weak stimulus habituation. 0~5s is the habituation of happy emotions induced by the positive weak stimulus habituation signal source, 5~6s is the test of whether the habituation of happy emotions is completely formed, and 6~9s is the dehabituation stimulus signal. It can be seen that with the application of the dehabituation stimulus signal, the happy emotions caused by the dehabituation stimulus also become habituated. Figure 7(b) is a habituation simulation diagram of the dehabituation stimulus under the condition of positive moderate stimulus habituation. 0~6s is the habituation of happy emotion induced by the positive moderate stimulus habituation signal source, 6~7s is the test of whether the habituation of happy emotion is completely formed, and 7~10s is the dehabituation stimulus signal. It can be seen that with the application of the dehabituation stimulus signal, the happy emotion caused by the dehabituation stimulus also becomes habituated.
[0080] Figure 8 (a) is a simulation diagram of secondary emotional habituation and spontaneous recovery under a positive weak stimulus signal source. 0~5s is the first habituation, 5~11s is the first spontaneous recovery, 15~19s is the second habituation, and 19~26s is the second spontaneous recovery. Figure 8 (b) is a simulation diagram of secondary emotional habituation and spontaneous recovery under a positive medium stimulus signal source, 0~6s is the first habituation, 6~12.2s is the first spontaneous recovery, 15~20s is the second habituation, and 20~27.3s is the second spontaneous recovery. Figure 4 It can be seen that the second emotional habituation is faster than the first, and the second spontaneous recovery is slower than the first; low-intensity stimulation is more likely to become habituated than high-intensity stimulation.
[0081] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A visually induced emotional habituation neural network circuit, It is characterized in that The system comprises an input signal source, an input module, a logic control module, a habituation module, a reinforcement module and a spontaneous recovery module, wherein the input signal source is connected to the input module and the logic control module respectively, the input module is connected to the logic control module, the logic control module is connected to the habituation module, the reinforcement module and the spontaneous recovery module respectively, the reinforcement module is connected to the habituation module and the spontaneous recovery module respectively, the spontaneous recovery module is connected to the habituation module, and the habituation module outputs a fear or happiness emotion signal; the input module transforms the amplitude and effective level of the input signal source; the logic control module generates control signals for controlling the habituation module, the reinforcement module and the spontaneous recovery module respectively according to the outputs of the input signal source and the input module; the habituation module realizes the functions of habituation formation, recovery and output; the reinforcement module outputs habituation and spontaneous recovery feedback signals according to the previously received stimulation; The spontaneous recovery module recovers the habituation that has been formed when no stimulation is applied; The input signal source includes a positive strong stimulation dehabituation signal source N1, a positive weak stimulation habituation signal source N2, a positive medium stimulation habituation signal source N3, a negative weak stimulation habituation signal source N4 and a negative medium stimulation habituation signal source N5; the positive strong stimulation dehabituation signal source N1, the positive weak stimulation habituation signal source N2, the positive medium stimulation habituation signal source N3, the negative weak stimulation habituation signal source N4 and the negative medium stimulation habituation signal source N5 are all connected to the input module, and the positive strong stimulation dehabituation signal source N1, the positive weak stimulation habituation signal source N2, the positive medium stimulation habituation signal source N3, the negative weak stimulation habituation signal source N4 and the negative medium stimulation habituation signal source N5 are all connected to the logic control module.
2. The visually induced emotion habituation characteristic neural network circuit according to claim 1, It is characterized in that The input module includes a positive strong stimulus dehabituation signal receiving and processing unit, a positive weak stimulus habituation signal receiving and processing unit, a positive medium stimulus habituation signal receiving and processing unit, a negative weak stimulus habituation signal receiving and processing unit, and a negative medium stimulus habituation signal receiving and processing unit. The positive strong stimulus dehabituation signal source N1 is connected to the input end of the positive strong stimulus dehabituation signal receiving and processing unit, and the output end of the positive strong stimulus dehabituation signal receiving and processing unit is connected to the logic control module; the positive weak stimulus habituation signal source N2 is connected to the input end of the positive weak stimulus habituation signal receiving and processing unit, and the output end of the positive weak stimulus habituation signal receiving and processing unit is connected to the logic control module. The positive medium stimulation habituation signal source N3 is connected to the input end of the positive medium stimulation habituation signal receiving and processing unit, and the output end of the positive medium stimulation habituation signal receiving and processing unit is connected to the logic control module; the negative weak stimulation habituation signal source N4 is connected to the input end of the negative weak stimulation habituation signal receiving and processing unit, and the output end of the negative weak stimulation habituation signal receiving and processing unit is connected to the logic control module; the negative medium stimulation habituation signal source N5 is connected to the input end of the negative medium stimulation habituation signal receiving and processing unit, and the output end of the negative medium stimulation habituation signal receiving and processing unit is connected to the logic control module; The positive strong stimulation dehabituation signal receiving and processing unit includes a first voltage control unit and a same logic gate D1, a positive strong stimulation dehabituation signal source N1 is connected to the input end of the first voltage control unit, an output end of the first voltage control unit is connected to the input end of the same logic gate D1, and an output end of the same logic gate D1 is connected to a logic control module; the positive weak stimulation habituation signal receiving and processing unit includes a second voltage control unit and a same logic gate D2, a positive weak stimulation habituation signal source N2 is connected to the input end of the second voltage control unit, an output end of the second voltage control unit is connected to the input end of the same logic gate D2, and an output end of the same logic gate D2 is connected to the logic control module; the positive medium stimulation habituation signal receiving and processing unit includes a third voltage control unit and a same logic gate D3, a positive medium stimulation habituation signal source N3 is connected to the third The input end of the voltage control unit and the output end of the third voltage control unit are connected to the input end of the same logic gate D3, and the output end of the same logic gate D3 is connected to the logic control module; the negative weak stimulation habituation signal receiving and processing unit includes a fourth voltage control unit and a same logic gate D4, the negative weak stimulation habituation signal source N4 is connected to the input end of the fourth voltage control unit, the output end of the fourth voltage control unit is connected to the input end of the same logic gate D4, and the output end of the same logic gate D4 is connected to the logic control module; the negative medium stimulation habituation signal receiving and processing unit includes a fifth voltage control unit and a same logic gate D5, the negative medium stimulation habituation signal source N5 is connected to the input end of the fifth voltage control unit, the output end of the fifth voltage control unit is connected to the input end of the same logic gate D5, and the output end of the same logic gate D5 is connected to the logic control module.
3. The visually induced emotion habituation characteristic neural network circuit according to claim 2, It is characterized in that The logic control module includes a summing module, a dehabituation control module, a habituation control module, and a reinforcement and recovery control module. The output end of the input module is connected to the input end of the summing module and the dehabituation control module respectively, and the input signal source is connected to the input end of the summing module and the reinforcement and recovery control module respectively; the positive strong stimulation dehabituation signal source N1 is connected to the input end of the spontaneous recovery module, and the positive weak stimulation habituation signal source N2, the positive medium stimulation habituation signal source N3, the negative weak stimulation habituation signal source N4, and the negative medium stimulation habituation signal source N5 are all connected to the input end of the summing module; the input end of the dehabituation control module is connected to the input module. The output ends of the positive strong stimulus dehabituation signal receiving and processing unit of the block are connected, the output ends of the positive weak stimulus habituation signal receiving and processing unit, the positive medium stimulus habituation signal receiving and processing unit, the negative weak stimulus habituation signal receiving and processing unit and the negative medium stimulus habituation signal receiving and processing unit of the input module are all connected to the input end of the summing module, the output end of the summing module is respectively connected to the input end of the habituation control module and the habituation control module; the output ends of the dehabituation control module and the habituation control module are both connected to the input end of the habituation module, and the output ends of the reinforcement and recovery control module are respectively connected to the input ends of the reinforcement module and the spontaneous recovery module.
4. The visually induced emotion habituation characteristic neural network circuit according to claim 3, It is characterized in that The dehabituation control module includes a same logic gate D6, a same logic gate D7 and a voltage-controlled switch S6, the input ends of the same logic gate D6 and the same logic gate D7 and the input voltage of the controlled voltage side of the voltage-controlled switch S6 are all connected to the output end of the positive strong stimulation dehabituation signal receiving and processing unit of the input module, the output ends of the same logic gate D6 and the same logic gate D7 and the output voltage of the controlled voltage side of the voltage-controlled switch S6 are all connected to the input end of the habituation module, the output end of the same logic gate D7 is connected to the positive input end of the voltage-controlled switch S6, and the negative input end of the voltage-controlled switch S6 is grounded; The summing module includes a first summing module and a second summing module, the input end of the first summing module is respectively connected to the output ends of the positive weak stimulation habituation signal receiving and processing unit and the positive medium stimulation habituation signal receiving and processing unit of the input module, the input end of the second summing module is respectively connected to the output ends of the negative weak stimulation habituation signal receiving and processing unit and the negative medium stimulation habituation signal receiving and processing unit of the input module, the output ends of the first summing module and the second summing module are both connected to the sixth summing module, the output ends of the sixth summing module are respectively connected to the habituation control module and the reinforcement module, and the output ends of the second summing module and the first summing module are both connected to the habituation module; The habituation control module includes a same logic gate D10, a same logic gate D12, an AND gate D13, a NOT gate D14, a voltage-controlled switch S7 and a seventh summing module. The output end of the sixth summing module is respectively connected to the input ends of the same logic gate D10, the same logic gate D12 and an input end of the seventh summing module. The output end of the AND gate D16 of the strengthening and recovery control module is connected to the input end of the NOT gate D14. The output ends of the same logic gate D12 and the NOT gate D14 are both connected to the input end of the gate D13. The voltage-controlled switch S7 is connected to the input end of the gate D14. The positive input terminal of the switch S7 is connected to the output terminal of the AND gate D13, and the negative input terminal of the voltage-controlled switch S7 is grounded; the other input terminal of the seventh summing module is connected to the output terminal of the strengthening module, the output terminal of the seventh summing module is connected to the input terminal of the controlled voltage side of the voltage-controlled switch S7, the input terminal of the same logic gate D9 is connected to the output terminal of the first summing module, and the output terminals of the same logic gate D9 and the same logic gate D10, and the output terminal of the controlled voltage side of the voltage-controlled switch S7 are all connected to the habituation module; The positive weak stimulus habituation signal source N2 is connected to an input end of the third summing module, the other input end of the third summing module is connected to the positive medium stimulus habituation signal source N3, the negative weak stimulus habituation signal source N4 is connected to an input end of the fourth summing module, the other input end of the fourth summing module is connected to the negative medium stimulus habituation signal source N5, the output end of the third summing module is connected to an input end of the fifth summing module, the other input end of the fifth summing module is connected to the output end of the fourth summing module, and the output end of the fifth summing module is connected to the input end of the same logic gate D19 in the reinforcement and recovery control module; The reinforcement and recovery control module includes a third summing module, a fourth summing module, a fifth summing module, a NOT gate D15, a NOT gate D17, a NOT gate D20, a NOT gate D22, a same logic gate D19, a same logic gate D21, an AND gate D16, an AND gate D18, a D flip-flop DFF1 and a sixth voltage control unit, a positive strong stimulation dehabituation signal source N1 is respectively connected to the CLK terminal of the D flip-flop DFF1 and the input terminal of the NOT gate D15, and a D terminal of the D flip-flop DFF1 is connected to the D terminal of the D flip-flop DFF1. The output end of the fifth summing module is connected to the input end of the same logic gate D19, the output end of the same logic gate D19 is connected to the input end of the non-gate D20, the output end of the non-gate D20 is connected to the input end of the AND gate D18, the output ends of the non-gate D15 and the AND gate D18 are both connected to the input end of the AND gate D16, the output end of the AND gate D16 is respectively connected to the input end of the sixth voltage control unit, the input end of the non-gate D14 in the habituation control module, the input end of the same logic gate D21, the input end of the strengthening module and the input end of the spontaneous recovery module, the input end and the output end of the controlled voltage side of the sixth voltage control unit are both connected to the spontaneous recovery module, the output end of the fourth summing module is connected to the input end of the non-gate D22, and the output ends of the non-gate D22 and the same logic gate D21 are both connected to the input end of the strengthening module.
5. The visually induced emotion habituation characteristic neural network circuit according to any one of claims 2 to 4, It is characterized in that The habituation module includes a habituation synapse module and a habituation output module. The output ends of the dehabituation control module and the habituation control module in the logic control module are connected to the habituation synapse module, the output ends of the dehabituation control module and the habituation control module are connected to the habituation output module, the habituation synapse module is connected to the habituation output module, and the habituation output module outputs a fear emotion signal N6 or a happiness emotion signal N7.
6. The visually induced emotion habituation characteristic neural network circuit according to claim 5, It is characterized in that The habituation synapse module includes a memristor M1, an NMOS tube T1, an NMOS tube T2 and a first proportional module, the output end of the controlled voltage side of the voltage-controlled switch S6 of the dehabituation control module is respectively connected to the positive terminal of the memristor M1 and the drain of the NMOS tube T2, the output end of the same logic gate D6 is connected to the gate of the NMOS tube T1, the output end of the same logic gate D10 of the habituation control module is connected to the gate of the NMOS tube T2, the output end of the voltage-controlled switch S7 of the habituation control module is connected to the negative terminal of the memristor M1, the positive terminal of the memristor M1 is connected to the drain of the NMOS tube T2, the negative terminal of the memristor M1 is connected to the drain of the NMOS tube T1, the source of the NMOS tube T1 is connected to the first proportional module, the resistor R35 and the capacitor C1 are connected in parallel; the source of the NMOS tube T2 is connected to the first proportional module; The habituation output module includes a voltage-controlled switch S9, a voltage-controlled switch S11, a seventh voltage-controlled unit, an eighth voltage-controlled unit, an eighth summing module, a first difference-finding module, a second difference-finding module and a second proportional module. The output end of the same logic gate D7 of the de-habituation control module is respectively connected to the positive input end of the voltage-controlled switch S9 and the input end of the seventh voltage-controlled unit. The output end of the same logic gate D9 in the habituation control module is connected to the positive input end of the voltage-controlled switch S11. The negative input ends of the voltage-controlled switch S9 and the voltage-controlled switch S11 are both grounded. The input ends of the controlled voltage sides of the voltage-controlled switch S9 and the voltage-controlled switch S11 are both connected to the output end of the first proportional module of the habituation synapse module. The output end of the voltage-controlled switch S9 is respectively connected to one end of the resistor R40 and an input end of the first difference-finding module. The output end of the controlled voltage side of the voltage-controlled switch S11 is connected to the resistor R40. 1 is connected to an input end of the second proportional module, and the other ends of the resistor R40 and the resistor R41 are both grounded; the output end of the seventh voltage control unit is connected to the other input end of the first difference module, the input end of the eighth summing module is respectively connected to the output ends of the first difference module and the second proportional module, the output end of the eighth summing module is connected to an input end of the second difference module, the other input end of the second difference module is connected to the output end of the third proportional module in the reinforcement module, and the output end of the second difference module is output as a happy emotion signal N7; the input end of the eighth voltage control unit is connected to the output end of the same logic gate D8 in the habituation control module, the input end of the controlled voltage side of the eighth voltage control unit is connected to the output end of the first proportional module in the habituation synapse module, and the output end of the controlled voltage side of the eighth voltage control unit is output as a fear emotion signal N6.
7. The visually induced emotion habituation characteristic neural network circuit according to any one of claims 2 to 4 and 6, It is characterized in that The reinforcement module includes a rate change module, a habituation feedback module and a spontaneous recovery feedback module. The input end of the rate change module is connected to the output end of the recovery control module of the reinforcement and logic control module, the output end of the rate change module is connected to the input ends of the habituation feedback module and the spontaneous recovery feedback module respectively, the output end of the habituation feedback module is connected to the input end of the habituation control module of the logic control module, and the output end of the spontaneous recovery feedback module is connected to the spontaneous recovery module; the rate change module outputs a feedback signal according to the habituation stimulus signal applied previously; the habituation feedback module amplifies the output of the rate change module and feeds it back to the habituation signal source; the spontaneous recovery feedback module amplifies the output of the rate change module and feeds it back to the spontaneous recovery module as a spontaneous recovery signal source; The spontaneous recovery module includes a voltage comparison module, a start-up module and a recovery voltage module. The voltage comparison module is connected to the logic control module and the habituation module, the start-up module is connected to the logic control module, and the recovery voltage module is connected to the voltage comparison module, the start-up module, the logic control module and the reinforcement module respectively; the voltage comparison module stops outputting signals to the recovery voltage module when the resistance value of the memristor M1 of the habituation synapse module of the habituation module is restored to the initial value 1K; the start-up module generates a 0.09S pulse signal at the beginning of spontaneous recovery to enable the voltage comparison module to work at the beginning of spontaneous recovery; the recovery voltage module applies a spontaneous recovery voltage to the habituation module.
8. The visually induced emotion habituation characteristic neural network circuit according to claim 7, It is characterized in that The rate change module includes a ninth voltage control unit, a tenth voltage control unit, a ninth summing module, a third difference module and an NMOS tube T3. The output end of the NOT gate D22 of the strengthening and recovery control module of the logic control module is respectively connected to the positive input ends of the ninth voltage control unit and the tenth voltage control unit. The output end of the same logic gate D19 of the strengthening and recovery control module is connected to the input end of the controlled voltage side of the ninth voltage control unit. The output end of the same logic gate D21 in the strengthening and recovery control module is respectively connected to an input end of the ninth summing module and the input end of the controlled voltage side of the tenth voltage control unit. The output end of the controlled voltage side of the element is connected to the other input end of the ninth summing module, the output end of the controlled voltage side of the tenth voltage control unit is connected to the gate of the NMOS tube T3, the output end of the ninth summing module is connected to an input end of the third difference module, the other input end of the third difference module is connected to the positive electrode of the power supply V7, and the negative electrode of the power supply V7 is grounded; the output end of the third difference module is connected to the drain of the NMOS tube T3, the source of the NMOS tube T3 is respectively connected to the input ends of the habituation feedback module and the spontaneous recovery feedback module and one end of the capacitor C3, and the other end of the capacitor C3 is grounded; The habituation feedback module includes a voltage-controlled switch S13 and a third proportional module, the output of the same logic gate D11 of the habituation control module of the logic control module is connected to the positive input end of the voltage-controlled switch S13, the negative input end of the voltage-controlled switch S13 is grounded, the source of the NMOS tube T3 is connected to the input end of the controlled voltage side of the voltage-controlled switch S13, the output end of the voltage-controlled switch S13 is connected to the input end of the third proportional module, and the output end of the third proportional module is connected to the other input end of the seventh summing module in the habituation control module; The spontaneous recovery feedback module includes a voltage-controlled switch S14 and a fourth proportional module. The output end of the AND gate D16 in the strengthening and recovery control module is connected to the positive input end of the voltage-controlled switch S14, the negative input end of the voltage-controlled switch S14 is grounded, the source of the NMOS tube T3 is connected to the input end of the controlled voltage side of the voltage-controlled switch S14, the output end of the controlled voltage side of the voltage-controlled switch S14 is connected to the input end of the fourth proportional module, and the output end of the fourth proportional module is connected to the spontaneous recovery module.
9. The visually induced emotion habituation characteristic neural network circuit according to claim 8, It is characterized in that The voltage comparison module includes a voltage-controlled switch S17, a diode, a fifth proportional module, a fourth difference module, a tenth summation module, an NMOS tube T4, a PMOS tube T5 and an AND logic gate D23, the output end of the AND gate D16 of the reinforcement and recovery control module of the logic control module is connected to the positive input end of the voltage-controlled switch S17, the negative end of the memristor M1 in the habituation synapse module of the habituation module is connected to the input end of the controlled voltage side of the voltage-controlled switch S17, and the output end and the negative input end of the controlled voltage side of the voltage-controlled switch S17 are both grounded; The output end of the controlled voltage side of the voltage-controlled switch S6 of the sixth voltage-controlled unit of the strengthening and recovery control module is respectively connected to the input end of the diode and one end of the resistor R77, the output end of the diode is connected to the input end of the fifth proportional module, the other end of the resistor R77 is respectively connected to the positive end of the memristor M1 in the habituation module and the gate of the NMOS tube T4, the output end of the fifth proportional module is respectively connected to an input end of the fourth difference module, an input end of the tenth summation module and one end of the resistor R86, the other input end of the fourth difference module is connected to the positive electrode of the power supply V8, and the tenth summation module is connected to the positive electrode of the power supply V8. The other input end of the summing module is connected to the positive electrode of the power supply V9, and the negative electrodes of the power supply V8 and the power supply V9 are both grounded; the output end of the fourth difference module is connected to the source of the NMOS tube T4, the output end of the tenth summing module is connected to the source of the PMOS tube T5, the drain of the NMOS tube T4 is connected to the other end of the resistor R86 and the gate of the PMOS tube T5, the drain of the PMOS tube T5 is connected to one end of the resistor R87 and the input end of the same logic gate D23, and the other end of the resistor R87 is grounded; the output end of the same logic gate D23 is connected to the input end of the voltage recovery module; The startup module includes an eleventh voltage control unit and a fifth difference module, the output end of the AND gate D16 of the strengthening and recovery control module is respectively connected to the input end and the positive input end of the controlled voltage side of the eleventh voltage control unit and one input end of the fifth difference module, the output end of the controlled voltage side of the eleventh voltage control unit is connected to the other input end of the fifth difference module, and the output end of the fifth difference module is connected to the input end of the recovery voltage module; The recovery voltage module includes a voltage-controlled switch S19, an eleventh summing module and a twelfth summing module. The output end of the same logic gate D23 of the voltage comparison module is connected to an input end of the eleventh summing module, the output end of the fifth difference module of the startup module is connected to the other input end of the eleventh summing module, the output end of the eleventh summing module is connected to the positive input end of the voltage-controlled switch S19, the negative input end of the voltage-controlled switch S19 is grounded, the output end of the controlled voltage side of the voltage-controlled switch S19 is connected to the input end of the controlled voltage side of the sixth voltage-controlled unit of the enhancement and recovery control module, one input end of the twelfth summing module is connected to the output end of the fourth proportional module in the spontaneous recovery feedback module of the enhancement module, the other input end of the twelfth summing module is connected to the positive pole of the power supply V10, and the negative pole of the power supply V10 is grounded; the output end of the twelfth summing module is connected to the input end of the controlled voltage side of the voltage-controlled switch S19.
10. The visually induced emotion habituation characteristic neural network circuit according to claim 9, It is characterized in that The output end of the first summing module is connected to the input end of the same logic gate D8, and the output end of the same logic gate D8 is connected to the habituation module; the output end of the second summing module is connected to the same logic gate D9, and the same logic gate D9 is connected to the habituation module; The source of the NMOS transistor T1 is connected to one end of the resistor R35 and the capacitor C1 respectively, and the resistor R36 and the capacitor C2 are connected in parallel; the source of the NMOS transistor T2 is connected to one end of the resistor R36 and the capacitor C2 respectively, and the other ends of the resistor R35, the capacitor C1, the resistor R36 and the capacitor C2 are grounded; The first voltage-controlled unit, the second voltage-controlled unit, the third voltage-controlled unit, the fourth voltage-controlled unit, the fifth voltage-controlled unit and the seventh voltage-controlled unit all include a first voltage-controlled switch, a positive input terminal of the first voltage-controlled switch is connected to an input signal, a negative input terminal of the first voltage-controlled switch is grounded, an input terminal of a controlled voltage side of the first voltage-controlled switch is connected to a first power supply, and an output terminal of the controlled voltage side of the first voltage-controlled switch is connected to a first resistor and an output signal, respectively; The sixth voltage-controlled unit, the eighth voltage-controlled unit, the ninth voltage-controlled unit, the tenth voltage-controlled unit and the eleventh voltage-controlled unit all include a second voltage-controlled switch and a second resistor, a positive input terminal of the second voltage-controlled switch is connected to an input signal, a negative input terminal of the second voltage-controlled switch is grounded, an input terminal of a controlled voltage side of the second voltage-controlled switch is connected to one end of the second resistor, the other end of the second resistor is grounded, and an output terminal of the controlled voltage side of the second voltage-controlled switch is connected to an output signal; The first summing module, the second summing module, the third summing module, the fourth summing module, the fifth summing module, the sixth summing module, the seventh summing module, the eighth summing module, the ninth summing module, the tenth summing module, the eleventh summing module and the twelfth summing module all include a first operational amplifier, a non-inverting input terminal of the first operational amplifier is respectively connected to the third resistor and the fourth resistor, the third resistor and the fourth resistor are respectively connected to two input signals, an inverting input terminal of the first operational amplifier is respectively connected to the fifth resistor and the sixth resistor, the fifth resistor is grounded, the sixth resistor is connected to the output terminal of the first operational amplifier, and the output terminal of the first operational amplifier outputs the added signal; The first proportional module includes a second operational amplifier, a third operational amplifier, an NMOS tube T1 and a memristor M1, the positive terminal of the memristor M1 is the input terminal of the first proportional module, the drain of the NMOS tube T1 is connected to the negative terminal of the memristor M1, the source of the NMOS tube T1 is respectively connected to the inverting input terminal of the second operational amplifier and the seventh resistor, the seventh resistor is connected to the output terminal of the second operational amplifier, and the non-inverting input terminal of the second operational amplifier is grounded; the output terminal of the second operational amplifier is connected to the eighth resistor, the eighth resistor is respectively connected to the inverting input terminal of the third operational amplifier and the tenth resistor, the tenth resistor is connected to the output terminal of the third operational amplifier, the non-inverting input terminal of the third operational amplifier is grounded, and the output of the third operational amplifier is the output of the first proportional module; The second proportion module, the third proportion module, the fourth proportion module and the fifth proportion module all include a fourth operational amplifier and a fifth operational amplifier, the inverting input terminal of the fourth operational amplifier is connected to one end of the eleventh resistor, one end of the first resistor is the input terminal of the second proportion module, the inverting input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier through the twelfth resistor, the non-inverting input terminal of the fourth operational amplifier is grounded, the output terminal of the fourth operational amplifier is connected to one end of the thirteenth resistor, the other end of the thirteenth resistor is respectively connected to the inverting input terminal of the fifth operational amplifier and the fourteenth resistor, the fourteenth resistor is connected to the output terminal of the fifth operational amplifier, the non-inverting input terminal of the fifth operational amplifier is grounded, and the output of the fifth operational amplifier is the output of the second proportion module; The first difference-finding module, the second difference-finding module, the fourth difference-finding module and the fifth difference-finding module all include a sixth operational amplifier, the in-phase input terminal of the sixth operational amplifier is connected to one end of the fifteenth resistor, the inverting input terminal of the sixth operational amplifier is connected to the other end of the sixteenth resistor, one end of the fifteenth resistor and one end of the sixteenth resistor are two input terminals thereof, the in-phase input terminal of the sixth operational amplifier is grounded through a seventeenth resistor; the inverting input terminal of the sixth operational amplifier is connected to the output terminal of the sixth operational amplifier through an eighteenth resistor, and the output of the sixth operational amplifier is its output; The third difference module includes a seventh operational amplifier, the non-inverting input terminal of the seventh operational amplifier is connected to one end of the memristor M2, the inverting input terminal of the seventh operational amplifier is connected to one end of the nineteenth resistor, the other end of the memristor M2 and the nineteenth resistor are its two input terminals respectively, the non-inverting input terminal of the seventh operational amplifier is grounded through the twentieth resistor; the inverting input terminal of the sixth operational amplifier is connected to the output terminal of the seventh operational amplifier through the twenty-first resistor, and the output of the seventh operational amplifier is its output.
