An antimony impurity doped wafer and a method for manufacturing the same

Abstract

The application provides an antimony impurity doped wafer and a preparation method thereof. A double-temperature-zone method is used to control a temperature field of a source region and a diffusion temperature of a wafer region respectively. The accurate control of the temperature of the source region can ensure the volatilization steam concentration of antimony oxide, and the accurate control of the temperature of the wafer region can ensure the longitudinal depth of impurity diffusion while ensuring the wafer surface quality. Compared with the prior art, the application can significantly improve the impurity doping concentration and diffusion depth of the wafer surface, and has obvious effects on reducing the series resistance of the collector of an NPN transistor. Meanwhile, the high-precision doping of the antimony impurity can be realized through one process step, 200 wafers can be processed per furnace, the production efficiency is greatly improved, and the production and processing cost is reduced.

Description

Technical Field

[0001] This invention belongs to the field of chip manufacturing technology, specifically relating to an antimony impurity-doped wafer and its preparation method. Background Technology

[0002] The buried layer process in bipolar integrated circuit fabrication aims primarily to reduce parasitic PNP effects and lower the collector series resistance Rcs of NPN transistors. Improving transistor characteristics requires high doping concentration in the buried layer, deep diffusion junctions, and a wafer surface free of defects such as alloy spots, black spots, and white haze. High requirements are also placed on doping uniformity, repeatability, and yield.

[0003] To reduce the collector series resistance Rcs of NPN transistors, most buried layer processes involve a two-step process of "antimony or arsenic implantation + high-temperature annealing". This method has low production efficiency and requires high-energy ion implanters and tubular diffusion furnaces. Summary of the Invention

[0004] To address the problems existing in the prior art, the present invention provides an antimony impurity doped wafer and its preparation method, which simplifies the antimony impurity doping steps and reduces the cost of antimony impurity doping.

[0005] This invention is achieved through the following technical solution:

[0006] A method for preparing an antimony-doped wafer, characterized by comprising the following steps:

[0007] S1: A masking film is grown on the wafer, and the buried antimony diffusion area is lithographically and etched according to the preset circuit and then cleaned.

[0008] S2: The cleaned wafer is placed in the constant temperature zone of the quartz furnace tube and heated using the dual temperature zone method. After the temperature stabilizes, antimony oxide is added to increase the temperature of the quartz furnace tube, and oxygen is introduced.

[0009] S3: After the wafer and antimony oxide are fully doped, the temperature of the quartz furnace tube is reduced to the preset value to complete the high-precision antimony impurity doped wafer.

[0010] Furthermore, the masking film grown on the wafer in step S1 is an 800-1100nm SiO2 masking film.

[0011] Furthermore, in step S1, the RCA method is used for cleaning during the photolithography and etching of the buried antimony diffusion region.

[0012] Furthermore, in step S2, the cleaned wafer is pushed into the isothermal zone of the quartz furnace tube wafer area at a speed of 15-30 cm / min.

[0013] Furthermore, the dual-temperature zone heating in step S2 is as follows: the source zone heating temperature in the quartz furnace tube is 680-720℃, the target temperature of the wafer zone is 1100-1150℃, the heating rate is 6-10℃ / min, and nitrogen gas is introduced at a flow rate of 2-6L / min.

[0014] Furthermore, in step S2, when adding antimony oxide to the quartz furnace tube, the antimony oxide needs to be placed in the quartz source bowl and pushed from the tail of the quartz tube into the isothermal zone of the source region at a speed of 10-25 nm / min.

[0015] Furthermore, in step S2, the temperature of the wafer region in the quartz furnace tube is raised to 1200-1300℃ at a heating rate of 6-10℃ / min, and nitrogen gas with a flow rate of 2-6L / min and oxygen gas with a flow rate of 1-5L / min are introduced and maintained for 2-4 hours.

[0016] Furthermore, in step S3, the preset values ​​for the temperature reduction of the quartz furnace tube are 700-800℃ for the wafer region, a cooling rate of 2-8℃ / min, and a nitrogen flow rate of 2-6L / min.

[0017] An antimony impurity-doped wafer is obtained based on a method for preparing an antimony impurity-doped wafer.

[0018] Furthermore, the antimony impurity doped wafer has a sheet resistance of 12-13 Ω / □, a diffusion junction depth of 5.5-6.0 μm, and a PN junction breakdown (1 μA) of 125-128 V.

[0019] Compared with the prior art, the present invention has the following beneficial technical effects:

[0020] This invention provides an antimony impurity-doped wafer and its preparation method. A masking film is grown on the wafer. A buried antimony diffusion region is formed by photolithography and etching according to a preset circuit and then cleaned. The cleaned wafer is placed in the isothermal zone of a quartz furnace tube and heated using a dual-temperature zone method. After the temperature stabilizes, antimony oxide is added to increase the temperature of the quartz furnace tube, and oxygen is introduced to protect the wafer surface and prevent corrosion from nitrogen at high temperatures. After the wafer and antimony oxide are fully doped, the temperature of the quartz furnace tube is reduced to a preset value to complete the high-precision antimony impurity-doped wafer. This application uses a dual-temperature zone method to separately control the temperature field of the source region and the wafer. The diffusion temperature of the source region can ensure the concentration of antimony oxide vapor by precise control of the source region temperature, and the longitudinal depth of impurity diffusion can be guaranteed while ensuring the wafer surface quality. Compared with the existing process methods, this application can significantly improve the impurity doping concentration and diffusion junction depth on the wafer surface, and has a significant effect on reducing the series resistance of the collector of NPN transistors. At the same time, this application can achieve high-precision doping of antimony impurities in one process step, and can process 200 wafers per batch, which greatly improves production efficiency and reduces production and processing costs. Attached Figure Description

[0021] Figure 1 This is a flowchart of a method for preparing antimony impurity-doped wafers according to the present invention.

[0022] Figure 2 This is a schematic diagram of antimony impurity doping in a specific embodiment of the present invention. Detailed Implementation

[0023] The present invention will be further described in detail below with reference to specific embodiments. These descriptions are for explanation purposes only and are not intended to limit the scope of the invention.

[0024] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0026] This invention provides a method for preparing antimony impurity-doped wafers, comprising the following steps:

[0027] S1: A masking film is grown on the wafer, and the buried antimony diffusion area is lithographically and etched according to the preset circuit and then cleaned.

[0028] S2: The cleaned wafer is placed in the constant temperature zone of the quartz furnace tube and heated using the dual temperature zone method. After the temperature stabilizes, antimony oxide is added to increase the temperature of the quartz furnace tube, and oxygen is introduced. Specifically, the oxygen is used to protect the wafer surface and prevent nitrogen from corroding the wafer surface during the heating process.

[0029] S3: After the wafer and antimony oxide are fully doped, the temperature of the quartz furnace tube is reduced to the preset value to complete the high-precision antimony impurity doped wafer.

[0030] Preferably, the masking film grown on the wafer in step S1 is an 800-1100 nm SiO2 masking film.

[0031] Preferably, in step S1, the RCA method is used for cleaning the photolithography and etching process to create the buried antimony diffusion region.

[0032] Preferably, in step S2, the cleaned wafer is pushed into the constant temperature zone of the quartz furnace tube wafer area at a speed of 15-30 cm / min.

[0033] Preferably, the dual-temperature zone heating in step S2 is as follows: the source zone heating temperature in the quartz furnace tube is 680-720℃, the target temperature of the wafer zone is 1100-1150℃, the heating rate is 6-10℃ / min, and nitrogen gas is introduced at a flow rate of 2-6L / min.

[0034] Preferably, when adding antimony oxide to the quartz furnace tube in step S2, the antimony oxide needs to be placed in the quartz source bowl and pushed from the tail of the quartz tube into the isothermal zone of the source region at a speed of 10-25 nm / min.

[0035] Preferably, in step S2, the temperature of the wafer region in the quartz furnace tube is raised to 1200-1300℃ at a heating rate of 6-10℃ / min, and nitrogen gas with a flow rate of 2-6L / min and oxygen gas with a flow rate of 1-5L / min are introduced and maintained for 2-4 hours.

[0036] Preferably, in step S3, the preset values ​​for the temperature reduction of the quartz furnace tube are 700-800℃ for the wafer region, the cooling rate is 2-8℃ / min, and the nitrogen flow rate is 2-6L / min.

[0037] Example 1:

[0038] by <111> Taking a P-type wafer with a specific crystal orientation as an example,

[0039] exist <111> An 800nm ​​SiO2 masking film is grown on the P-type wafer with crystal orientation. Based on the preset circuit design, the buried antimony diffusion region is lithographically and etched, and then the wafer is cleaned by the standard RCA method.

[0040] After cleaning, the wafers are vertically loaded onto a special quartz boat. Once loaded, the quartz boat is pushed into the constant temperature zone of the quartz furnace tube wafer area at a speed of 15 cm / min.

[0041] The source region temperature was set at 680℃, the target temperature of the wafer region was set at 1100℃, the heating rate was set at 6℃ / min, and the nitrogen flow rate in the furnace was 2L / min.

[0042] After the temperature of the wafer region reaches the set value and stabilizes, antimony oxide is placed in a special quartz source bowl and pushed into the constant temperature zone of the source region from the tail of the quartz tube at a speed of 10 cm / min. Then, the target temperature of the wafer region is set to 1200℃, the heating rate is set to 6℃ / min, the nitrogen flow rate in the furnace is 2L / min, and the oxygen flow rate is 1L / min. This temperature and atmosphere conditions are maintained for 2 hours.

[0043] After the holding time is completed, the target temperature of the wafer area is set to 700℃ and cooling begins at a rate of 2℃ / min, with a nitrogen flow rate of 2L / min inside the furnace. Once the target temperature stabilizes, the wafer-carrying quartz boat is pulled out of the quartz tube at a speed of 15cm / min.

[0044] The obtained antimony impurity-doped wafer has a square resistance of 12Ω / □, a diffusion junction depth of 6.0µm, a PN junction breakdown (1µA) of 125V, and one surface defect.

[0045] Example 2:

[0046] by <111> Taking a P-type wafer with a specific crystal orientation as an example,

[0047] exist <111> A 1100nm SiO2 masking film is grown on the P-type wafer with crystal orientation. Based on the preset circuit design, the buried antimony diffusion region is lithographically and etched, and then the wafer is cleaned by the standard RCA method.

[0048] After cleaning, the wafers are vertically loaded onto a special quartz boat. Once loaded, the quartz boat is pushed into the constant temperature zone of the quartz furnace tube wafer area at a speed of 30 cm / min.

[0049] The source region temperature was set at 720℃, the target temperature of the wafer region was set at 1150℃, the heating rate was set at 10℃ / min, and the nitrogen flow rate in the furnace was 6L / min.

[0050] After the temperature of the wafer region reaches the set value and stabilizes, antimony oxide is placed in a special quartz source bowl and pushed into the constant temperature zone of the source region from the tail of the quartz tube at a speed of 25 cm / min. Then, the target temperature of the wafer region is set to 1300℃, the heating rate is set to 10℃ / min, the nitrogen flow rate in the furnace is 6L / min, and the oxygen flow rate is 5L / min. This temperature and atmosphere conditions are maintained for 4 hours.

[0051] After the holding time is completed, the target temperature of the wafer area is set to 880℃ and cooling begins at a rate of 8℃ / min, with a nitrogen flow rate of 6L / min inside the furnace. Once the target temperature stabilizes, the wafer-carrying quartz boat is pulled out of the quartz tube at a speed of 30cm / min.

[0052] The obtained antimony impurity-doped wafer has a square resistance of 12Ω / □, a diffusion junction depth of 5.7µm, a PN junction breakdown (1µA) of 126V, and two surface defects.

[0053] Example 3:

[0054] by <111> Taking a P-type wafer with a specific crystal orientation as an example,

[0055] exist <111> A 950nm SiO2 masking film is grown on the P-type wafer with crystal orientation. Based on the preset circuit design, the buried antimony diffusion region is lithographically and etched, and then the wafer is cleaned by the standard RCA method.

[0056] After cleaning, the wafers are vertically loaded onto a special quartz boat. Once loaded, the quartz boat is pushed into the isothermal zone of the quartz furnace tube wafer area at a speed of 22.5 cm / min.

[0057] The source region temperature was set at 700℃, the target temperature of the wafer region was set at 1125℃, the heating rate was set at 8℃ / min, and the nitrogen flow rate in the furnace was 4L / min.

[0058] After the temperature of the wafer region reaches the set value and stabilizes, antimony oxide is placed in a special quartz source bowl and pushed into the constant temperature zone of the source region from the tail of the quartz tube at a speed of 17.5 cm / min. Then, the target temperature of the wafer region is set to 1250℃, the heating rate is set to 8℃ / min, the nitrogen flow rate in the furnace is 4L / min, and the oxygen flow rate is 3L / min. This temperature and atmosphere conditions are maintained for 3 hours.

[0059] After the holding time is completed, the target temperature of the wafer area is set to 790℃ and cooling begins at a rate of 5℃ / min, with a nitrogen flow rate of 4L / min inside the furnace. Once the target temperature stabilizes, the wafer-carrying quartz boat is pulled out of the quartz tube at a speed of 22.5cm / min.

[0060] The obtained antimony impurity-doped wafer has a square resistance of 13Ω / □, a diffusion junction depth of 5.5µm, a PN junction breakdown (1µA) of 128V, and 3 surface defects.

[0061] This invention provides an antimony impurity-doped wafer, which is obtained based on a method for preparing an antimony impurity-doped wafer; specifically, the sheet resistance of the antimony impurity-doped wafer is 12-13 Ω / □, the diffusion junction depth is 5.5-6.0 μm, and the PN junction breakdown voltage is 125-128 V at 1 μA.

[0062] Furthermore, the antimony impurity doped wafer obtained by the antimony impurity doped wafer preparation method described in this application is applied to the NPN transistor chip manufacturing process, and then fabricated on a semiconductor chip production line.

[0063] Two process designs were used for chip fabrication.

[0064] Process 1: The existing technology involves injecting "Sb element" and high-temperature annealing to achieve antimony layer doping; Process 2: The scheme of this application is adopted. The two processes were compared and processed. After the antimony embedding process is completed and the wafer is fabricated, the obtained wafer is tested before being unwound. The wafer is tested using the five-point method, that is, one die is randomly selected from the top, middle, bottom, left and right sides of the wafer for parameter testing.

[0065] Table 1 shows a comparison of the individual process parameters and wafer fabrication results for the two process methods.

[0066] Table 1. Comparison of individual process parameters and wafer fabrication results for the two process methods.

[0067]

[0068] Comparative tests were conducted on two different processes using different buried antimony layers. Compared with the buried antimony process in the prior art, the method of this application has lower sheet resistance, deeper diffusion junction, higher PN junction breakdown voltage, lower collector series resistance, and fewer surface defects after the buried antimony doping is completed.

[0069] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a wafer doped with antimony impurities, characterized by, The method comprises the following steps: S1: growing a mask film on a wafer, photoetching and etching a buried antimony diffusion region according to a preset circuit, and cleaning; S2: placing the cleaned wafer into a constant temperature zone of a quartz furnace tube to heat by a double-zone method, adding antimony oxide after the temperature is stable, increasing the temperature value of the quartz furnace tube, and inputting oxygen; the antimony oxide is placed into a quartz source bowl and pushed into the constant temperature zone of the source zone at a speed of 10-25 nm / min from the tail of the quartz tube of the quartz furnace tube; the double-zone method heating is that the heating temperature of the source zone in the quartz furnace tube is 680-720 DEG C, the target temperature of the wafer zone is 1100-1150 DEG C, the temperature rising rate is 6-10 DEG C / min, and the nitrogen gas input flow is 2-6 L / min; S3: after the wafer and the antimony oxide are fully doped, the temperature of the quartz furnace tube is reduced to a preset value, and a high-precision antimony impurity doped wafer is completed.

2. The method of claim 1, wherein the antimony-doped wafer is prepared by the steps of: The mask film grown on the wafer in the step S1 is an 800-1100 nm SiO2 mask film. ​ 3. The method for preparing an antimony-doped wafer according to claim 1, characterized in that, The RCA cleaning method is used when the buried antimony diffusion region is photoetched and etched in the step S1.

4. The method of claim 1, wherein the wafer is doped with antimony impurities. The cleaned wafer is pushed into the constant temperature zone of the wafer zone of the quartz furnace tube at a speed of 15-30 cm / min in the step S2.

5. The method of claim 1, wherein the wafer is doped with antimony impurities. In the step S2, the temperature of the wafer zone in the quartz furnace tube is increased to 1200-1300 DEG C, the temperature rising rate is 6-10 DEG C / min, the nitrogen gas input flow is 2-6 L / min, the oxygen gas input flow is 1-5 L / min, and the temperature is maintained for 2-4 hours.

6. The method of claim 1, wherein the wafer is a Sb-doped wafer. In the step S3, the preset value of the temperature reduction of the quartz furnace tube is that the temperature of the wafer zone is 700-800 DEG C, the temperature reduction rate is 2-8 DEG C / min, and the nitrogen gas input flow is 2-6 L / min.

7. A wafer doped with antimony impurities, characterized by, The method is based on any one of claims 1-6.

8. The antimony doped wafer of claim 7, wherein the antimony doped wafer has a resistivity of 0.1 ohm-cm to 10 ohm-cm. The sheet resistance of the antimony impurity doped wafer is 12-13 Ω / □, the diffusion junction depth is 5.5-6.0 μm, the PN junction breakdown voltage is 125-128 V when the PN junction leakage current is 1 μA.

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