Flyback converter and method of controlling the same

Abstract

The application discloses a flyback converter and a control method thereof. The flyback converter comprises a power switch connected between a primary winding and a reference ground; a rectifier connected between a secondary winding and an output terminal of the flyback converter; a current estimation circuit for performing volt-second operation according to a voltage across a first winding of the flyback converter and a preset proportional coefficient to obtain a first voltage signal representing excitation current information of the flyback converter, the first winding being one of windings of a transformer or an auxiliary winding coupled with one of the windings of the transformer; and a comparison circuit for generating an off trigger signal for controlling the power switch to be off when the first voltage signal reaches an output feedback signal. The application can obtain the primary excitation current to realize peak current control of the flyback converter without connecting a large sampling resistor in series in a power loop of the flyback converter, thereby improving system efficiency and reducing system cost.

Description

Technical Field

[0001] This invention relates to the field of converter technology, and more specifically to a flyback converter and its control method. Background Technology

[0002] With the rapid development of power electronics technology, people have increasingly higher requirements for the small size, high efficiency, and high reliability of switching converters. Flyback converters, due to their simple topology, fewer components, and low cost, are widely used in the electronics industry, including in switching power supplies.

[0003] refer to Figure 1 A typical flyback converter structure includes a primary power switch Q1 coupled to the primary winding Np of transformer TR, and a rectifier Q2 coupled to the secondary winding Ns of transformer TR. The primary controller 5 controls the switching on and off of the primary power switch Q1. The error amplification signal (denoted as Vcomp) generated by the secondary side, representing the output voltage Vo, is transmitted to the primary controller 5 through an optocoupler 61. This controller controls the switching on and off of the primary power switch Q1 to conduct the primary current (denoted as Is). The secondary rectifier Q2 serves as a supplement during operation. Rectifier Q2 can be either a rectifier diode or a synchronous rectifier. Using a synchronous rectifier improves efficiency, but it also requires a secondary controller, making the circuit structure more complex. Furthermore, when using a synchronous rectifier, the conduction periods of the primary power switch Q1 and the synchronous rectifier do not overlap. The current flowing in the secondary side of transformer TR is called the secondary current, which charges the output capacitor Co and provides the output voltage Vo.

[0004] like Figure 1 As shown, in the existing flyback converter, during the driving process, the feedback circuit 6 located on the secondary side of the flyback converter transmits the obtained error amplification signal Vcomp to the COMP pin of the primary-side controller 5 through the isolation device 61. The primary-side controller 5 generates a primary-side drive signal based on the error amplification signal Vcomp and the inductor current value sampled on the sampling resistor Rs, thereby controlling the on and off of the primary-side power switch Q1. However, the sampling resistor Rs connected in series in the primary-side power circuit of the flyback converter requires high precision and has a relatively large resistance value, which will occupy a large area in the converter circuit. This will undoubtedly increase the size of the flyback converter integrated circuit, resulting in a decrease in system efficiency and an increase in cost.

[0005] Therefore, it is necessary to provide improved technical solutions to overcome the above-mentioned technical problems existing in the prior art. Summary of the Invention

[0006] To address the aforementioned technical problems, this invention provides a flyback converter and its control method, which can obtain the primary-side excitation current to achieve peak current control of the flyback converter without connecting a sampling resistor in series in the power circuit of the flyback converter, thereby improving system efficiency and reducing system cost.

[0007] According to a first aspect of this disclosure, a flyback converter is provided, comprising: a transformer including a primary winding and a secondary winding;

[0008] A power switch is connected between the primary winding and the reference ground;

[0009] A rectifier diode is connected between the secondary winding and the output terminal of the flyback converter;

[0010] A current estimation circuit is used to perform volt-second calculations at a predetermined time based on the voltage across the first winding of the flyback converter and a preset proportional coefficient, in order to obtain a first voltage signal characterizing the excitation current information of the flyback converter. The first winding is one of the windings of the transformer or an auxiliary winding coupled to one of the windings of the transformer.

[0011] The comparator circuit receives the first voltage signal and the output feedback signal, and generates a shutdown trigger signal to control the power switch to turn off when the first voltage signal reaches the output feedback signal.

[0012] Optionally, the current estimation circuit includes: an off-chip proportional resistor for characterizing the proportional coefficient, wherein the resistance value of the proportional resistor is set in response to the inductance value of the magnetizing inductor in the flyback converter.

[0013] Optionally, in one possible embodiment of the present invention, the current estimation circuit further includes:

[0014] The first proportional voltage generation unit is used to provide a fixed reference current to the proportional resistor to generate a proportional voltage characterizing the preset proportional coefficient.

[0015] The first integrator is used to perform volt-second integration on the product of the voltage across the first winding and the proportional voltage, and output the first voltage signal.

[0016] Optionally, in another possible embodiment of the present invention, the current estimation circuit further includes:

[0017] The second proportional voltage generating unit is used to provide the proportional resistor with a voltage-controlled current controlled by the voltage across the first winding to generate a proportional voltage, wherein the proportional voltage represents the product of the proportional coefficient and the voltage across the first winding.

[0018] The second integrator is used to integrate the proportional voltage in volts and seconds and output a first voltage signal.

[0019] Optionally, the rectifier tube is a synchronous rectifier tube; and

[0020] The flyback converter also includes:

[0021] The secondary controller receives the output voltage and the voltage at the common connection point between the secondary winding and the synchronous rectifier, outputs a second control signal to the control terminal of the synchronous rectifier to control the switching on / off of the synchronous rectifier, and obtains the voltage across the primary winding based on the output voltage and the voltage at the common connection point between the secondary winding and the synchronous rectifier.

[0022] Optionally, the voltage across the primary winding is equal to the voltage across the secondary winding multiplied by N1; and

[0023] When the synchronous rectifier is connected between the opposite terminal of the secondary winding and the reference ground, the voltage across the secondary winding is equal to the voltage at the common connection point of the secondary winding and the synchronous rectifier minus the output voltage.

[0024] When the synchronous rectifier is connected between the corresponding terminal of the secondary winding and the output terminal of the flyback converter, the voltage across the secondary winding is equal to the voltage at the common connection point of the secondary winding and the synchronous rectifier.

[0025] Wherein, N1 is the turns ratio of the primary winding to the secondary winding in the transformer.

[0026] Optionally, the secondary side controller includes:

[0027] The first input terminal receives the voltage at the common connection point between the secondary winding and the synchronous rectifier tube;

[0028] The second input terminal receives the output voltage;

[0029] The third input terminal is connected to the reference ground via a preset proportional resistor to receive the proportional voltage;

[0030] The first output terminal outputs the second control signal to the control terminal of the synchronous rectifier tube;

[0031] The second output terminal outputs the output feedback signal to the isolation device;

[0032] The grounding terminal is connected to the reference ground.

[0033] Optionally, the primary-side controller includes:

[0034] The first input terminal receives the output feedback signal or the shutdown trigger signal;

[0035] The first output terminal outputs the first control signal to the control terminal of the power switch;

[0036] Grounding terminal.

[0037] Optionally, the flyback converter further includes a first capacitor and a first resistor, wherein the first capacitor and the first resistor are connected in series between the drain and source of the synchronous rectifier.

[0038] Optionally, the transformer further includes an auxiliary winding; and

[0039] The voltage across the primary winding is equal to the voltage across the auxiliary winding multiplied by N2.

[0040] Wherein, N2 is the turns ratio of the primary winding to the auxiliary winding in the transformer.

[0041] Optionally, when the flyback converter operates in intermittent conduction mode, the current estimation circuit starts performing volt-second calculations at a predetermined time, ends the volt-second calculations when the power switch is turned off, and clears the calculation result to zero.

[0042] Optionally, the predetermined time is the zero-current moment characterizing the excitation current in the flyback converter.

[0043] Optionally, the predetermined time includes any one of the following: the peak time of the voltage across the secondary winding during the resonance process of the flyback converter, the trough time of the voltage across the secondary winding during the resonance process of the flyback converter, the turn-on time of the power switch, and the turn-off time of the synchronous rectifier.

[0044] Optionally, the flyback converter further includes a primary-side controller connected to the control terminal of the power switch, and a current-limiting resistor connected in series in the primary-side power circuit of the flyback converter, wherein the resistance value of the current-limiting resistor is less than a preset threshold; the primary-side controller is used to turn off the power switch when the voltage across the current-limiting resistor is greater than a preset voltage threshold.

[0045] According to a second aspect of this disclosure, a control method for a flyback converter is provided, applicable to the flyback converter described above, wherein the control method includes:

[0046] Obtain the voltage across the first winding of the flyback converter and the preset proportional coefficient;

[0047] A volt-second calculation is performed on the voltage across the first winding and the preset proportional coefficient at a predetermined time to obtain a first voltage signal characterizing the excitation current information of the flyback converter.

[0048] The power switch is turned off when the first voltage signal reaches the output feedback signal.

[0049] The first winding is either one of the windings in the flyback converter or an auxiliary winding coupled to one of the windings in the flyback converter.

[0050] Optionally, the control method further includes:

[0051] A proportional resistor is provided outside the flyback converter chip to characterize the proportional coefficient, wherein the resistance value of the proportional resistor is set in response to the inductance value of the magnetizing inductor in the flyback converter.

[0052] Optionally, the method for obtaining the first voltage signal includes:

[0053] A fixed reference current is supplied to the proportional resistor to generate a proportional voltage characterizing the preset proportional coefficient;

[0054] The product of the voltage across the first winding and the proportional voltage is integrated in volt-seconds to obtain the first voltage signal.

[0055] Optionally, the method for obtaining the first voltage signal includes:

[0056] A voltage-controlled current, controlled by the voltage across the first winding, is supplied to the proportional resistor to generate a proportional voltage, the proportional voltage representing the product of the proportionality coefficient and the voltage across the first winding.

[0057] The proportional voltage is integrated in volt-seconds to obtain a first voltage signal.

[0058] Optionally, when the flyback converter operates in intermittent conduction mode, the current estimation circuit starts performing volt-second calculations at a predetermined time, ends the volt-second calculations when the power switch is turned off, and clears the calculation result to zero.

[0059] Optionally, the predetermined time is the zero-current moment characterizing the excitation current in the flyback converter.

[0060] Optionally, the predetermined time includes any one of the following: the peak time of the voltage across the secondary winding during the resonance process of the flyback converter, the trough time of the voltage across the secondary winding during the resonance process of the flyback converter, the turn-on time of the power switch, and the turn-off time of the synchronous rectifier.

[0061] The beneficial effects of the present invention include at least the following:

[0062] The current estimation circuit in this embodiment of the invention can obtain the excitation current information of the primary side of the flyback converter by performing volt-second calculation on the voltage across one of the windings of the transformer and a preset proportional coefficient. Then, based on the obtained excitation current information, the peak current control of the flyback converter can be realized. The whole process does not require a large sampling resistor, which helps to improve system efficiency and reduce system cost.

[0063] In a further preferred embodiment, in the intermittent conduction mode of the flyback converter, by ending the volt-second calculation at the turn-off time of the primary power switch or at a predetermined time after the turn-off and clearing the calculation result to zero, the initial estimated value of the excitation current can be preset to 0 in each switching cycle. Furthermore, by setting the predetermined time to start the excitation current estimation to the zero current time of the excitation current, the accumulation and expansion of the estimation error over time can be avoided, which helps to achieve stable control of the flyback converter.

[0064] In a further preferred embodiment, by connecting a current-limiting resistor with a small resistance (less than a preset threshold) in series in the primary power circuit of the flyback converter, the current in the power circuit can be effectively suppressed when the excitation inductance of the transformer is abnormal. This effectively prevents the current in the power circuit from increasing abnormally, thus helping to improve system stability and reliability. At the same time, it does not affect the system's efficiency or cost.

[0065] It should be noted that the above general description and the following detailed description are exemplary and explanatory only, and do not limit the present invention. Attached Figure Description

[0066] Figure 1 This diagram shows the structure of an existing flyback converter.

[0067] Figure 2 A schematic diagram of the structure of a flyback converter provided according to a first embodiment of the present invention is shown;

[0068] Figure 3 A schematic diagram of the structure of a flyback converter provided according to a second embodiment of the present invention is shown;

[0069] Figure 4 A schematic diagram of the structure of a flyback converter provided according to a third embodiment of the present invention is shown;

[0070] Figure 5a and Figure 5b Schematic diagrams of the current estimation circuits provided in different embodiments of the present invention are shown respectively;

[0071] Figure 6 A schematic diagram of the structure of a flyback converter provided according to a fourth embodiment of the present invention is shown;

[0072] Figure 7 The diagram shows the timing waveform of the equivalent peak current control of a flyback converter under ideal conditions.

[0073] Figure 8 The diagram shows the timing waveform of the equivalent peak current control of a flyback converter in DCM mode, which estimates the excitation current starting from the peak of the voltage across the secondary winding.

[0074] Figure 9 The diagram shows the timing waveform of the equivalent peak current control of a flyback converter that estimates the excitation current starting from the turn-off moment of the power switch in DCM mode.

[0075] Figure 10 This diagram illustrates the timing waveform of the equivalent peak current control of the flyback converter, which estimates the excitation current starting from the turn-on moment of the synchronous rectifier in DCM mode.

[0076] Figure 11 A flowchart illustrating the control method for a flyback converter provided according to an embodiment of the present invention is shown. Detailed Implementation

[0077] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0078] Example 1

[0079] Combination Figure 2 , Figure 5a and Figure 5b The flyback converter disclosed in this embodiment includes: a primary winding N P and secondary winding N S The transformer TR is connected to the primary winding N. P The voltage input circuit is connected to the secondary winding N. S The voltage output circuit, as well as power switch Q1, primary-side controller 5, rectifier Q2, secondary-side controller 8, isolation device 61 and current estimation circuit 9.

[0080] The voltage input circuit is connected between the input terminal of the flyback converter and the primary winding Np, and includes a rectifier circuit 3 and an input capacitor C1. The rectifier circuit 3 can be connected to a power source via the first connection port 1, facilitating the supply of electrical energy to the flyback converter. This power source can be, but is not limited to, a power grid, generator, transformer, battery, solar panel, wind turbine, regenerative braking system, hydraulic or wind turbine, or any other device capable of supplying electrical energy to the flyback converter. The voltage input circuit may further include a filter circuit 2 connected between the rectifier circuit 3 and the first connection port 1, and a power factor correction circuit 4 connected between the rectifier circuit 3 and the input capacitor C1.

[0081] Furthermore, the voltage input circuit also includes the primary winding N of the transformer TR. P A third resistor R1, a capacitor C2, and a diode D1 are provided between the same-named and different-named terminals. The third resistor R1 and capacitor C2 are connected in parallel to the primary winding N. P The opposite terminal is between the cathode of diode D1 and the anode of diode D1, and the primary winding N is between the anode and the cathode of diode D1. P With the same-name terminals connected, the third resistor R1, capacitor C2, and diode D1 can absorb the primary winding N. P This reduces leakage inductance current, thereby improving transformer performance.

[0082] The voltage output circuit is connected between the secondary winding and the output terminal of the flyback converter, and includes an output capacitor Co. This output capacitor Co is connected to the load via a second connection port 7. The load receives the electrical energy (e.g., voltage and current) converted by the flyback converter. In some instances, the electrical energy converted by the flyback converter passes through a filter before reaching the load. In some instances, the filter is a sub-component of the flyback converter, an external component of the flyback converter, and / or a sub-component of the load. In any case, the load can perform its function using filtered or unfiltered electrical energy from the flyback converter. Optionally, the load may include, but is not limited to, computing devices and related components, such as microprocessors, electrical components, circuits, laptop computers, desktop computers, tablet computers, mobile phones, batteries, speakers, lighting units, automotive / marine / aircraft / train related components, motors, transformers, or any other type of electrical equipment and / or circuits that receive voltage or current from the flyback converter.

[0083] Power switch Q1 is connected to the primary winding N P The corresponding terminal is connected to the reference ground. In one possible embodiment, the power switch Q1 is an NMOS field-effect transistor.

[0084] The primary-side controller 5 provides a first control signal Vgs1 to the control terminal of the power switch Q1 to control the on / off state of the power switch Q1. Specifically, the primary-side controller 5 controls the power switch Q1 to turn off based on the output voltage Vo of the flyback converter and the first voltage signal. In this embodiment, the primary-side controller 5 includes a first input terminal SYNC, a first output terminal DRV, and a ground terminal GND. The first input terminal SYNC of the primary-side controller 5 is connected to the isolation device 61 to receive an output feedback signal (denoted as Vcomp) or a turn-off trigger signal (denoted as V2); the first output terminal DRV of the primary-side controller 5 is connected to the control terminal of the power switch Q1 to output the first control signal (denoted as Vgs1) to the control terminal of the power switch Q1; the ground terminal GND of the primary-side controller 5 is connected to the reference ground.

[0085] Rectifier Q2 is connected between the secondary winding Ns and the voltage output circuit. In this embodiment, rectifier Q2 is a synchronous rectifier. This synchronous rectifier Q2 is connected between the secondary winding Ns and the voltage output circuit. S The synchronous rectifier Q2 is located between the non-circular terminal and the low-order output terminal of the flyback converter, i.e., the reference ground. In one possible embodiment, if the synchronous rectifier Q2 is an NMOS field-effect transistor, its drain and secondary winding N... S The source of the synchronous rectifier Q2 is connected to the reference ground. Furthermore, the flyback converter also includes a first resistor R2 and a first capacitor C3 connected in series between the drain and source of the synchronous rectifier Q2. The first resistor R2 and the first capacitor C3 can absorb stress on the MOSFET and protect the synchronous rectifier Q2.

[0086] In this embodiment, the secondary controller 8 receives the output voltage Vo and the voltage at the common connection point of the secondary winding Ns and the synchronous rectifier Q2 (denoted as V). SW The secondary-side controller 8 outputs a second control signal (denoted as Vgs2) to the control terminal of the synchronous rectifier Q2 to control the switching on / off of the synchronous rectifier Q2. In this embodiment, the secondary-side controller 8 includes: a first input terminal SW, a second input terminal Vo, a third input terminal SCS, a first output terminal GT, a second output terminal SYNC, and a ground terminal GND. The first input terminal SW of the secondary-side controller 8 is connected to the control terminal of the synchronous rectifier Q2 to receive the voltage V at the common connection point between the secondary winding Ns and the synchronous rectifier Q2. SW The second input terminal Vo of the secondary-side controller 8 is connected to the output terminal of the flyback converter to receive the output voltage Vo of the flyback converter; the third input terminal SCS of the secondary-side controller 8 is connected via a preset proportional resistor (denoted as R in this embodiment). CS_S It is connected to a reference ground to receive a proportional voltage (denoted as V in this embodiment). SCSThe first output terminal GT of the secondary-side controller 8 is connected to the control terminal of the synchronous rectifier Q2 to output the second control signal Vgs2 to the control terminal of the synchronous rectifier Q2; the second output terminal SYNC of the secondary-side controller 8 is connected to the isolation device 61 to realize signal transmission with the primary-side controller 5 of the flyback converter through the isolation device 61, for example, outputting the output feedback signal Vcomp to the primary-side controller 5 of the flyback converter; the ground terminal GND of the secondary-side controller 8 is connected to the reference ground.

[0087] Optionally, the isolation device 61 can be any of an isolation transformer, an optocoupler, an isolation capacitor, and an isolation chip. The isolation device 61 enables signal transmission between the primary and secondary sides of the flyback converter.

[0088] The secondary controller 8 is also used to determine the voltage V at the common connection point between the secondary winding Ns and the synchronous rectifier Q2 based on the output voltage Vo and the voltage V. SW Obtain the voltage across the primary winding Np (denoted as Vp).

[0089] It is understandable that the voltage Vp across the primary winding Np of transformer TR is equal to the voltage (denoted as Vs) across the secondary winding Ns multiplied by N1, i.e.

[0090] V P =V S *N1........................................(1),

[0091] Where N1 is the turns ratio of the primary winding Np to the secondary winding Ns in transformer TR.

[0092] Based on the working principle of the flyback converter, it can be known that the voltage across the secondary winding Ns of the transformer TR (denoted as Vs) is equal to the voltage V at the common connection point between the secondary winding Ns and the synchronous rectifier Q2. SW Subtract the output voltage Vo, that is

[0093] V S =V SW -V O .............................................(2).

[0094] Combining formulas (1) and (2), it can be seen that when the synchronous rectifier tube Q2 is connected between the opposite terminal of the secondary winding Ns and the reference ground (i.e. Figure 2 In the embodiment shown, the voltage Vp across the primary winding Np is:

[0095] V P =N1*(V SW -VO )....................................(3).

[0096] The current estimation circuit 9 is used to perform volt-second calculations based on the voltage across the first winding of the flyback converter and a preset proportional coefficient to obtain a first voltage signal (denoted as V) characterizing the excitation current information of the flyback converter. CSEST ).

[0097] In this embodiment, the first winding is the secondary winding Ns of the flyback converter. Based on the working principle of the flyback converter and the volt-second balance principle of the inductor, the following relationship exists in the flyback converter under steady state:

[0098]

[0099] Where Is is the magnetizing current in transformer TR, and Ls is the magnetizing inductance in transformer TR. When the flyback converter system is determined, the magnetizing inductance in its transformer remains constant.

[0100] Substituting formula (1) into formula (4), formula (4) can be transformed into:

[0101]

[0102] In this embodiment, it is assumed that Formula (5) can then be further transformed into:

[0103] I S =K CS *V S *t........................................(6),

[0104] Wherein, Kcs is the preset proportional coefficient in this embodiment. It can be understood that different excitation inductances correspond to different coefficients Kcs, and the excitation current Is can be further estimated according to formula (6) without the need to connect a large sampling resistor in series in the primary power circuit of the flyback converter, which helps to improve system efficiency and reduce system cost.

[0105] Optionally, in this embodiment, the current estimation circuit 9 can adopt the following... Figure 5a The structure shown can also be implemented using, as shown in the example Figure 5b The structure shown is implemented.

[0106] Among them, reference Figure 5a When adopting Figure 5a In the structure shown, the current estimation circuit 9 includes: an off-chip proportional resistor R that characterizes the proportionality coefficient Kcs.CS_S The system includes a first proportional voltage generation unit 91, a first integrator 93, and a multiplier 92. The first proportional voltage generation unit 91 is used to input voltage to the proportional resistor R. CS_S A fixed reference current is provided to generate a proportional voltage V that characterizes a preset proportionality coefficient Kcs. SCS For example, the first proportional voltage generation unit 91 includes a constant current source I1, which is used to supply current to the proportional resistor R. CS_S A fixed reference current is provided, which flows through a preset proportional resistor R. CS_S Then, the preset proportional resistor R can be used. CS_S A proportional voltage V is generated at both ends SCS .

[0107] It should be noted that the proportional resistor R CS_S Since it is an external resistor, it will not occupy the area of ​​the flyback converter integrated circuit. Furthermore, because the reference current provided by the proportional voltage generation unit 91 is a fixed value, the proportional voltage V... SCS With the preset proportional resistor R CS_S The relationship is directly proportional. Therefore, in this embodiment, the preset proportional resistor R can be replaced or adjusted according to different excitation inductance values. CS_S The resistance value is used to achieve an equivalent proportional voltage V. SCS The adjustment of this voltage can effectively achieve the setting of any desired proportional coefficient Kcs. Therefore, in this embodiment of the invention, a proportional voltage V can be further employed. SCS This is used to equivalently represent the preset proportional coefficient Kcs. It should be noted that, compared to the scheme using a capacitor to set the proportional coefficient, this embodiment of the invention improves the overall control accuracy of the flyback converter system by using an external proportional resistor, thereby further optimizing system performance.

[0108] Multiplier 92 multiplies the proportional voltage Vscs with the voltage Vs across the first winding (in this embodiment, the secondary winding Ns). First integrator 93 performs volt-second integration on the product of the voltage across the first winding (in this embodiment, the secondary winding Ns) and the proportional voltage, and outputs a first voltage signal V. CSEST For example, the first integrator 93 further includes a first voltage-controlled current source I3 and a second capacitor C4. The first voltage-controlled current source I3 receives the output signal of the multiplier 92 and provides a first voltage-controlled current to the second capacitor C4 according to the output signal of the multiplier 92, thereby generating a first voltage signal V across the second capacitor C4. CSEST .

[0109] Among them, reference Figure 5b When adopting Figure 5bIn the structure shown, the current estimation circuit 9 includes: an off-chip proportional resistor R that characterizes the proportionality coefficient Kcs. CS_S A second proportional voltage generating unit 94 and a second integrator 95. The second proportional voltage generating unit 94 is used to input voltage to the proportional resistor R. CS_S A second voltage-controlled current, controlled by the voltage Vs across the first winding, is provided to generate a proportional voltage V. SCS The proportional voltage V SCS The proportionality coefficient Kcs is represented by the product of the voltage Vs across the first winding. Exemplarily, the second proportional voltage generation unit 94 includes a second voltage-controlled current source I2, which is used to supply current to the proportional resistor R. CS_S A second voltage-controlled current is provided, which flows through a preset proportional resistor R. CS_S Then, the preset proportional resistor R can be used. CS_S A proportional voltage V is generated at both ends SCS .

[0110] The second integrator 95 is used to compare the voltage V. SCS Perform volt-second integration and output the first voltage signal V. CSEST For example, the second integrator 95 further includes a third voltage-controlled current source I4 and a third capacitor C5, the third voltage-controlled current source I4 receiving a proportional voltage V. SCS And according to the proportional voltage V SCS A third voltage-controlled current is supplied to the third capacitor C5, thereby generating a first voltage signal V across the third capacitor C5. CSEST .

[0111] Understandably, although the volt-second voltage of the transformer TR winding is balanced in steady state, considering the design errors within the flyback converter chip, the first voltage signal V, representing the excitation current information, is generated based on the voltage Vp across the primary winding Np and a preset proportional coefficient Kcs. CSEST Errors can occur during the process, and these errors accumulate over time, potentially leading to control misalignment of the flyback converter. Therefore, in this embodiment of the invention, the integrator 92 is configured to begin volt-second calculations at a predetermined time during the flyback converter's DCM (discontinuous conduction mode), and the calculations are terminated and the result is cleared when the power switch Q1 is turned off. This means that the first voltage signal V... CSEST The initial estimated value is preset to 0. For example, the calculation result of integrator 92 is configured to be at the moment when power switch Q1 is turned off (e.g. Figure 7 , Figure 8 , Figure 9 and Figure 10 (t2 time) or a predetermined time after the power switch is turned off (e.g., time t2) Figure 7 , Figure 8 , Figure 9 and Figure 10 The time t3 in the timer is cleared, and the predetermined time when timer 92 starts counting is set to the zero current time that characterizes the excitation current Is in the flyback converter. This is to avoid the accumulation of the estimation error of the excitation current information and the control error of the flyback converter with the flyback converter cycle, which helps to achieve stable control of the flyback converter.

[0112] like Figure 7 The diagram shows the timing waveform of the equivalent peak current control of the flyback converter under ideal conditions. It can be seen that during each switching cycle, the zero current moment of the excitation current Is in the flyback converter (i.e., the first voltage signal V) CSEST The time when the voltage Vs equals zero includes the peak time of the voltage Vs across the secondary winding Ns during the resonance process of the flyback converter (e.g., time t6), the trough time of the voltage Vs across the secondary winding Ns during the resonance process of the flyback converter, the turn-on time of the power switch Q1 (e.g., time t1), and the turn-off time of the synchronous rectifier Q2 (e.g., time t4). Optionally, within each switching cycle, the predetermined time in this embodiment includes any one of the following: the peak time of the voltage Vs across the secondary winding Ns during the resonance process of the flyback converter, the trough time of the voltage Vs across the secondary winding Ns during the resonance process of the flyback converter, the turn-on time of the power switch Q1, and the turn-off time of the synchronous rectifier Q2.

[0113] For example, refer to Figure 8 , Figure 9 and Figure 10 The first voltage signal V, representing the excitation current information, generated by the current estimation circuit 9 in each switching cycle of the flyback converter in DCM mode. CSEST This is understood in the context of the following situation: When the predetermined time is set to the peak time of the voltage Vs across the secondary winding Ns during the resonance process of the flyback converter (time t6), the first voltage signal V, representing the excitation current information, is generated by the current estimation circuit 9. CSEST The timing waveform diagram is as follows Figure 8 As shown; when the predetermined time is set to the turn-off time of the synchronous rectifier Q2 (time t4), the first voltage signal V representing the excitation current information generated by the current estimation circuit 9 is... CSEST The timing waveform diagram is as follows Figure 9 As shown; when the predetermined time is set to the on-time of power switch Q1 (time t1), the current estimation circuit 9 generates a first voltage signal V representing the excitation current information. CSEST The timing waveform diagram is as follows Figure 10As shown. It should be noted that in the CCM mode of the flyback converter, since the primary current of the flyback converter will not drop to 0, there is no need to set an initial estimated current; only the real-time sampling calculation is required.

[0114] It is understandable that the first voltage signal V output by the current estimation circuit 9 CSEST It is equivalent to Figure 1 The voltage signal obtained by sampling across the sampling resistor Rs in the existing flyback converter shown is illustrated. Furthermore, using... Figure 5a For example, in this embodiment, the excitation current information estimated by the current estimation circuit 9 is the first voltage signal V. CSEST for:

[0115] V CSEST =V SCS *V S *t........................................(7),

[0116] Where t represents the time from the initial estimated time to the current time.

[0117] Furthermore, substituting formula (2) into formula (7), then... Figure 2 The first voltage signal V finally output by the current estimation circuit 9 in the first embodiment of the present invention is shown. CSEST for:

[0118] V CSEST =V SCS *(V SW -V O )*t........................................(8),

[0119] Vsw-Vo can be implemented by a subtractor set in the secondary controller 8 to obtain the voltage across the secondary winding Ns.

[0120] Understandable, Figure 5b The first voltage signal V output by the current estimation circuit 9 shown is CSEST The method of obtaining and Figure 5a The first voltage signal V shown CSEST The methods for obtaining them all follow a similar approach, therefore Figure 5b The first voltage signal V output by the current estimation circuit 9 shown is CSEST The calculation method can Figure 5a The corresponding calculation methods will be explained in detail here.

[0121] Furthermore, the flyback converter also includes a feedback circuit and a comparator circuit 51. The feedback circuit generates an output feedback signal Vcomp based on the output voltage Vo to characterize the output power of the flyback converter. The first input of the comparator circuit 51 receives a first voltage signal V from the current estimation unit 9. CSEST The second input terminal of the comparator circuit 51 receives the output feedback signal Vcomp from the feedback circuit or the reference signal V formed by dividing the feedback signal according to a certain ratio. CSREF The comparator circuit 51 is used for the first voltage signal V CSEST When the output feedback signal Vcomp is reached, a turn-off trigger signal V2 is generated to turn off the power switch Q1.

[0122] Optionally, the feedback circuit and current estimation circuit 9 can both be located in the secondary controller 8, while the comparison circuit 51 can be located in the primary controller 5. The secondary controller 8 can then simultaneously output the feedback signal Vcomp and the first voltage signal V through the isolation device 61. CSEST The signal is transmitted to the primary-side controller 5, and then the comparison circuit 51 within the primary-side controller 5 compares the output feedback signal Vcomp with the first voltage signal V. CSEST The peak current control mode of the flyback converter is equivalently achieved after comparison. Alternatively, the feedback circuit, current estimation circuit 9, and comparator circuit 51 can all be located in the secondary controller 8, and then the secondary controller 8 transmits the turn-off trigger signal V2 output by the comparator 51 to the primary controller 5 through the isolation device 61, thus equivalently achieving the peak current control mode of the flyback converter. This invention does not limit this approach.

[0123] Example 2

[0124] In this embodiment, the structure of the flyback converter is as follows: Figure 3 As shown.

[0125] The flyback converter in this embodiment has basically the same circuit structure as that in the first embodiment described above. The similarities can be understood by referring to the content in the first embodiment described above, and will not be repeated here.

[0126] The difference lies in this embodiment: the synchronous rectifier Q2 is connected between the same-name terminal of the secondary winding Ns and the high-order output terminal of the flyback converter. According to the working principle of the flyback converter, at this time, the voltage Vs across the secondary winding Ns is equal to the voltage at the common connection point between the secondary winding Ns and the synchronous rectifier Q2, i.e.

[0127] V S =V SW ...................................................(9).

[0128] Combining formulas (1) and (9), it can be seen that when the synchronous rectifier Q2 is connected between the same-name terminal of the secondary winding Ns and the high-order output terminal of the flyback converter (i.e. Figure 3 In the embodiment shown, the voltage Vp across the primary winding Np is:

[0129] V P =N1*S SW ...............................................(10).

[0130] Furthermore, in this embodiment, substituting formula (9) into formula (7) yields... Figure 3 The first voltage signal V finally output by the current estimation circuit 9 in the second embodiment of the present invention is shown. CSEST for:

[0131] V CSEST =V SCS *V SW *t........................................(11).

[0132] Example 3

[0133] In this embodiment, the structure of the flyback converter is as follows: Figure 4 As shown.

[0134] The flyback converter in this embodiment has basically the same circuit structure as that in the first embodiment described above. The similarities can be understood by referring to the content in the first embodiment described above, and will not be repeated here.

[0135] The difference lies in the fact that, in this embodiment, the transformer TR also includes an auxiliary winding Na coupled to the primary winding Np. In this case, the current estimation circuit 9 performs a volt-second calculation based on the voltage across the auxiliary winding Na of the flyback converter and a preset proportional coefficient to obtain a first voltage signal V representing the excitation current information of the flyback converter. CSEST .

[0136] Optionally, the rectifier Q2 in this embodiment can be a rectifier diode, or it can be a synchronous rectifier as described in the first or second embodiment above. Figure 4 The illustration is only based on the example of rectifier diode Q2, but this should not be construed as a limitation of the present invention.

[0137] In this embodiment, the primary-side controller 5 is further configured to obtain the voltage Vp across the primary-side winding Np based on the voltage (denoted as Va) across the auxiliary winding Na. It can be understood that the voltage Vp across the primary-side winding Np of the transformer TR is equal to the voltage Va across the auxiliary winding Na multiplied by N2, i.e.

[0138] V P =V a *N2........................................(12),

[0139] Where N2 is the turns ratio of the primary winding Np to the auxiliary winding Na in transformer TR.

[0140] Substituting formula (12) into formula (4), formula (4) can be transformed into:

[0141]

[0142] In this embodiment, it is assumed that Then formula (13) can be further transformed into:

[0143] I S =K VS *V a *t........................................(14),

[0144] In this embodiment, Kvs is the preset proportional coefficient. Therefore, by setting an appropriate proportional coefficient Kvs, the excitation current Is of the flyback converter can be estimated without connecting a large sampling resistor in series in the primary power circuit of the flyback converter, which helps to improve system efficiency and reduce system cost.

[0145] In this embodiment, both the current estimation circuit 9 and the comparison circuit 51 are integrated within the primary-side controller 5. The feedback circuit 6 transmits the output feedback signal Vcomp to the primary-side controller 5 only via the isolation device 61. Furthermore, in this embodiment, the primary-side controller 5 includes: a first input terminal COMP, a second input terminal VDD, a third input terminal VS, a first output terminal DRV, and a ground terminal GND. The first input terminal COMP of the primary-side controller 5 is connected to the isolation device 61 to receive the output feedback signal Vcomp; the second input terminal VDD of the primary-side controller 5 is connected to the cathode of the first diode D4, and the anode of the first diode D4 is connected to the same-name terminal of the auxiliary winding Na; the third input terminal VS of the primary-side controller 5 is connected to the same-name terminal of the auxiliary winding Na via a preset proportional resistor (denoted as RVS in this embodiment) to receive the voltage Va and the proportional voltage (denoted as V in this embodiment) across the auxiliary winding Na.VS The first output terminal DRV of the primary-side controller 5 is connected to the control terminal of the power switch Q1 to output a first control signal (denoted as Vgs1) to the control terminal of the power switch Q1; the ground terminal GND of the primary-side controller 5 is connected to the reference ground. In this embodiment, the volt-second integral of the voltage Va across the auxiliary winding Na and the proportional voltage V representing the preset proportional coefficient (denoted as Kvs in this embodiment) can be simultaneously obtained based on one pin of the primary-side controller 5. VS The acquisition of this technology further optimizes the circuit structure of the flyback converter, which helps to further reduce the design cost of the flyback converter and achieve miniaturization of the flyback converter.

[0146] Furthermore, in this embodiment, the current estimation circuit 9 receives the voltage Va across the auxiliary winding Na. That is, in this embodiment, the current estimation circuit 9 is used to perform volt-second integration on the voltage Va across the auxiliary winding Na to output a first voltage signal V. CSEST .

[0147] Furthermore, in this embodiment, the excitation current information estimated by the current estimation circuit 9 is the first voltage signal V. CSEST for:

[0148] V CSEST =V VS *V a *t........................................(15).

[0149] Furthermore, in this embodiment, the primary-side controller 5 also includes a fourth input terminal HV. The fourth input terminal HV of the primary-side controller 5 is connected to the cathodes of the second diode D2 and the third diode D3 via a second resistor R3. The anode of the second diode D2 is connected to the positive input terminal of the flyback converter, and the anode of the third diode D3 is connected to the negative input terminal of the flyback converter. The second resistor R3, the second diode D2, and the third diode D3 connected to the fourth input terminal HV of the primary-side controller 5 can jointly achieve high-voltage startup of the primary-side controller 5, which helps to improve the application range of the flyback converter.

[0150] Fourth embodiment

[0151] In this embodiment, the structure of the flyback converter is as follows: Figure 6 As shown.

[0152] The flyback converter in this embodiment has basically the same circuit structure as that in the first embodiment described above. The similarities can be understood by referring to the content in the first embodiment described above, and will not be repeated here.

[0153] The difference lies in the fact that, in this embodiment, the flyback converter also includes a current-limiting resistor R connected in series in the primary power circuit of the flyback converter. CS_P Furthermore, the primary-side controller 5 also includes a fifth input terminal CS. The fifth input terminal CS of the primary-side controller 5 is used to receive the current-limiting resistor R. CS_P The voltage across the two ends. The primary-side controller is used to turn off the power switch when the voltage across the current-limiting resistor exceeds a preset voltage threshold.

[0154] In this embodiment, the primary-side controller 5 acquires data from the current-limiting resistor R. CS_P The voltage across the terminals is compared with a preset voltage threshold, and the current is limited by the current-limiting resistor R. CS_P When the voltage across the terminals exceeds a preset voltage threshold, the power switch Q1 is turned off. Thus, this embodiment can effectively suppress the current in the power circuit when the transformer's magnetizing inductance is abnormal, preventing abnormal increases in current and improving system stability and reliability. It should be noted that in this embodiment, the preset voltage threshold is a fixed value, used only to determine whether the current in the power circuit is abnormal, and the current-limiting resistor R... CS_P If the resistance value is small, for example, less than a preset threshold, the power is also low, meaning the current-limiting resistor R... CS_P The resistance value is much smaller than that of the sampling resistor connected in series in the primary power circuit of a traditional flyback converter. It cannot achieve peak current control of the flyback converter, nor will it occupy too much integrated circuit area. It can reduce the specifications and number of resistors in the system, and its impact on the efficiency and cost of the flyback converter system can be ignored.

[0155] Furthermore, the present invention also discloses a control method for a flyback converter, which can be applied to, for example... Figures 2 to 10 The flyback converter described in [the document]. For example... Figure 11 As shown, in this embodiment, the control method includes performing the following steps:

[0156] In step S1, the voltage across the first winding of the flyback converter and the preset proportional coefficient are obtained.

[0157] Optionally, the first winding is one of the windings of a flyback converter or an auxiliary winding Na coupled to one of the windings of a flyback converter. The preset proportional coefficient also differs for different first windings. In this embodiment, the preset proportional coefficient can be obtained by providing a fixed reference current to a preset proportional resistor to obtain a proportional voltage characterizing the preset proportional coefficient.

[0158] In step S2, the voltage across the first winding and the preset proportional coefficient are used to perform volt-second calculations to obtain a first voltage signal characterizing the excitation current information of the flyback converter.

[0159] In one possible embodiment of the present invention, the method for obtaining the first voltage signal includes: providing a fixed reference current to a proportional resistor to generate a proportional voltage characterizing a preset proportional coefficient; performing volt-second integration on the product of the voltage across the first winding and the proportional voltage to obtain the first voltage signal. In another possible embodiment of the present invention, the method for obtaining the first voltage signal includes: providing a voltage-controlled current controlled by the voltage across the first winding to a proportional resistor to generate a proportional voltage characterizing the product of the proportional coefficient and the voltage across the first winding; performing volt-second integration on the proportional voltage to obtain the first voltage signal. Furthermore, the control method disclosed in the present invention further includes: setting a proportional resistor external to the flyback converter chip to characterize the proportional coefficient, wherein the resistance value of the proportional resistor is set in response to the inductance value of the magnetizing inductor in the flyback converter. For details, please refer to the foregoing description of the current estimation circuit 9; it will not be repeated here.

[0160] Understandably, although the volt-second voltage of the transformer TR winding is balanced in steady state, considering the design errors within the flyback converter chip, the first voltage signal V, representing the excitation current information, is generated based on the voltage Vp across the primary winding Np and a preset proportional coefficient Kcs. CSEST Errors can occur during the process, and these errors accumulate over time, potentially leading to control misalignment of the flyback converter. Therefore, in this embodiment of the invention, the integrator 92 is configured to begin volt-second calculations at a predetermined time in the flyback converter's DCM (discontinuous conduction mode), and the calculations are terminated and the result is cleared when the power switch Q1 is turned off. This means the first voltage signal V... CSEST The initial estimated value is preset to 0. For example, the calculation result of integrator 92 is configured to be at the moment when power switch Q1 is turned off (e.g. Figure 7 , Figure 8 , Figure 9 and Figure 10 (t2 time) or a predetermined time after the power switch is turned off (e.g., time t2) Figure 7 , Figure 8 , Figure 9 and Figure 10 The time t3 in the timer is cleared, and the predetermined time when timer 92 starts counting is set to the zero current time that characterizes the excitation current Is in the flyback converter. This is to avoid the accumulation of the estimation error of the excitation current information and the control error of the flyback converter with the flyback converter cycle, which helps to achieve stable control of the flyback converter.

[0161] In step S3, the power switch is turned off when the first voltage signal reaches the output feedback signal.

[0162] In this embodiment, a feedback circuit can be configured to generate an output feedback signal Vcomp representing the output power of the flyback converter based on the output voltage Vo. A comparator circuit 51 is also configured to receive the first voltage signal V. CSEST and output feedback signal Vcomp, and in the first voltage signal V CSEST When the output feedback signal Vcomp is reached, the power switch Q1 is turned off. For details, please refer to the aforementioned description of the flyback converter's circuit structure; further explanation is unnecessary here.

[0163] In summary, the current estimation circuit in this embodiment of the invention can equivalently obtain the excitation current information of the primary side of the flyback converter by performing volt-second calculations on the voltage across one of the windings of the transformer and a preset proportional coefficient. Then, based on the obtained excitation current information, the peak current control of the flyback converter can be realized. The entire process does not require a large sampling resistor, which helps to improve system efficiency and reduce system cost.

[0164] In a further preferred embodiment, in the intermittent conduction mode of the flyback converter, by ending the volt-second calculation at the turn-off time of the primary power switch or at a predetermined time after the turn-off and clearing the calculation result to zero, the initial estimated value of the excitation current can be preset to 0 in each switching cycle. Furthermore, by setting the predetermined time to start the excitation current estimation to the zero current time of the excitation current, the accumulation and expansion of the estimation error over time can be avoided, which helps to achieve stable control of the flyback converter.

[0165] In a further preferred embodiment, by connecting a current-limiting resistor with a small resistance (less than a preset threshold) in series in the primary power circuit of the flyback converter, the current in the power circuit can be effectively suppressed when the excitation inductance of the transformer is abnormal. This effectively prevents the current in the power circuit from increasing abnormally, thus helping to improve system stability and reliability. At the same time, it does not affect the system's efficiency or cost.

[0166] Finally, it should be noted that the above embodiments are merely examples for clearly illustrating the present invention and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. A flyback converter, wherein, The application relates to a current estimation circuit for a flyback converter. The flyback converter comprises: a transformer comprising a primary winding and a secondary winding; a power switch connected between the primary winding and a reference ground; a rectifier connected between the secondary winding and an output terminal of the flyback converter; a current estimation circuit configured to perform a voltage-second operation on a voltage across a first winding of the flyback converter and a preset proportional coefficient to obtain a first voltage signal representing excitation current information of the flyback converter, wherein the first winding is one of the windings of the transformer or an auxiliary winding coupled to one of the windings of the transformer; a comparison circuit configured to receive the first voltage signal and an output feedback signal, and generate an off trigger signal for turning off the power switch when the first voltage signal reaches the output feedback signal; wherein the current estimation circuit comprises a proportional resistor arranged outside the chip and configured to represent the proportional coefficient, and the resistance of the proportional resistor is set in response to the inductance of the excitation inductor in the flyback converter; 2. The flyback converter of claim 1, wherein, the proportional coefficient is positively correlated with the turns ratio of the primary winding and the first winding, and negatively correlated with the inductance of the excitation inductor in the flyback converter. The current estimation circuit further comprises: a first proportional voltage generation unit configured to provide a fixed reference current to the proportional resistor to generate a proportional voltage representing the preset proportional coefficient; 3. The flyback converter of claim 1, wherein, a first integrator configured to perform a voltage-second integration on the product of the voltage across the first winding and the proportional voltage, and output the first voltage signal. The current estimation circuit further comprises: a second proportional voltage generation unit configured to provide a voltage-controlled current to the proportional resistor in response to the voltage across the first winding to generate a proportional voltage representing the product of the proportional coefficient and the voltage across the first winding; 4. The flyback converter of claim 1, wherein, a second integrator configured to perform a voltage-second integration on the proportional voltage, and output the first voltage signal.

5. The flyback converter of claim 4, wherein, When the flyback converter operates in a discontinuous conduction mode, the current estimation circuit starts the voltage-second operation at a predetermined time, and ends the voltage-second operation and clears the operation result when the power switch is turned off.

6. The flyback converter of claim 4, wherein, The predetermined time is a zero-current time representing the excitation current in the flyback converter.

7. The flyback converter of claim 1, wherein, The predetermined time comprises any one of a peak time of the voltage across the secondary winding in a resonance process of the flyback converter, a valley time of the voltage across the secondary winding in the resonance process of the flyback converter, a turn-on time of the power switch, and an off time of a synchronous rectifier.

8. A control method of a flyback converter, applied to the flyback converter of any one of claims 1-7, wherein, The flyback converter further comprises a primary controller connected to a control terminal of the power switch, and a current-limiting resistor connected in series in a primary power loop of the flyback converter, wherein the resistance of the current-limiting resistor is less than a preset threshold; and the primary controller turns off the power switch when the voltage across the current-limiting resistor is greater than a preset voltage threshold. The control method comprises: obtaining a voltage across a first winding of a flyback converter and a preset proportional coefficient; performing a voltage-second operation on the voltage across the first winding and the preset proportional coefficient to obtain a first voltage signal representing excitation current information of the flyback converter; turning off the power switch when the first voltage signal reaches the output feedback signal, wherein the first winding is one of the windings in the flyback converter or an auxiliary winding coupled to one of the windings in the flyback converter; wherein the proportional coefficient is characterized by a proportional resistor arranged outside the flyback converter, the proportional resistor having a resistance value set in response to a value of a magnetizing inductance in the flyback converter; the proportional coefficient is positively correlated to a turns ratio of the primary winding to the first winding and negatively correlated to the value of the magnetizing inductance in the flyback converter.

9. The control method according to claim 8, wherein The method for obtaining the first voltage signal comprises: providing a fixed reference current to the proportional resistor to generate a proportional voltage representing the preset proportional coefficient; integrating a product of a voltage across the first winding and the proportional voltage in volt-second, and obtaining the first voltage signal.

10. The control method according to claim 8, wherein The method for obtaining the first voltage signal comprises: providing a voltage-controlled current to the proportional resistor in response to a voltage across the first winding to generate a proportional voltage representing a product of the proportional coefficient and the voltage across the first winding; integrating the proportional voltage in volt-second, and obtaining the first voltage signal.

11. The control method according to claim 8, wherein The flyback converter operates in a discontinuous conduction mode, and the current estimation circuit starts the volt-second operation at a predetermined time, ends the volt-second operation when the power switch is turned off, and clears the operation result.

12. The control method according to claim 11, wherein The predetermined time is a zero-current time representing a magnetizing current in the flyback converter.

13. The control method according to claim 11, wherein The predetermined time includes any one of a peak time of a voltage across the secondary winding during a resonance process of the flyback converter, a valley time of the voltage across the secondary winding during the resonance process of the flyback converter, a turn-on time of the power switch, and a turn-off time of a synchronous rectifier.

Images