A partial discharge synchronization signal generation method, device, equipment and medium

Abstract

This application discloses a method, apparatus, device, and medium for generating a partial discharge synchronization signal. By amplifying, phase-shifting, and digitizing a reference phase, and utilizing a microcontroller for digitization, the signal is converted into a sawtooth triangular wave signal related to the bus voltage phase, which is then used as the reference phase for the oscilloscope. The oscilloscope only needs to simultaneously detect the voltage generated by this method to accurately determine the current bus voltage phase, greatly facilitating phase analysis during partial discharge detection. This solves the technical problem that existing oscilloscopes cannot accurately determine the bus phase.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electric power, and particularly relates to a partial discharge synchronous signal generation method, device, equipment and medium. BACKGROUND

[0002] In the process of partial discharge detection, an oscilloscope is needed for partial discharge positioning and measurement of the phase of discharge, which is usually indirectly obtained by using a reference voltage signal. Therefore, a synchronous signal is usually used as a reference phase. When the phase of bus voltage needs to be measured, the reference phase needs to be phase-shifted before analysis. At present, most instruments obtain the accurate phase of the synchronous signal by phase-shifting the reference phase.

[0003] The existing synchronous signal needs to be adjusted after sampling and data acquisition in the instrument. When the oscilloscope is used for on-site testing, since the reference phase voltage is a sine wave, the accurate phase of the discharge signal cannot be obtained by the voltage value of the synchronous signal. SUMMARY

[0004] The present application provides a partial discharge synchronous signal generation method, device, equipment and medium, which is used to solve the technical problem that the existing oscilloscope cannot accurately determine the phase of the bus.

[0005] Therefore, the first aspect of the present application provides a partial discharge synchronous signal generation method, which comprises the following steps:

[0006] obtaining a reference phase sine wave for measuring the phase of bus voltage;

[0007] converting the reference phase sine wave into a square wave through a Schmidt trigger circuit, and taking the square wave as a trigger signal of a single-chip microcomputer;

[0008] calculating the voltage output change value at different times according to the time difference between two continuous trigger signals received by the single-chip microcomputer;

[0009] inputting the voltage output change value into a DAC circuit, so that the DAC circuit generates a sawtooth wave voltage proportional to the phase of bus voltage based on the voltage output change value, and takes the sawtooth wave voltage as an input signal of an oscilloscope.

[0010] Optionally, the step of making the DAC circuit generate a sawtooth wave voltage proportional to the phase of bus voltage based on the voltage output change value further comprises the following steps:

[0011] amplifying the sawtooth wave voltage, inputting the sawtooth wave voltage into the oscilloscope for reading to obtain a reference voltage, and then obtaining the phase of bus voltage according to the reference voltage.

[0012] Optionally, the reference phase sine wave for measuring the bus voltage phase is acquired, and then the method further comprises:

[0013] The reference phase sine wave is amplified by an amplification circuit and input to the Schmitt trigger circuit after phase adjustment.

[0014] Optionally, the reference phase sine wave specifically comprises a high-voltage bus voltage transformer secondary voltage, a high-voltage arrester leakage current, and a 220V power supply.

[0015] The second aspect of the application provides a partial discharge synchronous signal generation device, the device comprising:

[0016] An acquisition module is configured to acquire a reference phase sine wave for measuring a bus voltage phase.

[0017] A conversion module is configured to convert the reference phase sine wave into a square wave by a Schmitt trigger circuit, and use the square wave as a trigger signal of a single-chip microcomputer.

[0018] A calculation module is configured to calculate a voltage output change value at different times according to a time difference between two consecutive trigger signals received by the single-chip microcomputer.

[0019] A generation module is configured to input the voltage output change value into a DAC circuit, so that the DAC circuit generates a sawtooth wave voltage proportional to the bus voltage phase based on the voltage output change value, and uses the sawtooth wave voltage as an input signal of an oscilloscope.

[0020] Optionally, the device further comprises a reading module.

[0021] The reading module is configured to input the sawtooth wave voltage into the oscilloscope after amplification, read the sawtooth wave voltage to obtain a reference voltage, and obtain the bus voltage phase according to the reference voltage.

[0022] Optionally, the device further comprises a preprocessing module.

[0023] The preprocessing module is configured to amplify the reference phase sine wave by an amplification circuit and input the reference phase sine wave to the Schmitt trigger circuit after phase adjustment.

[0024] Optionally, the reference phase sine wave specifically comprises a high-voltage bus voltage transformer secondary voltage, a high-voltage arrester leakage current, and a 220V power supply.

[0025] The third aspect of the application provides a partial discharge synchronous signal generation device, the device comprising a processor and a memory:

[0026] The memory is configured to store program code and transmit the program code to the processor.

[0027] The processor is configured to execute the steps of the partial discharge synchronization signal generation method according to the instructions in the program code.

[0028] The fourth aspect of the present application provides a computer readable storage medium for storing program code, the program code being used to execute the partial discharge synchronization signal generation method according to the first aspect.

[0029] From the above technical solutions, the present application has the following advantages:

[0030] The present application provides a partial discharge synchronization signal generation method, which comprises: obtaining a reference phase sine wave for measuring the phase of bus voltage; converting the reference phase sine wave into a square wave through a Schmidt trigger circuit, and taking the square wave as a trigger signal of a single-chip microcomputer; calculating the voltage output change value at different times according to the time difference between two consecutive trigger signals received by the single-chip microcomputer; and inputting the voltage output change value into a DAC circuit, so that the DAC circuit generates a sawtooth wave voltage proportional to the phase of the bus voltage based on the voltage output change value, and takes the sawtooth wave voltage as an input signal of an oscilloscope.

[0031] The partial discharge synchronization signal generation method of the present application amplifies, shifts and digitizes the reference phase, converts it into a sawtooth triangle wave signal related to the phase of the bus voltage by using the digital conversion of the single-chip microcomputer, and finally takes the sawtooth triangle wave signal as the reference phase of the oscilloscope. The oscilloscope only needs to detect the voltage generated by the method at the same time, so as to accurately determine the phase of the bus voltage at the time, which greatly facilitates the phase analysis during partial discharge detection. Thus, the technical problem that the existing oscilloscope cannot accurately determine the phase of the bus voltage is solved. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 FIG. 1 is a flowchart of a partial discharge synchronization signal generation method according to an embodiment of the present application;

[0033] Figure 2 FIG. 2 is a structural diagram of a partial discharge synchronization signal generation device according to an embodiment of the present application;

[0034] Figure 3 FIG. 3 is a structural diagram of a partial discharge synchronization signal generation method according to an embodiment of the present application;

[0035] Figure 4 FIG. 4 is an oscilloscope waveform diagram during field testing of a measuring device according to an embodiment of the present application;

[0036] Figure 5 FIG. 5 is a schematic diagram for determining the phase of a partial discharge signal by outputting the voltage of a measuring device and the corresponding partial discharge signal according to an embodiment of the present application;

[0037] Figure 6 The single-chip microcomputer algorithm schematic diagram of the measuring device provided in the embodiments of the present application is shown. DETAILED DESCRIPTION

[0038] In order to enable persons skilled in the art to better understand the schemes of the present application, the technical schemes in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by persons skilled in the art without creative labor fall within the scope of protection of the present application.

[0039] Referring to Figure 1 , the partial discharge synchronous signal generation method provided in the embodiments of the present application comprises:

[0040] Step 101, obtaining a reference phase sine wave for measuring the phase of the bus voltage;

[0041] It should be noted that the reference phase sine wave of the present embodiment specifically comprises: high-voltage bus voltage transformer secondary voltage, high-voltage arrester leakage current, 220V power supply, etc., which will not be described here. After obtaining the reference phase sine wave, further, as shown in Figure 3 , the present embodiment inputs the reference phase sine wave amplified and adjusted in phase by an amplifying circuit to a Schmidt trigger circuit.

[0042] Step 102, converting the reference phase sine wave into a square wave by the Schmidt trigger circuit, and taking the square wave as a trigger signal of a single-chip microcomputer;

[0043] It should be noted that the Schmidt trigger circuit has two stable states, but unlike the general trigger circuit, the Schmidt trigger circuit adopts a potential trigger mode, and its state is maintained by the input signal potential; for input signals of two different change directions of negative direction decrease and positive direction increase, the Schmidt trigger circuit has different threshold voltages; one of its functions is: waveform conversion, which can convert triangular waves, sine waves, periodic waves, etc. into rectangular waves. Therefore, the present application converts the reference phase sine wave into a square wave by the Schmidt trigger circuit, and takes the square wave as a trigger signal of a single-chip microcomputer, as shown in Figure 3 .

[0044] Step 103, the single-chip microcomputer calculates the voltage output change value at different times according to the time difference of the two continuous received trigger signals;

[0045] It should be noted that steps 101-102 convert the reference voltage into a trigger signal of a single-chip microcomputer through digital processing. The single-chip microcomputer calculates the voltage output change value at different times according to the time difference of the two triggers.

[0046] Step 104, input the voltage output change value into the DAC circuit, so that the DAC circuit generates a sawtooth wave voltage proportional to the bus voltage phase based on the voltage output change value, and serves as an input signal of the oscilloscope.

[0047] As Figure 3 shown, the output change value is input into the DAC circuit (the DAC circuit refers to a DA conversion circuit, which is a circuit for converting digital signals into analog signals for output), and a voltage corresponding to the phase is generated by the DAC circuit, and finally a sawtooth wave signal corresponding to the bus voltage phase relationship is formed for the oscilloscope positioning and reference. It can be understood that the output voltage change is proportional to the actual phase of the bus by using the single-chip microcomputer control and the subsequent amplification circuit, and the formula is as follows:

[0048]

[0049] In the formula, φ is the current phase angle, U max is the maximum output voltage, which can be adjusted to 1-5V, and is usually adjusted to 3.6V

[0050] Further, after the sawtooth wave voltage is amplified, the sawtooth wave voltage is input into the oscilloscope for reading to obtain a reference voltage, so that the bus voltage phase is obtained according to the reference voltage, as Figure 3 shown.

[0051] It should be noted that the measuring device constructed by the method of the present application has the functions of adjustable phase shift and amplitude amplification adjustment. The input reference voltage is adjusted to the same zero-crossing point as the bus voltage, that is, when the bus voltage zero-crossing point, the output voltage is 0V, and at the next zero-crossing point, the voltage is the highest voltage value, which is usually set to 3.6V, and the corresponding angle is 0.01V. At this time, only the output voltage of the reading device is needed to know the current voltage phase. For example, if the device output voltage is 1.8V, the bus voltage phase is 180 degrees. Please refer to Figures 4-6 , Figure 4 for the oscilloscope waveform during on-site testing. By measuring the output voltage of the measuring device and the corresponding partial discharge signal, the phase of the partial discharge signal can be determined, as Figure 5 shown, and the single-chip microcomputer algorithm of the measuring device is as Figure 6 shown.

[0052] The partial discharge synchronous signal generation method provided by the embodiment amplifies, shifts and digitizes the reference phase, converts the reference phase into a sawtooth triangle wave signal related to the phase of the bus voltage by using the digitization of the single-chip microcomputer, and finally uses the sawtooth triangle wave signal as the reference phase of the oscilloscope. The oscilloscope only needs to detect the voltage generated by the method at the same time, and the accurate phase of the bus voltage at the time can be obtained, which greatly facilitates the phase analysis during partial discharge detection. Thus, the technical problem that the existing oscilloscope cannot accurately determine the phase of the bus is solved.

[0053] Referring to Figure 2 The partial discharge synchronous signal generation device provided in the embodiment includes:

[0054] The acquisition module 201 is configured to acquire a reference phase sine wave used to measure the phase of the bus voltage.

[0055] The conversion module 202 is configured to convert the reference phase sine wave into a square wave by using a Schmitt trigger circuit and use the square wave as a trigger signal of the single-chip microcomputer.

[0056] The calculation module 203 is configured to calculate the voltage output change value at different times according to the time difference between two continuous trigger signals received by the single-chip microcomputer.

[0057] The generation module 204 is configured to input the voltage output change value into a DAC circuit, so that the DAC circuit generates a sawtooth wave voltage proportional to the phase of the bus voltage based on the voltage output change value and uses the sawtooth wave voltage as an input signal of the oscilloscope.

[0058] Further, the embodiment of the present application further provides a partial discharge synchronous signal generation device, the device includes a processor and a memory:

[0059] The memory is configured to store program code and transmit the program code to the processor.

[0060] The processor is configured to execute the partial discharge synchronous signal generation method according to the instructions in the program code.

[0061] Further, the embodiment of the present application further provides a computer readable storage medium, the computer readable storage medium is used to store program code, and the program code is used to execute the partial discharge synchronous signal generation method in the above method embodiment

[0062] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the above-described device and module can refer to the corresponding process in the foregoing method embodiment, which will not be described here.

[0063] The terms "first", "second", "third", "fourth", and the like in the description and in the claims of this application, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the use of the terms so termed is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of accomplishing functionalities that are either the same or similar to that of other embodiments of the application. Moreover, the terms "include", "have", and the like, are used in the detailed description and in the claims of this application essentially open- ended and are intended to encompass the items listed thereafter, equivalents thereof, as well as additional items not listed after the comma. Finally, terms of degree such as "substantially", "approximately", and the like, are used to describe and account for subjective measurements that are inherently imprecise.

[0064] It should be understood that, in this application, "at least one" means one or more, "multiple" means two or more. "And / or", used to describe the relationship between associated objects, means that there can be three relationships, for example, "A and / or B" can mean: only A, only B, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects. "At least one of the following" or similar expressions means any combination of these items, including single or multiple combinations. For example, at least one of a, b or c, can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0065] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the above-described device embodiments are only illustrative, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed objects can be indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0066] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, i.e. they can be located in one place or distributed on multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0067] In addition, each of the functional units in the various embodiments of the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0068] The integrated unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application, essentially or in part, or all or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods according to the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (English full name: Read-Only Memory, English abbreviation: ROM), a random access memory (English full name: Random Access Memory, English abbreviation: RAM), a magnetic disk or an optical disk, and various other media that can store program codes.

[0069] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method of generating a partial discharge synchronization signal, characterized by, The method comprises the following steps: obtaining a reference phase sine wave for measuring the phase of the bus voltage; converting the reference phase sine wave into a square wave through a Schmitt trigger circuit, and taking the square wave as a trigger signal of a single-chip microcomputer; calculating, by the single-chip microcomputer, a voltage output change value at different times according to a time difference between two continuously received trigger signals; inputting the voltage output change value into a DAC circuit, so that the DAC circuit generates a sawtooth wave voltage proportional to the phase of the bus voltage based on the voltage output change value, and taking the sawtooth wave voltage as an input signal of an oscilloscope; wherein, after the DAC circuit generates the sawtooth wave voltage proportional to the phase of the bus voltage based on the voltage output change value, the method further comprises the following steps: amplifying the sawtooth wave voltage, inputting the sawtooth wave voltage into the oscilloscope to read a reference voltage, and obtaining the phase of the bus voltage according to the reference voltage.

2. The partial discharge synchronization signal generating method of claim 1, wherein, After the reference phase sine wave for measuring the phase of the bus voltage is obtained, the method further comprises the following step: amplifying and adjusting the phase of the reference phase sine wave through an amplification circuit, and then inputting the reference phase sine wave into the Schmitt trigger circuit.

3. The partial discharge synchronization signal generating method of claim 1, wherein, The reference phase sine wave specifically comprises a high-voltage bus voltage transformer secondary voltage, a high-voltage lightning arrester leakage current, or a 220V power supply.

4. A partial discharge synchronization signal generating device, characterized by comprising: The method comprises the following steps: an obtaining module, configured to obtain a reference phase sine wave for measuring the phase of the bus voltage; a converting module, configured to convert the reference phase sine wave into a square wave through a Schmitt trigger circuit, and take the square wave as a trigger signal of a single-chip microcomputer; a calculating module, configured to calculate, by the single-chip microcomputer, a voltage output change value at different times according to a time difference between two continuously received trigger signals; a generating module, configured to input the voltage output change value into a DAC circuit, so that the DAC circuit generates a sawtooth wave voltage proportional to the phase of the bus voltage based on the voltage output change value, and take the sawtooth wave voltage as an input signal of an oscilloscope; the method further comprises a reading module. The reading module is configured to amplify the sawtooth wave voltage, input the sawtooth wave voltage into the oscilloscope to read a reference voltage, and obtain the phase of the bus voltage according to the reference voltage.

5. The partial discharge synchronization signal generating device according to claim 4, characterized in that, The method further comprises the following steps: a preprocessing module; The preprocessing module is configured to amplify and adjust the phase of the reference phase sine wave through an amplification circuit, and then input the reference phase sine wave into the Schmitt trigger circuit.

6. The partial discharge synchronization signal generating apparatus according to claim 4, wherein The reference phase sine wave specifically comprises a high-voltage bus voltage transformer secondary voltage, a high-voltage lightning arrester leakage current, or a 220V power supply.

7. A partial discharge synchronization signal generating device, characterized by, The device comprises a processor and a memory: The memory is configured to store program code and transmit the program code to the processor; The processor is configured to execute the partial discharge synchronous signal generation method according to the instructions in the program code.

8. A computer-readable storage medium, characterized in that, The computer readable storage medium is configured to store program code for executing the partial discharge synchronous signal generation method.

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