A method, apparatus, device, and readable storage medium for generating a test program

Abstract

An embodiment of the present invention provides a method, apparatus, device, and readable storage medium for generating a test program. The method includes: obtaining an opcode of an instruction to be generated; in the case where it is determined that the instruction to be generated is a jump instruction according to the opcode, determining a target address range that the jump instruction can jump to, and determining at least one target virtual page located within the target address range from the pre-partitioned virtual pages; in the case where the target virtual page includes a target address that meets the constraint conditions, setting the operand of the jump instruction to match the target address, so as to use the target address as the target address when the jump instruction jumps; constructing a jump instruction based on the opcode and the operand, so as to generate a test program based on the constructed jump instruction. During the running process of the test program, limiting the target address of the jump instruction within the pre-generated virtual pages can avoid frequent TLB reload operations, thereby improving the verification efficiency of the processor.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and in particular, to a test program generation method, apparatus, device, and readable storage medium. Background Art

[0002] In the pre-silicon verification stage of a processor, a test program can be passed to a code emulator. The code emulator simulates the operation of the test program by the register transfer level (RTL) code of the central processing unit (CPU) of the processor to complete the functional verification of the processor.

[0003] During the verification process, in order to cover all functions of the processor as much as possible, the test program usually includes a relatively large number of instructions, resulting in a relatively large number of virtual pages required for the test program. The processor includes a translation lookaside buffer (TLB), and each entry in the page table stored in the TLB stores the mapping relationship between a virtual page and the corresponding physical page. When the code emulator simulates the processor reading an instruction in the test program, it can determine the corresponding physical page from the TLB based on the address of the instruction in the virtual page, and then read the instruction from the physical page in the memory. The space of the TLB is limited and can only store the entries of a certain number of virtual pages. When the number of virtual pages of the test program is relatively large, there will be a situation where the mapping relationships of a relatively large number of virtual pages are not stored in the TLB. During the operation of the test program, there will be a frequent phenomenon of TLB address lookup failure (TLB miss), and frequent TLB refill operations are required, resulting in low verification efficiency. Summary of the Invention

[0004] In view of the above problems, embodiments of the present invention are proposed to provide a test program generation method that overcomes the above problems or at least partially solves the above problems, so as to solve the problem of low verification efficiency of the processor.

[0005] Correspondingly, embodiments of the present invention further provide a test program generation apparatus, an electronic device, and a readable storage medium to ensure the implementation and application of the above method.

[0006] In a first aspect, embodiments of the present invention disclose a test program generation method, including:

[0007] Obtain the operation code of the instruction to be generated;

[0008] When it is determined that the instruction to be generated is a jump instruction according to the operation code, determine the target address range that the jump instruction can jump to, and determine at least one target virtual page located within the target address range from the pre-divided virtual pages;

[0009] When the target virtual page includes a target address that meets the constraint conditions, set the operand of the jump instruction to match the target address, so as to use the target address as the target address when the jump instruction jumps;

[0010] Construct the jump instruction based on the operation code and the operand, so as to generate a test program based on the constructed jump instruction.

[0011] Optionally, the determining the target address range that the jump instruction can jump to, and determining at least one target virtual page located within the target address range from the pre-divided virtual pages includes:

[0012] When the jump direction of the jump instruction points to the current virtual page, use the address range of the current virtual page as the target address range, and use the current virtual page as the target virtual page; the current virtual page is the virtual page where the jump instruction is located;

[0013] When the jump direction points to an adjacent virtual page, use the address range corresponding to the operand as the target address range, and select the adjacent virtual page as the target virtual page; the adjacent virtual page is the other virtual page among the virtual pages located within the target address range except the current virtual page.

[0014] Optionally, the determining the target address range that the jump instruction can jump to includes:

[0015] When the jump instruction is immediate addressing, determine that the operand includes a first immediate number, and determine the target address range based on the numerical range of the first immediate number and the address of the jump instruction;

[0016] When the jump instruction is register addressing, determine that the operand includes a second immediate number, and select a candidate register from multiple registers as the target register operated by the jump instruction; determine the target address range based on the original address stored in the target register and the numerical range of the second immediate number; the multiple registers are the registers included in the processor to be verified, and the candidate register is a register that has not been selected before.

[0017] Optionally, when the target virtual page includes a target address that meets the constraint condition, setting the operand of the jump instruction to match the target address includes:

[0018] Select a candidate virtual page from the at least one target virtual page; the candidate virtual page is a target virtual page that has not been selected;

[0019] Set one or more different temporary immediate values according to the base address and the address range of the candidate virtual page; after offsetting the temporary immediate value, the base address corresponds to an alternative address located in the candidate virtual page; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address;

[0020] When one or more of the alternative addresses include a target address that meets the constraint condition, use the temporary immediate value corresponding to the target address as the immediate value in the operand;

[0021] When all of the alternative addresses do not meet the constraint condition, repeat the steps of selecting a candidate virtual page and setting the temporary immediate value until the immediate value in the operand is obtained, or until there is no candidate virtual page in the at least one target virtual page.

[0022] Optionally, when the target virtual page includes a target address that meets the constraint condition, setting the operand of the jump instruction to match the target address includes:

[0023] Select a candidate virtual page from the at least one target virtual page; the candidate virtual page is a target virtual page that has not been selected;

[0024] When a target address that meets the constraint condition is traversed from the candidate virtual page, use the offset between the base address and the target address as the immediate value in the operand; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address;

[0025] When a target address that meets the constraint condition is not traversed from the candidate virtual page, repeat the steps of selecting a candidate virtual page and traversing the candidate virtual page until the immediate value in the operand is obtained, or until there is no candidate virtual page in the at least one target virtual page.

[0026] Optionally, the method further includes: when there is no candidate virtual page in the at least one target virtual page and the jump instruction is register addressing, if there is a candidate register among the multiple registers, selecting another candidate register from the multiple registers as the target register, and repeatedly executing the steps of determining the target address range and the target virtual page, and the step of setting the operand to match the target address when the target virtual page includes a target address that meets the constraint condition.

[0027] Optionally, the method further includes: when there is no candidate register among the multiple registers, adding a write instruction before the jump instruction; the write instruction is used to write a target base address to the target register; the target base address is an address in one of the virtual pages.

[0028] Based on the target base address, execute the steps of determining the target address range and the target virtual page, and the step of setting the operand to match the target address when the target virtual page includes a target address that meets the constraint condition;

[0029] When the target virtual page does not include a target address that meets the constraint condition, reset different target base addresses, and repeatedly execute the steps of determining the target address range and the target virtual page based on the target base address, and the step of setting the operand to match the target address when the target virtual page includes a target address that meets the constraint condition, until the immediate value in the operand is obtained, or until a preset end condition is reached.

[0030] Optionally, the method further includes: when the jump direction points to the current virtual page, if the target address is not included in the current virtual page, pointing the jump direction to the adjacent virtual page, and executing the steps of determining the target address range and the adjacent virtual page, and executing the step of setting the operand of the jump instruction to match the target address when the target virtual page includes a target address that meets the constraint condition.

[0031] Optionally, the method further includes: when the target virtual page does not include a target address that meets the constraint condition, randomly selecting an address that meets the constraint condition from the target address range as the target address, and setting the operand of the jump instruction to match the target address.

[0032] In a second aspect, an embodiment of the present invention discloses a test program generation device, including:

[0033] An acquisition module, including acquiring an operation code of an instruction to be generated;

[0034] A determination module, configured to determine a target address range to which the jump instruction can jump when it is determined that the instruction to be generated is a jump instruction according to the operation code, and determine at least one target virtual page located within the target address range from the pre-divided virtual pages;

[0035] A setting module, configured to set the operand of the jump instruction to match the target address when the target virtual page includes a target address that meets the constraint condition, so as to use the target address as the target address when the jump instruction jumps;

[0036] A construction module, configured to construct the jump instruction based on the operation code and the operand, so as to generate a test program based on the constructed jump instruction.

[0037] Optionally, the determination module is configured to use the address range of the current virtual page as the target address range and use the current virtual page as the target virtual page when the jump direction of the jump instruction points to the current virtual page; the current virtual page is the virtual page where the jump instruction is located; when the jump direction points to an adjacent virtual page, use the address range corresponding to the operand as the target address range and select an adjacent virtual page as the target virtual page; the adjacent virtual page is other virtual pages in the virtual pages located within the target address range except the current virtual page.

[0038] Optionally, the determination module is configured to determine that the operand includes a first immediate number when the jump instruction is immediate addressing, and determine the target address range based on the numerical range of the first immediate number and the address of the jump instruction; when the jump instruction is register addressing, determine that the operand includes a second immediate number, and select a candidate register from multiple registers as the target register operated by the jump instruction; determine the target address range based on the original address stored in the target register and the numerical range of the second immediate number; the multiple registers are registers included in the processor to be verified, and the candidate register is a register that has not been selected.

[0039] Optionally, the setting module is configured to select a candidate virtual page from the at least one target virtual page; the candidate virtual page is a target virtual page that has not been selected; one or more different temporary immediate values are set according to the base address and the address range of the candidate virtual page; after offsetting the temporary immediate value, the base address corresponds to an alternative address located in the candidate virtual page; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address; in the case where the target address that meets the constraint condition is included in one or more of the alternative addresses, the temporary immediate value corresponding to the target address is used as the immediate value in the operand; in the case where all the alternative addresses do not meet the constraint condition, the steps of selecting a candidate virtual page and setting the temporary immediate value are repeated until the immediate value in the operand is obtained, or until there is no candidate virtual page in the at least one target virtual page.

[0040] Optionally, the setting module is configured to select a candidate virtual page from the at least one target virtual page; the candidate virtual page is a target virtual page that has not been selected; in the case where a target address that meets the constraint condition is traversed from the candidate virtual page, the offset between the base address and the target address is used as the immediate value in the operand; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address; in the case where a target address that meets the constraint condition is not traversed from the candidate virtual page, the steps of selecting a candidate virtual page and traversing the candidate virtual page are repeated until the immediate value in the operand is obtained, or until there is no candidate virtual page in the at least one target virtual page.

[0041] Optionally, the setting module is further configured to, when there is no candidate virtual page in the at least one target virtual page and the jump instruction is register addressing, if a candidate register is included in the plurality of registers, select another candidate register from the plurality of registers as the target register, and repeatedly execute the steps of determining the target address range and the target virtual page, and the step of setting the operand to match the target address in the case where the target virtual page includes a target address that meets the constraint condition.

[0042] Optionally, the setting module is further configured to, when there is no register to be selected among the multiple registers, add a write instruction before the jump instruction; the write instruction is used to write a target base address to the target register; the target base address is an address in one of the virtual pages; based on the target base address, perform the steps of determining the target address range and the target virtual page, and the step of setting the operand to match the target address when the target virtual page includes a target address that meets the constraint condition; when the target virtual page does not include a target address that meets the constraint condition, reset different target base addresses, and repeatedly execute the steps of determining the target address range and the target virtual page based on the target base address, and the step of setting the operand to match the target address when the target virtual page includes a target address that meets the constraint condition, until the immediate value in the operand is obtained or until a preset end condition is reached.

[0043] Optionally, the setting module is further configured to, when the jump direction points to the current virtual page, if the target address is not included in the current virtual page, point the jump direction to the adjacent virtual page, and perform the steps of determining the target address range and the adjacent virtual page, and the step of setting the operand of the jump instruction to match the target address when the target virtual page includes a target address that meets the constraint condition.

[0044] Optionally, the setting module is further configured to, when the target virtual page does not include a target address that meets the constraint condition, randomly select an address that meets the constraint condition from the target address range as the target address, and set the operand of the jump instruction to match the target address.

[0045] In a third aspect, an embodiment of the present invention discloses an electronic device, including a processor and a memory, and one or more programs, where one or more programs are stored in the memory and are configured to be executed by one or more processors, so that the electronic device can execute the test program generation method as described in the first aspect.

[0046] In a fourth aspect, an embodiment of the present invention further discloses a readable storage medium, when the instructions in the readable storage medium are executed by a processor of an electronic device, enabling the electronic device to execute the test program generation method as described in the first aspect.

[0047] The embodiments of the present invention have the following advantages: In the process of generating a jump instruction, first determine the target virtual page within the target address range, then find and determine the target address that can be used as the jump instruction from the target virtual page, and set the operand of the jump instruction to match the target address, so that the target address of the jump instruction can be limited within the currently generated virtual page. During the operation of the test program, when the jump instruction is executed, if the target address of the jump instruction is in a virtual page before the current virtual page, the mapping relationship of this virtual page has probably been loaded into the TLB. Therefore, the probability of obtaining the mapping relationship of the virtual page where the target address is located from the TLB is significantly increased, the probability of TLB address lookup failure can be reduced, and the operation of frequently reloading the TLB can be avoided, thereby improving the verification efficiency of the processor. Description of the Drawings

[0048] Figure 1 The flowchart showing the steps of a method for generating a test program in an embodiment of the present invention;

[0049] Figure 2 The schematic diagram showing the search process of a target address in an embodiment of the present invention;

[0050] Figure 3 The schematic diagram showing the search process of a target virtual page in an embodiment of the present invention;

[0051] Figure 4 The schematic diagram showing another search process of a target address in an embodiment of the present invention;

[0052] Figure 5 The schematic diagram showing yet another search process of a target address in an embodiment of the present invention;

[0053] Figure 6 The schematic diagram showing yet another search process of a target address in an embodiment of the present invention;

[0054] Figure 7 The schematic diagram showing the selection of a jump direction in an embodiment of the present invention;

[0055] Figure 8 The schematic diagram showing yet another search process of a target address in an embodiment of the present invention;

[0056] Figure 9 The block diagram showing the structure of a test program generation device in an embodiment of the present invention;

[0057] Figure 10 The block diagram showing the structure of an electronic device in an embodiment of the present invention. Detailed Embodiments

[0058] This embodiment provides a test program generation method, apparatus, device, and readable storage medium. The following further describes the embodiments of the present invention in detail with reference to the accompanying drawings and specific implementation manners.

[0059] In the prior art, when generating a jump instruction in a test program, a random address that meets the constraint conditions is selected from the virtual address space corresponding to the test program as the target address when the jump instruction jumps. During the running of the test program, when the jump instruction is executed, first the target address of the jump instruction is determined, and then the jump is made to the target address. Since the target address is very likely not in the current virtual page where the jump instruction is located, and the mapping relationship of the virtual page where the target address is located is very likely not pre-loaded into the TLB, it is necessary to perform a reloading of the TLB. During the verification process, in order to cover all functions of the processor as much as possible, the test program includes a relatively large number of jump instructions, and it is necessary to frequently perform the reloading of the TLB, which reduces the verification efficiency of the processor.

[0060] One of the core concepts of the embodiments of the present invention is that when generating a jump instruction in a test program, the target address of the jump instruction is limited to a virtual page obtained by pre-partitioning. The target address of the jump instruction is a virtual address in this virtual page, and this virtual address is not assigned to other instructions except the jump instruction. At the same time, this virtual page is within the target address range, close to the current virtual page where the jump instruction is located, and is partitioned before the current virtual page. During the storage process of the test program, multiple virtual pages are stored in sequence according to the partitioning order of the virtual pages. The TLB usually stores the mapping relationships of multiple virtual pages in sequence according to the storage order of the virtual pages. When the jump instruction is read into the processor, the mapping relationship of the current virtual page where the jump instruction is located has been stored in the TLB, and at the same time, the mapping relationships of multiple virtual pages before the current virtual page are very likely to have been pre-loaded into the TLB and have not been replaced out of the TLB. During the running of the test program, when the jump instruction is executed, the target address of the jump instruction is in a virtual page before the current virtual page, and the mapping relationship of this virtual page is very likely to have been loaded into the TLB and has not been replaced out of the TLB. It is very likely to directly obtain the mapping relationship of this virtual page from the TLB, which can reduce the probability of TLB address lookup failure and avoid frequently performing the operation of reloading the TLB, thereby improving the verification efficiency of the processor.

[0061] Among them, the addresses mentioned in this embodiment are all virtual addresses (Virtual Address, VA) in the virtual address space corresponding to the test program. A virtual page can be called a page, a program counter (Program counter, PC) page, or a virtual address page. A virtual page is an address range in the virtual address space obtained by dividing during the generation of the test program, including a continuous plurality of virtual addresses between the start address and the end address. The size of the virtual page can be 4 kilobytes (k), 16 kilobytes, 2 megabytes (M), or 32 megabytes.

[0062] The test program includes multiple instructions, and each instruction is an instruction in the instruction set of the processor, such as an addition instruction, a subtraction instruction, a write instruction, a read instruction, a jump instruction, and other instructions. An instruction includes an operation code (Operationcode) and an operand, or only includes an operation code. The size of the instruction that the processor can execute is fixed, so the virtual address configured for each instruction must meet the alignment principle. For example, if each instruction consists of 4 bytes, then 4 bytes of physical address are required to store each instruction, and the virtual address configured for the instruction corresponds to the physical address. During the generation of the test program, each instruction in the instruction set can be generated and the instruction can be simulated to execute to obtain the corresponding target result. During the running of the test program, when executing a certain instruction, the actual result during the instruction execution can be obtained, and by comparing whether the actual result is the same as the target result, it can be verified whether the various functions of the processor are normal.

[0063] Refer to Figure 1 , which shows the step flowchart of a test program generation method in an embodiment of the present invention. The method may include the following steps:

[0064] Step 101, obtain the operation code of the instruction to be generated.

[0065] In this embodiment, the test program generation method can be implemented by electronic devices such as computers and servers. A configuration file is pre-stored in the electronic device, and the configuration file includes an opcode set required for generating a test program. The opcode set includes the opcodes of each instruction in the instruction set, such as the opcodes of addition instructions, subtraction instructions, write instructions, read instructions, jump instructions, and other different instructions. When generating each instruction in the test program, the electronic device can first obtain an opcode from the opcode set, and then set corresponding operands for the opcode according to the instruction type to which the opcode belongs. The instruction to be generated is the instruction that is about to be generated. The electronic device can randomly select an opcode from the opcode set as the opcode of the instruction to be generated, or select an opcode from the opcode set according to certain rules as the opcode of the instruction to be generated. The method for the electronic device to obtain the opcode can be set according to requirements, and this embodiment does not limit this.

[0066] When generating an instruction, the electronic device can divide the virtual address space, dividing the virtual address space into multiple virtual pages, and each virtual page includes multiple virtual addresses from the start address to the end address. When generating each instruction, a corresponding virtual address can be assigned to the instruction, and the virtual address is located in one of the virtual pages. For example, when generating the first instruction in the test program, the first virtual page can be divided, and the size of the first virtual page can be set to 4k bytes. When the start address of the first virtual page is the virtual address N in the virtual address space, the end address is the (N + 4k) -th byte address in the virtual address space. The process of dividing the virtual page can be set according to requirements, and this embodiment does not limit this.

[0067] In one implementation, after obtaining the opcode of the instruction to be generated, a virtual address that meets the constraint conditions can be first assigned to the instruction to be generated in the current virtual page. The constraint conditions are used to determine whether a virtual address can be used as the target address of a jump instruction. The constraint conditions can be that the virtual address meets the alignment principle and is not occupied by other instructions. For example, before obtaining the opcode of the instruction to be generated, a virtual page is pre - divided, and the virtual page includes a virtual address that meets the alignment principle and is not assigned to other instructions, then this virtual address can be assigned to the instruction to be generated. The constraint conditions can be specifically set according to different instructions. For a jump instruction, the constraint conditions can also include having a continuous number of free virtual addresses after the virtual address, that is, when a certain virtual address meets the alignment principle, is not occupied by other instructions, and has multiple virtual addresses not occupied by other instructions after this virtual address, this virtual address can be used as the virtual address of the jump instruction.

[0068] Step 102: When it is determined that the instruction to be generated is a jump instruction according to the operation code, determine the range of target addresses that the jump instruction can jump to, and determine at least one target virtual page located within the target address range from the pre-partitioned virtual pages.

[0069] Among them, after obtaining the operation code, the electronic device first determines the type of instruction to which the operation code belongs. If it is determined that the operation code is the operation code of a jump instruction, it is determined that the instruction to be generated is a jump instruction. The jump instruction can be a jump instruction with immediate addressing or a jump instruction with register addressing. The target address of the jump instruction is the sum of the base address and the address offset. In the jump instruction with immediate addressing, the operand of the jump instruction includes an immediate number, which is the address offset, and the base address is the address of the jump instruction, that is, the virtual address allocated to the jump instruction during the generation of the jump instruction. In the jump instruction with register addressing, the operand of the jump instruction includes a register identifier and an immediate number. The address stored in the register represented by the register identifier is the base address, and the immediate number is the address offset. In this embodiment, the immediate number included in the operand of the jump instruction with immediate addressing is called the first immediate number, and the immediate number included in the operand of the jump instruction with register addressing is called the second immediate number. The first immediate number and the second immediate number are collectively referred to as the immediate number. The register identifier represented by the register included in the operand of the jump instruction is one of the multiple registers included in the processor to be verified, and the register is a general register in the processor. During the generation of the jump instruction, it is necessary to select a register from the multiple registers included in the processor and use the identifier of the selected register as the register identifier in the operand of the jump instruction. This register is read by the jump instruction when the jump instruction is executed to obtain the base address during the jump process.

[0070] In this embodiment, after determining that the instruction to be generated is a jump instruction, the electronic device can first determine the range of target addresses that the jump instruction can jump to, then determine the target virtual pages located within the target address range from one or more pre-partitioned virtual pages, and finally find and determine the target addresses that meet the constraint conditions from the target virtual pages. As Figure 2 shown Figure 2The figure shows a schematic diagram of the search process for a target address in an embodiment of the present invention. For a jump instruction with immediate addressing, first, the value range of the first immediate number can be determined. Then, based on the value range of the first immediate number, the target address range is determined, and the target virtual page within the target address range is determined. The target address that meets the constraint conditions is searched and determined from the target virtual page. For a jump instruction with register addressing, first, a register is selected as the target register for the jump instruction to operate on, and the value range of the second immediate number is determined. Then, based on the original address stored in the target register and the value range of the second immediate number, the target address range is determined, and the target virtual page within the target address range is determined. Finally, the target address that meets the constraint conditions is searched and determined from the target virtual page. When the jump instruction is register addressing, after a certain register is used as the target register, if no target address that meets the constraint conditions is found, another register can be reselected as the target register, the target address range and the target virtual page are re - determined, and the target address that meets the constraint conditions is searched again. Figure 2 The symbol "N1" in [description] means that after a certain register is selected as the target register, no target address that meets the constraint conditions is found from all the target virtual pages within the target address range. At this time, another register can be selected as the target register, the target address range and the target virtual page are re - determined, and then the target address that meets the constraint conditions is searched and determined. Figure 2 The symbol "N2" in [description] means that after all registers are selected as the target registers, no target address that meets the constraint conditions is found. At this time, a write instruction can be added before the jump instruction. The appropriate target base address is written into the target register through the write instruction. Then, based on the target base address, the target address range is re - determined, and the target virtual page is re - determined. The target address is re - searched and determined from the target virtual page.

[0071] Optionally, the step of determining the target address range that the jump instruction can jump to may include:

[0072] In the case where the jump instruction is immediate addressing, it is determined that the operand includes the first immediate number. Based on the value range of the first immediate number and the address of the jump instruction, the target address range is determined;

[0073] In the case where the jump instruction is register addressing, it is determined that the operand includes the second immediate number, and a candidate register is selected from multiple registers as the target register for the jump instruction to operate on; based on the original address stored in the target register and the value range of the second immediate number, the target address range is determined. The multiple registers are the registers included in the processor to be verified, and the candidate register is a register that has not been selected during the generation of the jump instruction.

[0074] Among them, the target register refers to the register to which the register identifier included in the operand of the jump instruction with register addressing belongs. During the execution of the jump instruction, according to the register identifier included in the operand, the base address is read from the target register, and the target address is determined based on the base address and the address offset. As described above, the target address of the jump instruction is the sum of the base address and the address offset. When the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address stored in the target register. The base address is fixed, and by adjusting the size of the address offset, different target addresses can be obtained. When the address offset reaches the maximum value, the target address is the maximum target address that the jump instruction can jump to; when the address offset reaches the minimum value, the target address is the minimum target address that the jump instruction can jump to. The address offset is the immediate number included in the operand of the jump instruction. Since the jump instruction has a fixed number of bits, the immediate number is a binary number with a fixed number of bits and has a maximum value and a minimum value. When the immediate number is positive, the target address is after the base address; when the immediate number is negative, the target address is before the base address. For example, if the base address is X, the maximum value of the immediate number is Y, the minimum value is Z, Y is a positive binary number, and Z is a negative binary number, then the target address range is from (X + Z) to (X + Y).

[0075] Combined with the above example, when the jump instruction is immediate addressing, the operand of the jump instruction is an immediate number, which is the first immediate number. First, the number of bits of the first immediate number can be determined. Based on the number of bits of the first immediate number, the maximum and minimum values that the first immediate number can reach can be determined. At this time, the base address is the address of the jump instruction. The sum of the base address and the maximum value of the first immediate number is the maximum target address within the target address range, and the sum of the base address and the minimum value of the first immediate number is the minimum target address within the target address range. In this way, the target address range can be determined. When the jump instruction is register addressing, the operands of the jump instruction include a register identifier and an immediate number, which is the second immediate number. Since the jump instruction is an instruction to be generated, the register operated by the jump instruction is not determined. At this time, a candidate register can be selected from multiple registers as the target register operated by the jump instruction, and the original address stored in the target register is used as the base address. Further, the maximum target address can be determined based on the base address and the maximum value of the second immediate number, and the minimum target address can be determined based on the base address and the minimum value of the second immediate number. In this way, the target address range can be determined. Before generating the jump instruction, other instructions have been pre-generated, and the original address stored in the target register is written by other instructions. The candidate register is a register that has not been selected during the process of generating the jump instruction. For example, if the processor includes 32 registers, when the opcode of the jump instruction is just obtained, all 32 registers are candidate registers. After one of the registers is selected as the target register, the remaining registers are candidate registers. It should be noted that during the process of determining the target address range, the specific values of the first immediate number or the second immediate number are not determined. Only based on the number of bits of the first immediate number or the second immediate number, the numerical range of the first immediate number or the second immediate number is determined.

[0076] In this embodiment, after determining the target address range, the target virtual page located within the target address range can be determined from one or more pre-generated virtual pages. As Figure 3 shown, Figure 3The figure shows a schematic diagram of the search process for a target virtual page in an embodiment of the present invention. Each virtual page includes multiple virtual addresses from a starting address to an ending address. After determining the target address range, first, a virtual page can be selected from all pre-generated virtual pages, and the starting address and ending address of the virtual page are determined. Then, the starting address of the virtual page is compared with the minimum target address within the target address range, and the ending address of the virtual page is compared with the maximum target address within the target address range. If the starting address of the virtual page is greater than the minimum target address and the ending address of the virtual page is less than the maximum target address, it is determined that the virtual page is within the target address range. For example, if the starting address of a certain virtual page is A and the ending address is B, and the target address range is from (X + Z) to (X + Y), when it is determined that the starting address A is greater than (X + Z) and the ending address B is less than (X + Y), it can be determined that the virtual page is within the target address range, and the virtual page can be used as the target virtual page.

[0077] Among them, after dividing the virtual pages, different page numbers can be set for each virtual page, and the page number can be the starting address of the virtual page. The starting address and ending address of the virtual page can be determined according to the page number of the virtual page. For example, when the page number of the virtual page is the starting address, the page number of the virtual page can be shifted by a target number of bits to obtain the ending address of the virtual page, and the page number of the virtual page is the starting address of the virtual page. It should be noted that before generating the jump instruction, one or more virtual pages may be pre-divided. After determining the target address range, one or more target virtual pages within the target address range can be determined from all the pre-divided virtual pages.

[0078] Among them, when the jump instruction is register addressing, during the process of selecting the target register, an unselected register can be randomly selected from multiple registers as the target register. Or one of the registers can be sequentially selected as the target register.

[0079] In the embodiment of the present invention, according to the operand of the jump instruction, the target address range that the jump instruction can jump to can be accurately determined. According to the target address range, one or more virtual pages can be determined from all the pre-divided virtual pages as the target virtual pages when the jump instruction jumps.

[0080] Step 103: When the target virtual page includes a target address that meets the constraint conditions, set the operand of the jump instruction to match the target address, so as to use the target address as the target address when the jump instruction jumps.

[0081] In this embodiment, after determining one or more target virtual pages within the target address range, the target virtual pages can be searched to determine whether the target virtual pages contain a target address that meets the constraint condition. When one or more virtual addresses that meet the constraint condition are included in the target virtual pages, one of the virtual addresses that meet the constraint condition can be selected as the target address of the jump instruction, and the operand of the jump instruction is set to match this target address.

[0082] Optionally, step 103 can be implemented by Method 1, and Method 1 includes:

[0083] Select a candidate virtual page from at least one target virtual page; the candidate virtual page is a target virtual page that has not been selected;

[0084] Set one or more different temporary immediate values according to the base address and the address range of the candidate virtual page; after offsetting the temporary immediate value from the base address, it corresponds to an alternative address located in the candidate virtual page; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address;

[0085] In the case where one or more alternative addresses include a target address that meets the constraint condition, the temporary immediate value corresponding to the target address is used as the immediate value in the operand;

[0086] In the case where all alternative addresses do not meet the constraint condition, repeat the steps of selecting a candidate virtual page and setting the temporary immediate value until the immediate value in the operand is obtained, or until there is no candidate virtual page in at least one target virtual page.

[0087] In one implementation, after determining at least one target virtual page, first, a candidate virtual page can be selected from at least one target virtual page, and it is searched and determined whether the selected candidate virtual page contains a target address that meets the constraint condition. The candidate virtual page is a target virtual page that has not been selected among all the target virtual pages determined this time, that is, a target virtual page that has not been searched. For example, if the target virtual pages determined to be within the target address range include target virtual page A, target virtual page B, and target virtual page C, when selecting a candidate virtual page for the first time, target virtual page A, target virtual page B, and target virtual page C are all candidate virtual pages. When the candidate virtual page selected for the first time is target virtual page B, the remaining target virtual pages A and target virtual page C are candidate virtual pages. When selecting for the second time, target virtual page A and target virtual page C are candidate virtual pages, and a candidate virtual page can be selected from target virtual page A and target virtual page C.

[0088] During the process of searching for the selected virtual page to be selected, one or more different temporary immediate numbers can be set according to the address range of the virtual page to be selected and the size of the base address, and the base address can be controlled so that the alternative address obtained after offsetting the temporary immediate number is within the address range of the target virtual page. For example, when the jump instruction is immediate addressing, the base address is the address of the jump instruction. After selecting the target virtual page A as the virtual page to be selected, the start address and end address of the target virtual page A can be determined, and a temporary immediate number can be set through a preset algorithm to control the sum of the address of the jump instruction and the temporary immediate number to be between the start address and end address of the target virtual page A. At this time, the sum of the address of the jump instruction and the temporary immediate number is the alternative address. When the jump instruction is register addressing, since a register has been pre-selected as the target register during the process of determining the target address range, the start address and end address of the target virtual page A can be determined, and a temporary immediate number can be set through a preset algorithm, and the sum of the original address stored in the target register and the temporary immediate number can be controlled to be between the start address and end address of the target virtual page A. At this time, the sum of the original address and the temporary immediate number is the alternative address.

[0089] After setting the temporary immediate number, it can be determined whether the alternative address corresponding to the temporary immediate number meets the above constraints. When the alternative address meets the constraints, the alternative address is determined as the target address, and the operand matching the target address can be set to obtain the operand of the jump instruction. Specifically, when the alternative address meets the constraints, if the jump instruction is immediate addressing, the temporary immediate number corresponding to the alternative address can be directly used as the first immediate number in the operand of the jump instruction; when the jump instruction is register addressing, the temporary immediate number corresponding to the alternative address can be used as the second immediate number in the operand of the jump instruction, and the pre-selected target register can be used as the register in the operand of the jump instruction, and the register identifier of the target register can be used as an operand of the jump instruction.

[0090] Among them, during the process of setting the temporary immediate number, one temporary immediate number can be set to obtain an alternative address, and then it is judged whether the alternative address meets the constraint conditions. Multiple different temporary immediate numbers can also be set at one time to obtain multiple different alternative addresses, and then it is judged whether each alternative address meets the constraint conditions. Or, the total number of loops can be set. During the process of setting the temporary immediate number, one temporary immediate number is set each time, and then it is judged whether the corresponding alternative address meets the constraint conditions. When the alternative address meets the constraint conditions, the alternative address is used as the target address. When the alternative address does not meet the constraint conditions, the steps of setting the temporary immediate number and judging whether the alternative address meets the constraint conditions can be looped. The loop ends when the alternative address meets the constraint conditions, and the temporary immediate number corresponding to the alternative address is used as the immediate number in the operand. Or when the number of loops reaches the total number of loops, the loop stops, and it is determined that the selected candidate virtual page does not include a target address that meets the constraint conditions.

[0091] As Figure 4 shown, Figure 4 FIG. shows a schematic diagram of another process for finding a target address in an embodiment of the present invention. When it is determined that the instruction to be generated is a jump instruction, the electronic device first determines the target address range, and then determines one or more target virtual pages located within the target address range from all the previously divided virtual pages. After determining one or more target virtual pages, a candidate virtual page can be selected from them to find out whether the candidate virtual page includes a target address that meets the constraint conditions. When it is found and determined from the selected candidate virtual page that there is a target address that meets the constraint conditions, the operand of the jump instruction is set to match the target address, and the entire search process ends. When it is not found and determined from the selected candidate virtual page that there is a target address that meets the constraint conditions, another candidate virtual page is selected to continue the search. After all the target virtual pages have been selected and searched, if the target address has not been determined yet, it can be determined that none of the current target virtual pages includes a target address that meets the constraint conditions, and the search process can end.

[0092] In an embodiment of the present invention, during the process of searching for a target virtual page, one or more temporary immediate numbers can be set according to the address range of the target virtual page and the base address of the jump instruction to obtain one or more alternative addresses located in the target virtual page. When the alternative address meets the constraint conditions, the alternative address is used as the target address of the jump instruction, and the operand of the jump instruction is determined according to the target address. A target address that meets the constraint conditions can be found and determined from the target virtual page, so as to limit the target address of the jump instruction to one of the target virtual pages.

[0093] Optionally, step 103 can be implemented by Method 2, and Method 2 includes:

[0094] Select a candidate virtual page from at least one target virtual page; the candidate virtual page is a target virtual page that has not been selected before.

[0095] In the case where a target address that meets the constraint conditions is traversed from the candidate virtual page, use the offset between the base address and the target address as the immediate number in the operand; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address.

[0096] In the case where a target address that meets the constraint conditions is not traversed from the candidate virtual page, repeat the steps of selecting a candidate virtual page and traversing the candidate virtual page until the immediate number in the operand is obtained, or until there is no candidate virtual page in at least one target virtual page.

[0097] In one implementation, the target virtual page can be searched by traversal to determine whether the target virtual page includes a target address that meets the constraint conditions. Figure 4 As shown, at the first selection, the target virtual page A can be selected from all candidate virtual pages. After selecting the target virtual page A, starting from the starting address of the target virtual page A, it can be determined in turn whether each virtual address is occupied by other instructions. If the virtual address is not occupied by other instructions and meets the alignment principle, it can be determined that the virtual address meets the constraint conditions and is the target address. After all virtual addresses in the target virtual page A have been traversed, if no target address that meets the constraint conditions is determined, it is determined that there is no target address that meets the constraint conditions in the target virtual page A. At this time, another candidate virtual page can be selected for traversal. When a target address that meets the constraint conditions is traversed, the traversal ends, and the address offset between the target address and the base address is set as the immediate number in the operand to make the operand match the target address. When selecting a candidate virtual page, if all target virtual pages have been selected and each target virtual page does not include a target address that meets the constraint conditions, the selection of candidate virtual pages can be stopped, it is determined that none of the current target virtual pages include a target address that meets the constraint conditions, and the search process can be ended.

[0098] Among them, when setting the operand of the jump instruction according to the traversed target address, when the jump instruction is immediate addressing, the base address is the address of the jump instruction, the target address is the sum of the address of the jump instruction and the immediate number, and the address offset between the target address and the address of the jump instruction can be used as the immediate number in the operand of the jump instruction. When the jump instruction is register addressing, the target register has been determined in advance during the process of determining the target range, and the address offset between the target address and the original address stored in the target register can be used as the immediate number in the operand.

[0099] In an embodiment of the present invention, after determining the target virtual page, the method may determine whether the target virtual page includes a target address that meets the constraint conditions by traversing. When the target address is traversed, an operand that matches the target address is set to obtain the operand of the jump instruction. By traversing, it is possible to quickly determine whether the target virtual page includes a target address that meets the constraint conditions.

[0100] Optionally, the method may further include:

[0101] In the case where there is no candidate virtual page in at least one target virtual page and the jump instruction is register addressing, if there is a candidate register among multiple registers, another candidate register is selected from the multiple registers as the target register, and the steps of determining the target address range and the target virtual page are repeatedly executed, and the step of setting the operand to match the target address in the case where the target virtual page includes a target address that meets the constraint conditions is repeated.

[0102] In one embodiment, when the jump instruction is register addressing, the target address range is determined according to the original address stored in the target register. When different registers are selected and the original addresses stored in different registers are different, different target address ranges can be determined, and different target virtual pages can be determined. When it is determined that none of the current target virtual pages include a target address that meets the constraint conditions, another candidate register can be reselected as the target register, and then, according to the original address in the new target register, the target address range is re-determined, and the target virtual page is re-determined according to the new target address range. Finally, the new target virtual page is searched to determine whether the target virtual page includes a target address that meets the constraint conditions. As Figure 5 shown, Figure 5 FIG. shows another schematic flow chart for searching a target address in an embodiment of the present invention. For a jump instruction with register addressing, first, a register is selected from multiple registers included in the processor as the target register, and then the original address stored in the target register is used as the base address, and the target address range is determined in combination with the value range of the immediate number. After determining the target address range, at least one target virtual page within the target address range is determined, and candidate virtual pages are sequentially selected from the at least one target virtual page for searching to determine a target address that meets the constraint conditions. When there is no target address that meets the constraint conditions in the selected candidate virtual page, another candidate virtual page is selected for searching. After all target virtual pages have been selected, if no target address that meets the constraint conditions is determined, it can be determined that none of the current target virtual pages include a target address that meets the constraint conditions. At this time, another register can be selected as the target register. Then, the target address range is re-determined according to the original address in the new target register, and the new target virtual page is re-determined, and the new target virtual page is searched. Figure 5The symbol "Y1" in the Chinese text indicates that when all target virtual pages have been searched and the target address has not been determined, if there are still unselected registers, another candidate register can be selected as the target register, and then the target address range and target virtual pages are re-determined, and the re-determined target virtual pages are searched. After all registers have been selected as target registers, if the target address that meets the constraint conditions has not been determined, it is determined that the target address that meets the constraint conditions cannot be determined based on the original addresses stored in all the current registers.

[0103] In an embodiment of the present invention, when the jump instruction is register addressing, each register can be cyclically selected as the target register for the jump instruction to operate, and the steps of determining the target address range and target virtual pages, and searching the target virtual pages are cyclically executed until the target address is determined or all registers have been selected as target registers. Cycling through each register as the target register can comprehensively determine all target virtual pages, search all target virtual pages to determine the target address, so that the target address can be limited to the target virtual pages as much as possible.

[0104] Optionally, the method may further include:

[0105] In the case where there are no candidate registers among multiple registers, a write instruction is added before the jump instruction; the write instruction is used to write the target base address to the target register; the target base address is an address in one of the virtual pages;

[0106] Based on the target base address, the steps of determining the target address range and target virtual pages are executed, and the step of setting the operand to match the target address in the case where the target virtual page includes a target address that meets the constraint conditions;

[0107] In the case where the target virtual page does not include a target address that meets the constraint conditions, different target base addresses are re-set, and the steps of determining the target address range and target virtual pages based on the target base address, and the step of setting the operand to match the target address in the case where the target virtual page includes a target address that meets the constraint conditions are repeatedly executed until the immediate number in the operand is obtained, or until a preset end condition is reached.

[0108] In one embodiment, after all registers are selected, if the target address that meets the constraint conditions still cannot be found, a write instruction can be added before the jump instruction to write a new address, i.e., the target base address, to the target register. The target base address can be different from the original addresses stored in each register. After all registers are selected and the target address has not been found yet, it means that the target address that meets the constraint conditions cannot be determined based on the original addresses stored in all current registers. Among them, the target base address can be the address in a predetermined virtual page selected from all pre-generated virtual pages. The target base address can be the starting address of the predetermined virtual page or other addresses in the predetermined virtual page. As Figure 5 shown, after it is determined that all registers are selected, a write instruction can be added before the jump instruction. The register operated by the write instruction is the target register, and the address written to the target register is the target base address. The target base address can be written to the target register through the write instruction. At this time, a new target address range can be re-determined according to the value ranges of the target base address and the immediate number. Further, a new target virtual page can be determined based on the new target address range, and then the new target virtual page can be searched. When the target address that meets the constraint conditions is included in the new target virtual page, the operand of the jump instruction is set to match the target address.

[0109] In some cases, after writing the target base address to the target register, it may still be impossible to find the target address that meets the constraint conditions from the re-determined target virtual page. At this time, a different target base address can be re-set, the target address range and the target virtual page can be re-determined according to the different target base addresses, and then the target address can be found and determined from the new target virtual page. However, during the process of generating the test program, it is impossible to set the target base address infinitely many times. An end condition can be set in advance to control the setting of the target base address to stop when the end condition is reached. As Figure 5 shown, the end condition can be the maximum number of times, Figure 5 where the symbol "Y2" indicates that after re-determining the target virtual page based on a certain target base address, the target virtual page does not include the target address that meets the constraints. At this time, it can be first determined whether the setting times of the target base address reach the maximum number of times. If not, the step of setting the target base address is re-executed to set a new target base address, and then the target virtual page is re-determined based on the new target base address, and the re-determined target virtual page is searched. When the setting times of the target base reach the maximum number of times, it is determined that the end condition is reached, and the setting of the new target base address is stopped. The end condition can be set according to requirements, and this embodiment does not limit this.

[0110] Optionally, in the process of re-determining the target address range and the target virtual page based on the target base address, a virtual page can be randomly selected from all pre-generated virtual pages as the predetermined virtual page, or an adjacent virtual page close to the current virtual page can be selected as the predetermined virtual page according to the generation order of the virtual pages. Alternatively, after determining the predetermined virtual page, the address range of the predetermined virtual page can be used as the target address range, and the predetermined virtual page can be used as the target virtual page to search and determine whether the target address that meets the constraint conditions is included in the predetermined virtual page.

[0111] Optionally, before adding a write instruction, a register can be re-selected from multiple registers included in the processor as the target register, and the target base address can be written into the target register, or the target base address can be directly written into the pre-determined target register.

[0112] In some cases, after writing the target base address into the target register multiple times, it may still be impossible to find the target address that meets the constraint conditions from the target virtual page. At this time, the target base address can be adjusted, the target address range and the target virtual page can be re-determined according to different target base addresses, and then the target address can be searched and determined from the new target virtual page. As Figure 5 shown, Figure 5 in the symbol "Y2" indicates that after determining the target virtual page based on a certain target base address, when searching for the target address that meets the constraint conditions, the target address that meets the constraint is not included in all target virtual pages. At this time, it can be first determined whether the setting times of the target base address reach the maximum number of times. If not, a new target base address is set, and then the target address range is re-determined based on a new target base address, and the target virtual page is re-determined, and it is determined whether the target virtual page includes the target address. On the contrary, when the setting times of the target base address reach the maximum number of times, it is determined that the end condition is reached, and the setting of the target base address ends. Among them, in the process of setting the target base address, different virtual pages can be selected as the predetermined virtual page each time, or different addresses in the predetermined virtual page can be selected as the target base address each time.

[0113] In the embodiment of the present invention, when the target address that meets the constraint conditions cannot be determined based on the original addresses in all current registers, a write instruction can be added, the target base address can be written into the target register, a new target virtual page can be re-determined according to the target base address, and the target address that meets the constraint conditions can be searched from the new target virtual page. Since the target base address is located in the pre-generated virtual page, if the target address that meets the constraint conditions is found according to the target base address, the target address can be limited to a pre-generated virtual page.

[0114] Optionally, the method may further include:

[0115] In the case where the target address that meets the constraint conditions is not included in the target virtual page, a random address that meets the constraint conditions is selected from the target address range as the target address, and the operand of the jump instruction is set to match the target address.

[0116] In one embodiment, when the target address that meets the constraint conditions cannot be determined from the target virtual page, a random address that meets the constraint conditions can be selected from the target address range as the target address, and the operand of the jump instruction is set to match the target address. As shown in combination with Figure 5 When the number of times of setting the target base address reaches the maximum number of times, it can be determined that the target address that meets the constraint conditions cannot be determined from the target virtual page. At this time, the step of randomly selecting the target address can be executed. In the step of randomly selecting the target address, first, the target address range is determined. When the jump instruction is register addressing, a register can be reselected as the target register, and the target address range is redetermined according to the original address and the numerical range of the immediate number in the target register. Then, a target address that meets the constraint conditions is found and determined from the target address range. In the step of randomly selecting the target address, when the jump instruction is immediate addressing, the target address range can be determined according to the numerical range of the immediate number and the address of the jump instruction.

[0117] Optionally, one or more temporary immediate numbers can be set in the manner of Method 1 in the above example. At this time, the alternative address corresponding to the sum of the temporary immediate number and the base address is within the target address range. When the alternative address meets the constraint conditions, the alternative address is used as the target address, and the temporary immediate number is used as the immediate number in the operand. When the target address is found and determined by Method 2, a sub-address range can be randomly selected from the target address range for traversal. The sub-address range is smaller than the target address range, and then the virtual addresses within the sub-address range are traversed to determine a target address that meets the constraint conditions.

[0118] Among them, when the jump instruction is register addressing, when executing the step of randomly selecting the target address, a register can be selected from multiple registers as the target register, the target address range is determined based on the original address stored in the target register, and then a random address that meets the constraint conditions is selected from the target address range as the target address. Or, the register that writes the target base address can be directly used as the target register, then the target address range is determined based on the target base address, and then a target address that meets the constraint conditions is selected from the target address range.

[0119] In the embodiment of the present invention, when the target address that meets the constraint conditions cannot be found from the target virtual page, the search range is expanded to the entire target address range, and the target address that meets the constraint conditions is searched from the target address range, so that the target address can be found and determined to successfully generate the jump instruction.

[0120] Step 104: Construct a jump instruction based on the operation code and the operand, and generate a test program based on the constructed jump instruction.

[0121] In this embodiment, after obtaining the operation code and the operand of the instruction to be generated, a jump instruction can be constructed based on the operation code and the operand. Combining the above example, when the jump instruction is immediate addressing, the operation code and the immediate number of the jump instruction can be obtained in the above manner. At this time, the operation code and the immediate number can be combined to obtain the jump instruction. When the jump instruction is register addressing, during the process of determining the target address range, the target register operated by the jump instruction can be determined, and the corresponding immediate number can be obtained. The operation code, the target register, and the immediate number can be combined to obtain the jump instruction. After generating the jump instruction, the jump instruction can be used as an instruction in the test program to generate the test program. After generating the jump instruction, other instructions can continue to be obtained from the operation code set to generate other instructions in the test program.

[0122] Optionally, after generating the jump instruction, the jump instruction can be simulated to execute to obtain the target result of the jump instruction. The target result of the jump instruction is the target address obtained by simulation execution, and the target result can be stored in the result file of the test program. After generating the test program, during the process of simulating the operation of the processor by the code emulator to run the test program, after executing the jump instruction, the actual result of the jump instruction can be obtained, and the actual result is compared with the target result. When the target result is consistent with the actual result, it indicates that the jump function of the processor is normal.

[0123] In summary, in the embodiment of the present invention, the operation code of the instruction to be generated is obtained. When it is determined that the instruction to be generated is a jump instruction according to the operation code, the target address range that the jump instruction can jump to is determined, and at least one target virtual page located within the target address range is determined from the pre-partitioned virtual pages. When the target virtual page includes a target address that meets the constraint conditions, the operand of the jump instruction is set to match the target address, so that the target address is used as the target address when the jump instruction jumps, and the jump instruction is constructed based on the operation code and the operand, so as to generate a test program based on the jump instruction. In the process of generating the jump instruction, first, the target virtual page located within the target address range is determined, and then the target address that can be used as the jump instruction is found and determined from the target virtual page. By setting the operand of the jump instruction to match the target address, the target address of the jump instruction can be limited to the currently generated virtual page. During the running of the test program, when the jump instruction is executed, the target address of the jump instruction is in a virtual page before the current virtual page. The mapping relationship of this virtual page has probably been loaded into the TLB. Therefore, the mapping relationship of the virtual page where the target address is located can probably be obtained from the TLB, which can reduce the probability of TLB address lookup failure and avoid frequent TLB reload operations, thereby improving the verification efficiency of the processor.

[0124] Optionally, step 102 may include:

[0125] When the jump direction of the jump instruction points to the current virtual page, the current virtual page is used as the target virtual page; the current virtual page is the virtual page where the jump instruction is located;

[0126] When the jump direction of the jump instruction points to an adjacent virtual page, the address range corresponding to the operand is used as the target address range, and an adjacent virtual page is selected as the target virtual page; the adjacent virtual page is other virtual pages except the current virtual page among all the pre-generated virtual pages located within the target address range.

[0127] In one embodiment, the jump direction of the jump instruction can be determined in advance, and the jump direction includes current page jump and adjacent page jump. During the process of generating the jump instruction, the electronic device can first determine the jump direction of the jump instruction. When the jump direction is a current page jump, the jump direction points to the current virtual page. When the jump direction is an adjacent page jump, the jump direction points to the adjacent virtual page. When the jump direction points to the current virtual page, the address range of the current virtual page can be directly used as the target address range, and the current virtual page is used as the target virtual page. When the jump direction points to the adjacent virtual page, first determine the address range corresponding to the operand, use the address range corresponding to the operand as the target address range, and then determine one or more virtual pages within the target address range from all the pre-generated pages. If one or more virtual pages include the current virtual page, then the other virtual pages except the current virtual page are used as the adjacent virtual pages, and the adjacent virtual pages are used as the target virtual pages. Among them, the address range corresponding to the operand is the address range determined according to the base address of the jump instruction and the numerical range of the immediate number included in the operand. Combining the above example, when the jump direction points to the adjacent virtual page, after determining the target address range and the target virtual page within the target address range, if all the target virtual pages include the current virtual page, then remove the current virtual page, and the remaining target virtual pages are the adjacent virtual pages. The steps of determining the target address range and the target virtual page can refer to the above example, and will not be elaborated in this embodiment.

[0128] Among them, the jump direction can be determined according to a preset selection mechanism. For example, the user can preset the first probability that the jump direction is a current page jump to 60%, and the second probability that the jump direction is an adjacent page jump to 30%. When it is determined that the instruction to be generated is a jump instruction, the electronic device can select the jump direction as a current page jump or an adjacent page jump based on the first probability and the second probability through a preset selection algorithm. The specific selection method for determining the jump direction can be set according to requirements, and this embodiment does not limit it.

[0129] It should be noted that during the process of generating the jump instruction, the jump direction can be not set. After determining the target address range, directly determine the target virtual page within the target address range from all the pre-generated virtual pages, and find and determine the target address that meets the constraint conditions from all the target virtual pages. Or the jump direction can be set, divide the target virtual pages into adjacent virtual pages and current virtual pages, and find and determine the target address that meets the constraint conditions from the adjacent virtual pages, or find and determine the target address that meets the constraint conditions from the current virtual pages.

[0130] Combined with the above examples, when the jump direction points to the current virtual page, only the current virtual page serves as the target virtual page. The method 1 or method 2 in the above examples can be used to find out whether the target address that meets the constraint conditions is included in the current virtual page. When the jump direction points to an adjacent virtual page, after determining all target virtual pages, if the current virtual page is included in the target virtual pages, the current virtual page is removed from all target virtual pages, and the remaining one or more adjacent virtual pages are used as the target virtual pages. The method 1 or method 2 in the above examples can be used to search the adjacent virtual pages to determine whether the target address that meets the constraint conditions is included in the adjacent virtual pages.

[0131] In the embodiment of the present invention, when setting the jump direction, during the process of generating the jump instruction, the target address of the jump instruction can be limited to the current virtual page or an adjacent virtual page with a certain probability, which can meet the randomness requirement in the verification process and cover all functions of the processor as much as possible in the verification process. The first probability can be set to be greater than the second probability, and the jump direction is preferably pointed to the current virtual page as much as possible. When the jump direction points to an adjacent virtual page, the target address can be determined from the current virtual page, and the target address of the jump instruction is limited to the current virtual page, so as to avoid the situation of TLB address lookup failure as much as possible.

[0132] Optionally, when the target virtual page is the current virtual page, step 103 may include:

[0133] One or more different temporary immediate numbers are set according to the address range and base address setting of the current virtual page; after the base address is offset by the temporary immediate number, it corresponds to an alternative address located in the current virtual page; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address stored in the target register; the target register is a selected candidate register from multiple registers, and the multiple registers are the registers included in the processor to be verified; the candidate register is a register that has not been selected; in the case that the target address that meets the constraint conditions is included in at least one alternative address, the temporary immediate number corresponding to the target address is used as the immediate number in the operand, and when the jump instruction is register addressing, the target register is used as the register operated by the jump instruction.

[0134] Optionally, when the target virtual page is the current virtual page, step 103 may include:

[0135] In the case that the target address that meets the constraint conditions is traversed from the current virtual page, set the operand of the jump instruction to match the target address;

[0136] In the case that the target address that meets the constraint conditions is not traversed from the current virtual page, it is determined that the target address is not included in the current virtual page.

[0137] Optionally, the method may further include:

[0138] When the jump direction points to the current virtual page, if the target address is not included in the current virtual page, the jump direction is pointed to an adjacent virtual page, and the steps of determining the target address range and the adjacent virtual page are performed, and the step of setting the operand of the jump instruction to match the target address is performed when the target virtual page includes a target address that meets the constraint conditions.

[0139] In this embodiment, during the generation of the jump instruction, if a jump direction is set and the jump direction points to the current virtual page, the current virtual page can be used as the target virtual page, and Method 1 or Method 2 is used to find and determine whether the target address is included in the current virtual page. As Figure 6 shown, Figure 6 FIG. shows another schematic flow chart for finding a target address in an embodiment of the present invention. When the jump instruction is an immediate addressing mode, the current virtual page can be searched. When the target address that meets the constraint conditions is included in the current virtual page, the address offset between the address of the jump instruction and the target address is used as the immediate number in the operand. When the target address that meets the constraint conditions is not included in the current virtual page, the search for the current virtual page ends, and the jump direction is adjusted to an adjacent page jump.

[0140] When the jump instruction is a register addressing mode, a candidate register can be sequentially selected from multiple registers as the target register. After selecting the target register, one or more temporary immediate numbers can be set based on the address range of the current virtual page and the original address in the target register. If the alternative address corresponding to the sum of the temporary immediate number and the original address is within the current virtual page and meets the constraint conditions, the alternative address can be used as the target address when the jump instruction jumps, and the immediate number in the jump instruction is set to match the target address. Conversely, when all alternative addresses are not within the current virtual page and / or do not meet the constraint conditions, another register can be selected as the target register, and then it is re-searched whether the target address that meets the constraint conditions is included in the current virtual page according to the original address in the new target register. Figure 6The symbol "N1" in the text means that during the process of searching for the current virtual page, when searching for the current virtual page based on the original address in a certain register, the target address that meets the constraint conditions is not included in the current virtual page. At this time, it is necessary to determine whether there are other candidate registers in the multiple registers included in the processor that have not been selected as the target register. When there are unselected candidate registers, select an unselected candidate register as the target register, and re-search through the original address in the new target register to determine whether the target address is included in the current virtual page. After all registers have been selected, if it is determined that the target address is not included in the current virtual page, a write instruction is added before the jump instruction, and a new base address, that is, the target base address, is written into the target register through the write instruction. The target base address is an address in the current virtual page, which can be the starting address in the current virtual page or other addresses. Then, based on the target base address, the current virtual page is searched. Figure 6 The symbol "N2" in the text means that after adding the write instruction, based on a certain target base address, it is determined that the target address is not included in the current virtual page. At this time, the setting times of the target base address can be judged. When the setting times are less than the maximum times, a new target base address is reset. When the target address reaches the maximum times, it is determined that the target address that meets the constraint conditions is not included in the current virtual page, and the jump direction is adjusted to adjacent page jump.

[0141] In one implementation, when the jump direction points to the current virtual page, if the target address that meets the constraint conditions cannot be found and determined from the current virtual page, the jump direction can be adjusted to adjacent page jump. Further, the target address range and adjacent virtual pages can be determined, and when it is determined that the target address that meets the constraint conditions is included in the adjacent virtual page, the step of setting the operand of the jump instruction to match the target address can be re-executed. As Figure 7 shown Figure 7 Figure 9 shows a schematic diagram of the selection of a jump direction in an embodiment of the present invention. After it is determined that the instruction to be generated is a jump instruction, if the jump direction is determined to be the current virtual page for the first time, when the target address that meets the constraint conditions is included in the current virtual page, a jump instruction is generated based on the target address that meets the constraint conditions. On the contrary, when the target address that meets the constraint conditions is not included in the current virtual page, the jump direction can be adjusted to adjacent page jump, then the target address range and adjacent virtual pages are determined, and it is searched and determined whether the target address that meets the constraint conditions is included in the adjacent virtual page. When it is searched and determined that the target address that meets the constraint conditions is included in the adjacent virtual page, a jump instruction is generated based on the target address.

[0142] Optionally, the jump direction may further include random jumps. Combining the above example, during the process of determining the jump direction, the probability of jumping to the current page can be set as the first probability, the probability of jumping to an adjacent page as the second probability, and the probability of random jumps as the third probability. When determining that the instruction to be generated is a jump instruction, based on the first probability, the second probability, and the third probability, the jump direction can be determined to be one of jumping to the current page, jumping to an adjacent page, and random jumps through a preset selection algorithm. As Figure 7 shown, when the jump direction is to jump to the current page, in the case where the target address that meets the constraint conditions is not included in the current page, the jump direction can be adjusted to jump to an adjacent page. When the jump direction is to jump to an adjacent page, in the case where the target address that meets the constraint conditions is not included in all adjacent virtual pages, the jump direction can be adjusted to random jumps. Combining Figure 5 shown, when adjusting the adjacent jump to a random jump, that is, when the setting times of the target base address reach the maximum number, it can be determined that the target address cannot be found and determined from the target virtual page, and the jump direction can be adjusted to random jumps. After adjusting the jump direction to random jumps, perform the step of randomly selecting a target address, and select an address that meets the constraint conditions within the target address range as the target address.

[0143] Optionally, the method may further include:

[0144] In the case where the jump direction points to an adjacent virtual page, if the adjacent virtual page is not included in the target address range, randomly select an address that meets the constraint conditions from the target address range as the target address, and set the operand of the jump instruction to match the target address.

[0145] In one implementation, in the case where the jump direction points to an adjacent virtual page, if the jump instruction is immediate addressing, when it is determined that the adjacent virtual page is not included in the target address range, the jump direction can be directly adjusted to random jumps, and then randomly select an address that meets the constraint conditions from the target address range as the target address. As Figure 8 shown, Figure 8 shows another schematic diagram of the search process of the target address in the embodiment of the present invention. When the jump direction points to an adjacent virtual page and the jump instruction is immediate addressing, a unique target address range can be determined according to the address of the jump instruction and the numerical range of the immediate number, and there may be no adjacent virtual page within the target address range. When there may be no adjacent virtual page within the target address range, the jump direction can be directly adjusted to random jumps, and perform the step of randomly selecting a target address as shown in Figure 5 shown.

[0146] Referring to Figure 9 , shows a structural block diagram of a test program generation device in an embodiment of the present invention. The device 900 is provided in an electronic device and may include the following modules:

[0147] An obtaining module 901, including obtaining an operation code of an instruction to be generated;

[0148] A determining module 902, configured to, when determining that the instruction to be generated is a jump instruction according to the operation code, determine a target address range that the jump instruction can jump to, and determine at least one target virtual page located within the target address range from pre-divided virtual pages;

[0149] A setting module 903, configured to, when a target address that meets a constraint condition is included in the target virtual page, set an operand of the jump instruction to match the target address, so as to use the target address as the target address when the jump instruction jumps;

[0150] A constructing module 904, configured to construct a jump instruction based on the operation code and the operand, so as to generate a test program based on the constructed jump instruction.

[0151] Optionally, the determining module 902 is configured to, when the jump direction of the jump instruction points to the current virtual page, use the address range of the current virtual page as the target address range and use the current virtual page as the target virtual page; the current virtual page is the virtual page where the jump instruction is located; when the jump direction points to an adjacent virtual page, use the address range corresponding to the operand as the target address range and select an adjacent virtual page as the target virtual page; the adjacent virtual page is another virtual page other than the current virtual page among the virtual pages located within the target address range.

[0152] Optionally, the determining module 902 is configured to, when the jump instruction is immediate addressing, determine that the operand includes a first immediate number, and determine the target address range based on the numerical range of the first immediate number and the address of the jump instruction; when the jump instruction is register addressing, determine that the operand includes a second immediate number, and select a candidate register from multiple registers as the target register operated by the jump instruction; determine the target address range based on the original address stored in the target register and the numerical range of the second immediate number; the multiple registers are the registers included in the processor to be verified, and the candidate register is a register that has not been selected.

[0153] Optionally, a setting module 903 is configured to select a candidate virtual page from at least one target virtual page; the candidate virtual page is a target virtual page that has not been selected; one or more different temporary immediate values are set according to the base address and the address range of the candidate virtual page; after the base address is offset by the temporary immediate value, it corresponds to an alternative address located in the candidate virtual page; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address; in the case that the target address that meets the constraint conditions is included in one or more alternative addresses, the temporary immediate value corresponding to the target address is used as the immediate value in the operand; in the case that all alternative addresses do not meet the constraint conditions, the steps of selecting a candidate virtual page and setting the temporary immediate value are repeated until the immediate value in the operand is obtained, or until there is no candidate virtual page in at least one target virtual page.

[0154] Optionally, the setting module 903 is configured to select a candidate virtual page from at least one target virtual page; the candidate virtual page is a target virtual page that has not been selected; in the case that a target address that meets the constraint conditions is traversed from the candidate virtual page, the offset between the base address and the target address is used as the immediate value in the operand; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address; in the case that a target address that meets the constraint conditions is not traversed from the candidate virtual page, the steps of selecting a candidate virtual page and traversing the candidate virtual page are repeated until the immediate value in the operand is obtained, or until there is no candidate virtual page in at least one target virtual page.

[0155] Optionally, the setting module 903 is further configured to, in the case that there is no candidate virtual page in at least one target virtual page and the jump instruction is register addressing, if a candidate register is included in multiple registers, select another candidate register from the multiple registers as the target register, and repeat the steps of determining the target address range and the target virtual page, and the step of setting the operand to match the target address in the case that the target virtual page includes a target address that meets the constraint conditions.

[0156] Optionally, the setting module 903 is further configured to, when there is no register to be selected among multiple registers, add a write instruction before the jump instruction; the write instruction is used to write a target base address to a target register; the target base address is an address in one of the virtual pages; based on the target base address, perform the steps of determining a target address range and a target virtual page, and the step of setting the operand to match the target address when the target virtual page includes a target address that meets the constraint conditions; when the target virtual page does not include a target address that meets the constraint conditions, reset a different target base address, and repeatedly perform the steps of determining a target address range and a target virtual page based on the target base address, and the step of setting the operand to match the target address when the target virtual page includes a target address that meets the constraint conditions until an immediate number in the operand is obtained or until a preset end condition is reached.

[0157] Optionally, the setting module 903 is further configured to, when the jump direction points to the current virtual page, if the current virtual page does not include the target address, point the jump direction to an adjacent virtual page, and perform the steps of determining a target address range and the adjacent virtual page, and the step of setting the operand of the jump instruction to match the target address when the target virtual page includes a target address that meets the constraint conditions.

[0158] Optionally, the setting module 903 is further configured to, when the target virtual page does not include a target address that meets the constraint conditions, randomly select an address that meets the constraint conditions from within the target address range as the target address, and set the operand of the jump instruction to match the target address.

[0159] Figure 10 The block diagram of a structure of an electronic device in an embodiment of the present invention is shown. For example, the electronic device 1000 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0160] Referring to Figure 10 , the electronic device 1000 may include one or more of the following components: a processing component 1002, a memory 1004, a power supply component 1006, a multimedia component 1008, an audio component 1010, an input / output (I / O) interface 1012, a sensor component 1014, and a communication component 1016.

[0161] The processing component 1002 generally controls the overall operation of the electronic device 1000, such as operations associated with display, telephone calls, data communication, camera operations, and recording operations. The processing component 1002 may include one or more processors 1020 to execute instructions to complete all or part of the steps of the above - mentioned methods. In addition, the processing component 1002 may include one or more modules to facilitate the interaction between the processing component 1002 and other components. For example, the processing component 1002 may include a multimedia module to facilitate the interaction between the multimedia component 1008 and the processing component 1002.

[0162] The memory 1004 is configured to store various types of data to support the operation of the device 1000. Examples of such data include instructions for any application or method operating on the electronic device 1000, contact data, phone book data, messages, pictures, videos, etc. The memory 1004 can be implemented by any type of volatile or non - volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read - only memory (EEPROM), erasable programmable read - only memory (EPROM), programmable read - only memory (PROM), read - only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0163] The power component 1006 provides power to various components of the electronic device 1000. The power component 1006 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 1000.

[0164] The multimedia component 1008 includes a screen that provides an output interface between the electronic device 1000 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen can be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors can not only sense the boundaries of the touch or swipe actions but also detect the duration and pressure associated with the touch or swipe operations. In some embodiments, the multimedia component 1008 includes a front - facing camera and / or a rear - facing camera. When the electronic device 1000 is in an operation mode, such as a shooting mode or a video mode, the front - facing camera and / or the rear - facing camera can receive external multimedia data. Each front - facing camera and rear - facing camera can be a fixed optical lens system or have focal length and optical zoom capabilities.

[0165] The audio component 1010 is configured to output and / or input audio signals. For example, the audio component 1010 includes a microphone (MIC) that is configured to receive external audio signals when the electronic device 1000 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal can be further stored in the memory 1004 or transmitted via the communication component 1016. In some embodiments, the audio component 1010 further includes a speaker for outputting audio signals.

[0166] The I / O interface 1012 provides an interface between the processing component 1002 and a peripheral interface module, and the peripheral interface module may be a keyboard, a click wheel, buttons, etc. These buttons may include, but are not limited to: a home button, a volume button, a start button, and a lock button.

[0167] The sensor component 1014 includes one or more sensors for providing an assessment of the status of various aspects of the electronic device 1000. For example, the sensor component 1014 can detect the on / off state of the device 1000, the relative positioning of components, such as the display and keypad of the electronic device 1000. The sensor component 1014 can also detect a change in the position of the electronic device 1000 or a component of the electronic device 1000, the presence or absence of user contact with the electronic device 1000, the orientation or acceleration / deceleration of the electronic device 1000, and a change in the temperature of the electronic device 1000. The sensor component 1014 can include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor component 1014 can also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor component 1014 can further include an acceleration sensor, a gyro sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0168] The communication component 1016 is configured to facilitate communication between the electronic device 1000 and other devices in a wired or wireless manner. The electronic device 1000 can access a wireless network based on communication standards, such as WiFi, 2G, or 3G, or a combination thereof. In an exemplary embodiment, the communication component 1014 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 1014 further includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0169] In an exemplary embodiment, the electronic device 1000 can be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for performing the above method.

[0170] In an exemplary embodiment, a readable storage medium is also provided, such as a memory 1004 including instructions, and the above instructions can be executed by a processor 1020 of the electronic device 1000 to complete the above method. For example, the non-transitory computer readable storage medium can be ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0171] Each embodiment in this specification is described in a progressive manner, and the key point of each embodiment is the difference from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0172] Those skilled in the art should understand that the embodiments of the present invention can be provided as a method, apparatus, or computer program product. Therefore, the embodiments of the present invention can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments of the present invention can take the form of a computer program product implemented on one or more computer-usable readable storage media (including but not limited to disk memory, CD-ROM, optical memory, etc.) containing computer-usable program code.

[0173] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each flow and / or block in the flowchart and / or block diagram can be implemented by computer program instructions, and the combination of flows and / or blocks in the flowchart and / or block diagram can also be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal devices generate a device for realizing the function specified in Figure 1 one or more flows and / or blocks Figure 1 one or more blocks.

[0174] These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing terminal devices to work in a predictive manner, so that the instructions stored in the computer-readable memory generate a manufactured product including an instruction device, and the instruction device realizes the function in the flow Figure 1One or more processes and / or blocks Figure 1 The functions specified in one or more blocks.

[0175] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, so that a series of operation steps are executed on the computer or other programmable terminal device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in one Figure 1 One or more processes and / or blocks Figure 1 The steps of the functions specified in one or more blocks.

[0176] Although the preferred embodiments of the embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concept. Therefore, the appended claims are intended to be construed as including the preferred embodiments and all changes and modifications falling within the scope of the embodiments of the present invention.

[0177] Finally, it should also be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or terminal device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or terminal device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or terminal device comprising the element.

[0178] The above has introduced in detail a method and device for generating a test program, an electronic device and a storage medium provided by the present invention. Specific examples are used in this article to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A method for generating a test program, characterized in that, Including: Obtain the operation code of the instruction to be generated; When it is determined that the instruction to be generated is a jump instruction according to the operation code, determine the target address range that the jump instruction can jump to, and determine at least one target virtual page located within the target address range from the pre-divided virtual pages; When the target virtual page includes a target address that meets the constraint conditions, set the operand of the jump instruction to match the target address, so as to use the target address as the target address when the jump instruction jumps; Construct the jump instruction based on the operation code and the operand, so as to generate a test program based on the constructed jump instruction.

2. The method according to claim 1, characterized in that, The determining the target address range that the jump instruction can jump to, and determining at least one target virtual page located within the target address range from the pre-divided virtual pages includes: When the jump direction of the jump instruction points to the current virtual page, use the address range of the current virtual page as the target address range, and use the current virtual page as the target virtual page; the current virtual page is the virtual page where the jump instruction is located; When the jump direction points to an adjacent virtual page, use the address range corresponding to the operand as the target address range, and select the adjacent virtual page as the target virtual page; the adjacent virtual page is other virtual pages except the current virtual page among the virtual pages located within the target address range.

3. The method according to claim 1, characterized in that The determining the target address range that the jump instruction can jump to includes: When the jump instruction is immediate addressing, determine that the operand includes a first immediate number, and determine the target address range based on the numerical range of the first immediate number and the address of the jump instruction; When the jump instruction is register addressing, determine that the operand includes a second immediate number, and select a candidate register from multiple registers as the target register operated by the jump instruction; determine the target address range based on the original address stored in the target register and the numerical range of the second immediate number; the multiple registers are the registers included in the processor to be verified, and the candidate register is a register that has not been selected.

4. The method according to claim 3, wherein The setting the operand of the jump instruction to match the target address when the target virtual page includes a target address that meets the constraint conditions includes: Select a candidate virtual page from the at least one target virtual page; the candidate virtual page is a target virtual page that has not been selected; Set one or more different temporary immediate numbers according to the base address and the address range of the candidate virtual page; after offsetting the temporary immediate number, the base address corresponds to an alternative address located in the candidate virtual page; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address; When the target address that meets the constraint condition is included in one or more of the alternative addresses, use the temporary immediate number corresponding to the target address as the immediate number in the operand; When all the alternative addresses do not meet the constraint condition, repeat the steps of selecting one of the candidate virtual pages and setting the temporary immediate number until the immediate number in the operand is obtained or until there are no candidate virtual pages in the at least one target virtual page.

5. The method according to claim 3, characterized in that, When the target address that meets the constraint condition is included in the target virtual page, setting the operand of the jump instruction to match the target address includes: Select one candidate virtual page from the at least one target virtual page; the candidate virtual page is the target virtual page that has not been selected; When a target address that meets the constraint condition is traversed from the candidate virtual page, use the offset between the base address and the target address as the immediate number in the operand; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address; When a target address that meets the constraint condition is not traversed from the candidate virtual page, repeat the steps of selecting one candidate virtual page and traversing the candidate virtual page until the immediate number in the operand is obtained or until there are no candidate virtual pages in the at least one target virtual page.

6. The method according to claim 4 or 5, characterized in that, It further includes: When there are no candidate virtual pages in the at least one target virtual page and the jump instruction is register addressing, if there are candidate registers among the multiple registers, select another candidate register from the multiple registers as the target register, and repeat the steps of determining the target address range and the target virtual page, and setting the operand to match the target address when the target address that meets the constraint condition is included in the target virtual page.

7. The method according to claim 6, wherein It further includes: When there are no candidate registers among the multiple registers, add a write instruction before the jump instruction; The write instruction is used to write the target base address to the target register; The target base address is an address in one of the virtual pages; Based on the target base address, execute the steps of determining the target address range and the target virtual page, and setting the operand to match the target address when the target address that meets the constraint condition is included in the target virtual page; When the target address that meets the constraint condition is not included in the target virtual page, reset a different target base address, and repeat the steps of determining the target address range and the target virtual page based on the target base address, and setting the operand to match the target address when the target address that meets the constraint condition is included in the target virtual page until the immediate number in the operand is obtained or until a preset end condition is reached.

8. The method according to claim 2, wherein It further includes: When the jump direction points to the current virtual page, if the target address is not included in the current virtual page, the jump direction is pointed to the adjacent virtual page, and the steps of determining the target address range and the adjacent virtual page are executed, and the step of setting the operand of the jump instruction to match the target address is executed when the target virtual page includes a target address that meets the constraint conditions.

9. The method according to claim 1, wherein It further includes: When the target virtual page does not include a target address that meets the constraint conditions, a random address that meets the constraint conditions is selected from the target address range as the target address, and the operand of the jump instruction is set to match the target address.

10. A test program generation device, characterized in that, It includes: An acquisition module, including acquiring the operation code of the instruction to be generated; A determination module, configured to determine the target address range that the jump instruction can jump to when it is determined that the instruction to be generated is a jump instruction according to the operation code, and determine at least one target virtual page located within the target address range from the pre-divided virtual pages; A setting module, configured to set the operand of the jump instruction to match the target address when the target virtual page includes a target address that meets the constraint conditions, so as to use the target address as the target address when the jump instruction jumps; A construction module, configured to construct the jump instruction based on the operation code and the operand, so as to generate a test program based on the constructed jump instruction.

11. The device according to claim 10, characterized in that, The determination module is configured to use the address range of the current virtual page as the target address range and use the current virtual page as the target virtual page when the jump direction of the jump instruction points to the current virtual page; The current virtual page is the virtual page where the jump instruction is located; When the jump direction points to an adjacent virtual page, the address range corresponding to the operand is used as the target address range, and an adjacent virtual page is selected as the target virtual page; the adjacent virtual page is another virtual page other than the current virtual page among the virtual pages located within the target address range.

12. The device according to claim 10, characterized in that, The determination module is configured to determine that the operand includes a first immediate number when the jump instruction is immediate addressing, and determine the target address range based on the numerical range of the first immediate number and the address of the jump instruction; when the jump instruction is register addressing, determine that the operand includes a second immediate number, and select a candidate register from multiple registers as the target register operated by the jump instruction; determine the target address range based on the original address stored in the target register and the numerical range of the second immediate number; the multiple registers are the registers included in the processor to be verified, and the candidate register is a register that has not been selected.

13. The device according to claim 12, characterized in that, The setting module is configured to select a candidate virtual page from the at least one target virtual page; the candidate virtual page is the target virtual page that has not been selected; set one or more different temporary immediate numbers according to the base address and the address range of the candidate virtual page; after offsetting the base address by the temporary immediate number, the offset corresponds to an alternative address located in the candidate virtual page; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address; in the case that the target address meeting the constraint condition is included in one or more of the alternative addresses, use the temporary immediate number corresponding to the target address as the immediate number in the operand; in the case that all the alternative addresses do not meet the constraint condition, repeat the steps of selecting a candidate virtual page and setting the temporary immediate number until the immediate number in the operand is obtained or until there is no candidate virtual page in the at least one target virtual page.

14. The device according to claim 12, characterized in that, The setting module is configured to select a candidate virtual page from the at least one target virtual page; the candidate virtual page is the target virtual page that has not been selected; In the case that a target address meeting the constraint condition is traversed from the candidate virtual page, use the offset between the base address and the target address as the immediate number in the operand; when the jump instruction is immediate addressing, the base address is the address of the jump instruction; when the jump instruction is register addressing, the base address is the original address; In the case that a target address meeting the constraint condition is not traversed from the candidate virtual page, repeat the steps of selecting a candidate virtual page and traversing the candidate virtual page until the immediate number in the operand is obtained or until there is no candidate virtual page in the at least one target virtual page.

15. The device according to claim 13 or 14, characterized in that, The setting module is further configured to, when there is no candidate virtual page in the at least one target virtual page and the jump instruction is register addressing, if there is a candidate register among the multiple registers, select another candidate register from the multiple registers as the target register, and repeat the steps of determining the target address range and the target virtual page, and the step of setting the operand to match the target address in the case that the target virtual page includes a target address meeting the constraint condition.

16. The device according to claim 15, characterized in that, The setting module is further configured to, when there is no register to be selected among the multiple registers, add a write instruction before the jump instruction; the write instruction is used to write a target base address to the target register; the target base address is an address in one of the virtual pages; based on the target base address, perform the steps of determining the target address range and the target virtual page, and the step of setting the operand to match the target address when the target virtual page includes a target address that meets the constraint condition; when the target virtual page does not include a target address that meets the constraint condition, reset different target base addresses, and repeatedly execute the steps of determining the target address range and the target virtual page based on the target base address, and the step of setting the operand to match the target address when the target virtual page includes a target address that meets the constraint condition, until the immediate number in the operand is obtained or until a preset end condition is reached.

17. The device according to claim 11, characterized in that, The setting module is further configured to, when the jump direction points to the current virtual page, if the target address is not included in the current virtual page, change the jump direction to point to the adjacent virtual page, and perform the steps of determining the target address range and the adjacent virtual page, and the step of setting the operand of the jump instruction to match the target address when the target virtual page includes a target address that meets the constraint condition.

18. The device according to claim 10, characterized in that, The setting module is further configured to, when the target virtual page does not include a target address that meets the constraint condition, randomly select an address that meets the constraint condition from within the target address range as the target address, and set the operand of the jump instruction to match the target address.

19. An electronic device, characterized in that, It includes a processor and a memory, and one or more programs, where one or more programs are stored in the memory and are configured to, when executed by one or more of the processors, enable the electronic device to execute the test program generation method as recited in one or more of claims 1-9.

20. A readable storage medium, characterized in that, When the instructions in the readable storage medium are executed by the processor of the electronic device, the electronic device is enabled to execute the test program generation method as recited in one or more of method claims 1-9.

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