Data communication method and data communication system based on programmable logic device

Abstract

The application discloses a data communication method and a data communication system based on a programmable logic device. The data communication method comprises the following steps: initializing an operating system and starting an SPI communication function; generating to-be-transmitted data, wherein the to-be-transmitted data comprises random number data; sending the to-be-transmitted data to the programmable logic device through an SPI bus; receiving check data returned by the programmable logic device, wherein the check data is calculated by the programmable logic device according to the random number data; judging the legality of the check data, and maintaining the SPI communication function if the check data is legal. When the operating system is started and the to-be-transmitted data is sent, the to-be-transmitted data sent to the programmable logic device through the SPI bus comprises the random number data, so that the security of the to-be-transmitted data in the transmission process is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of data communication, and in particular, to a data communication method and a data communication system based on a programmable logic device. BACKGROUND

[0002] The Local Bus bus (LBS bus) is also known as a CPU bus, which is commonly used in Intel CPUs and PowerPC systems, and is usually used for transmitting data between a main chip and a functional chip. In a 32-bit ARM system, only some chips are equipped with LBS communication functions. To solve the problem of data interaction between an ARM chip without LBS communication function and a chip with LBS communication function, related technologies use the SPI communication function of the ARM chip, and use a programmable logic device to perform signal conversion, thereby realizing the LBS communication function. However, since the SPI bus is easy to be captured and cracked by a logic analyzer, the security of data transmission is not high. SUMMARY

[0003] The present application aims to at least solve one of the technical problems in the prior art. To this end, the present application provides a data communication method based on a programmable logic device, which can improve the security of data in the transmission process.

[0004] The present application also provides a data communication system applying the above data communication method based on a programmable logic device.

[0005] According to the data communication method based on a programmable logic device of the first aspect of the present application, the data communication method comprises: initializing an operating system and starting an SPI communication function; generating to-be-transmitted data; wherein the to-be-transmitted data comprises random number data; sending the to-be-transmitted data to a programmable logic device through an SPI bus; receiving verification data returned by the programmable logic device; wherein the verification data is calculated by the programmable logic device according to the random number data; judging the legality of the verification data; if the verification data is legal, maintaining the SPI communication function.

[0006] According to some embodiments of the present application, after the step of judging the legality of the verification data, the method further comprises: if the verification data is not legal, disabling the SPI communication function.

[0007] According to some embodiments of the present application, after the step of judging the legality of the verification data, the method further comprises: if the verification data is legal, starting a clock synchronization function.

[0008] According to some embodiments of the present application, the step of judging the legality of the check data further comprises: disabling the clock synchronization function if the check data is not legal.

[0009] According to some embodiments of the present application, the random number data comprises a plurality of random numbers, the check data comprises a first check value and a second check value, and the check data is calculated by the programmable logic device according to the random number data, specifically comprising: calculating an average value of the plurality of random numbers and rounding the average value to obtain a first operation value; obtaining a minimum value in the plurality of random numbers to obtain a second operation value; calculating a difference between twice the first operation value and the second operation value and calculating a sum of the difference and a first preset value to obtain a third operation value; calculating a remainder of the third operation value and a second preset value and calculating a quotient of the remainder and the first preset value to obtain the first check value; and taking a remainder of the third operation value and the first preset value to obtain the second check value.

[0010] According to some embodiments of the present application, the generation of the to-be-transmitted data specifically comprises: generating the random number data by OpenSSL.

[0011] According to some embodiments of the present application, the operating system is a Linux operating system.

[0012] According to some embodiments of the second aspect of the present application, a data communication system based on a programmable logic device, the data communication system comprising: a processor and a programmable logic device, the processor being configured to execute the data communication method based on a programmable logic device according to the first aspect of the present application; the programmable logic device being in communication connection with the processor through a SPI bus, and the programmable logic device being configured to be in communication connection with an external system through a Local Bus.

[0013] According to some embodiments of the present application, the data communication system further comprises: an active crystal oscillator connected to the programmable logic device, the active crystal oscillator being configured to provide a clock signal.

[0014] According to some embodiments of the present application, the programmable logic device comprises: an SPI data reading module, a data judging module, a register module, and a data conversion module, the SPI data reading module being connected to the processor and configured to receive SPI data; the data judging module being connected to the SPI data reading module and configured to judge a function type of the SPI data; the register module being connected to the data judging module and configured to store the SPI data according to the function type; and the data conversion module being connected to the register module and configured to convert the SPI data into Local Bus data.

[0015] According to the data communication method and the data communication system based on the programmable logic device, when the operating system is started and the data to be transmitted is sent, the security of the data to be transmitted in the transmission process is improved because the random number data is included in the data to be transmitted sent to the programmable logic device through the SPI bus. The programmable logic device needs to generate corresponding verification data according to the received random number data. The legality of the data receiver can be judged by judging the legality of the verification data. The SPI communication function is maintained only in the case that the verification data is legal, the security of data transmission is further improved, and the risk of data being captured and cracked is reduced.

[0016] Additional aspects and advantages of the application will be made apparent by the following description and the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0017] The application will be further described below in conjunction with the drawings and embodiments, in which:

[0018] Figure 1 The flowchart of the data communication method of the embodiment of the application is shown in FIG. 1;

[0019] Figure 2 The flowchart of the data communication method of the embodiment of the application is shown in FIG. 1;

[0020] Figure 3 The module diagram of the data communication system of an embodiment of the application is shown in FIG. 5;

[0021] Figure 4 The module diagram of the data communication system of another embodiment of the application is shown in FIG. 6;

[0022] Figure 5 The module diagram of the programmable logic device of the embodiment of the application is shown in FIG. 7. DETAILED DESCRIPTION

[0023] The embodiments of the application are described in detail below, and examples of the embodiments are shown in the drawings, in which the same or similar notations represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and are only used to explain the application, and cannot be understood as a limitation of the application.

[0024] In the description of the present application, it is to be understood that the orientation description, such as the orientation or positional relationship indicated by the upper, lower, front, rear, left, right and the like, is based on the orientation or positional relationship shown in the drawings, and is only for the purpose of facilitating the description of the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application.

[0025] In the description of the present application, the meaning of several is more than one, the meaning of multiple is more than two, greater than, less than, more than, etc. are understood as not including the number, above, below, within, etc. are understood as including the number. If it is described as first, second, it is only for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or the sequence of indicated technical features.

[0026] In the description of the present application, unless otherwise explicitly limited, the words such as setting, installing, connecting, etc. should be broadly understood, and the person skilled in the art can reasonably determine the specific meaning of the above words in the present application in combination with the specific content of the technical solution.

[0027] Firstly, the meanings of several terms involved in the present application are analyzed:

[0028] SPI (Serial Peripheral Interface, serial peripheral interface): It is a high-speed, full-duplex, synchronous, serial communication bus. The SPI bus is generally composed of three signal lines, which are SCLK (serial clock), SDI (serial data input) and SDO (serial data output). When there are multiple slave devices, a slave device selection line, CS, can be added to control whether the chip is selected, so as to realize the connection of multiple SPI devices on the same bus. The SPI device providing the SPI serial clock is the SPI host or master device, and the other devices are the SPI slave or slave device.

[0029] Local Bus bus: also known as CPU bus, it is derived from 60X bus (60X bus supports four optional bit width modes of 64, 32, 16 and 8), since Local Bus bus is directly divided from 60X bus through a bridge, so it is synchronous and same frequency with 60X bus, and shares bandwidth with 60X bus when reading and writing data, without the need for additional processing provided by the kernel.

[0030] OpenSSL (Open Secure Sockets Layer): an open source software library package, which can be used by application programs to communicate securely while confirming the identity of the other end of the connection. It includes major cryptographic algorithms, commonly used key and certificate packaging management functions, and SSL protocols, and provides a rich application for testing or other purposes.

[0031] The embodiment of the present application provides a data communication method and a data communication system based on a programmable logic device, which are specifically described as follows. First, the data communication method in the embodiment of the present application is described.

[0032] Some embodiments refer to Figure 1 , which is an optional flowchart of the data communication method based on a programmable logic device provided by the embodiment of the present application, Figure 1 The method in the embodiment of the present application can include but is not limited to steps S110 to S160.

[0033] S110, initializing an operating system and starting an SPI communication function;

[0034] S120, generating to-be-transmitted data; wherein the to-be-transmitted data includes random number data;

[0035] S130, sending the to-be-transmitted data to the programmable logic device through an SPI bus;

[0036] S140, receiving verification data returned by the programmable logic device; wherein the verification data is calculated by the programmable logic device according to the random number data;

[0037] S150, judging the legality of the verification data;

[0038] S160, if the verification data is legal, maintaining the SPI communication function.

[0039] When the operating system is started and the to-be-transmitted data is sent, since the to-be-transmitted data sent to the programmable logic device through the SPI bus includes the random number data, the security of the to-be-transmitted data in the transmission process is improved. And the programmable logic device needs to generate corresponding verification data according to the received random number data, by judging the legality of the verification data, the legality of the data receiver can be judged, and only in the case that the verification data is legal, the SPI communication function is maintained, further improving the security of data transmission and reducing the risk of data being captured and cracked. The data communication method of the embodiment of the present application can be implemented by a processor with an SPI communication function, and the data communication method of the embodiment of the present application is described in detail below.

[0040] In step S110, when the processor is powered on, the operating system installed internally will start running. In some embodiments, the operating system is a Linux operating system. It can be understood that in some other embodiments, the operating system can also be a Windows CE operating system or other embedded operating systems with the same function. The operating system in the embodiments of the present application has an SPI communication function, that is, data can be transmitted through the SPI bus, and when the operating system initialization is completed, the SPI communication function will be started.

[0041] In step S120, after the operating system is initialized, the system will generate data to be transmitted. The data to be transmitted includes random number data for judging the legitimacy of the data, and it can be understood that it also includes normal data that needs to be transmitted. It can be understood that the random number data in the present application is not only generated when the operating system is just initialized, but also includes random number data in the subsequent transmission data. In some embodiments, in step S120, the data to be transmitted is generated by generating random number data through OpenSSL. In some other embodiments, the user can also use other random number generation algorithms to generate random number data.

[0042] In step S130, the data to be transmitted is sent to the programmable logic device through the SPI bus. The programmable logic device in the embodiments of the present application can be an FPGA (Field Programmable Gate Array) or a CPLD (Complex Programmable Logic Device), which can realize various functions through programming.

[0043] In step S140, the operating system also sends a query command in the process of sending the data to be transmitted. The query command is used to query the verification data generated by the programmable logic device according to the random number data. The programmable logic device can convert the random number data into corresponding verification data through calculation and processing through the built-in encryption algorithm. The operating system can obtain the verification data corresponding to the random number data by receiving and reading.

[0044] In some embodiments, the random number data includes a plurality of random numbers, the verification data includes a first verification value and a second verification value, and the verification data is calculated by the programmable logic device according to the random number data, and specifically includes: Figure 2

[0045] S210, calculating the average value of the plurality of random numbers and rounding the average value to obtain a first operation value;

[0046] S220, obtaining the minimum value of the plurality of random numbers to obtain a second operation value;

[0047] ​S230, calculating a difference between a double of the first operation value and the second operation value and calculating a sum of the difference and the first preset value to obtain a third operation value;

[0048] S240, calculating a remainder of the third operation value and the second preset value and calculating a quotient of the remainder and the first preset value to obtain a first check value;

[0049] S250, taking a remainder of the third operation value and the first preset value to obtain a second check value.

[0050] Specifically, when the random number data includes eight random numbers D1 to D8, referring to formula (1), first, through step S210, the average of the eight random numbers is calculated, and then the calculated average is rounded to obtain the first operation value Z1.

[0051] Z1 = INT(AVERAGE(D1,..., D8)) (1)

[0052] Referring to formula (2), through step S220, using the bubble sort algorithm, the minimum value in the eight random numbers is obtained to obtain the second operation value Z2.

[0053] Z2 = MIN(D1,..., D8) (2)

[0054] Referring to formula (3), through step S230, the difference between the double of the first operation value Z1 and the second operation value Z2 is calculated, and then the sum of the difference and the first preset value is calculated to obtain the third operation value Z3, wherein the first preset value is set to 256.

[0055] Z3 = 2*Z1-Z2+256 (3)

[0056] Referring to formula (4), through step S240, the remainder of the third operation value Z3 and the second preset value is calculated, and then the quotient of the remainder and the first preset value is calculated to obtain the first check value C1, wherein the first preset value is 256 and the second preset value is 65535.

[0057] C1 = ((Z3)MOD(65535)) / 256 (4)

[0058] Referring to formula (5), through step S250, the remainder of the third operation value and the first preset value is taken to obtain the second check value C2, wherein the first preset value is 256.

[0059] C2 = (Z3)MOD 256 (5)

[0060] The calculated first check value C1 and second check value C2 are finally returned to the processor as check data. It can be understood that in some other embodiments, the specific calculation formula for calculating the check data through the random number data can be set independently according to the design needs of the user.

[0061] In step S150, after the processor receives the returned check data, the legality of the check data is judged. Specifically, the processor and the programmable logic device store the same calculation algorithm, and the processor also calculates and processes the random number data after generating the random number data to obtain legal data. When the returned check data is received, the legality of the check data is judged by comparing whether the two data are the same.

[0062] In step S160, if the check data is legal, the SPI communication function is maintained. The legal check data indicates that the programmable logic device receiving the data is a legal device, so the subsequent SPI data transmission process can continue.

[0063] In some embodiments, after step S150 of judging the legality of the check data, the step further includes: if the check data is not legal, disabling the SPI communication function. In this case, it indicates that the legal programmable logic device is replaced artificially, and there is a risk of data leakage, so the SPI communication function is stopped.

[0064] In some embodiments, after step S150 of judging the legality of the check data, the step further includes: if the check data is legal, starting the clock synchronization function. When the operating system is started for the first time, the clock synchronization function is not started at this time, so the clock signal of the external system connected with the programmable logic device cannot be synchronized, and the data transmission is interrupted.

[0065] In some embodiments, after step S150 of judging the legality of the check data, the step further includes: if the check data is not legal, disabling the clock synchronization function. In the process of data transmission, if it is found that the check data is not legal, the clock synchronization function is immediately stopped, and the data transmission process between the programmable logic device and the external system is interrupted, thereby further reducing the risk of data leakage.

[0066] In some embodiments, the application also proposes a data communication system based on a programmable logic device, referring to Figure 3 The data communication system includes a processor and a programmable logic device. The processor is used to execute the data communication method based on the programmable logic device in the above embodiments. The programmable logic device is in communication connection with the processor through the SPI bus. The programmable logic device is used to be in communication connection with the external system through the Local Bus bus.

[0067] The processor is configured to implement the data communication method in the above-mentioned embodiments, and the specific implementation process is the same as the above-mentioned method embodiments, which will not be repeated here. The programmable logic device is connected with the functional modules in the external system through the LBS bus, and the functional modules include a plurality of functional chips. The programmable logic device sends different chip selection signals and receives control signals from the processor to make different functional chips complete different application functions.

[0068] In some embodiments, referring to Figure 4 The data communication system further includes an active crystal oscillator connected with the programmable logic device, and the active crystal oscillator is configured to provide a clock signal. The active crystal oscillator makes the clock frequency of the clock system of the external system the same as that of the programmable logic device by providing the clock signal, so as to achieve the effect of data communication through the LBS bus.

[0069] In some embodiments, referring to Figure 5 The programmable logic device includes an SPI data reading module, a data judging module, a register module and a data conversion module. The SPI data reading module is connected with the processor and configured to receive SPI data. The data judging module is connected with the SPI data reading module and configured to judge the function type of the SPI data. The register module is connected with the data judging module and configured to store the SPI data according to the function type. The data conversion module is connected with the register module and configured to convert the SPI data into Local Bus data. Through the functional modules arranged in the programmable logic device, the SPI data sent by the processor can be converted into Local Bus data and then transmitted to the external system, so as to complete the data interaction process between the processor with the SPI communication function and the functional module with the LBS bus. It can be understood that the programmable logic device includes a clock module, which is configured to generate a clock signal with a corresponding frequency according to the actual use of the external system, so as to complete the synchronization of the external clock system and the internal clock system.

[0070] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "exemplary embodiment", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the exemplary description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0071] The embodiments of the present application are described in detail above with reference to the drawings, but the present application is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the spirit of the present application. In addition, the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

Claims

1. A data communication method based on a programmable logic device, characterized by, The data communication method is applied to a data interaction scene between an ARM chip without an LBS communication function and a chip with an LBS communication function, and the data communication method comprises the following steps: An operating system is initialized, and an SPI communication function is started; Data to be transmitted is generated by the operating system; wherein the data to be transmitted comprises random number data; The data to be transmitted is sent to a programmable logic device through an SPI bus; Verification data returned by the programmable logic device is received; wherein the verification data is calculated by the programmable logic device according to the random number data; the random number data comprises a plurality of random numbers, the verification data comprises a first verification value and a second verification value, and the verification data is calculated by the programmable logic device according to the random number data, specifically comprising: an average value of the plurality of random numbers is calculated and the average value is rounded to obtain a first operation value; a minimum value in the plurality of random numbers is obtained to obtain a second operation value; a difference between twice the first operation value and the second operation value is calculated, and a sum of the difference and a first preset value is calculated to obtain a third operation value; a remainder of the third operation value and a second preset value is calculated, and a quotient of the remainder and the first preset value is calculated to obtain the first verification value; the third operation value and the first preset value are taken modulo to obtain the second verification value; The legality of the verification data is judged; If the verification data is legal, the SPI communication function is maintained.

2. The data communication method according to claim 1, characterized by, After the step of judging the legality of the verification data, the following steps are further included: If the verification data is not legal, the SPI communication function is disabled.

3. The data communication method according to claim 1, characterized by, After the step of judging the legality of the verification data, the following steps are further included: If the verification data is legal, a clock synchronization function is started.

4. The data communication method according to claim 2, characterized by, After the step of judging the legality of the verification data, the following steps are further included: If the verification data is not legal, a clock synchronization function is disabled.

5. The data communication method according to any one of claims 1 to 4, characterized by, The step of generating data to be transmitted specifically comprises: The random number data is generated by OpenSSL.

6. The data communication method according to claim 5, characterized by, The operating system is a Linux operating system.

7. A data communication system based on programmable logic devices, characterized in that The data communication system comprises: A processor for executing the programmable logic device-based data communication method according to any one of claims 1 to 6; A programmable logic device, which is in communication connection with the processor through an SPI bus, and is used to be in communication connection with an external system through a Local Bus.

8. The data communication system of claim 7, wherein, Further comprising: An active crystal oscillator, which is connected to the programmable logic device, and is used to provide a clock signal.

9. The data communication system of claim 7, wherein, The programmable logic device comprises: An SPI data reading module, which is connected to the processor and is used to receive SPI data; A data judging module, which is connected to the SPI data reading module, and is used to judge a function type of the SPI data; A register module, which is connected to the data judging module, and is used to store the SPI data according to the function type. a data conversion module connected to the register module, the data conversion module configured to convert the SPI data into Local Bus data.

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