Display screen frequency conversion method, display drive integrated circuit chip and application processor

Abstract

Embodiments of the present application disclose a display screen frequency conversion method, a display driving integrated circuit chip and an application processor. The method comprises: performing image scanning on first image data by a DDIC chip according to a first refresh frequency; reporting at least one TE signal to an AP in Vporch after completing Gate scanning; when an image update request is received in Vporch, performing image drawing rendering according to the TE signal to obtain second image data; sending the second image data to the DDIC chip; and performing image scanning on the second image data by the DDIC chip according to a second refresh frequency. When the image update request is received in Vporch, the AP can perform image drawing rendering according to the TE signal, so that the second image data obtained by drawing rendering can be sent to the DDIC chip in time for image scanning by the DDIC chip, thereby improving the frequency conversion response speed and reducing the picture delay in the frequency conversion process.

Description

[0001] This application is a divisional application of the invention patent application No. 202010075525.7, titled "Display screen frequency conversion method, display driving integrated circuit chip and application processor", filed on January 22, 2020. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the technical field of display, in particular to a display screen frequency conversion method, a display driving integrated circuit (DDIC) chip and an application processor (AP). BACKGROUND

[0003] With the continuous development of display screen technology, more and more high refresh rate display screens have emerged. In the process of running high frame rate application programs or sliding operations, setting the display screen to a high refresh rate mode can improve the smoothness of the picture.

[0004] For an active-matrix organic light-emitting diode (AMOLED) display screen, due to the driving architecture of the AP-DDIC-Panel and the self-luminous feature of the AMOLED display screen, in the related art, the refresh rate of the AMOLED display screen needs to be adjusted manually or semi-automatically.

[0005] However, using the above refresh rate adjustment method, the DDIC chip needs to adjust the refresh rate according to the AP, and the frequency conversion response speed is slow, which leads to picture delay during frequency conversion (especially when the frequency is increased). SUMMARY

[0006] Embodiments of the present application provide a display screen frequency conversion method, a DDIC chip and an AP. The technical solution is as follows:

[0007] On the one hand, the present application provides a display screen frequency conversion method, which is used in a terminal provided with an AMOLED display screen, the DDIC chip of the AMOLED display screen is electrically connected to the AP of the terminal, and the method comprises:

[0008] The DDIC chip performs image scanning on the first image data according to the first refresh frequency, and the image scanning comprises Gate scanning and EM scanning;

[0009] After the DDIC chip completes the Gate scanning, a tearing effect (TE) signal is reported to the AP at least once in a vertical porch (Vporch);

[0010] When the AP receives an image update request in the Vporch, image rendering is performed according to the TE signal to obtain second image data;

[0011] The AP sends the second image data to the DDIC chip;

[0012] The DDIC chip performs image scanning on the second image data according to a second refresh frequency, and the second refresh frequency is greater than the first refresh frequency.

[0013] In another aspect, an embodiment of the present application provides a DDIC chip applied to an AMOLED display screen, and the DDIC chip is electrically connected to an AP of a terminal, and the DDIC chip is configured to:

[0014] perform image scanning on first image data according to a first refresh frequency, and the image scanning includes Gate scanning and EM scanning;

[0015] After the Gate scanning is completed, a TE signal is reported to the AP at least once in a Vporch;

[0016] receive second image data sent by the AP, and the second image data is obtained by performing image rendering according to the TE signal when the AP receives an image update request in the Vporch;

[0017] perform image scanning on the second image data according to a second refresh frequency, and the second refresh frequency is greater than the first refresh frequency.

[0018] In another aspect, an embodiment of the present application provides an AP, and the AP is electrically connected to a DDIC chip of an AMOLED display screen, and the AP is configured to:

[0019] send first image data to the DDIC chip, and the DDIC chip is configured to perform image scanning on the first image data according to a first refresh frequency, and the image scanning includes Gate scanning and EM scanning;

[0020] receive at least one TE signal reported by the DDIC chip, and the TE signal is reported by the DDIC chip in a Vporch after the Gate scanning is completed;

[0021] If an image update request is received in the Vporch, image rendering is performed according to the TE signal to obtain second image data;

[0022] The second image data is sent to the DDIC chip, and the DDIC chip is configured to perform image scanning on the second image data according to a second refresh frequency, the second refresh frequency being greater than the first refresh frequency.

[0023] In another aspect, the embodiments of the present application provide a display screen module, which comprises an AMOLED display screen and a DDIC chip, the DDIC chip being configured to drive the AMOLED display screen, and the DDIC chip comprising the DDIC chip as described in the above aspect.

[0024] In another aspect, the embodiments of the present application provide a terminal, which comprises an AP, an AMOLED display screen and a DDIC chip, the AP and the DDIC chip being connected through a Mobile Industry Processor Interface (MIPI), the DDIC chip comprising the DDIC chip as described in the above aspect, and the AP comprising the AP as described in the above aspect.

[0025] Unlike the related art in which the DDIC chip only reports a TE signal to the AP according to a current refresh frequency, in the embodiments of the present application, the DDIC chip reports at least one TE signal to the AP in the Vporch after completing Gate scanning during the image scanning process according to the first refresh frequency, so that the AP can perform image rendering according to the TE signal when an image update request is received in the Vporch, thereby timely sending second image data obtained by rendering to the DDIC chip for image scanning according to a second refresh frequency, thereby improving the frequency conversion response speed and reducing the picture delay during the frequency conversion process (especially the frequency increasing process). BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a timing sequence diagram of the Gate signal and the EM signal under different Gate-FR as shown in the exemplary embodiments of the present application;

[0027] Figure 2 is a timing sequence diagram of VFP, VBP and Vact;

[0028] Figure 3 is a schematic diagram of the data communication process between the AP and the DDIC chip in the related art;

[0029] Figure 4 is a schematic diagram of the timing sequence of the image rendering, rendering and scanning stages during the display screen frequency conversion in the related art;

[0030] Figure 5 A flow chart of a display screen frequency conversion method according to an example embodiment of the present application is shown;

[0031] Figure 6 FIG. 1 is a schematic diagram of a data communication process between an AP and a DDIC chip according to an example embodiment of the present application;

[0032] Figure 7 A flow chart of a display screen frequency conversion method according to another example embodiment of the present application is shown;

[0033] Figure 8 FIG. 2 is a schematic diagram of timing relationships among image drawing, rendering and scanning stages during display screen frequency conversion according to an example embodiment of the present application;

[0034] Figure 9 A flow chart of a display screen frequency reduction process according to an example embodiment of the present application is shown;

[0035] Figure 10 FIG. 3 is a structural block diagram of a terminal according to an example embodiment of the present application. DETAILED DESCRIPTION

[0036] In order to make the objects, technical solutions and advantages of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0037] In the present document, "a plurality of" refers to two or more. The "and / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. The character " / " generally represents that the associated objects before and after it are in an "or" relationship.

[0038] For the convenience of understanding, the terms involved in the embodiments of the present application are described below.

[0039] Tearing Effect (TE) signal: a signal generated by a DDIC chip, used to prevent tearing problems during image display when refreshing a picture. When the next frame of image is ready to be refreshed, the DDIC chip generates a TE signal, and accordingly, the AP sends the next frame of image data to the DDIC chip after detecting the rising edge of the TE signal.

[0040] Gate signal: a panel row switching signal for controlling the passage of source voltage into the current row of pixel circuits, thereby realizing data refresh of the current row of pixels. Correspondingly, Gate-Timing is used to indicate the timing of the Gate signal, mainly referring to Gate Start Virtical (GSTV), which contains one GSTV in a frame.

[0041] EM signal: a panel row switching signal for controlling whether the current row of pixels emits light. Correspondingly, EM-Timing is used to indicate the timing of the EM signal, mainly referring to EM Start Virtical (ESTV), which contains multiple ESTVs in a frame.

[0042] EM-Pulse-No: in order to realize pulse width modulation (PWM) adjustment of display screen brightness at low brightness, the EM frequency (EM-FRequency, EM-FR) is usually an integer multiple of the gate frequency (Gate-FRequency, Gate-FR), that is, multiple EM switching is performed within a Gate frame. Correspondingly, EM-Pulse-No indicates the number of EM frames within a Gate frame. For example, when Gate-FR is 60 Hz and EM-FR is 240 Hz, EM-Pulse-No is 4. It should be noted that due to the self-luminous feature of the AMOLED display screen, in the same frame, ESTV needs to be strictly matched with GSTV (the turn-off timing of the first EM signal needs to be matched with Gate-Timing), and the remaining EM signals are evenly distributed by the DDIC chip.

[0043] Illustratively, the timing relationship between Gate signal and EM signal under different Gate-FR is shown in Figure 1 . Among them, EM-FR and duty cycle remain stable, thereby avoiding brightness mutation caused by changes in Gate-FR. Figure 1 . When Gate-FR is 60 Hz / 90 Hz / 120 Hz, EM-FR and duty cycle remain unchanged (360 Hz). At the same time, in order to minimize the impact of changes in Gate-FR on Gamma and Demura parameters, it is necessary to keep the Gate scanning speed unchanged, that is, the time for Gate scanning a row remains unchanged, the time for completing a frame refresh remains unchanged, and only the vertical porch (Vporch) is extended. Figure 1 . When Gate-FR is 60 Hz / 90 Hz / 120 Hz, each frame scanning is completed within 8.3 ms.

[0044] Vporch: includes a vertical front porch (VFP) and a vertical back porch (VBP). Illustratively, the relationship between VFP, VBP, and vertical active (Vact) is shown as Figure 2 The above-mentioned extended vertical interval is to mainly extend VFP.

[0045] For an AMOLED display screen using an AP-DDIC-Panel architecture, after the AP side renders to generate image data, the image data is sent to the DDIC chip, and the DDIC chip controls the Panel to display images according to the image data. In a high refresh rate display scenario, the AP side generates image data at a high frequency, and accordingly, the Panel side refreshes images at a high frequency according to the image data, thereby improving the smoothness of the picture.

[0046] In actual application, in addition to implementing high refresh rate in high frame rate games, high frame rate is mainly applied in a small number of fast sliding scenarios such as desktop sliding and album browsing, and the purpose is to improve the smoothness of the picture when the user performs fast sliding operation. However, the proportion of time occupied by fast sliding in actual application is small, and most of the use scenarios are still static display, low-speed sliding, and low frame rate video playing scenarios. In the above use scenarios, the image rendering speed of the AP side is reduced, and the Panel side still maintains high refresh rate for image refreshing (when the AP side does not send new image data, a single frame of image will be repeatedly displayed), and does not improve the smoothness of the picture, but increases the power consumption of the display screen.

[0047] In related technologies, in order to reduce the power consumption of a high refresh rate display screen, a manual frame rate (MFR) is usually used to adjust the refresh rate of the high refresh rate display screen, that is, the user needs to manually instruct to adjust the refresh rate according to the current application scenario, thereby triggering the AP to send a variable frequency command to the DDIC chip, and the DDIC chip adjusts the refresh rate of the Panel according to the variable frequency command.

[0048] For example, when the terminal runs a high frame rate game, the user can manually set the refresh rate of the display screen to 120Hz, and when the high frame rate game is exited, the user can manually set the refresh rate of the display screen to 60Hz.

[0049] Illustratively, as shown in Figure 3As shown, on the side of the AP 31, when there is a demand for image update, the application (APP) draws a basic image through the central processing unit (CPU), and the CPU draws the basic image for composite rendering through the graphics processing unit (GPU). Further, the Surface Flinger (SF) composites the rendered image through software, outputs a rasterized image, and composites the rasterized image through the board support package (BSP), and sends the image data to the DDIC chip 32 (i.e., the display sending process), which drives the display screen to scan and display the image. Among them, the AP 31 draws and renders the image according to the Vsync reported by the DDIC chip (converted by the BSP according to the TE signal reported by the DDIC, and distributed by the SF), and the DDIC chip 32 generates the Vsync periodically according to the current refresh frequency.

[0050] When frequency conversion is needed, the AP 31 sends a frequency conversion instruction to the DDIC chip 32 through the application, the SF, and the BSP. Correspondingly, the DDIC chip 32 adjusts the current refresh frequency and the display parameters of the display screen after receiving the frequency conversion instruction, and continues to scan the image.

[0051] In an illustrative example, the timing relationship among the image drawing, rendering, and scanning stages when the display screen is frequency-converted in the related art is as shown in Figure 4

[0052] In the initial stage, the refresh frequency of the display screen is 120Hz, and the EM frequency is 360Hz. The AP sends the image data corresponding to the image frame A to the DDIC chip through the BSP, and the DDIC chip performs Gate scanning (i.e., image scanning) according to the image data corresponding to the image frame A after reporting the TE signal according to the current refresh frequency.

[0053] At the same time, the APP draws and renders the image frame B to obtain the image data of the image frame B.

[0054] When the upper-layer application has a frequency conversion demand, or the frequency conversion is manually triggered by a person, the DDIC chip receives a frequency conversion instruction (indicating a reduction from 120Hz to 45Hz), thereby reducing the refresh frequency to 45Hz and generating a TE signal according to 45Hz. During this period, the AP stops image drawing and rendering, and sends the image data of the image frame B to the DDIC chip through the BSP, so that the DDIC chip scans and displays the image frame B according to the image data.

[0055] ​However, if there is a need to update the image frame C (i.e. the need to increase the frequency) during the period of displaying the image frame B, since the refresh frequency of the DDIC chip has been reduced to 45Hz and no frequency conversion instruction is received to increase the frequency from 45Hz to 120Hz, the AP can only draw and render the image frame C to obtain the image data of the image frame C when the next TE signal (i.e. the TE signal generated according to 45Hz) is received, so that the image data of the image frame C is sent to the DDIC chip through the BSP in the next image refresh period (i.e. the next Gate scanning period after the frequency conversion instruction is received) for the DDIC chip to drive the display screen to display in the next image refresh period (only the image frame B can be repeatedly displayed in the current image refresh period). In the subsequent process, the AP and the DDIC chip maintain the refresh frequency of 120Hz for image display (i.e. image frames D, E).

[0056] From Figure 4 As can be clearly seen from the example shown in the related art, in the display screen frequency conversion method provided in the related art, since there is only one TE signal for each frame of image, when the frequency is increased, the frequency conversion instruction can only be issued in response to the image update request of the application after the current frame is displayed, resulting in a large delay in the display of the picture after the frequency is increased.

[0057] In addition, the user (or the AP) needs to determine whether to reduce or increase the refresh rate of the display screen according to the current application scenario, and manually trigger the adjustment, which is complex and has low accuracy (the user's judgment is prone to errors).

[0058] To solve the above technical problems, the embodiments of the present application provide an adaptive frequency conversion (Adaptive FrameRate, AFR) scheme. In the scheme, the DDIC chip can report at least one TE signal to the AP within Vporch in addition to reporting a TE signal before each frame refresh, so that the AP can draw and render the image according to the TE signal when receiving an image update request within Vporch, and send it to the DDIC chip in time, thereby improving the response speed of the DDIC chip and reducing the delay in the display of the picture during the frequency conversion.

[0059] In addition, in the embodiments of the present application, the DDIC chip can adaptively adjust the refresh frequency of the display screen according to the rendering rate of the AP side. When the rendering speed of the AP is detected to be too slow, the refresh rate of the panel is automatically reduced, thereby realizing the adaptive matching of the refresh rate of the panel side and the rendering rate of the AP side. The entire adjustment process is automatically completed by the DDIC chip (not triggered by the frequency conversion instruction sent by the AP), without the need for manual triggering by the user, thereby simplifying the adjustment process and improving the accuracy and timeliness of the frequency conversion. The following embodiments are described by way of illustration.

[0060] Please refer toFigure 5 , which shows a flow chart of a display screen frequency conversion method according to an example embodiment of the present application. The method is applied to a terminal provided with an AMOLED display screen, and a DDIC chip of the AMOLED display screen is electrically connected to an AP of the terminal. The method comprises the following steps:

[0061] In step 501, the DDIC chip performs image scanning on the first image data according to a first refresh frequency. The image scanning comprises Gate scanning and EM scanning.

[0062] Optionally, the first refresh frequency is one of the refresh frequencies supported by the DDIC chip, and the first refresh frequency is not the maximum refresh frequency supported by the DDIC chip, i.e., there is an upward space for the refresh frequency. For example, when the refresh frequencies supported by the DDIC chip include 30 Hz, 60 Hz, 90 Hz and 120 Hz, the first refresh frequency can be one of 30 Hz, 60 Hz and 90 Hz.

[0063] In step 502, after completing the Gate scanning, the DDIC chip reports at least one TE signal to the AP within Vporch.

[0064] In the example embodiment of the present application, the Gate scanning speed remains unchanged under different refresh frequencies, i.e., the time for refreshing one frame of image remains unchanged, and only Vporch (mainly VFP) is extended. In a possible implementation, the time for refreshing one frame of image by the DDIC chip is the time for refreshing one frame of image by the DDIC chip at the highest refresh frequency.

[0065] Illustratively, when the highest refresh frequency of the DDIC chip is 120 Hz, the DDIC chip performs image refreshing at 90 Hz, i.e., (1 / 90-1 / 120) seconds is extended on the basis of Vporch corresponding to 120 Hz.

[0066] Unlike the DDIC chip in the related art which only reports a TE signal to the AP according to the current refresh frequency (i.e., no additional TE signal is reported within Vporch), in the example embodiment, when there is an upward space for the refresh frequency, after completing the Gate scanning, the DDIC chip reports at least one TE signal within Vporch according to a predetermined strategy, so that the AP can respond to the image update request within Vporch in time.

[0067] In a possible implementation, the DDIC chip reports the TE signal within Vporch according to a preset frequency. For example, the preset frequency is in units of EM scanning period (EM-pulse).

[0068] In step 503, when the AP receives the image update request within Vporch, the AP performs image rendering according to the TE signal to obtain second image data.

[0069] In the related art, when the AP receives an image update request (such as sent by a foreground application) in the Vporch, since the DDIC chip only reports a TE signal once after completing the display of a frame of image, the AP can only respond to the image update request after receiving the TE signal reported by the DDIC chip after completing the image display, and then perform image rendering. In the embodiment of the present application, since the DDIC chip reports a TE signal in the Vporch, the AP can respond to the image update request in the Vporch, and then render and draw the image in the Vporch.

[0070] In a possible implementation, on the AP side, after the BSP receives the TE signal reported by the DDIC chip, the BSP reports the TE signal to the SF. When the SF receives an image update request sent by an application, the SF distributes a TE signal to the application according to the image update request, so that the application performs image rendering and drawing through the CPU and GPU according to the TE signal to obtain second image data (i.e., rasterized image).

[0071] Step 504: The AP sends second image data to the DDIC chip.

[0072] In a possible implementation, the AP instructs the BSP to send the second image data to the DDIC through the MIPI interface (according to the TE signal).

[0073] Step 505: The DDIC chip performs image scanning on the second image data according to a second refresh frequency, and the second refresh frequency is greater than the first refresh frequency.

[0074] Unlike in the related art, where the AP leads the frequency conversion of the display screen, and the DDIC chip can only passively perform frequency conversion after receiving the frequency conversion instruction issued by the AP, in the present embodiment, when the second image data is received, the DDIC chip determines that the refresh frequency of the display screen needs to be increased (because the frequency of the image data sent by the AP is increased), so as to increase the first refresh frequency to the second refresh frequency, and perform image scanning according to the second refresh frequency. In the entire frequency conversion process, the AP does not need to issue a frequency conversion instruction.

[0075] In a possible implementation, the second refresh frequency is a neighboring refresh frequency (and gradually increases the refresh frequency) of the first refresh frequency. For example, the refresh frequencies of the display screen include 60Hz, 90Hz, and 120Hz, and when the first refresh frequency is 60Hz, the second refresh frequency is 90Hz. Alternatively, the second refresh frequency is the highest refresh frequency of the display screen. For example, the refresh frequencies of the display screen include 60Hz, 90Hz, and 120Hz, and when the first refresh frequency is 60Hz, the second refresh frequency is 120Hz.

[0076] In addition, to avoid the impact of large-scale frequency conversion on the screen display, in one possible implementation, after the DDIC chip adjusts the refresh rate of the display screen, it adjusts the display screen parameters according to the display screen parameters corresponding to the second refresh rate in the frame rate register.

[0077] To illustrate, the display parameters corresponding to the first refresh rate (60Hz) are Gamma_60Hz and Demura_60Hz. When the first refresh rate is adjusted to the second refresh rate (120Hz), the DDIC chip will adjust the display parameters to Gamma_120Hz and Demura_120Hz.

[0078] like Figure 6 As shown, using the method provided in this application embodiment, there is a weak correlation between AP 31 and DDIC chip 32. DDIC chip 32 no longer needs to perform frequency conversion according to the frequency conversion command sent by AP 31, but can perform adaptive frequency conversion according to the image drawing and rendering rate on the AP 31 side. In addition, DDIC chip 32 can report Vsync (Gate Vsync reported after Gate scan) in Vporch to perform basic image drawing, rasterized image rendering and image data transmission, reducing the delay in screen display during frequency conversion (especially frequency upscaling).

[0079] In summary, unlike related technologies where the DDIC chip only reports the TE signal to the AP based on the current refresh frequency, in this embodiment, during image scanning at the first refresh frequency, the DDIC chip reports at least one TE signal to the AP within the Vporch after completing the Gate scan. This allows the AP to perform image rendering based on the TE signal when it receives an image update request within the Vporch, thereby promptly sending the rendered second image data to the DDIC chip for image scanning at the second refresh frequency. This improves the frequency conversion response speed and reduces screen latency during frequency conversion (especially during upscaling).

[0080] Please refer to Figure 7 The diagram illustrates a flowchart of a display frequency conversion method according to another exemplary embodiment of this application. The method is applied to a terminal equipped with an AMOLED display, the DDIC chip of which is electrically connected to the terminal's access point (AP). The method includes:

[0081] Step 701: The DDIC chip performs image scanning on the first image data according to the first refresh frequency. The image scanning includes Gate scanning and EM scanning.

[0082] The implementation method of this step can refer to step 501 above, and will not be repeated here in this embodiment.

[0083] In an illustrative example, as shown in Figure 8 The DDIC chip first performs image scanning on image frame A at 120 Hz. At the same time, the application performs rendering on image frame B through the CPU and GPU to obtain image data corresponding to image frame B.

[0084] However, after the display of image frame A is completed, the AP does not receive the image update request (i.e., preparing image frame C) sent by the application, and the AP can only send the image data of image frame B to the DDIC chip through the BSP to control the display screen to perform image scanning. Moreover, since the DDIC chip performs Gate scanning on image frame B, the image data of image frame C is not received, and thus the DDIC chip adjusts the refresh frequency of the display screen from 120 Hz to 45 Hz (i.e., the first refresh frequency).

[0085] After the DDIC chip completes Gate scanning, the DDIC chip reports a TE signal to the AP at an EM frequency in Vporch, and the EM frequency is an integer multiple of the first refresh frequency.

[0086] In this embodiment, after the DDIC chip completes Gate scanning, the DDIC chip reports a TE signal to the AP at a high EM frequency in Vporch, so as to improve the probability that the AP receives the TE signal in Vporch.

[0087] The EM frequency is an integer multiple of the first refresh frequency (and an integer multiple of other refresh frequencies supported by the display screen).

[0088] Illustratively, the refresh frequencies of the display screen include 45 Hz, 60 Hz, and 120 Hz, and the EM frequency is 360 Hz, and when the DDIC chip completes Gate scanning, the DDIC chip reports a TE signal to the AP at a frequency of 360 Hz. As shown in Figure 8 After the DDIC chip completes Gate scanning according to the image data corresponding to image frame B, the DDIC chip reports a TE signal (Gate TE) at a frequency of 360 Hz, and a total of 5 TE signals are reported in Vporch.

[0089] If the TE signal reported by the DDIC chip is received after the image update request is received in Vporch, the AP performs image rendering starting from the TE signal to obtain second image data.

[0090] When there is an image update requirement during Vporch, the AP receives the image update request sent by the application, and further, the AP performs image rendering starting from a TE signal to obtain second image data.

[0091] Illustratively, as shown in Figure 8As shown, during the display of image frame B, the application sends an image update request indicating the update of image frame C (located between the second and third TE signals within Vporch). The AP then begins drawing and rendering image frame C upon receiving the third TE signal reported by the DDIC chip.

[0092] Step 704: AP obtains the rendering time of the second image data.

[0093] To prevent timing errors, the AP needs to limit the image rendering rate. After completing the image rendering, the AP does not send the second image data to the DDIC chip directly upon receiving the TE signal. Instead, it first obtains the rendering time of the second image data and determines whether the image rendering rate is too fast based on this rendering time.

[0094] Indicative, such as Figure 8 As shown, after completing the rendering of image frame C, the AP obtains the rendering duration corresponding to image frame C. Optionally, the rendering duration includes CPU image rendering duration, GPU image compositing rendering duration, and SF compositing duration.

[0095] Step 705: If the rendering time occupies at least k EM scan cycles, the AP sends the second image data to the DDIC chip when it receives the TE signal, wherein the EM frequency is k times the highest refresh frequency of the DDIC chip.

[0096] In one possible implementation, the AP's rendering rate cannot exceed the DDIC chip's maximum refresh rate. For example, when the display's maximum refresh rate is 120Hz, the AP's maximum rendering rate is also 120Hz.

[0097] Optionally, the AP detects whether the rendering time occupies at least k EM scan cycles. If it occupies at least k EM scan cycles, the rendering rate is determined to be normal, and the second image data is sent to the DDIC chip when the TE signal is received. If the occupied EM scan cycles are less than k, the rendering rate is determined to be too fast (even if rendering is completed, the BSP is not allowed to call the frame buffer), and data transmission waits until the waiting time and rendering time occupy at least k EM scan cycles, and the second image data is sent to the DDIC chip when the TE signal is received.

[0098] Indicative, such as Figure 8 As shown, since the highest refresh rate of the DDIC chip is 120Hz and the EM frequency is 360Hz, when the rendering time of image frame C occupies at least 3 EM scan cycles, the AP instructs the BSP to send the image data of image frame C to the DDIC chip when it receives the TE signal.

[0099] In step 706, the DDIC chip performs image scanning on the second image data according to a second refresh frequency, which is greater than the first refresh frequency.

[0100] The implementation of this step can refer to step 505 described above, and will not be described here again.

[0101] As shown in FIG. 6, the DDIC chip receives the image data of the image frame C, and adjusts the refresh frequency to 60 Hz, and performs Gate scanning according to the image data of the image frame C. After completing the Gate scanning, the DDIC chip still reports the TE signal in the Vporch. During the display of the image frame C, the AP receives the image update request of the image frame D, and performs image drawing and rendering in time according to the TE signal, and further adjusts the refresh frequency to 120 Hz during the display of the image frame D. In the subsequent process, the image drawing rate of the AP is maintained at 120 Hz, and the DDIC chip controls the display screen to refresh the image at 120 Hz. Figure 8 As shown in FIG. 6, the DDIC chip receives the image data of the image frame C, and adjusts the refresh frequency to 60 Hz, and performs Gate scanning according to the image data of the image frame C. After completing the Gate scanning, the DDIC chip still reports the TE signal in the Vporch. During the display of the image frame C, the AP receives the image update request of the image frame D, and performs image drawing and rendering in time according to the TE signal, and further adjusts the refresh frequency to 120 Hz during the display of the image frame D. In the subsequent process, the image drawing rate of the AP is maintained at 120 Hz, and the DDIC chip controls the display screen to refresh the image at 120 Hz.

[0102] In this embodiment, the DDIC chip reports the TE signal in the Vporch according to the EM frequency, the AP completes image drawing and rendering based on the TE signal, and when the drawing and rendering rate is less than the highest refresh frequency, the AP sends image data to the DDIC chip. In the process of reducing the frequency, the picture delay is reduced, and the timing exception caused by too fast image rendering of the AP is avoided.

[0103] In the related art, in order to meet the stringent requirements of the AMOLED display screen on the EM, it is necessary to ensure that the EM-Timing matches the Gate-Timing. However, when the method provided in the embodiment of the present application is used to adjust the refresh frequency of the display screen, the DDIC chip is dominated by the EM-Timing and the EM-FR, and no longer needs to match the Gate-Timing, but the Gate-Timing actively matches the timing of the EM-Timing.

[0104] In addition, in addition to the large range frequency conversion scene, there are some small range frequency conversion scenes (i.e. the rendering rate of the AP has a small delay). In the related art, in the small range frequency conversion scene, after the AP detects the rising edge of the TE, it detects whether the image data is ready. If it is ready, the AP sends the image data to the DDIC chip through the MIPI. If it is not ready, the AP calculates the timeout duration (i.e. how long it will take to be ready), and sends a timeout command (TimeoutCommand) to the DDIC chip through the MIPI, so that the DDIC chip adjusts the related parameters according to the timeout command.

[0105] However, when implementing small-scale frequency conversion using the above method, the AP needs to consider rendering speed when calculating the timeout duration, as well as EM timing, to ensure strict matching between GSTV and ESTV, making the calculation process complex. Furthermore, the aforementioned small-scale frequency conversion mode and large-scale frequency conversion mode cannot be performed simultaneously.

[0106] The embodiments of this application are compatible with both small-range and large-range frequency conversion schemes, expanding the application scenarios of display screen frequency conversion. The following is an illustrative description using representative embodiments.

[0107] exist Figure 5 On the basis of, such as Figure 9 As shown, step 501 may include steps 901 to 902, and step 902 may be followed by steps 903 to 905.

[0108] Step 901: The DDIC chip performs timing matching between the first ESTV and VBP, and performs EM scanning according to the EM frequency.

[0109] Unlike the timing of matching the EM signal with the Gate signal in related technologies, in this embodiment, the DDIC chip first performs timing matching on the first ESTV (matching with VBP), and then performs timing matching on the first GSTV with the first ESTV.

[0110] In the process of matching ESTV timings, DDIC determines the timing position of VBP and then performs timing matching between the first ESTV (in its off state) and VBP.

[0111] After completing the ESTV timing match, the DDIC chip performs an EM scan according to the EM frequency and keeps the frequency constant. Furthermore, in this embodiment, the EM frequency is an integer multiple of the display refresh rate. For example, when the display refresh rate includes 60Hz, 90Hz, and 120Hz, the EM frequency is 360Hz.

[0112] Step 903: The DDIC chip performs timing matching between the first GSTV and the first ESTV, and performs gate scanning according to the first refresh frequency.

[0113] When matching the GSTV timing, the DDIC chip performs timing matching between the first GSTV and the first ESTV to meet the requirements of the AMOLED display for the EM.

[0114] After completing the GSTV timing matching, the DDIC chip performs a gate scan according to the first refresh frequency, thereby displaying the image corresponding to the first image data on the AMOLED display.

[0115] In step 903, if the third image data sent by the AP is not received within the VFP delay duration, the DDIC chip adjusts the first refresh frequency to a third refresh frequency, and the third refresh frequency is lower than the first refresh frequency.

[0116] Unlike the related art, the display screen frequency conversion is dominated by the AP, and the DDIC chip can only passively convert after receiving the frequency conversion instruction issued by the AP. In the embodiment of the present application, during the process of waiting for the AP to send the image data of the next frame of image (i.e. the third image data), the DDIC chip determines whether the image data is sent overtime according to the built-in VFP timeout timer. If the sending is not overtime (i.e. the third image data is received within the VFP duration corresponding to the first refresh frequency), the image update is continued according to the first refresh frequency; if the sending is overtime (i.e. the third image data is not received within the VFP duration corresponding to the first refresh frequency), it is determined that the image rendering rate on the AP side is lower than the current refresh frequency of the display screen, so as to adjust the refresh frequency of the AMOLED display screen.

[0117] In a possible implementation, when the AMOLED display screen is provided with at least three refresh frequencies, when the DDIC chip adjusts the first refresh frequency to the third refresh frequency, the third refresh frequency is the lowest refresh frequency of the AMOLED display screen, i.e. the DDIC chip directly reduces the refresh frequency to the lowest, or the third refresh frequency is the next level refresh frequency of the first refresh frequency, i.e. the DDIC chip gradually reduces the refresh frequency to the lowest.

[0118] In an illustrative example, when the AMOLED display screen is provided with three refresh frequencies, 60Hz, 90Hz and 120Hz, when the third image data is not received within the VFP delay duration, the DDIC chip gradually reduces the refresh frequency of the display screen from 120Hz to 60Hz (120Hz→90Hz→60Hz).

[0119] Optionally, the present step can include the following sub-steps.

[0120] I. If the third image data is not received within the VFP corresponding to the first refresh frequency, the DDIC chip automatically prolongs the VFP.

[0121] In a possible implementation, during the process of waiting for the third image data, the DDIC chip sets a timeout timer according to the VFP corresponding to the first refresh frequency; when the timeout timer reaches the timer duration, the DDIC chip determines that the rendering rate on the AP side is lower than the refresh frequency of the display screen, and automatically prolongs the VFP. For example, the DDIC chip sets a timeout timer according to VFP_120Hz corresponding to 120Hz.

[0122] Wherein, the DDIC chip prolongs the VFP in the EM period.

[0123] II. If the prolonging duration reaches the VFP delay duration and the third image data is not received, the DDIC chip adjusts the first refresh frequency to the third refresh frequency, and the VFP delay duration is determined according to the VFP corresponding to the third refresh frequency.

[0124] In a possible implementation, when the prolonging duration reaches the VFP delay duration, but the DDIC chip still does not receive the third image data sent by the AP, the DDIC chip determines that it is necessary to greatly reduce the refresh frequency of the display screen, and thus adjusts the first refresh frequency to the third refresh frequency.

[0125] Optionally, the DDIC chip stores the VFP prolonging duration calculated accurately, and when the VFP is prolonged automatically, the DDIC chip sets and starts the timer according to the VFP prolonging duration. Correspondingly, if the third image data is not received within the timer duration, the DDIC chip adjusts the first refresh rate to the third refresh rate.

[0126] In a possible implementation, for the display screen provided with three refresh frequencies of 60 / 90 / 120 Hz, the DDIC chip stores a first VFP prolonging duration and a second VFP prolonging duration, wherein the first VFP prolonging duration is calculated according to the VFP corresponding to 90 Hz and 120 Hz (for example, VFP_90Hz-VFP_120Hz), and the second VFP prolonging duration is calculated according to the VFP corresponding to 60 Hz and 90 Hz (for example, VFP_60Hz-VFP_90Hz).

[0127] Correspondingly, if the third image frame data is not received within VFP_120Hz, the DDIC chip sets the first timer according to the first VFP prolonging duration. If the third image frame data is not received within the timer duration of the first timer, the refresh frequency of the display screen is adjusted from 120 Hz to 90 Hz, and the second timer is set according to the second VFP prolonging duration. If the third image frame data is not received within the timer duration of the second timer, the refresh frequency of the display screen is adjusted from 90 Hz to 60 Hz, and the refresh frequency is maintained (i.e., the lowest refresh frequency is maintained).

[0128] It should be noted that the above embodiment is only described by taking the step-by-step adjustment of the refresh frequency as an example, and in other possible implementations, the DDIC chip can also be directly adjusted to the lowest refresh frequency, which is not limited in the present embodiment.

[0129] Step 904, the DDIC chip adjusts the display screen parameter of the AMOLED display screen according to the third refresh frequency.

[0130] In order to avoid the influence of large-scale frequency conversion on picture display, the DDIC chip needs to set the AMOLED display screen according to the display screen parameters corresponding to the third refresh frequency.

[0131] At step 905, the DDIC chip adjusts the VFP according to the position of the next ESTV, wherein the GSTV after the adjustment of the VFP matches the timing of the next ESTV.

[0132] In order to avoid the influence of frequency conversion on picture display, the DDIC chip still needs to keep the timing of the GSTV and the ESTV matching while adjusting the screen refresh frequency. In a more possible implementation, the DDIC chip adjusts the length of the VFP according to the position of the next ESTV, so that the GSTV after the adjustment matches the timing of the next ESTV.

[0133] Optionally, if the third image data is received within the VFP delay length, the DDIC chip obtains the time interval between the current time and the falling edge of the nth ESTV, which is the next ESTV of the current time.

[0134] If the third image data issued by the AP is received within the VFP delay length, it indicates that there is a small delay in the rendering of the AP, i.e. the refresh frequency of the display screen does not need to be adjusted at this time. At this time, in order to meet the strict requirements of the display screen on the EM, the DDIC chip obtains the time interval (EM_Distance) between the current time (i.e. the time when the third image data is received) and the falling edge of the next ESTV, so as to adjust the VFP based on the time interval subsequently.

[0135] It should be noted that when obtaining the time interval, the DDIC chip needs to pull down the TE.

[0136] Adjust the VFP according to the time interval, wherein the GSTV after the adjustment of the VFP matches the timing of the ESTV.

[0137] In order to make the GSTV match the timing of the ESTV, the DDIC chip needs to adjust the length of the VFP so that the GSTV matches the timing of the ESTV, and then control the display screen to update the image according to the third image data.

[0138] In a possible implementation, the present step can include the following sub-steps.

[0139] I. Obtain the sum of the lengths of the VFP and the VBP corresponding to the first refresh frequency.

[0140] Optionally, when adjusting the VFP, the DDIC chip obtains the lengths of the VFP and the VBP corresponding to the first refresh frequency respectively, and calculates the sum (VFP+VBP) of the lengths.

[0141] Further, the DDIC chip detects whether the time interval is greater than the sum of the time lengths. If yes, it indicates that the image update preparation can be completed before the next ESTV, and thus step two is performed. If no, it indicates that the image update preparation cannot be completed before the next ESTV, and thus step three is performed.

[0142] II. If the time interval is greater than the sum of the time lengths, the VFP is adjusted in the first mode, wherein after the VFP is adjusted in the first mode, the timing of the GSTV matches that of the n-th ESTV.

[0143] If EM_Distance is greater than or equal to VFP+VBP, the DDIC chip adjusts the VFP time length so that the timing of the adjusted GSTV matches that of the next ESTV.

[0144] III. If the time interval is less than the sum of the time lengths, the VFP is adjusted in the second mode, wherein after the VFP is adjusted in the second mode, the timing of the GSTV matches that of the n+1-th ESTV.

[0145] If EM_Distance is less than VFP+VBP, the DDIC chip determines that an EM signal period needs to be delayed, and thus adjusts the VFP time length so that the timing of the adjusted GSTV matches that of the n+2-th ESTV.

[0146] It should be noted that since small-amplitude frequency conversion has little effect on Gamma and Demura (which can be ignored), the display screen parameters can remain unchanged while the VFP is adjusted through the above steps.

[0147] In general, as shown in Table 1, the display screen frequency conversion scheme provided by the embodiments of the present application has the following differences and advantages compared with the related art.

[0148] Table 1

[0149]

[0150] The embodiments of the present application also provide a DDIC chip applied to an AMOLED display screen, and the DDIC chip is electrically connected to an AP of a terminal. The DDIC chip is configured to:

[0151] perform image scanning on the first image data according to the first refresh frequency, wherein the image scanning includes Gate scanning and EM scanning;

[0152] report at least one TE signal to the AP in the Vporch after the Gate scanning is completed;

[0153] receive second image data sent by the AP, wherein the second image data is obtained by performing image rendering on the TE signal by the AP when the image update request is received in the Vporch.

[0154] The second image data is scanned according to a second refresh frequency, and the second refresh frequency is greater than the first refresh frequency.

[0155] Optionally, the DDIC chip is configured to:

[0156] In the Vporch, the TE signal is reported to the AP according to an EM frequency, and the EM frequency is an integer multiple of the first refresh frequency.

[0157] Optionally, the DDIC chip is configured to:

[0158] The first ESTV is time-matched with the VBP, and EM scanning is performed according to the EM frequency.

[0159] The first GSTV is time-matched with the first ESTV, and Gate scanning is performed according to the first refresh frequency.

[0160] Optionally, the DDIC chip is further configured to:

[0161] If the third image data sent by the AP is not received within the VFP delay duration, the first refresh frequency is adjusted to a third refresh frequency, and the third refresh frequency is lower than the first refresh frequency.

[0162] The display screen parameters of the AMOLED display screen are adjusted according to the third refresh frequency.

[0163] Optionally, the DDIC chip is further configured to:

[0164] If the third image data is not received within the VFP corresponding to the first refresh frequency, the VFP is automatically extended.

[0165] If the extension duration reaches the VFP delay duration and the third image data is not received, the first refresh frequency is adjusted to the third refresh frequency, and the VFP delay duration is determined according to the VFP corresponding to the third refresh frequency.

[0166] Optionally, the DDIC chip is further configured to:

[0167] The VFP is adjusted according to the position of the next ESTV, and after the VFP is adjusted, the time sequence of the GSTV and the next ESTV is matched.

[0168] The above DDIC chip can refer to the detailed processes of the display screen frequency conversion method in the above method embodiments, and the present embodiment will not be repeated here.

[0169] Further, the display screen module comprises an AMOLED display screen and a DDIC chip, the DDIC chip is used for driving the AMOLED display screen, and the DDIC chip is used for implementing the display screen frequency conversion method provided in each method embodiment.

[0170] The AP is electrically connected with a DDIC chip of an AMOLED display screen, and the AP is used for:

[0171] The AP sends first image data to the DDIC chip, and the DDIC chip is used for performing image scanning on the first image data according to a first refresh frequency, the image scanning comprising Gate scanning and EM scanning.

[0172] The AP receives at least one TE signal reported by the DDIC chip, the TE signal being reported by the DDIC chip in Vporch after completing the Gate scanning.

[0173] If an image update request is received in Vporch, the AP performs image drawing rendering according to the TE signal to obtain second image data.

[0174] The AP sends the second image data to the DDIC chip, and the DDIC chip is used for performing image scanning on the second image data according to a second refresh frequency, the second refresh frequency being greater than the first refresh frequency.

[0175] Optionally, the AP is further used for:

[0176] The AP obtains a drawing rendering duration of the second image data.

[0177] If the drawing rendering duration occupies at least k EM scanning periods, the AP sends the second image data to the DDIC chip when receiving the TE signal, wherein the EM frequency is k times of the highest refresh frequency of the DDIC chip.

[0178] Optionally, the AP is further used for:

[0179] If the TE signal reported by the DDIC chip is received after receiving the image update request, the AP performs image drawing rendering starting from the TE signal to obtain the second image data.

[0180] Please refer to Figure 10 which shows a structural block diagram of a terminal 1000 provided in an example embodiment of the present application. The terminal 1000 can be a smart phone, a tablet computer, a notebook computer, etc. The terminal 1000 in the present application can comprise one or more of the following components: an (application) processor 1010, a memory 1020, a display screen module 1030.

[0181] The processor 1010 can include one or more processing cores. The processor 1010 connects various parts within the terminal 1000 with various interfaces and lines, performs various functions of the terminal 1000 and processes data by running or executing instructions, programs, code sets or instruction sets stored in the memory 1020, and calling data stored in the memory 1020. Alternatively, the processor 1010 can be implemented in at least one of a hardware form of a digital signal processor (DSP), a field-programmable gate array (FPGA), a programmable logic array (PLA). The processor 1010 can integrate a combination of one or several of a central processing unit (CPU), a graphics processing unit (GPU), a neural-network processing unit (NPU), and a modem. Among them, the CPU mainly processes an operating system, a user interface, and an application program; the GPU is responsible for rendering and drawing the content to be displayed by the touch display module 1030; the NPU is used to implement an artificial intelligence (AI) function; and the modem is used to process wireless communication. It can be understood that the above-mentioned modem can also not be integrated into the processor 1010, but be implemented by a separate chip.

[0182] The memory 1020 can include a random access memory (RAM) and can also include a read-only memory (ROM). Alternatively, the memory 1020 includes a non-transitory computer-readable storage medium. The memory 1020 can be used to store instructions, programs, codes, code sets or instruction sets. The memory 1020 can include a program storage area and a data storage area, wherein the program storage area can store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playing function, an image playing function, etc.), instructions for implementing various method embodiments of the present application, etc.; and the data storage area can store data created according to the use of the terminal 1000 (such as audio data, a phone book, etc.).

[0183] The display screen module 1030 is a display component for image display, and is usually arranged on the front panel of the terminal 1000. The display screen module 1030 can be designed as a full screen, a curved screen, a special-shaped screen, a double-sided screen or a folding screen. The display screen module 1030 can also be designed as a combination of a full screen and a curved screen, a combination of a special-shaped screen and a curved screen, and the present embodiment does not make any limitation in this regard.

[0184] In the present embodiment, the display screen module 1030 includes a DDIC chip 1031 and a display screen 1032 (panel). The display screen 1032 is an AMOLED display screen, which can be a Low Temperature Poly-Silicon (LTPS) AMOLED display screen or a Low Temperature Polycrystalline Oxide (LTPO) AMOLED display screen.

[0185] The DDIC chip 1031 is used to drive the display screen 1032 to display images, and the DDIC chip 1031 is used to implement the display screen frequency conversion method provided in the above various embodiments. In addition, the DDIC chip 1031 is connected to the processor 1010 through an MIPI interface, and is used to receive image data and instructions issued by the processor 1010.

[0186] In a possible implementation, the display screen module 1030 also has a touch function. Through the touch function, the user can use a finger, a touch pen or any other suitable object to perform a touch operation on the display screen module 1030.

[0187] In addition, those skilled in the art can understand that the structure of the terminal 1000 shown in the above-mentioned drawings does not constitute a limitation on the terminal 1000. The terminal can include more or fewer components than those shown in the drawings, or combine certain components, or different component arrangements. For example, the terminal 1000 also includes a microphone, a speaker, a radio frequency circuit, an input unit, a sensor, an audio circuit, a Wireless Fidelity (WiFi) module, a power supply, a Bluetooth module and the like, which are not described herein again.

[0188] Those skilled in the art should realize that, in one or more of the above examples, the functions described in the embodiments of the present application can be realized by hardware, software, firmware or any combination thereof. When realized by software, these functions can be stored in a computer readable medium or transmitted as one or more instructions or codes on a computer readable medium. The computer readable medium includes a computer storage medium and a communication medium, wherein the communication medium includes any medium that facilitates the transmission of a computer program from one place to another. The storage medium can be any available medium that can be accessed by a general or special purpose computer.

[0189] The above only is optional embodiment of the present application, and does not use to limit the present application, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application, should be included in the protection scope of the present application.

Claims

1. A method for frequency conversion of a display screen, characterized in that, The method is used in a terminal equipped with an active-matrix organic light-emitting diode (AMOLED) display screen, wherein the display driver integrated circuit (DDIC) chip of the AMOLED display screen is electrically connected to the application processor (AP) of the terminal, and the method includes: The DDIC chip performs timing matching between the first emission start signal ESTV and the column-direction backward delay interval VBP, and performs EM scanning according to the EM frequency; The DDIC chip performs timing matching between the first gate start signal GSTV and the first ESTV, and performs gate scanning according to the first refresh frequency. After the DDIC chip completes the Gate scan, if the first refresh frequency is less than the maximum supported refresh frequency, it reports at least one tearing effect TE signal to the AP within the vertical interval Vporch. When the AP receives an image update request in the Vporch, it performs image rendering based on the TE signal to obtain the second image data. The AP sends the second image data to the DDIC chip; The DDIC chip performs image scanning on the second image data according to a second refresh frequency, which is greater than the first refresh frequency.

2. The method according to claim 1, characterized in that, The step of reporting at least one TE signal to the AP within Vporch includes: The DDIC chip, within the Vporch, reports the TE signal to the AP according to the EM frequency, where the EM frequency is an integer multiple of the first refresh frequency.

3. The method according to claim 2, characterized in that, The AP sends the second image data to the DDIC chip, including: The AP obtains the rendering time of the second image data; If the rendering time occupies at least k EM scan cycles, the AP sends the second image data to the DDIC chip when it receives the TE signal, wherein the EM frequency is k times the highest refresh frequency of the DDIC chip.

4. The method according to any one of claims 1 to 3, characterized in that, When the AP receives an image update request within the Vporch, it performs image rendering based on the TE signal to obtain second image data, including: If the AP receives the TE signal reported by the DDIC chip after receiving the image update request, the AP will start image rendering from the TE signal to obtain the second image data.

5. The method according to any one of claims 1 to 3, characterized in that, The method further includes: If the third image data sent by the AP is not received within the column forward delay interval VFP delay time, the DDIC chip will adjust the first refresh frequency to the third refresh frequency, which is lower than the first refresh frequency. The DDIC chip adjusts the display parameters of the AMOLED display according to the third refresh rate.

6. The method according to claim 5, characterized in that, If the third image data sent by the AP is not received within the VFP delay time, the DDIC chip adjusts the first refresh frequency to the third refresh frequency, including: If the third image data is not received within the VFP corresponding to the first refresh frequency, the DDIC chip will automatically extend the VFP. If the extended duration reaches the VFP delay duration and the third image data is not received, the DDIC chip will adjust the first refresh frequency to the third refresh frequency, and the VFP delay duration will be determined according to the VFP corresponding to the third refresh frequency.

7. The method according to claim 5, characterized in that, After the DDIC chip adjusts the first refresh frequency to the third refresh frequency, the method further includes: The DDIC chip adjusts the VFP according to the position of the next ESTV, wherein the timing of the GSTV is matched with that of the next ESTV after the VFP is adjusted.

8. A display driver integrated circuit (DDIC) chip, characterized in that, The DDIC chip is used in an active-matrix organic light-emitting diode (AMOLED) display, and is electrically connected to the application processor (AP) of the terminal. The DDIC chip is used for: The first emission start signal ESTV is time-matched with the column-direction backward delay interval VBP, and an EM scan is performed according to the EM frequency. The first gate start signal GSTV is time-matched with the first ESTV, and a gate scan is performed according to the first refresh frequency. After completing the Gate scan, if the first refresh frequency is less than the maximum supported refresh frequency, at least one tearing effect (TE) signal is reported to the AP within the vertical interval Vporch. The AP receives second image data sent by the AP. The second image data is obtained by the AP drawing and rendering an image based on the TE signal when it receives an image update request in the Vporch. The second image data is scanned according to a second refresh frequency, which is greater than the first refresh frequency.

9. The DDIC chip according to claim 8, characterized in that, The DDIC chip is used for: Within the Vporch, the TE signal is reported to the AP at an EM frequency that is an integer multiple of the first refresh frequency.

10. The DDIC chip according to claim 8, characterized in that, The DDIC chip is also used for: If the third image data sent by the AP is not received within the VFP delay time, the first refresh frequency is adjusted to the third refresh frequency, which is lower than the first refresh frequency. The display parameters of the AMOLED display are adjusted according to the third refresh rate.

11. The DDIC chip according to claim 10, characterized in that, The DDIC chip is also used for: If the third image data is not received within the VFP corresponding to the first refresh frequency, the VFP is automatically extended; If the extended duration reaches the VFP delay duration and the third image data is not received, then the first refresh frequency is adjusted to the third refresh frequency, and the VFP delay duration is determined according to the VFP corresponding to the third refresh frequency.

12. The DDIC chip according to claim 10, characterized in that, The DDIC chip is also used for: Adjust the VFP according to the position of the next ESTV, wherein the timing of the GSTV is matched with that of the next ESTV after the VFP is adjusted.

13. An application processor (AP), characterized in that, The AP is electrically connected to the display driver integrated circuit (DDIC) chip of the active-matrix organic light-emitting diode (AMOLED) display screen. The AP is used for: The first image data is sent to the DDIC chip, which is used to time-match the first emission start signal ESTV with the column backward delay interval VBP and perform EM scanning according to the EM frequency; and to time-match the first gate start signal GSTV with the first ESTV and perform gate scanning according to the first refresh frequency. Receive at least one tearing effect TE signal reported by the DDIC chip, wherein the TE signal is reported by the DDIC chip within the vertical interval Vporch after the Gate scan is completed, when the first refresh frequency is less than the maximum supported refresh frequency; If an image update request is received within the Vporch, then image rendering is performed according to the TE signal to obtain the second image data; The second image data is sent to the DDIC chip, which is used to perform image scanning on the second image data according to a second refresh frequency, wherein the second refresh frequency is greater than the first refresh frequency.

14. The AP according to claim 13, characterized in that, The AP is also used for: Obtain the rendering time of the second image data; If the rendering time occupies at least k EM scan cycles, then upon receiving the TE signal, the second image data is sent to the DDIC chip, wherein the EM frequency is k times the highest refresh frequency of the DDIC chip.

15. The AP according to claim 13 or 14, characterized in that, The AP is also used for: If the TE signal reported by the DDIC chip is received after receiving the image update request, then image rendering is performed starting from the TE signal to obtain the second image data.

16. A display module, characterized in that, The display module includes an active-matrix organic light-emitting diode (AMOLED) display and a display driver integrated circuit (DDIC) chip. The DDIC chip is used to drive the AMOLED display and includes the DDIC chip as described in any one of claims 8 to 12.

17. A terminal, characterized in that, The terminal includes an application processor (AP), an active-matrix organic light-emitting diode (AMOLED) display, and a display driver integrated circuit (DDIC) chip. The AP and the DDIC chip are connected via a Mobile Industry Processor Interface (MIPI). The DDIC chip includes any of the DDIC chips described in claims 8 to 12, and the AP includes any of the APs described in claims 13 to 15.

Images